diff options
author | Trevor Wu <trevor.wu@mediatek.com> | 2023-05-10 11:55:24 +0800 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2023-05-15 20:05:11 +0900 |
commit | 2e5c422a624aa35cefb5a448a2040df6627f505b (patch) | |
tree | bf7917ae8e596d04a9a12a77070209a10749c9bf /sound/soc | |
parent | fb167449cec1d2f34ef4c6d17ff860076ac0fc44 (diff) |
ASoC: mediatek: mt8188: add required clocks
apll2_d4, apll12_div4, top_a2sys and top_aud_iec are possibly used in
the future. To prevent from breaking binding ABI after any mt8188 dts
upstream, add these clocks to clock list in advance.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com
Link: https://lore.kernel.org/r/20230510035526.18137-8-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/mediatek/mt8188/mt8188-afe-clk.c | 4 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8188/mt8188-afe-clk.h | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c index 02411be93900..4c24d0b9e90d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c @@ -25,14 +25,18 @@ static const char *aud_clks[MT8188_CLK_NUM] = { /* divider */ [MT8188_CLK_TOP_APLL1_D4] = "apll1_d4", + [MT8188_CLK_TOP_APLL2_D4] = "apll2_d4", [MT8188_CLK_TOP_APLL12_DIV0] = "apll12_div0", [MT8188_CLK_TOP_APLL12_DIV1] = "apll12_div1", [MT8188_CLK_TOP_APLL12_DIV2] = "apll12_div2", [MT8188_CLK_TOP_APLL12_DIV3] = "apll12_div3", + [MT8188_CLK_TOP_APLL12_DIV4] = "apll12_div4", [MT8188_CLK_TOP_APLL12_DIV9] = "apll12_div9", /* mux */ [MT8188_CLK_TOP_A1SYS_HP_SEL] = "top_a1sys_hp", + [MT8188_CLK_TOP_A2SYS_SEL] = "top_a2sys", + [MT8188_CLK_TOP_AUD_IEC_SEL] = "top_aud_iec", [MT8188_CLK_TOP_AUD_INTBUS_SEL] = "top_aud_intbus", [MT8188_CLK_TOP_AUDIO_H_SEL] = "top_audio_h", [MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL] = "top_audio_local_bus", diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h index 04cb476f0bcb..904505d10841 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h @@ -23,13 +23,17 @@ enum { MT8188_CLK_APMIXED_APLL2, /* divider */ MT8188_CLK_TOP_APLL1_D4, + MT8188_CLK_TOP_APLL2_D4, MT8188_CLK_TOP_APLL12_DIV0, MT8188_CLK_TOP_APLL12_DIV1, MT8188_CLK_TOP_APLL12_DIV2, MT8188_CLK_TOP_APLL12_DIV3, + MT8188_CLK_TOP_APLL12_DIV4, MT8188_CLK_TOP_APLL12_DIV9, /* mux */ MT8188_CLK_TOP_A1SYS_HP_SEL, + MT8188_CLK_TOP_A2SYS_SEL, + MT8188_CLK_TOP_AUD_IEC_SEL, MT8188_CLK_TOP_AUD_INTBUS_SEL, MT8188_CLK_TOP_AUDIO_H_SEL, MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL, |