diff options
| author | Bard Liao <yung-chuan.liao@linux.intel.com> | 2022-06-15 16:43:47 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-06-15 09:56:56 +0100 |
| commit | ab222a4aaecfafece1516c775143e1cb9eb31612 (patch) | |
| tree | 0eb0f48dd9c5d569059be8bb8db0d8c0a4749655 /sound/soc/sof/intel/tgl.c | |
| parent | d919630fe77904931277e663c902582ea6f4e4cf (diff) | |
ASoC: SOC: Intel: introduce cl_init callback
The code loader init sequences are different between versions of
Intel platforms. Have a cl_init callback allows us to reuse the
common code.
No function changed.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/sof/intel/tgl.c')
| -rw-r--r-- | sound/soc/sof/intel/tgl.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/sof/intel/tgl.c b/sound/soc/sof/intel/tgl.c index dcad7c382de6..6dfb4786c782 100644 --- a/sound/soc/sof/intel/tgl.c +++ b/sound/soc/sof/intel/tgl.c @@ -127,6 +127,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = { .sdw_alh_base = SDW_ALH_BASE, .check_sdw_irq = hda_common_check_sdw_irq, .check_ipc_irq = hda_dsp_check_ipc_irq, + .cl_init = cl_dsp_init, .hw_ip_version = SOF_INTEL_CAVS_2_5, }; EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -149,6 +150,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = { .sdw_alh_base = SDW_ALH_BASE, .check_sdw_irq = hda_common_check_sdw_irq, .check_ipc_irq = hda_dsp_check_ipc_irq, + .cl_init = cl_dsp_init, .hw_ip_version = SOF_INTEL_CAVS_2_5, }; EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -171,6 +173,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = { .sdw_alh_base = SDW_ALH_BASE, .check_sdw_irq = hda_common_check_sdw_irq, .check_ipc_irq = hda_dsp_check_ipc_irq, + .cl_init = cl_dsp_init, .hw_ip_version = SOF_INTEL_CAVS_2_5, }; EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -193,6 +196,7 @@ const struct sof_intel_dsp_desc adls_chip_info = { .sdw_alh_base = SDW_ALH_BASE, .check_sdw_irq = hda_common_check_sdw_irq, .check_ipc_irq = hda_dsp_check_ipc_irq, + .cl_init = cl_dsp_init, .hw_ip_version = SOF_INTEL_CAVS_2_5, }; EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); |