diff options
author | Annaliese McDermond <nh6z@nh6z.net> | 2019-03-21 17:58:47 -0700 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2019-03-25 15:53:47 +0000 |
commit | a51b50062091619915c5155085bbe13a7aca6903 (patch) | |
tree | 63256be3e440a3b5eff50693286302be13777a27 /sound/soc/codecs/tlv320aic32x4.h | |
parent | fd2df3aeafa4b4cc468d58e147e0822967034b71 (diff) |
ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF
Model and manage DAC/ADC dividers as components in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/tlv320aic32x4.h')
-rw-r--r-- | sound/soc/codecs/tlv320aic32x4.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.h b/sound/soc/codecs/tlv320aic32x4.h index e2b65bbba7c2..6ede877b00a0 100644 --- a/sound/soc/codecs/tlv320aic32x4.h +++ b/sound/soc/codecs/tlv320aic32x4.h @@ -206,6 +206,10 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name); #define AIC32X4_RMICPGANIN_IN1L_10K 0x10 #define AIC32X4_RMICPGANIN_CM1R_10K 0x40 +/* Common mask and enable for all of the dividers */ +#define AIC32X4_DIVEN BIT(7) +#define AIC32X4_DIV_MASK GENMASK(6, 0) + /* Clock Limits */ #define AIC32X4_MAX_PLL_CLKIN 20000000 |