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authorLars Povlsen <lars.povlsen@microchip.com>2020-08-24 22:30:06 +0200
committerMark Brown <broonie@kernel.org>2020-09-08 16:15:37 +0100
commit53a09635ce56e3041fb3cbc7ceef8f5de28259a5 (patch)
tree423c56b03232fe8bc36107474df5c72bd25ed7c3 /lib/idr.c
parentbac70b54ecb53b3d5af862dd4fcbaaad8f34ed23 (diff)
spi: dw: Add Microchip Sparx5 support
This adds SPI support for the Sparx5 SoC, which is using the MMIO Designware SPI controller. The Sparx5 differs from the Ocelot version in these areas: * The CS override is controlled by a new set of registers for this purpose. * The Sparx5 SPI controller has the RX sample delay register, and it must be configured for the (SPI NAND) device on SPI2. * The Sparx5 SPI controller has 2 different SPI bus interfaces on the same controller (don't ask...). The "spi-mux" driver should be used in conjunction with the SPI driver to select the appropriate bus. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-3-lars.povlsen@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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