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authorThomas Gleixner <tglx@linutronix.de>2023-05-12 23:07:01 +0200
committerPeter Zijlstra <peterz@infradead.org>2023-05-15 13:44:48 +0200
commit134a12827bc59484c4d4a3ceabf178c831febbb8 (patch)
tree6031ffdf14524672a3fcaa09575f5a99aa271818 /kernel/params.c
parentba831b7b1a517ba7f25d6fa9736a8092d07b0c74 (diff)
x86/smpboot: Avoid pointless delay calibration if TSC is synchronized
When TSC is synchronized across sockets then there is no reason to calibrate the delay for the first CPU which comes up on a socket. Just reuse the existing calibration value. This removes 100ms pointlessly wasted time from CPU hotplug per socket. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Oleksandr Natalenko <oleksandr@natalenko.name> Tested-by: Helge Deller <deller@gmx.de> # parisc Tested-by: Guilherme G. Piccoli <gpiccoli@igalia.com> # Steam Deck Link: https://lore.kernel.org/r/20230512205255.608773568@linutronix.de
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