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authorShubhrajyoti Datta <shubhrajyoti.datta@amd.com>2023-12-15 11:03:52 +0530
committerBorislav Petkov (AMD) <bp@alien8.de>2023-12-15 13:01:27 +0100
commit9483aa44912f26da2b69dade6099c2bf4b50a8c3 (patch)
tree5471005218f692b81ca1a73fd74f8ea45f9fb144 /kernel/dma.c
parenta39b6ac3781d46ba18193c9dbb2110f31e9bffe9 (diff)
EDAC/versal: Read num_csrows and num_chans using the correct bitfield macro
Fix the extraction of num_csrows and num_chans. The extraction of the num_rows is wrong. Instead of extracting using the FIELD_GET it is calling FIELD_PREP. The issue was masked as the default design has the rows as 0. Fixes: 6f15b178cd63 ("EDAC/versal: Add a Xilinx Versal memory controller driver") Closes: https://lore.kernel.org/all/60ca157e-6eff-d12c-9dc0-8aeab125edda@linux-m68k.org/ Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20231215053352.8740-1-shubhrajyoti.datta@amd.com
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