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authorJames Morse <james.morse@arm.com>2018-01-15 19:38:59 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2018-01-16 15:07:12 +0000
commit68ddbf09ec5a888ec850edd7e7438d2daf069c56 (patch)
tree07f56625a64473270c90dcfc8c74589540b81e96 /init
parentf751daa4f9d3da07e2777ea0c1ba2d58ff2c860f (diff)
arm64: kernel: Prepare for a DISR user
KVM would like to consume any pending SError (or RAS error) after guest exit. Today it has to unmask SError and use dsb+isb to synchronise the CPU. With the RAS extensions we can use ESB to synchronise any pending SError. Add the necessary macros to allow DISR to be read and converted to an ESR. We clear the DISR register when we enable the RAS cpufeature, and the kernel has not executed any ESB instructions. Any value we find in DISR must have belonged to firmware. Executing an ESB instruction is the only way to update DISR, so we can expect firmware to have handled any deferred SError. By the same logic we clear DISR in the idle path. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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