diff options
author | Jiri Pirko <jiri@nvidia.com> | 2024-01-03 14:28:36 +0100 |
---|---|---|
committer | Jakub Kicinski <kuba@kernel.org> | 2024-01-05 07:58:19 -0800 |
commit | 8a6286c1804e2c7144aef3154a0357c4b496e10b (patch) | |
tree | 6f7e86daa06fe9de97c1fb35703b151c56e14096 /include/uapi | |
parent | 82e7b22f647202ecd8f25de2bd3f1276bbd34989 (diff) |
dpll: expose fractional frequency offset value to user
Add a new netlink attribute to expose fractional frequency offset value
for a pin. Add an op to get the value from the driver.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-2-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/linux/dpll.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h index 715a491d2727..b4e947f9bfbc 100644 --- a/include/uapi/linux/dpll.h +++ b/include/uapi/linux/dpll.h @@ -179,6 +179,7 @@ enum dpll_a_pin { DPLL_A_PIN_PHASE_ADJUST_MAX, DPLL_A_PIN_PHASE_ADJUST, DPLL_A_PIN_PHASE_OFFSET, + DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, __DPLL_A_PIN_MAX, DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) |