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authorRobert Bragg <robert@sixbynine.org>2017-06-13 12:22:59 +0100
committerBen Widawsky <ben@bwidawsk.net>2017-06-14 12:31:57 -0700
commit7fed555c02f754af44f8963890b5ef8e30e97391 (patch)
tree1ff593236422a476c40bae28f388c1f3faeca40b /include/uapi
parent9ee82d783eef3177928a586c1df3f08d9ced72a8 (diff)
drm/i915: expose _SLICE_MASK GETPARM
Enables userspace to determine the maximum number of slices that can be enabled on the device and also know what specific slices can be enabled. This information is required, for example, to be able to analyse some OA counter reports where the counter configuration depends on the HW slice configuration. Signed-off-by: Robert Bragg <robert@sixbynine.org> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/i915_drm.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index f24a80d2d42e..25695c3d9a76 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -418,6 +418,9 @@ typedef struct drm_i915_irq_wait {
*/
#define I915_PARAM_HAS_EXEC_CAPTURE 45
+/* Query the mask of slices available for this system */
+#define I915_PARAM_SLICE_MASK 46
+
typedef struct drm_i915_getparam {
__s32 param;
/*