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authorRusty Russell <rusty@rustcorp.com.au>2015-02-11 15:01:14 +1030
committerRusty Russell <rusty@rustcorp.com.au>2015-02-11 15:03:15 +1030
commite6a02746e0a9cdda5114db912fe2aadfed289aae (patch)
tree74a5d68568761e4dfad5e11cd1504d73c5b90a11 /include/uapi
parent5e05bf5833eb3dd97b6b6a52301d81e033714cb3 (diff)
virtio: define VIRTIO_PCI_CAP_PCI_CFG in header.
This provides backdoor access to the device MMIOs, and every device should have one. From the virtio 1.0 spec (CS03): 4.1.4.7.1 Device Requirements: PCI configuration access capability The device MUST present at least one VIRTIO_PCI_CAP_PCI_CFG capability. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/linux/virtio_pci.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h
index 3b7e4d2765fb..75301468359f 100644
--- a/include/uapi/linux/virtio_pci.h
+++ b/include/uapi/linux/virtio_pci.h
@@ -109,8 +109,10 @@
#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
/* ISR access */
#define VIRTIO_PCI_CAP_ISR_CFG 3
-/* Device specific confiuration */
+/* Device specific configuration */
#define VIRTIO_PCI_CAP_DEVICE_CFG 4
+/* PCI configuration access */
+#define VIRTIO_PCI_CAP_PCI_CFG 5
/* This is the PCI capability header: */
struct virtio_pci_cap {