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authorLinus Torvalds <torvalds@linux-foundation.org>2020-01-12 16:48:39 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2020-01-12 16:48:39 -0800
commit373adb7313b233d64e21f3f6329fb41a5e6ae180 (patch)
tree22492315fb2aa4516d78af6d0ca5793db662126a /include/soc/sifive/sifive_l2_cache.h
parent040a3c33623ba4bd11588ab0820281b854a3ffaf (diff)
parentdc6fcba72f0435b7884f2e92fd634bb9f78a2c60 (diff)
Merge tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley: "Two fixes for RISC-V: - Clear FP registers during boot when FP support is present, rather than when they aren't present - Move the header files associated with the SiFive L2 cache controller to drivers/soc (where the code was recently moved)" * tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fixup obvious bug for fp-regs reset riscv: move sifive_l2_cache.h to include/soc
Diffstat (limited to 'include/soc/sifive/sifive_l2_cache.h')
-rw-r--r--include/soc/sifive/sifive_l2_cache.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/soc/sifive/sifive_l2_cache.h b/include/soc/sifive/sifive_l2_cache.h
new file mode 100644
index 000000000000..92ade10ed67e
--- /dev/null
+++ b/include/soc/sifive/sifive_l2_cache.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * SiFive L2 Cache Controller header file
+ *
+ */
+
+#ifndef __SOC_SIFIVE_L2_CACHE_H
+#define __SOC_SIFIVE_L2_CACHE_H
+
+extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
+extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
+
+#define SIFIVE_L2_ERR_TYPE_CE 0
+#define SIFIVE_L2_ERR_TYPE_UE 1
+
+#endif /* __SOC_SIFIVE_L2_CACHE_H */