diff options
| author | Sakari Ailus <sakari.ailus@iki.fi> | 2015-03-25 19:57:32 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2015-04-02 16:42:04 -0300 |
| commit | 6387b75284aa7b78c2e947934fb874444ab427e9 (patch) | |
| tree | d54e942201ce1ec6255b334d167551b7149276b1 /include/media | |
| parent | 3494bb05940e4c392baeb85f77c1e7c8a78b4e1a (diff) | |
[media] omap3isp: Calculate vpclk_div for CSI-2
The video port clock is l3_ick divided by vpclk_div. This clock must be high
enough for the external pixel rate. The video port requires two clock cycles
to process a pixel.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'include/media')
| -rw-r--r-- | include/media/omap3isp.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/include/media/omap3isp.h b/include/media/omap3isp.h index 39e0748b0d31..0f0c08b48829 100644 --- a/include/media/omap3isp.h +++ b/include/media/omap3isp.h @@ -129,11 +129,9 @@ struct isp_ccp2_cfg { /** * struct isp_csi2_cfg - CSI2 interface configuration * @crc: Enable the cyclic redundancy check - * @vpclk_div: Video port output clock control */ struct isp_csi2_cfg { unsigned crc:1; - unsigned vpclk_div:2; struct isp_csiphy_lanes_cfg lanecfg; }; |