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authorThomas Gleixner <tglx@linutronix.de>2021-12-10 23:19:18 +0100
committerThomas Gleixner <tglx@linutronix.de>2021-12-16 22:16:40 +0100
commit173ffad79d177d9a91fbf3be6bf67ca81e0f765a (patch)
treeff852acdd9a5996067b67a4c44b6fe997cd45a1f /include/linux/msi.h
parent0f18095871fc59c89a281caf6f18538cf9e50fbf (diff)
PCI/MSI: Use msi_desc::msi_index
The usage of msi_desc::pci::entry_nr is confusing at best. It's the index into the MSI[X] descriptor table. Use msi_desc::msi_index which is shared between all MSI incarnations instead of having a PCI specific storage for no value. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20211210221814.602911509@linutronix.de
Diffstat (limited to 'include/linux/msi.h')
-rw-r--r--include/linux/msi.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 45ec5d07a5f3..b3d3b0bf59fe 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -80,7 +80,6 @@ typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
* @multi_cap: [PCI MSI/X] log2 num of messages supported
* @can_mask: [PCI MSI/X] Masking supported?
* @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
- * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
* @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
* @mask_pos: [PCI MSI] Mask register position
* @mask_base: [PCI MSI-X] Mask register base address
@@ -97,7 +96,6 @@ struct pci_msi_desc {
u8 can_mask : 1;
u8 is_64 : 1;
u8 is_virtual : 1;
- u16 entry_nr;
unsigned default_irq;
} msi_attrib;
union {