diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-27 18:48:33 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-28 17:30:36 +0000 |
| commit | 73ee29460e5d0adbb46e4962df69ae2465746612 (patch) | |
| tree | 9afcdda72d606fb6f15f322a89c1c998f688a79c /include/linux/mfd/arizona | |
| parent | 8a7f0c61c0c0dfdf5d5d878fe93ae20b4fd14ee2 (diff) | |
regulator: arizona-ldo1: Support 1.8V mode
Some Arizona device support a 1.8V output mode. Enable this in the driver.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'include/linux/mfd/arizona')
| -rw-r--r-- | include/linux/mfd/arizona/registers.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 7671a287dfee..ba26e99c388d 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -76,6 +76,7 @@ #define ARIZONA_RATE_ESTIMATOR_3 0x154 #define ARIZONA_RATE_ESTIMATOR_4 0x155 #define ARIZONA_RATE_ESTIMATOR_5 0x156 +#define ARIZONA_DYNAMIC_FREQUENCY_SCALING_1 0x161 #define ARIZONA_FLL1_CONTROL_1 0x171 #define ARIZONA_FLL1_CONTROL_2 0x172 #define ARIZONA_FLL1_CONTROL_3 0x173 @@ -110,6 +111,7 @@ #define ARIZONA_FLL2_GPIO_CLOCK 0x1AA #define ARIZONA_MIC_CHARGE_PUMP_1 0x200 #define ARIZONA_LDO1_CONTROL_1 0x210 +#define ARIZONA_LDO1_CONTROL_2 0x212 #define ARIZONA_LDO2_CONTROL_1 0x213 #define ARIZONA_MIC_BIAS_CTRL_1 0x218 #define ARIZONA_MIC_BIAS_CTRL_2 0x219 @@ -1574,6 +1576,13 @@ #define ARIZONA_SAMPLE_RATE_DETECT_D_WIDTH 5 /* SAMPLE_RATE_DETECT_D - [4:0] */ /* + * R353 (0x161) - Dynamic Frequency Scaling 1 + */ +#define ARIZONA_SUBSYS_MAX_FREQ 0x0001 /* SUBSYS_MAX_FREQ */ +#define ARIZONA_SUBSYS_MAX_FREQ_SHIFT 0 /* SUBSYS_MAX_FREQ */ +#define ARIZONA_SUBSYS_MAX_FREQ_WIDTH 1 /* SUBSYS_MAX_FREQ */ + +/* * R369 (0x171) - FLL1 Control 1 */ #define ARIZONA_FLL1_FREERUN 0x0002 /* FLL1_FREERUN */ @@ -1889,6 +1898,13 @@ #define ARIZONA_LDO1_ENA_WIDTH 1 /* LDO1_ENA */ /* + * R530 (0x212) - LDO1 Control 2 + */ +#define ARIZONA_LDO1_HI_PWR 0x0001 /* LDO1_HI_PWR */ +#define ARIZONA_LDO1_HI_PWR_SHIFT 0 /* LDO1_HI_PWR */ +#define ARIZONA_LDO1_HI_PWR_WIDTH 1 /* LDO1_HI_PWR */ + +/* * R531 (0x213) - LDO2 Control 1 */ #define ARIZONA_LDO2_VSEL_MASK 0x07E0 /* LDO2_VSEL - [10:5] */ |