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authorHan Xu <han.xu@nxp.com>2022-04-11 21:52:46 -0500
committerMiquel Raynal <miquel.raynal@bootlin.com>2022-04-21 09:34:10 +0200
commitd9edc4bc67c4fd77b30d0a55bc84b775c2f00bab (patch)
tree0bb59e680dc4290419ef43c6a505f9263ba56187 /include/linux/if_tap.h
parent2fb038eaeed82811eaecc4248b119218f8a3551b (diff)
mtd: rawnand: gpmi: Add large oob bch setting support
The code change proposes a new way to set bch geometry for large oob NAND (oobsize > 1KB). In this case, previous implementation can NOT guarantee the bad block mark always locates in data chunk, so we need a new way to do it. The general idea is, 1.Try all ECC strength from the maximum ecc that controller can support to minimum value required by NAND chip, any ECC strength makes the BBM locate in data chunk can be eligible. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, also we need to check if oob can afford it. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220412025246.24269-6-han.xu@nxp.com
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