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authorThierry Reding <treding@nvidia.com>2017-11-07 19:15:58 +0100
committerLinus Walleij <linus.walleij@linaro.org>2017-11-08 14:17:12 +0100
commit8302cf585288f75fd253f6b9a094d51ae371a3f3 (patch)
treecacc2410c43290426bfe27da4d721e52282994ac /include/linux/gpio
parent60ed54cae8dc0f2d41cafbd477bbed6deb716615 (diff)
gpio: Introduce struct gpio_irq_chip.first
Some GPIO chips cannot support sparse IRQ numbering and therefore need to manually allocate their interrupt descriptors statically. For these cases, a driver can pass the first allocated IRQ via the struct gpio_irq_chip's "first" field and thereby cause the IRQ domain to map all IRQs during initialization. Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio')
-rw-r--r--include/linux/gpio/driver.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 0a3fdd4d9d8d..a77d4ada060c 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -128,6 +128,14 @@ struct gpio_irq_chip {
* in IRQ domain of the chip.
*/
unsigned long *valid_mask;
+
+ /**
+ * @first:
+ *
+ * Required for static IRQ allocation. If set, irq_domain_add_simple()
+ * will allocate and map all IRQs during initialization.
+ */
+ unsigned int first;
};
static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)