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author | Stephen Boyd <sboyd@kernel.org> | 2021-04-27 16:34:44 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2021-04-27 16:34:44 -0700 |
commit | bbc3b403b096220850b82e245a1e5f09b8b216a2 (patch) | |
tree | 89737d0a72325071985b72f09b22d4f3d3319de5 /include/dt-bindings | |
parent | c3ad321932ed29b85ceed38a716a6e063e996ff5 (diff) | |
parent | 5c55197cbf9bfa9a025ddf220d65d376fc389f02 (diff) | |
parent | fdac035ed0ea4618fd991c25bfb9164777bbe6e2 (diff) | |
parent | 394cdb69a3c30b33524cf1204afe5cceaba69cdc (diff) | |
parent | 89bf9bb75e5b561585cd08b308f5064ede6e2b4c (diff) | |
parent | f6b1340dc751a6caa2a0567b667d0f4f4172cd58 (diff) |
Merge branches 'clk-imx', 'clk-samsung', 'clk-zynq', 'clk-rockchip' and 'clk-uniphier' into clk-next
- Simplify Zynq Kconfig dependencies
* clk-imx:
clk: imx: Reference preceded by free
clk: imx8mq: Correct the pcie1 sels
clk: imx8mp: Remove the none exist pcie clocks
clk: imx: Fix reparenting of UARTs not associated with stdout
* clk-samsung:
clk: samsung: Remove redundant dev_err calls
clk: exynos7: Mark aclk_fsys1_200 as critical
* clk-zynq:
clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
clk: zynqmp: Drop dependency on ARCH_ZYNQMP
clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected
* clk-rockchip:
clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller
clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends
clk: rockchip: add clock controller for rk3568
clk: rockchip: support more core div setting
dt-binding: clock: Document rockchip, rk3568-cru bindings
clk: rockchip: add dt-binding header for rk3568
* clk-uniphier:
clk: uniphier: Fix potential infinite loop