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authorNikola Cornij <nikola.cornij@amd.com>2019-04-17 19:07:08 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-06-22 09:34:11 -0500
commitf446489adcbc9c4833ae724a985166731c577bcd (patch)
tree16ad0130141a8ba2f50643b0fbc4344707b9ffc0 /include/drm/drm_dp_helper.h
parentce76898527cd14e9f1b04f463fd3d1cae80ed9c6 (diff)
drm/amd/display: Add support for extended DSC DPCD caps
[why] A few of the new DSC DPCD caps were introduced by a DP 1.4a SCR in order to give DSC branch decoders a chance to expose their maximum throughput and maximum line width limitations. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm/drm_dp_helper.h')
-rw-r--r--include/drm/drm_dp_helper.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c0c947a42a59..6d10b455b80a 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -356,6 +356,11 @@
# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+/* DP Extended DSC Capabilities */
+#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */
+#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1
+#define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2
+
/* link configuration */
#define DP_LINK_BW_SET 0x100
# define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */