diff options
| author | Venki Pallipadi <venkatesh.pallipadi@intel.com> | 2007-07-11 12:18:32 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-12 10:55:54 -0700 |
| commit | 1d67953f2bda8876045c24ae58841f27d9bb7572 (patch) | |
| tree | 4f91c4037c6e8996cb3164f3f20489c471676f6c /include/asm-i386/cpufeature.h | |
| parent | e087db510cd96a75a614f6f6fcd5499ab21cb087 (diff) | |
Use a new CPU feature word to cover features that are spread around
Some Intel features are spread around in different CPUID leafs like 0x5,
0x6 and 0xA. Make this feature detection code common across i386 and
x86_64.
Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature
will be enabled automatically by current acpi-cpufreq driver.
Refer to Intel Software Developer's Manual for more details about the feature.
Thanks to hpa (H Peter Anvin) for the making the actual code detecting the
scattered features data-driven.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-i386/cpufeature.h')
| -rw-r--r-- | include/asm-i386/cpufeature.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index 7ea5f4a6706f..c961c03cf1e2 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h @@ -12,7 +12,7 @@ #endif #include <asm/required-features.h> -#define NCAPINTS 7 /* N 32-bit words worth of info */ +#define NCAPINTS 8 /* N 32-bit words worth of info */ /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */ #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ @@ -109,6 +109,12 @@ #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ +/* + * Auxiliary flags: Linux defined - For features scattered in various + * CPUID levels like 0x6, 0xA etc + */ +#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ + #define cpu_has(c, bit) \ (__builtin_constant_p(bit) && \ ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ @@ -117,7 +123,8 @@ (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ - (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ) \ + (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \ + (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \ ? 1 : \ test_bit(bit, (c)->x86_capability)) #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) |