diff options
| author | Al Stone <ahs3@redhat.com> | 2016-03-24 09:39:07 +0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2016-04-05 03:53:30 +0200 |
| commit | 4ac78baf88d85c49883fcc87d31198ebe408e54d (patch) | |
| tree | 9acbf8b77d4dd97c1f6fbae726d4134b4fdb908a /include/acpi | |
| parent | 7cd55c76f35ffb9aa0a3062be0e3b2f66babfcd0 (diff) | |
ACPICA: IORT: Add in support for the SMMUv3 subtable
ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e
The most recent version of the IORT specification adds in a definition
for a subtable to describe SMMUv3 devices; there is already a subtable
for SMMUv1/v2 devices.
Add in the definition of the subtable, add in the code to compile it,
and add in a template for it.
Link: https://github.com/acpica/acpica/commit/9f7c3e14
Signed-off-by: Al Stone <ahs3@redhat.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi')
| -rw-r--r-- | include/acpi/actbl2.h | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index e9d3cc159181..d6bd37758e33 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -660,7 +660,7 @@ struct acpi_ibft_target { * IORT - IO Remapping Table * * Conforms to "IO Remapping Table System Software on ARM Platforms", - * Document number: ARM DEN 0049A, 2015 + * Document number: ARM DEN 0049B, October 2015 * ******************************************************************************/ @@ -690,7 +690,8 @@ enum acpi_iort_node_type { ACPI_IORT_NODE_ITS_GROUP = 0x00, ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, - ACPI_IORT_NODE_SMMU = 0x03 + ACPI_IORT_NODE_SMMU = 0x03, + ACPI_IORT_NODE_SMMU_V3 = 0x04 }; struct acpi_iort_id_mapping { @@ -780,6 +781,23 @@ struct acpi_iort_smmu { #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) +struct acpi_iort_smmu_v3 { + u64 base_address; /* SMMUv3 base address */ + u32 flags; + u32 reserved; + u64 vatos_address; + u32 model; /* O: generic SMMUv3 */ + u32 event_gsiv; + u32 pri_gsiv; + u32 gerr_gsiv; + u32 sync_gsiv; +}; + +/* Masks for Flags field above */ + +#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) +#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) + /******************************************************************************* * * IVRS - I/O Virtualization Reporting Structure |