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authorBen Widawsky <ben@bwidawsk.net>2021-04-06 14:30:20 -0700
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2021-04-07 19:09:01 +0200
commit7c5eab72f5a4dffec61f8c0cd99736178f95a50a (patch)
tree0b447a2a3ee7841acac07537ca0cc94993dda655 /include/acpi/actbl1.h
parent582252034dd6b334c5f50140958362b19442fecd (diff)
ACPICA: CXL 2.0: CEDT: Add new CEDT table
ACPICA commit 0b03aa8ebd7a5b2b9407893f123ee587af45926f This sets up all of the boilerplate without actually doing anything. Link: https://github.com/acpica/acpica/commit/0b03aa8e Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/acpi/actbl1.h')
-rw-r--r--include/acpi/actbl1.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 2ee7eeea783b..7b286766e810 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -28,6 +28,7 @@
#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
+#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
@@ -303,6 +304,48 @@ struct acpi_table_boot {
/*******************************************************************************
*
+ * CEDT - CXL Early Discovery Table
+ * Version 1
+ *
+ * Conforms to the "CXL Early Discovery Table" (CXL 2.0)
+ *
+ ******************************************************************************/
+
+struct acpi_table_cedt {
+ struct acpi_table_header header; /* Common ACPI table header */
+};
+
+/* CEDT subtable header (Performance Record Structure) */
+
+struct acpi_cedt_header {
+ u8 type;
+ u8 reserved;
+ u16 length;
+};
+
+/* Values for Type field above */
+
+enum acpi_cedt_type {
+ ACPI_CEDT_TYPE_CHBS = 0,
+};
+
+/*
+ * CEDT subtables
+ */
+
+/* 0: CXL Host Bridge Structure */
+
+struct acpi_cedt_chbs {
+ ACPI_CEDT_HEADER header;
+ u32 uid;
+ u32 cxl_version;
+ u32 reserved;
+ u64 base;
+ u64 length;
+};
+
+/*******************************************************************************
+ *
* CPEP - Corrected Platform Error Polling table (ACPI 4.0)
* Version 1
*