diff options
| author | Maciej W. Rozycki <macro@orcam.me.uk> | 2023-06-11 18:19:19 +0100 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-06-20 10:58:53 -0500 |
| commit | 33a176abcc4cd4ed3d65512ed96d7b73f2565ed7 (patch) | |
| tree | 2281d730dacc3f216bd4b019427b96ddb062735c /drivers | |
| parent | 07a8d698de50c4740ac6f709c43e23a6da6e4dbc (diff) | |
PCI: Export PCIe link retrain timeout
Convert LINK_RETRAIN_TIMEOUT from jiffies to milliseconds, accordingly
rename to PCIE_LINK_RETRAIN_TIMEOUT_MS, and make available via "pci.h" for
the PCI core to use. Use in pcie_wait_for_link_delay().
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2305310030280.59226@angie.orcam.me.uk
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/pci.c | 2 | ||||
| -rw-r--r-- | drivers/pci/pci.h | 2 | ||||
| -rw-r--r-- | drivers/pci/pcie/aspm.c | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 5ede93222bc1..71645d568986 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4867,7 +4867,7 @@ static int pci_pm_reset(struct pci_dev *dev, bool probe) static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, int delay) { - int timeout = 1000; + int timeout = PCIE_LINK_RETRAIN_TIMEOUT_MS; bool ret; u16 lnk_status; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 2475098f6518..d5fe253114f2 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -11,6 +11,8 @@ #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ +#define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000 + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump; diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index eaaacf24e16c..721e5c787cf3 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -90,8 +90,6 @@ static const char *policy_str[] = { [POLICY_POWER_SUPERSAVE] = "powersupersave" }; -#define LINK_RETRAIN_TIMEOUT HZ - /* * The L1 PM substate capability is only implemented in function 0 in a * multi function device. @@ -198,14 +196,14 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) * @pdev: Device whose link to wait for. * * Return TRUE if successful, or FALSE if training has not completed - * within LINK_RETRAIN_TIMEOUT jiffies. + * within PCIE_LINK_RETRAIN_TIMEOUT_MS milliseconds. */ static bool pcie_wait_for_link_status(struct pci_dev *pdev) { unsigned long end_jiffies; u16 lnksta; - end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT; + end_jiffies = jiffies + msecs_to_jiffies(PCIE_LINK_RETRAIN_TIMEOUT_MS); do { pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnksta); if (!(lnksta & PCI_EXP_LNKSTA_LT)) |