diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-20 15:28:57 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-20 15:28:57 -0800 |
| commit | ff0c7e18629b8bd64681313a88ce55e182c9fee6 (patch) | |
| tree | 70efa650f6458514e1d7e5e3f72cc8f87fc5cf2c /drivers | |
| parent | 5b0ed5964928b0aaf0d644c17c886c7f5ea4bb3f (diff) | |
| parent | a1f925bc4fa899b3c0f2dcbc432d572c36e74e71 (diff) | |
Merge tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC boardfile updates from Arnd Bergmann
"Unused boardfile removal for 6.3
This is a follow-up to the deprecation of most of the old-style board
files that was merged in linux-6.0, removing them for good.
This branch is almost exclusively dead code removal based on those
annotations. Some device driver removals went through separate
subsystem trees, but the majority is in the same branch, in order to
better handle dependencies between the patches and avoid breaking
bisection.
Unfortunately that leads to merge conflicts against other changes in
the subsystem trees, but they should all be trivial to resolve by
removing the files.
See commit 7d0d3fa7339e ("Merge tag 'arm-boardfiles-6.0' of
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") for the
description of which machines were marked unused and are now removed.
The only removals that got postponed are Terastation WXL (mv78xx0) and
Jornada720 (StrongARM1100), which turned out to still have potential
users"
* tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (91 commits)
mmc: omap: drop TPS65010 dependency
ARM: pxa: restore mfp-pxa320.h
usb: ohci-omap: avoid unused-variable warning
ARM: debug: remove references in DEBUG_UART_8250_SHIFT to removed configs
ARM: s3c: remove obsolete s3c-cpu-freq header
MAINTAINERS: adjust SAMSUNG SOC CLOCK DRIVERS after s3c24xx support removal
MAINTAINERS: update file entries after arm multi-platform rework and mach-pxa removal
ARM: remove CONFIG_UNUSED_BOARD_FILES
mfd: remove htc-pasic3 driver
w1: remove ds1wm driver
usb: remove ohci-tmio driver
fbdev: remove w100fb driver
fbdev: remove tmiofb driver
mmc: remove tmio_mmc driver
mfd: remove ucb1400 support
mfd: remove toshiba tmio drivers
rtc: remove v3020 driver
power: remove pda_power supply driver
ASoC: pxa: remove unused board support
pcmcia: remove unused pxa/sa1100 drivers
...
Diffstat (limited to 'drivers')
189 files changed, 55 insertions, 44943 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 9695c4404e26..0b6358a5b315 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -1083,15 +1083,6 @@ config PATA_OPTI If unsure, say N. -config PATA_PALMLD - tristate "Palm LifeDrive PATA support" - depends on MACH_PALMLD - help - This option enables support for Palm LifeDrive's internal ATA - port via the new ATA layer. - - If unsure, say N. - config PATA_PCMCIA tristate "PCMCIA PATA support" depends on PCMCIA @@ -1145,16 +1136,6 @@ config PATA_RZ1000 If unsure, say N. -config PATA_SAMSUNG_CF - tristate "Samsung SoC PATA support" - depends on SAMSUNG_DEV_IDE || COMPILE_TEST - select PATA_TIMINGS - help - This option enables basic support for Samsung's S3C/S5P board - PATA controllers via the new ATA layer - - If unsure, say N. - config PATA_WINBOND_VLB tristate "Winbond W83759A VLB PATA support (Experimental)" depends on ISA diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index d2e36d367274..4ee5c0761d90 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -105,12 +105,10 @@ obj-$(CONFIG_PATA_MPIIX) += pata_mpiix.o obj-$(CONFIG_PATA_NS87410) += pata_ns87410.o obj-$(CONFIG_PATA_OPTI) += pata_opti.o obj-$(CONFIG_PATA_PCMCIA) += pata_pcmcia.o -obj-$(CONFIG_PATA_PALMLD) += pata_palmld.o obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o obj-$(CONFIG_PATA_RB532) += pata_rb532_cf.o obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o -obj-$(CONFIG_PATA_SAMSUNG_CF) += pata_samsung_cf.o obj-$(CONFIG_PATA_PXA) += pata_pxa.o diff --git a/drivers/ata/pata_palmld.c b/drivers/ata/pata_palmld.c deleted file mode 100644 index 51caa2a427dd..000000000000 --- a/drivers/ata/pata_palmld.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * drivers/ata/pata_palmld.c - * - * Driver for IDE channel in Palm LifeDrive - * - * Based on research of: - * Alex Osborne <ato@meshy.org> - * - * Rewrite for mainline: - * Marek Vasut <marek.vasut@gmail.com> - * - * Rewritten version based on pata_ixp4xx_cf.c: - * ixp4xx PATA/Compact Flash driver - * Copyright (C) 2006-07 Tower Technologies - * Author: Alessandro Zummo <a.zummo@towertech.it> - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/libata.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/gpio/consumer.h> - -#include <scsi/scsi_host.h> - -#define DRV_NAME "pata_palmld" - -struct palmld_pata { - struct ata_host *host; - struct gpio_desc *power; - struct gpio_desc *reset; -}; - -static struct scsi_host_template palmld_sht = { - ATA_PIO_SHT(DRV_NAME), -}; - -static struct ata_port_operations palmld_port_ops = { - .inherits = &ata_sff_port_ops, - .sff_data_xfer = ata_sff_data_xfer32, - .cable_detect = ata_cable_40wire, -}; - -static int palmld_pata_probe(struct platform_device *pdev) -{ - struct palmld_pata *lda; - struct ata_port *ap; - void __iomem *mem; - struct device *dev = &pdev->dev; - int ret; - - lda = devm_kzalloc(dev, sizeof(*lda), GFP_KERNEL); - if (!lda) - return -ENOMEM; - - /* allocate host */ - lda->host = ata_host_alloc(dev, 1); - if (!lda->host) - return -ENOMEM; - - /* remap drive's physical memory address */ - mem = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(mem)) - return PTR_ERR(mem); - - /* request and activate power and reset GPIOs */ - lda->power = devm_gpiod_get(dev, "power", GPIOD_OUT_HIGH); - if (IS_ERR(lda->power)) - return PTR_ERR(lda->power); - lda->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); - if (IS_ERR(lda->reset)) { - gpiod_set_value(lda->power, 0); - return PTR_ERR(lda->reset); - } - - /* Assert reset to reset the drive */ - gpiod_set_value(lda->reset, 1); - msleep(30); - gpiod_set_value(lda->reset, 0); - msleep(30); - - /* setup the ata port */ - ap = lda->host->ports[0]; - ap->ops = &palmld_port_ops; - ap->pio_mask = ATA_PIO4; - ap->flags |= ATA_FLAG_PIO_POLLING; - - /* memory mapping voodoo */ - ap->ioaddr.cmd_addr = mem + 0x10; - ap->ioaddr.altstatus_addr = mem + 0xe; - ap->ioaddr.ctl_addr = mem + 0xe; - - /* start the port */ - ata_sff_std_ports(&ap->ioaddr); - - /* activate host */ - ret = ata_host_activate(lda->host, 0, NULL, IRQF_TRIGGER_RISING, - &palmld_sht); - /* power down on failure */ - if (ret) { - gpiod_set_value(lda->power, 0); - return ret; - } - - platform_set_drvdata(pdev, lda); - return 0; -} - -static int palmld_pata_remove(struct platform_device *pdev) -{ - struct palmld_pata *lda = platform_get_drvdata(pdev); - - ata_platform_remove_one(pdev); - - /* power down the HDD */ - gpiod_set_value(lda->power, 0); - - return 0; -} - -static struct platform_driver palmld_pata_platform_driver = { - .driver = { - .name = DRV_NAME, - }, - .probe = palmld_pata_probe, - .remove = palmld_pata_remove, -}; - -module_platform_driver(palmld_pata_platform_driver); - -MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("PalmLD PATA driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:" DRV_NAME); diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c deleted file mode 100644 index aba1536ddd44..000000000000 --- a/drivers/ata/pata_samsung_cf.c +++ /dev/null @@ -1,662 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * PATA driver for Samsung SoCs. - * Supports CF Interface in True IDE mode. Currently only PIO mode has been - * implemented; UDMA support has to be added. - * - * Based on: - * PATA driver for AT91SAM9260 Static Memory Controller - * PATA driver for Toshiba SCC controller -*/ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/libata.h> -#include <linux/platform_device.h> -#include <linux/slab.h> - -#include <linux/platform_data/ata-samsung_cf.h> - -#define DRV_NAME "pata_samsung_cf" -#define DRV_VERSION "0.1" - -#define S3C_CFATA_REG(x) (x) -#define S3C_CFATA_MUX S3C_CFATA_REG(0x0) -#define S3C_ATA_CTRL S3C_CFATA_REG(0x0) -#define S3C_ATA_CMD S3C_CFATA_REG(0x8) -#define S3C_ATA_IRQ S3C_CFATA_REG(0x10) -#define S3C_ATA_IRQ_MSK S3C_CFATA_REG(0x14) -#define S3C_ATA_CFG S3C_CFATA_REG(0x18) - -#define S3C_ATA_PIO_TIME S3C_CFATA_REG(0x2c) -#define S3C_ATA_PIO_DTR S3C_CFATA_REG(0x54) -#define S3C_ATA_PIO_FED S3C_CFATA_REG(0x58) -#define S3C_ATA_PIO_SCR S3C_CFATA_REG(0x5c) -#define S3C_ATA_PIO_LLR S3C_CFATA_REG(0x60) -#define S3C_ATA_PIO_LMR S3C_CFATA_REG(0x64) -#define S3C_ATA_PIO_LHR S3C_CFATA_REG(0x68) -#define S3C_ATA_PIO_DVR S3C_CFATA_REG(0x6c) -#define S3C_ATA_PIO_CSD S3C_CFATA_REG(0x70) -#define S3C_ATA_PIO_DAD S3C_CFATA_REG(0x74) -#define S3C_ATA_PIO_RDATA S3C_CFATA_REG(0x7c) - -#define S3C_CFATA_MUX_TRUEIDE 0x01 -#define S3C_ATA_CFG_SWAP 0x40 -#define S3C_ATA_CFG_IORDYEN 0x02 - -enum s3c_cpu_type { - TYPE_S3C64XX, - TYPE_S5PV210, -}; - -/* - * struct s3c_ide_info - S3C PATA instance. - * @clk: The clock resource for this controller. - * @ide_addr: The area mapped for the hardware registers. - * @sfr_addr: The area mapped for the special function registers. - * @irq: The IRQ number we are using. - * @cpu_type: The exact type of this controller. - * @fifo_status_reg: The ATA_FIFO_STATUS register offset. - */ -struct s3c_ide_info { - struct clk *clk; - void __iomem *ide_addr; - void __iomem *sfr_addr; - int irq; - enum s3c_cpu_type cpu_type; - unsigned int fifo_status_reg; -}; - -static void pata_s3c_set_endian(void __iomem *s3c_ide_regbase, u8 mode) -{ - u32 reg = readl(s3c_ide_regbase + S3C_ATA_CFG); - reg = mode ? (reg & ~S3C_ATA_CFG_SWAP) : (reg | S3C_ATA_CFG_SWAP); - writel(reg, s3c_ide_regbase + S3C_ATA_CFG); -} - -static void pata_s3c_cfg_mode(void __iomem *s3c_ide_sfrbase) -{ - /* Select true-ide as the internal operating mode */ - writel(readl(s3c_ide_sfrbase + S3C_CFATA_MUX) | S3C_CFATA_MUX_TRUEIDE, - s3c_ide_sfrbase + S3C_CFATA_MUX); -} - -static unsigned long -pata_s3c_setup_timing(struct s3c_ide_info *info, const struct ata_timing *ata) -{ - int t1 = ata->setup; - int t2 = ata->act8b; - int t2i = ata->rec8b; - ulong piotime; - - piotime = ((t2i & 0xff) << 12) | ((t2 & 0xff) << 4) | (t1 & 0xf); - - return piotime; -} - -static void pata_s3c_set_piomode(struct ata_port *ap, struct ata_device *adev) -{ - struct s3c_ide_info *info = ap->host->private_data; - struct ata_timing timing; - int cycle_time; - ulong ata_cfg = readl(info->ide_addr + S3C_ATA_CFG); - ulong piotime; - - /* Enables IORDY if mode requires it */ - if (ata_pio_need_iordy(adev)) - ata_cfg |= S3C_ATA_CFG_IORDYEN; - else - ata_cfg &= ~S3C_ATA_CFG_IORDYEN; - - cycle_time = (int)(1000000000UL / clk_get_rate(info->clk)); - - ata_timing_compute(adev, adev->pio_mode, &timing, - cycle_time * 1000, 0); - - piotime = pata_s3c_setup_timing(info, &timing); - - writel(ata_cfg, info->ide_addr + S3C_ATA_CFG); - writel(piotime, info->ide_addr + S3C_ATA_PIO_TIME); -} - -/* - * Waits until the IDE controller is able to perform next read/write - * operation to the disk. Needed for 64XX series boards only. - */ -static int wait_for_host_ready(struct s3c_ide_info *info) -{ - ulong timeout; - void __iomem *fifo_reg = info->ide_addr + info->fifo_status_reg; - - /* wait for maximum of 20 msec */ - timeout = jiffies + msecs_to_jiffies(20); - while (time_before(jiffies, timeout)) { - if ((readl(fifo_reg) >> 28) == 0) - return 0; - } - return -EBUSY; -} - -/* - * Writes to one of the task file registers. - */ -static void ata_outb(struct ata_host *host, u8 addr, void __iomem *reg) -{ - struct s3c_ide_info *info = host->private_data; - - wait_for_host_ready(info); - writeb(addr, reg); -} - -/* - * Reads from one of the task file registers. - */ -static u8 ata_inb(struct ata_host *host, void __iomem *reg) -{ - struct s3c_ide_info *info = host->private_data; - u8 temp; - - wait_for_host_ready(info); - (void) readb(reg); - wait_for_host_ready(info); - temp = readb(info->ide_addr + S3C_ATA_PIO_RDATA); - return temp; -} - -/* - * pata_s3c_tf_load - send taskfile registers to host controller - */ -static void pata_s3c_tf_load(struct ata_port *ap, - const struct ata_taskfile *tf) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; - - if (tf->ctl != ap->last_ctl) { - ata_outb(ap->host, tf->ctl, ioaddr->ctl_addr); - ap->last_ctl = tf->ctl; - ata_wait_idle(ap); - } - - if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { - ata_outb(ap->host, tf->hob_feature, ioaddr->feature_addr); - ata_outb(ap->host, tf->hob_nsect, ioaddr->nsect_addr); - ata_outb(ap->host, tf->hob_lbal, ioaddr->lbal_addr); - ata_outb(ap->host, tf->hob_lbam, ioaddr->lbam_addr); - ata_outb(ap->host, tf->hob_lbah, ioaddr->lbah_addr); - } - - if (is_addr) { - ata_outb(ap->host, tf->feature, ioaddr->feature_addr); - ata_outb(ap->host, tf->nsect, ioaddr->nsect_addr); - ata_outb(ap->host, tf->lbal, ioaddr->lbal_addr); - ata_outb(ap->host, tf->lbam, ioaddr->lbam_addr); - ata_outb(ap->host, tf->lbah, ioaddr->lbah_addr); - } - - if (tf->flags & ATA_TFLAG_DEVICE) - ata_outb(ap->host, tf->device, ioaddr->device_addr); - - ata_wait_idle(ap); -} - -/* - * pata_s3c_tf_read - input device's ATA taskfile shadow registers - */ -static void pata_s3c_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - - tf->error = ata_inb(ap->host, ioaddr->error_addr); - tf->nsect = ata_inb(ap->host, ioaddr->nsect_addr); - tf->lbal = ata_inb(ap->host, ioaddr->lbal_addr); - tf->lbam = ata_inb(ap->host, ioaddr->lbam_addr); - tf->lbah = ata_inb(ap->host, ioaddr->lbah_addr); - tf->device = ata_inb(ap->host, ioaddr->device_addr); - - if (tf->flags & ATA_TFLAG_LBA48) { - ata_outb(ap->host, tf->ctl | ATA_HOB, ioaddr->ctl_addr); - tf->hob_feature = ata_inb(ap->host, ioaddr->error_addr); - tf->hob_nsect = ata_inb(ap->host, ioaddr->nsect_addr); - tf->hob_lbal = ata_inb(ap->host, ioaddr->lbal_addr); - tf->hob_lbam = ata_inb(ap->host, ioaddr->lbam_addr); - tf->hob_lbah = ata_inb(ap->host, ioaddr->lbah_addr); - ata_outb(ap->host, tf->ctl, ioaddr->ctl_addr); - ap->last_ctl = tf->ctl; - } -} - -/* - * pata_s3c_exec_command - issue ATA command to host controller - */ -static void pata_s3c_exec_command(struct ata_port *ap, - const struct ata_taskfile *tf) -{ - ata_outb(ap->host, tf->command, ap->ioaddr.command_addr); - ata_sff_pause(ap); -} - -/* - * pata_s3c_check_status - Read device status register - */ -static u8 pata_s3c_check_status(struct ata_port *ap) -{ - return ata_inb(ap->host, ap->ioaddr.status_addr); -} - -/* - * pata_s3c_check_altstatus - Read alternate device status register - */ -static u8 pata_s3c_check_altstatus(struct ata_port *ap) -{ - return ata_inb(ap->host, ap->ioaddr.altstatus_addr); -} - -/* - * pata_s3c_data_xfer - Transfer data by PIO - */ -static unsigned int pata_s3c_data_xfer(struct ata_queued_cmd *qc, - unsigned char *buf, unsigned int buflen, int rw) -{ - struct ata_port *ap = qc->dev->link->ap; - struct s3c_ide_info *info = ap->host->private_data; - void __iomem *data_addr = ap->ioaddr.data_addr; - unsigned int words = buflen >> 1, i; - u16 *data_ptr = (u16 *)buf; - - /* Requires wait same as in ata_inb/ata_outb */ - if (rw == READ) - for (i = 0; i < words; i++, data_ptr++) { - wait_for_host_ready(info); - (void) readw(data_addr); - wait_for_host_ready(info); - *data_ptr = readw(info->ide_addr - + S3C_ATA_PIO_RDATA); - } - else - for (i = 0; i < words; i++, data_ptr++) { - wait_for_host_ready(info); - writew(*data_ptr, data_addr); - } - - if (buflen & 0x01) - dev_err(ap->dev, "unexpected trailing data\n"); - - return words << 1; -} - -/* - * pata_s3c_dev_select - Select device on ATA bus - */ -static void pata_s3c_dev_select(struct ata_port *ap, unsigned int device) -{ - u8 tmp = ATA_DEVICE_OBS; - - if (device != 0) - tmp |= ATA_DEV1; - - ata_outb(ap->host, tmp, ap->ioaddr.device_addr); - ata_sff_pause(ap); -} - -/* - * pata_s3c_devchk - PATA device presence detection - */ -static bool pata_s3c_devchk(struct ata_port *ap, unsigned int device) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - u8 nsect, lbal; - - pata_s3c_dev_select(ap, device); - - ata_outb(ap->host, 0x55, ioaddr->nsect_addr); - ata_outb(ap->host, 0xaa, ioaddr->lbal_addr); - - ata_outb(ap->host, 0xaa, ioaddr->nsect_addr); - ata_outb(ap->host, 0x55, ioaddr->lbal_addr); - - ata_outb(ap->host, 0x55, ioaddr->nsect_addr); - ata_outb(ap->host, 0xaa, ioaddr->lbal_addr); - - nsect = ata_inb(ap->host, ioaddr->nsect_addr); - lbal = ata_inb(ap->host, ioaddr->lbal_addr); - - if ((nsect == 0x55) && (lbal == 0xaa)) - return true; /* we found a device */ - - return false; /* nothing found */ -} - -/* - * pata_s3c_wait_after_reset - wait for devices to become ready after reset - */ -static int pata_s3c_wait_after_reset(struct ata_link *link, - unsigned long deadline) -{ - int rc; - - ata_msleep(link->ap, ATA_WAIT_AFTER_RESET); - - /* always check readiness of the master device */ - rc = ata_sff_wait_ready(link, deadline); - /* -ENODEV means the odd clown forgot the D7 pulldown resistor - * and TF status is 0xff, bail out on it too. - */ - if (rc) - return rc; - - return 0; -} - -/* - * pata_s3c_bus_softreset - PATA device software reset - */ -static int pata_s3c_bus_softreset(struct ata_port *ap, - unsigned long deadline) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - - /* software reset. causes dev0 to be selected */ - ata_outb(ap->host, ap->ctl, ioaddr->ctl_addr); - udelay(20); - ata_outb(ap->host, ap->ctl | ATA_SRST, ioaddr->ctl_addr); - udelay(20); - ata_outb(ap->host, ap->ctl, ioaddr->ctl_addr); - ap->last_ctl = ap->ctl; - - return pata_s3c_wait_after_reset(&ap->link, deadline); -} - -/* - * pata_s3c_softreset - reset host port via ATA SRST - */ -static int pata_s3c_softreset(struct ata_link *link, unsigned int *classes, - unsigned long deadline) -{ - struct ata_port *ap = link->ap; - unsigned int devmask = 0; - int rc; - u8 err; - - /* determine if device 0 is present */ - if (pata_s3c_devchk(ap, 0)) - devmask |= (1 << 0); - - /* select device 0 again */ - pata_s3c_dev_select(ap, 0); - - /* issue bus reset */ - rc = pata_s3c_bus_softreset(ap, deadline); - /* if link is occupied, -ENODEV too is an error */ - if (rc && rc != -ENODEV) { - ata_link_err(link, "SRST failed (errno=%d)\n", rc); - return rc; - } - - /* determine by signature whether we have ATA or ATAPI devices */ - classes[0] = ata_sff_dev_classify(&ap->link.device[0], - devmask & (1 << 0), &err); - - return 0; -} - -/* - * pata_s3c_set_devctl - Write device control register - */ -static void pata_s3c_set_devctl(struct ata_port *ap, u8 ctl) -{ - ata_outb(ap->host, ctl, ap->ioaddr.ctl_addr); -} - -static struct scsi_host_template pata_s3c_sht = { - ATA_PIO_SHT(DRV_NAME), -}; - -static struct ata_port_operations pata_s3c_port_ops = { - .inherits = &ata_sff_port_ops, - .sff_check_status = pata_s3c_check_status, - .sff_check_altstatus = pata_s3c_check_altstatus, - .sff_tf_load = pata_s3c_tf_load, - .sff_tf_read = pata_s3c_tf_read, - .sff_data_xfer = pata_s3c_data_xfer, - .sff_exec_command = pata_s3c_exec_command, - .sff_dev_select = pata_s3c_dev_select, - .sff_set_devctl = pata_s3c_set_devctl, - .softreset = pata_s3c_softreset, - .set_piomode = pata_s3c_set_piomode, -}; - -static struct ata_port_operations pata_s5p_port_ops = { - .inherits = &ata_sff_port_ops, - .set_piomode = pata_s3c_set_piomode, -}; - -static void pata_s3c_enable(void __iomem *s3c_ide_regbase, bool state) -{ - u32 temp = readl(s3c_ide_regbase + S3C_ATA_CTRL); - temp = state ? (temp | 1) : (temp & ~1); - writel(temp, s3c_ide_regbase + S3C_ATA_CTRL); -} - -static irqreturn_t pata_s3c_irq(int irq, void *dev_instance) -{ - struct ata_host *host = dev_instance; - struct s3c_ide_info *info = host->private_data; - u32 reg; - - reg = readl(info->ide_addr + S3C_ATA_IRQ); - writel(reg, info->ide_addr + S3C_ATA_IRQ); - - return ata_sff_interrupt(irq, dev_instance); -} - -static void pata_s3c_hwinit(struct s3c_ide_info *info, - struct s3c_ide_platdata *pdata) -{ - switch (info->cpu_type) { - case TYPE_S3C64XX: - /* Configure as big endian */ - pata_s3c_cfg_mode(info->sfr_addr); - pata_s3c_set_endian(info->ide_addr, 1); - pata_s3c_enable(info->ide_addr, true); - msleep(100); - - /* Remove IRQ Status */ - writel(0x1f, info->ide_addr + S3C_ATA_IRQ); - writel(0x1b, info->ide_addr + S3C_ATA_IRQ_MSK); - break; - - case TYPE_S5PV210: - /* Configure as little endian */ - pata_s3c_set_endian(info->ide_addr, 0); - pata_s3c_enable(info->ide_addr, true); - msleep(100); - - /* Remove IRQ Status */ - writel(0x3f, info->ide_addr + S3C_ATA_IRQ); - writel(0x3f, info->ide_addr + S3C_ATA_IRQ_MSK); - break; - - default: - BUG(); - } -} - -static int __init pata_s3c_probe(struct platform_device *pdev) -{ - struct s3c_ide_platdata *pdata = dev_get_platdata(&pdev->dev); - struct device *dev = &pdev->dev; - struct s3c_ide_info *info; - struct resource *res; - struct ata_port *ap; - struct ata_host *host; - enum s3c_cpu_type cpu_type; - int ret; - - cpu_type = platform_get_device_id(pdev)->driver_data; - - info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - info->irq = platform_get_irq(pdev, 0); - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - - info->ide_addr = devm_ioremap_resource(dev, res); - if (IS_ERR(info->ide_addr)) - return PTR_ERR(info->ide_addr); - - info->clk = devm_clk_get(&pdev->dev, "cfcon"); - if (IS_ERR(info->clk)) { - dev_err(dev, "failed to get access to cf controller clock\n"); - ret = PTR_ERR(info->clk); - info->clk = NULL; - return ret; - } - - clk_enable(info->clk); - - /* init ata host */ - host = ata_host_alloc(dev, 1); - if (!host) { - dev_err(dev, "failed to allocate ide host\n"); - ret = -ENOMEM; - goto stop_clk; - } - - ap = host->ports[0]; - ap->pio_mask = ATA_PIO4; - - if (cpu_type == TYPE_S3C64XX) { - ap->ops = &pata_s3c_port_ops; - info->sfr_addr = info->ide_addr + 0x1800; - info->ide_addr += 0x1900; - info->fifo_status_reg = 0x94; - } else { - ap->ops = &pata_s5p_port_ops; - info->fifo_status_reg = 0x84; - } - - info->cpu_type = cpu_type; - - if (info->irq <= 0) { - ap->flags |= ATA_FLAG_PIO_POLLING; - info->irq = 0; - ata_port_desc(ap, "no IRQ, using PIO polling\n"); - } - - ap->ioaddr.cmd_addr = info->ide_addr + S3C_ATA_CMD; - ap->ioaddr.data_addr = info->ide_addr + S3C_ATA_PIO_DTR; - ap->ioaddr.error_addr = info->ide_addr + S3C_ATA_PIO_FED; - ap->ioaddr.feature_addr = info->ide_addr + S3C_ATA_PIO_FED; - ap->ioaddr.nsect_addr = info->ide_addr + S3C_ATA_PIO_SCR; - ap->ioaddr.lbal_addr = info->ide_addr + S3C_ATA_PIO_LLR; - ap->ioaddr.lbam_addr = info->ide_addr + S3C_ATA_PIO_LMR; - ap->ioaddr.lbah_addr = info->ide_addr + S3C_ATA_PIO_LHR; - ap->ioaddr.device_addr = info->ide_addr + S3C_ATA_PIO_DVR; - ap->ioaddr.status_addr = info->ide_addr + S3C_ATA_PIO_CSD; - ap->ioaddr.command_addr = info->ide_addr + S3C_ATA_PIO_CSD; - ap->ioaddr.altstatus_addr = info->ide_addr + S3C_ATA_PIO_DAD; - ap->ioaddr.ctl_addr = info->ide_addr + S3C_ATA_PIO_DAD; - - ata_port_desc(ap, "mmio cmd 0x%llx ", - (unsigned long long)res->start); - - host->private_data = info; - - if (pdata && pdata->setup_gpio) - pdata->setup_gpio(); - - /* Set endianness and enable the interface */ - pata_s3c_hwinit(info, pdata); - - ret = ata_host_activate(host, info->irq, - info->irq ? pata_s3c_irq : NULL, - 0, &pata_s3c_sht); - if (ret) - goto stop_clk; - - return 0; - -stop_clk: - clk_disable(info->clk); - return ret; -} - -static int __exit pata_s3c_remove(struct platform_device *pdev) -{ - struct ata_host *host = platform_get_drvdata(pdev); - struct s3c_ide_info *info = host->private_data; - - ata_host_detach(host); - - clk_disable(info->clk); - - return 0; -} - -#ifdef CONFIG_PM_SLEEP -static int pata_s3c_suspend(struct device *dev) -{ - struct ata_host *host = dev_get_drvdata(dev); - - ata_host_suspend(host, PMSG_SUSPEND); - return 0; -} - -static int pata_s3c_resume(struct device *dev) -{ - struct ata_host *host = dev_get_drvdata(dev); - struct s3c_ide_platdata *pdata = dev_get_platdata(dev); - struct s3c_ide_info *info = host->private_data; - - pata_s3c_hwinit(info, pdata); - ata_host_resume(host); - - return 0; -} - -static const struct dev_pm_ops pata_s3c_pm_ops = { - .suspend = pata_s3c_suspend, - .resume = pata_s3c_resume, -}; -#endif - -/* driver device registration */ -static const struct platform_device_id pata_s3c_driver_ids[] = { - { - .name = "s3c64xx-pata", - .driver_data = TYPE_S3C64XX, - }, { - .name = "s5pv210-pata", - .driver_data = TYPE_S5PV210, - }, - { } -}; - -MODULE_DEVICE_TABLE(platform, pata_s3c_driver_ids); - -static struct platform_driver pata_s3c_driver = { - .remove = __exit_p(pata_s3c_remove), - .id_table = pata_s3c_driver_ids, - .driver = { - .name = DRV_NAME, -#ifdef CONFIG_PM_SLEEP - .pm = &pata_s3c_pm_ops, -#endif - }, -}; - -module_platform_driver_probe(pata_s3c_driver, pata_s3c_probe); - -MODULE_AUTHOR("Abhilash Kesavan, <a.kesavan@samsung.com>"); -MODULE_DESCRIPTION("low-level driver for Samsung PATA controller"); -MODULE_LICENSE("GPL"); -MODULE_VERSION(DRV_VERSION); diff --git a/drivers/clk/davinci/Makefile b/drivers/clk/davinci/Makefile index be6f55d37b49..5d0ae1ee72ec 100644 --- a/drivers/clk/davinci/Makefile +++ b/drivers/clk/davinci/Makefile @@ -6,12 +6,8 @@ obj-$(CONFIG_ARCH_DAVINCI_DA8XX) += da8xx-cfgchip.o obj-y += pll.o obj-$(CONFIG_ARCH_DAVINCI_DA830) += pll-da830.o obj-$(CONFIG_ARCH_DAVINCI_DA850) += pll-da850.o -obj-$(CONFIG_ARCH_DAVINCI_DM355) += pll-dm355.o -obj-$(CONFIG_ARCH_DAVINCI_DM365) += pll-dm365.o obj-y += psc.o obj-$(CONFIG_ARCH_DAVINCI_DA830) += psc-da830.o obj-$(CONFIG_ARCH_DAVINCI_DA850) += psc-da850.o -obj-$(CONFIG_ARCH_DAVINCI_DM355) += psc-dm355.o -obj-$(CONFIG_ARCH_DAVINCI_DM365) += psc-dm365.o endif diff --git a/drivers/clk/davinci/pll-dm355.c b/drivers/clk/davinci/pll-dm355.c deleted file mode 100644 index 505aed80be9a..000000000000 --- a/drivers/clk/davinci/pll-dm355.c +++ /dev/null @@ -1,77 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * PLL clock descriptions for TI DM355 - * - * Copyright (C) 2018 David Lechner <david@lechnology.com> - */ - -#include <linux/bitops.h> -#include <linux/clk/davinci.h> -#include <linux/clkdev.h> -#include <linux/init.h> -#include <linux/types.h> - -#include "pll.h" - -static const struct davinci_pll_clk_info dm355_pll1_info = { - .name = "pll1", - .pllm_mask = GENMASK(7, 0), - .pllm_min = 92, - .pllm_max = 184, - .flags = PLL_HAS_CLKMODE | PLL_HAS_PREDIV | PLL_PREDIV_ALWAYS_ENABLED | - PLL_PREDIV_FIXED8 | PLL_HAS_POSTDIV | - PLL_POSTDIV_ALWAYS_ENABLED | PLL_POSTDIV_FIXED_DIV, -}; - -SYSCLK(1, pll1_sysclk1, pll1_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED); -SYSCLK(2, pll1_sysclk2, pll1_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED); -SYSCLK(3, pll1_sysclk3, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(4, pll1_sysclk4, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); - -int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) -{ - struct clk *clk; - - davinci_pll_clk_register(dev, &dm355_pll1_info, "ref_clk", base, cfgchip); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk1, base); - clk_register_clkdev(clk, "pll1_sysclk1", "dm355-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk2, base); - clk_register_clkdev(clk, "pll1_sysclk2", "dm355-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk3, base); - clk_register_clkdev(clk, "pll1_sysclk3", "dm355-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk4, base); - clk_register_clkdev(clk, "pll1_sysclk4", "dm355-psc"); - - clk = davinci_pll_auxclk_register(dev, "pll1_auxclk", base); - clk_register_clkdev(clk, "pll1_auxclk", "dm355-psc"); - - davinci_pll_sysclkbp_clk_register(dev, "pll1_sysclkbp", base); - - return 0; -} - -static const struct davinci_pll_clk_info dm355_pll2_info = { - .name = "pll2", - .pllm_mask = GENMASK(7, 0), - .pllm_min = 92, - .pllm_max = 184, - .flags = PLL_HAS_PREDIV | PLL_PREDIV_ALWAYS_ENABLED | PLL_HAS_POSTDIV | - PLL_POSTDIV_ALWAYS_ENABLED | PLL_POSTDIV_FIXED_DIV, -}; - -SYSCLK(1, pll2_sysclk1, pll2_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED); - -int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) -{ - davinci_pll_clk_register(dev, &dm355_pll2_info, "oscin", base, cfgchip); - - davinci_pll_sysclk_register(dev, &pll2_sysclk1, base); - - davinci_pll_sysclkbp_clk_register(dev, "pll2_sysclkbp", base); - - return 0; -} diff --git a/drivers/clk/davinci/pll-dm365.c b/drivers/clk/davinci/pll-dm365.c deleted file mode 100644 index 2d29712753a3..000000000000 --- a/drivers/clk/davinci/pll-dm365.c +++ /dev/null @@ -1,146 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * PLL clock descriptions for TI DM365 - * - * Copyright (C) 2018 David Lechner <david@lechnology.com> - */ - -#include <linux/bitops.h> -#include <linux/clkdev.h> -#include <linux/clk/davinci.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/types.h> - -#include "pll.h" - -#define OCSEL_OCSRC_ENABLE 0 - -static const struct davinci_pll_clk_info dm365_pll1_info = { - .name = "pll1", - .pllm_mask = GENMASK(9, 0), - .pllm_min = 1, - .pllm_max = 1023, - .flags = PLL_HAS_CLKMODE | PLL_HAS_PREDIV | PLL_HAS_POSTDIV | - PLL_POSTDIV_ALWAYS_ENABLED | PLL_PLLM_2X, -}; - -SYSCLK(1, pll1_sysclk1, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(2, pll1_sysclk2, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(3, pll1_sysclk3, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(4, pll1_sysclk4, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(5, pll1_sysclk5, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(6, pll1_sysclk6, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(7, pll1_sysclk7, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(8, pll1_sysclk8, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(9, pll1_sysclk9, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED); - -/* - * This is a bit of a hack to make OCSEL[OCSRC] on DM365 look like OCSEL[OCSRC] - * on DA850. On DM365, OCSEL[OCSRC] is just an enable/disable bit instead of a - * multiplexer. By modeling it as a single parent mux clock, the clock code will - * still do the right thing in this case. - */ -static const char * const dm365_pll_obsclk_parent_names[] = { - "oscin", -}; - -static u32 dm365_pll_obsclk_table[] = { - OCSEL_OCSRC_ENABLE, -}; - -static const struct davinci_pll_obsclk_info dm365_pll1_obsclk_info = { - .name = "pll1_obsclk", - .parent_names = dm365_pll_obsclk_parent_names, - .num_parents = ARRAY_SIZE(dm365_pll_obsclk_parent_names), - .table = dm365_pll_obsclk_table, - .ocsrc_mask = BIT(4), -}; - -int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) -{ - struct clk *clk; - - davinci_pll_clk_register(dev, &dm365_pll1_info, "ref_clk", base, cfgchip); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk1, base); - clk_register_clkdev(clk, "pll1_sysclk1", "dm365-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk2, base); - clk_register_clkdev(clk, "pll1_sysclk2", "dm365-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk3, base); - clk_register_clkdev(clk, "pll1_sysclk3", "dm365-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk4, base); - clk_register_clkdev(clk, "pll1_sysclk4", "dm365-psc"); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk5, base); - clk_register_clkdev(clk, "pll1_sysclk5", "dm365-psc"); - - davinci_pll_sysclk_register(dev, &pll1_sysclk6, base); - - davinci_pll_sysclk_register(dev, &pll1_sysclk7, base); - - clk = davinci_pll_sysclk_register(dev, &pll1_sysclk8, base); - clk_register_clkdev(clk, "pll1_sysclk8", "dm365-psc"); - - davinci_pll_sysclk_register(dev, &pll1_sysclk9, base); - - clk = davinci_pll_auxclk_register(dev, "pll1_auxclk", base); - clk_register_clkdev(clk, "pll1_auxclk", "dm355-psc"); - - davinci_pll_sysclkbp_clk_register(dev, "pll1_sysclkbp", base); - - davinci_pll_obsclk_register(dev, &dm365_pll1_obsclk_info, base); - - return 0; -} - -static const struct davinci_pll_clk_info dm365_pll2_info = { - .name = "pll2", - .pllm_mask = GENMASK(9, 0), - .pllm_min = 1, - .pllm_max = 1023, - .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV | PLL_POSTDIV_ALWAYS_ENABLED | - PLL_PLLM_2X, -}; - -SYSCLK(1, pll2_sysclk1, pll2_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(2, pll2_sysclk2, pll2_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(3, pll2_sysclk3, pll2_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(4, pll2_sysclk4, pll2_pllen, 5, SYSCLK_ALWAYS_ENABLED); -SYSCLK(5, pll2_sysclk5, pll2_pllen, 5, SYSCLK_ALWAYS_ENABLED); - -static const struct davinci_pll_obsclk_info dm365_pll2_obsclk_info = { - .name = "pll2_obsclk", - .parent_names = dm365_pll_obsclk_parent_names, - .num_parents = ARRAY_SIZE(dm365_pll_obsclk_parent_names), - .table = dm365_pll_obsclk_table, - .ocsrc_mask = BIT(4), -}; - -int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) -{ - struct clk *clk; - - davinci_pll_clk_register(dev, &dm365_pll2_info, "oscin", base, cfgchip); - - davinci_pll_sysclk_register(dev, &pll2_sysclk1, base); - - clk = davinci_pll_sysclk_register(dev, &pll2_sysclk2, base); - clk_register_clkdev(clk, "pll1_sysclk2", "dm365-psc"); - - davinci_pll_sysclk_register(dev, &pll2_sysclk3, base); - - clk = davinci_pll_sysclk_register(dev, &pll2_sysclk4, base); - clk_register_clkdev(clk, "pll1_sysclk4", "dm365-psc"); - - davinci_pll_sysclk_register(dev, &pll2_sysclk5, base); - - davinci_pll_auxclk_register(dev, "pll2_auxclk", base); - - davinci_pll_obsclk_register(dev, &dm365_pll2_obsclk_info, base); - - return 0; -} diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c index f862f5e2b3fc..87bdf8879045 100644 --- a/drivers/clk/davinci/pll.c +++ b/drivers/clk/davinci/pll.c @@ -882,14 +882,6 @@ static const struct platform_device_id davinci_pll_id_table[] = { { .name = "da850-pll0", .driver_data = (kernel_ulong_t)da850_pll0_init }, { .name = "da850-pll1", .driver_data = (kernel_ulong_t)da850_pll1_init }, #endif -#ifdef CONFIG_ARCH_DAVINCI_DM355 - { .name = "dm355-pll1", .driver_data = (kernel_ulong_t)dm355_pll1_init }, - { .name = "dm355-pll2", .driver_data = (kernel_ulong_t)dm355_pll2_init }, -#endif -#ifdef CONFIG_ARCH_DAVINCI_DM365 - { .name = "dm365-pll1", .driver_data = (kernel_ulong_t)dm365_pll1_init }, - { .name = "dm365-pll2", .driver_data = (kernel_ulong_t)dm365_pll2_init }, -#endif { } }; diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h index 1773277bc690..20bfcec2d3b5 100644 --- a/drivers/clk/davinci/pll.h +++ b/drivers/clk/davinci/pll.h @@ -122,13 +122,8 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node, /* Platform-specific callbacks */ -#ifdef CONFIG_ARCH_DAVINCI_DA850 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); void of_da850_pll0_init(struct device_node *node); int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); -#endif -#ifdef CONFIG_ARCH_DAVINCI_DM355 -int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); -#endif #endif /* __CLK_DAVINCI_PLL_H___ */ diff --git a/drivers/clk/davinci/psc-dm355.c b/drivers/clk/davinci/psc-dm355.c deleted file mode 100644 index ddd250107c4e..000000000000 --- a/drivers/clk/davinci/psc-dm355.c +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * PSC clock descriptions for TI DaVinci DM355 - * - * Copyright (C) 2018 David Lechner <david@lechnology.com> - */ - -#include <linux/clk-provider.h> -#include <linux/clk/davinci.h> -#include <linux/clk.h> -#include <linux/clkdev.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/types.h> - -#include "psc.h" - -LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss"); -LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss"); -LPSC_CLKDEV1(spi1_clkdev, NULL, "spi_davinci.1"); -LPSC_CLKDEV1(mmcsd1_clkdev, NULL, "dm6441-mmc.1"); -LPSC_CLKDEV1(mcbsp1_clkdev, NULL, "davinci-mcbsp.1"); -LPSC_CLKDEV1(usb_clkdev, "usb", NULL); -LPSC_CLKDEV1(spi2_clkdev, NULL, "spi_davinci.2"); -LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL); -LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "dm6441-mmc.0"); -LPSC_CLKDEV1(mcbsp0_clkdev, NULL, "davinci-mcbsp.0"); -LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); -LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); -LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1"); -LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2"); -LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0"); -/* REVISIT: gpio-davinci.c should be modified to drop con_id */ -LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL); -LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL); -LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt"); -LPSC_CLKDEV1(vpss_dac_clkdev, "vpss_dac", NULL); - -static const struct davinci_lpsc_clk_info dm355_psc_info[] = { - LPSC(0, 0, vpss_master, pll1_sysclk4, vpss_master_clkdev, 0), - LPSC(1, 0, vpss_slave, pll1_sysclk4, vpss_slave_clkdev, 0), - LPSC(5, 0, timer3, pll1_auxclk, NULL, 0), - LPSC(6, 0, spi1, pll1_sysclk2, spi1_clkdev, 0), - LPSC(7, 0, mmcsd1, pll1_sysclk2, mmcsd1_clkdev, 0), - LPSC(8, 0, asp1, pll1_sysclk2, mcbsp1_clkdev, 0), - LPSC(9, 0, usb, pll1_sysclk2, usb_clkdev, 0), - LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0), - LPSC(11, 0, spi2, pll1_sysclk2, spi2_clkdev, 0), - LPSC(12, 0, rto, pll1_auxclk, NULL, 0), - LPSC(14, 0, aemif, pll1_sysclk2, aemif_clkdev, 0), - LPSC(15, 0, mmcsd0, pll1_sysclk2, mmcsd0_clkdev, 0), - LPSC(17, 0, asp0, pll1_sysclk2, mcbsp0_clkdev, 0), - LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0), - LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0), - LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0), - LPSC(21, 0, uart2, pll1_sysclk2, uart2_clkdev, 0), - LPSC(22, 0, spi0, pll1_sysclk2, spi0_clkdev, 0), - LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0), - LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0), - LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0), - LPSC(26, 0, gpio, pll1_sysclk2, gpio_clkdev, 0), - LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED), - LPSC(28, 0, timer1, pll1_auxclk, NULL, 0), - /* REVISIT: why can't this be disabled? */ - LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED), - LPSC(31, 0, arm, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED), - LPSC(40, 0, mjcp, pll1_sysclk1, NULL, 0), - LPSC(41, 0, vpss_dac, pll1_sysclk3, vpss_dac_clkdev, 0), - { } -}; - -int dm355_psc_init(struct device *dev, void __iomem *base) -{ - return davinci_psc_register_clocks(dev, dm355_psc_info, 42, base); -} - -static struct clk_bulk_data dm355_psc_parent_clks[] = { - { .id = "pll1_sysclk1" }, - { .id = "pll1_sysclk2" }, - { .id = "pll1_sysclk3" }, - { .id = "pll1_sysclk4" }, - { .id = "pll1_auxclk" }, -}; - -const struct davinci_psc_init_data dm355_psc_init_data = { - .parent_clks = dm355_psc_parent_clks, - .num_parent_clks = ARRAY_SIZE(dm355_psc_parent_clks), - .psc_init = &dm355_psc_init, -}; diff --git a/drivers/clk/davinci/psc-dm365.c b/drivers/clk/davinci/psc-dm365.c deleted file mode 100644 index c75424f4ea3b..000000000000 --- a/drivers/clk/davinci/psc-dm365.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * PSC clock descriptions for TI DaVinci DM365 - * - * Copyright (C) 2018 David Lechner <david@lechnology.com> - */ - -#include <linux/clk-provider.h> -#include <linux/clk/davinci.h> -#include <linux/clk.h> -#include <linux/clkdev.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/types.h> - -#include "psc.h" - -LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss"); -LPSC_CLKDEV1(spi1_clkdev, NULL, "spi_davinci.1"); -LPSC_CLKDEV1(mmcsd1_clkdev, NULL, "da830-mmc.1"); -LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp"); -LPSC_CLKDEV1(usb_clkdev, "usb", NULL); -LPSC_CLKDEV1(spi2_clkdev, NULL, "spi_davinci.2"); -LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, - NULL, "ti-aemif"); -LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "da830-mmc.0"); -LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); -LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); -LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1"); -LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0"); -/* REVISIT: gpio-davinci.c should be modified to drop con_id */ -LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL); -LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL); -LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt"); -LPSC_CLKDEV1(spi3_clkdev, NULL, "spi_davinci.3"); -LPSC_CLKDEV1(spi4_clkdev, NULL, "spi_davinci.4"); -LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", - "fck", "davinci_mdio.0"); -LPSC_CLKDEV1(voice_codec_clkdev, NULL, "davinci_voicecodec"); -LPSC_CLKDEV1(vpss_dac_clkdev, "vpss_dac", NULL); -LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss"); - -static const struct davinci_lpsc_clk_info dm365_psc_info[] = { - LPSC(1, 0, vpss_slave, pll1_sysclk5, vpss_slave_clkdev, 0), - LPSC(5, 0, timer3, pll1_auxclk, NULL, 0), - LPSC(6, 0, spi1, pll1_sysclk4, spi1_clkdev, 0), - LPSC(7, 0, mmcsd1, pll1_sysclk4, mmcsd1_clkdev, 0), - LPSC(8, 0, asp0, pll1_sysclk4, asp0_clkdev, 0), - LPSC(9, 0, usb, pll1_auxclk, usb_clkdev, 0), - LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0), - LPSC(11, 0, spi2, pll1_sysclk4, spi2_clkdev, 0), - LPSC(12, 0, rto, pll1_sysclk4, NULL, 0), - LPSC(14, 0, aemif, pll1_sysclk4, aemif_clkdev, 0), - LPSC(15, 0, mmcsd0, pll1_sysclk8, mmcsd0_clkdev, 0), - LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0), - LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0), - LPSC(20, 0, uart1, pll1_sysclk4, uart1_clkdev, 0), - LPSC(22, 0, spi0, pll1_sysclk4, spi0_clkdev, 0), - LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0), - LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0), - LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0), - LPSC(26, 0, gpio, pll1_sysclk4, gpio_clkdev, 0), - LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED), - LPSC(28, 0, timer1, pll1_auxclk, NULL, 0), - /* REVISIT: why can't this be disabled? */ - LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED), - LPSC(31, 0, arm, pll2_sysclk2, NULL, LPSC_ALWAYS_ENABLED), - LPSC(38, 0, spi3, pll1_sysclk4, spi3_clkdev, 0), - LPSC(39, 0, spi4, pll1_auxclk, spi4_clkdev, 0), - LPSC(40, 0, emac, pll1_sysclk4, emac_clkdev, 0), - /* - * The TRM (ARM Subsystem User's Guide) shows two clocks input into - * voice codec module (PLL2 SYSCLK4 with a DIV2 and PLL1 SYSCLK4). Its - * not fully clear from documentation which clock should be considered - * as parent for PSC. The clock chosen here is to maintain - * compatibility with existing code in arch/arm/mach-davinci/dm365.c - */ - LPSC(44, 0, voice_codec, pll2_sysclk4, voice_codec_clkdev, 0), - /* - * Its not fully clear from TRM (ARM Subsystem User's Guide) as to what - * the parent of VPSS DAC LPSC should actually be. PLL1 SYSCLK3 feeds - * into HDVICP and MJCP. The clock chosen here is to remain compatible - * with code existing in arch/arm/mach-davinci/dm365.c - */ - LPSC(46, 0, vpss_dac, pll1_sysclk3, vpss_dac_clkdev, 0), - LPSC(47, 0, vpss_master, pll1_sysclk5, vpss_master_clkdev, 0), - LPSC(50, 0, mjcp, pll1_sysclk3, NULL, 0), - { } -}; - -int dm365_psc_init(struct device *dev, void __iomem *base) -{ - return davinci_psc_register_clocks(dev, dm365_psc_info, 52, base); -} - -static struct clk_bulk_data dm365_psc_parent_clks[] = { - { .id = "pll1_sysclk1" }, - { .id = "pll1_sysclk3" }, - { .id = "pll1_sysclk4" }, - { .id = "pll1_sysclk5" }, - { .id = "pll1_sysclk8" }, - { .id = "pll2_sysclk2" }, - { .id = "pll2_sysclk4" }, - { .id = "pll1_auxclk" }, -}; - -const struct davinci_psc_init_data dm365_psc_init_data = { - .parent_clks = dm365_psc_parent_clks, - .num_parent_clks = ARRAY_SIZE(dm365_psc_parent_clks), - .psc_init = &dm365_psc_init, -}; diff --git a/drivers/clk/davinci/psc.c b/drivers/clk/davinci/psc.c index 42a59dbd49c8..cd85d9f158b0 100644 --- a/drivers/clk/davinci/psc.c +++ b/drivers/clk/davinci/psc.c @@ -511,12 +511,6 @@ static const struct platform_device_id davinci_psc_id_table[] = { { .name = "da850-psc0", .driver_data = (kernel_ulong_t)&da850_psc0_init_data }, { .name = "da850-psc1", .driver_data = (kernel_ulong_t)&da850_psc1_init_data }, #endif -#ifdef CONFIG_ARCH_DAVINCI_DM355 - { .name = "dm355-psc", .driver_data = (kernel_ulong_t)&dm355_psc_init_data }, -#endif -#ifdef CONFIG_ARCH_DAVINCI_DM365 - { .name = "dm365-psc", .driver_data = (kernel_ulong_t)&dm365_psc_init_data }, -#endif { } }; diff --git a/drivers/clk/davinci/psc.h b/drivers/clk/davinci/psc.h index 5e382b675518..bd23f6fd56df 100644 --- a/drivers/clk/davinci/psc.h +++ b/drivers/clk/davinci/psc.h @@ -104,11 +104,4 @@ extern const struct davinci_psc_init_data da850_psc1_init_data; extern const struct davinci_psc_init_data of_da850_psc0_init_data; extern const struct davinci_psc_init_data of_da850_psc1_init_data; #endif -#ifdef CONFIG_ARCH_DAVINCI_DM355 -extern const struct davinci_psc_init_data dm355_psc_init_data; -#endif -#ifdef CONFIG_ARCH_DAVINCI_DM365 -extern const struct davinci_psc_init_data dm365_psc_init_data; -#endif - #endif /* __CLK_DAVINCI_PSC_H__ */ diff --git a/drivers/clk/samsung/Kconfig b/drivers/clk/samsung/Kconfig index 8e8245ab3fd1..c07bb50513bf 100644 --- a/drivers/clk/samsung/Kconfig +++ b/drivers/clk/samsung/Kconfig @@ -94,38 +94,6 @@ config EXYNOS_CLKOUT status of the certains clocks from SoC, but it could also be tied to other devices as an input clock. -# For S3C24XX platforms, select following symbols: -config S3C2410_COMMON_CLK - bool "Samsung S3C2410 clock controller support" if COMPILE_TEST - select COMMON_CLK_SAMSUNG - help - Support for the clock controller present on the Samsung - S3C2410/S3C2440/S3C2442 SoCs. Choose Y here only if you build for - this SoC. - -config S3C2410_COMMON_DCLK - bool - select COMMON_CLK_SAMSUNG - select REGMAP_MMIO - help - Support for the dclk clock controller present on the Samsung - S3C2410/S3C2412/S3C2440/S3C2443 SoCs. Choose Y here only if you build - for this SoC. - -config S3C2412_COMMON_CLK - bool "Samsung S3C2412 clock controller support" if COMPILE_TEST - select COMMON_CLK_SAMSUNG - help - Support for the clock controller present on the Samsung S3C2412 SoCs. - Choose Y here only if you build for this SoC. - -config S3C2443_COMMON_CLK - bool "Samsung S3C2443 clock controller support" if COMPILE_TEST - select COMMON_CLK_SAMSUNG - help - Support for the clock controller present on the Samsung - S3C2416/S3C2443 SoCs. Choose Y here only if you build for this SoC. - config TESLA_FSD_COMMON_CLK bool "Tesla FSD clock controller support" if COMPILE_TEST depends on COMMON_CLK_SAMSUNG diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile index 239d9eead77f..ebbeacabe88f 100644 --- a/drivers/clk/samsung/Makefile +++ b/drivers/clk/samsung/Makefile @@ -21,10 +21,6 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov9.o -obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o -obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o -obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o -obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210-audss.o obj-$(CONFIG_TESLA_FSD_COMMON_CLK) += clk-fsd.o diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 0ff28938943f..df7812371d70 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -941,169 +941,6 @@ static const struct clk_ops samsung_pll6553_clk_ops = { }; /* - * PLL Clock Type of S3C24XX before S3C2443 - */ - -#define PLLS3C2410_MDIV_MASK (0xff) -#define PLLS3C2410_PDIV_MASK (0x1f) -#define PLLS3C2410_SDIV_MASK (0x3) -#define PLLS3C2410_MDIV_SHIFT (12) -#define PLLS3C2410_PDIV_SHIFT (4) -#define PLLS3C2410_SDIV_SHIFT (0) - -#define PLLS3C2410_ENABLE_REG_OFFSET 0x10 - -static unsigned long samsung_s3c2410_pll_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct samsung_clk_pll *pll = to_clk_pll(hw); - u32 pll_con, mdiv, pdiv, sdiv; - u64 fvco = parent_rate; - - pll_con = readl_relaxed(pll->con_reg); - mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK; - pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK; - sdiv = (pll_con >> PLLS3C2410_SDIV_SHIFT) & PLLS3C2410_SDIV_MASK; - - fvco *= (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -static unsigned long samsung_s3c2440_mpll_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct samsung_clk_pll *pll = to_clk_pll(hw); - u32 pll_con, mdiv, pdiv, sdiv; - u64 fvco = parent_rate; - - pll_con = readl_relaxed(pll->con_reg); - mdiv = (pll_con >> PLLS3C2410_MDIV_SHIFT) & PLLS3C2410_MDIV_MASK; - pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK; - sdiv = (pll_con >> PLLS3C2410_SDIV_SHIFT) & PLLS3C2410_SDIV_MASK; - - fvco *= (2 * (mdiv + 8)); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -static int samsung_s3c2410_pll_set_rate(struct clk_hw *hw, unsigned long drate, - unsigned long prate) -{ - struct samsung_clk_pll *pll = to_clk_pll(hw); - const struct samsung_pll_rate_table *rate; - u32 tmp; - - /* Get required rate settings from table */ - rate = samsung_get_pll_settings(pll, drate); - if (!rate) { - pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, - drate, clk_hw_get_name(hw)); - return -EINVAL; - } - - tmp = readl_relaxed(pll->con_reg); - - /* Change PLL PMS values */ - tmp &= ~((PLLS3C2410_MDIV_MASK << PLLS3C2410_MDIV_SHIFT) | - (PLLS3C2410_PDIV_MASK << PLLS3C2410_PDIV_SHIFT) | - (PLLS3C2410_SDIV_MASK << PLLS3C2410_SDIV_SHIFT)); - tmp |= (rate->mdiv << PLLS3C2410_MDIV_SHIFT) | - (rate->pdiv << PLLS3C2410_PDIV_SHIFT) | - (rate->sdiv << PLLS3C2410_SDIV_SHIFT); - writel_relaxed(tmp, pll->con_reg); - - /* Time to settle according to the manual */ - udelay(300); - - return 0; -} - -static int samsung_s3c2410_pll_enable(struct clk_hw *hw, int bit, bool enable) -{ - struct samsung_clk_pll *pll = to_clk_pll(hw); - u32 pll_en = readl_relaxed(pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); - u32 pll_en_orig = pll_en; - - if (enable) - pll_en &= ~BIT(bit); - else - pll_en |= BIT(bit); - - writel_relaxed(pll_en, pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); - - /* if we started the UPLL, then allow to settle */ - if (enable && (pll_en_orig & BIT(bit))) - udelay(300); - - return 0; -} - -static int samsung_s3c2410_mpll_enable(struct clk_hw *hw) -{ - return samsung_s3c2410_pll_enable(hw, 5, true); -} - -static void samsung_s3c2410_mpll_disable(struct clk_hw *hw) -{ - samsung_s3c2410_pll_enable(hw, 5, false); -} - -static int samsung_s3c2410_upll_enable(struct clk_hw *hw) -{ - return samsung_s3c2410_pll_enable(hw, 7, true); -} - -static void samsung_s3c2410_upll_disable(struct clk_hw *hw) -{ - samsung_s3c2410_pll_enable(hw, 7, false); -} - -static const struct clk_ops samsung_s3c2410_mpll_clk_min_ops = { - .recalc_rate = samsung_s3c2410_pll_recalc_rate, - .enable = samsung_s3c2410_mpll_enable, - .disable = samsung_s3c2410_mpll_disable, -}; - -static const struct clk_ops samsung_s3c2410_upll_clk_min_ops = { - .recalc_rate = samsung_s3c2410_pll_recalc_rate, - .enable = samsung_s3c2410_upll_enable, - .disable = samsung_s3c2410_upll_disable, -}; - -static const struct clk_ops samsung_s3c2440_mpll_clk_min_ops = { - .recalc_rate = samsung_s3c2440_mpll_recalc_rate, - .enable = samsung_s3c2410_mpll_enable, - .disable = samsung_s3c2410_mpll_disable, -}; - -static const struct clk_ops samsung_s3c2410_mpll_clk_ops = { - .recalc_rate = samsung_s3c2410_pll_recalc_rate, - .enable = samsung_s3c2410_mpll_enable, - .disable = samsung_s3c2410_mpll_disable, - .round_rate = samsung_pll_round_rate, - .set_rate = samsung_s3c2410_pll_set_rate, -}; - -static const struct clk_ops samsung_s3c2410_upll_clk_ops = { - .recalc_rate = samsung_s3c2410_pll_recalc_rate, - .enable = samsung_s3c2410_upll_enable, - .disable = samsung_s3c2410_upll_disable, - .round_rate = samsung_pll_round_rate, - .set_rate = samsung_s3c2410_pll_set_rate, -}; - -static const struct clk_ops samsung_s3c2440_mpll_clk_ops = { - .recalc_rate = samsung_s3c2440_mpll_recalc_rate, - .enable = samsung_s3c2410_mpll_enable, - .disable = samsung_s3c2410_mpll_disable, - .round_rate = samsung_pll_round_rate, - .set_rate = samsung_s3c2410_pll_set_rate, -}; - -/* * PLL2550x Clock Type */ @@ -1530,24 +1367,6 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, else init.ops = &samsung_pll46xx_clk_ops; break; - case pll_s3c2410_mpll: - if (!pll->rate_table) - init.ops = &samsung_s3c2410_mpll_clk_min_ops; - else - init.ops = &samsung_s3c2410_mpll_clk_ops; - break; - case pll_s3c2410_upll: - if (!pll->rate_table) - init.ops = &samsung_s3c2410_upll_clk_min_ops; - else - init.ops = &samsung_s3c2410_upll_clk_ops; - break; - case pll_s3c2440_mpll: - if (!pll->rate_table) - init.ops = &samsung_s3c2440_mpll_clk_min_ops; - else - init.ops = &samsung_s3c2440_mpll_clk_ops; - break; case pll_2550x: init.ops = &samsung_pll2550x_clk_ops; break; diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h index a9892c2d1f57..5d5a58d40e7e 100644 --- a/drivers/clk/samsung/clk-pll.h +++ b/drivers/clk/samsung/clk-pll.h @@ -25,9 +25,6 @@ enum samsung_pll_type { pll_6552, pll_6552_s3c2416, pll_6553, - pll_s3c2410_mpll, - pll_s3c2410_upll, - pll_s3c2440_mpll, pll_2550x, pll_2550xx, pll_2650x, @@ -56,24 +53,6 @@ enum samsung_pll_type { .sdiv = (_s), \ } -#define PLL_S3C2410_MPLL_RATE(_fin, _rate, _m, _p, _s) \ - { \ - .rate = PLL_VALID_RATE(_fin, _rate, \ - _m + 8, _p + 2, _s, 0, 16), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - } - -#define PLL_S3C2440_MPLL_RATE(_fin, _rate, _m, _p, _s) \ - { \ - .rate = PLL_VALID_RATE(_fin, _rate, \ - 2 * (_m + 8), _p + 2, _s, 0, 16), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - } - #define PLL_36XX_RATE(_fin, _rate, _m, _p, _s, _k) \ { \ .rate = PLL_VALID_RATE(_fin, _rate, \ diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c deleted file mode 100644 index f5e0a6ba2d12..000000000000 --- a/drivers/clk/samsung/clk-s3c2410-dclk.c +++ /dev/null @@ -1,440 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * Common Clock Framework support for s3c24xx external clock output. - */ - -#include <linux/clkdev.h> -#include <linux/slab.h> -#include <linux/clk.h> -#include <linux/clk-provider.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <linux/platform_data/clk-s3c2410.h> -#include <linux/module.h> -#include "clk.h" - -#define MUX_DCLK0 0 -#define MUX_DCLK1 1 -#define DIV_DCLK0 2 -#define DIV_DCLK1 3 -#define GATE_DCLK0 4 -#define GATE_DCLK1 5 -#define MUX_CLKOUT0 6 -#define MUX_CLKOUT1 7 -#define DCLK_MAX_CLKS (MUX_CLKOUT1 + 1) - -enum supported_socs { - S3C2410, - S3C2412, - S3C2440, - S3C2443, -}; - -struct s3c24xx_dclk_drv_data { - const char **clkout0_parent_names; - int clkout0_num_parents; - const char **clkout1_parent_names; - int clkout1_num_parents; - const char **mux_parent_names; - int mux_num_parents; -}; - -/* - * Clock for output-parent selection in misccr - */ - -struct s3c24xx_clkout { - struct clk_hw hw; - u32 mask; - u8 shift; - unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg); -}; - -#define to_s3c24xx_clkout(_hw) container_of(_hw, struct s3c24xx_clkout, hw) - -static u8 s3c24xx_clkout_get_parent(struct clk_hw *hw) -{ - struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw); - int num_parents = clk_hw_get_num_parents(hw); - u32 val; - - val = clkout->modify_misccr(0, 0) >> clkout->shift; - val >>= clkout->shift; - val &= clkout->mask; - - if (val >= num_parents) - return -EINVAL; - - return val; -} - -static int s3c24xx_clkout_set_parent(struct clk_hw *hw, u8 index) -{ - struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw); - - clkout->modify_misccr((clkout->mask << clkout->shift), - (index << clkout->shift)); - - return 0; -} - -static const struct clk_ops s3c24xx_clkout_ops = { - .get_parent = s3c24xx_clkout_get_parent, - .set_parent = s3c24xx_clkout_set_parent, - .determine_rate = __clk_mux_determine_rate, -}; - -static struct clk_hw *s3c24xx_register_clkout(struct device *dev, - const char *name, const char **parent_names, u8 num_parents, - u8 shift, u32 mask) -{ - struct s3c2410_clk_platform_data *pdata = dev_get_platdata(dev); - struct s3c24xx_clkout *clkout; - struct clk_init_data init; - int ret; - - if (!pdata) - return ERR_PTR(-EINVAL); - - /* allocate the clkout */ - clkout = kzalloc(sizeof(*clkout), GFP_KERNEL); - if (!clkout) - return ERR_PTR(-ENOMEM); - - init.name = name; - init.ops = &s3c24xx_clkout_ops; - init.flags = 0; - init.parent_names = parent_names; - init.num_parents = num_parents; - - clkout->shift = shift; - clkout->mask = mask; - clkout->hw.init = &init; - clkout->modify_misccr = pdata->modify_misccr; - - ret = clk_hw_register(dev, &clkout->hw); - if (ret) - return ERR_PTR(ret); - - return &clkout->hw; -} - -/* - * dclk and clkout init - */ - -struct s3c24xx_dclk { - struct device *dev; - void __iomem *base; - struct notifier_block dclk0_div_change_nb; - struct notifier_block dclk1_div_change_nb; - spinlock_t dclk_lock; - unsigned long reg_save; - /* clk_data must be the last entry in the structure */ - struct clk_hw_onecell_data clk_data; -}; - -#define to_s3c24xx_dclk0(x) \ - container_of(x, struct s3c24xx_dclk, dclk0_div_change_nb) - -#define to_s3c24xx_dclk1(x) \ - container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb) - -static const char *dclk_s3c2410_p[] = { "pclk", "uclk" }; -static const char *clkout0_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk", - "gate_dclk0" }; -static const char *clkout1_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk", - "gate_dclk1" }; - -static const char *clkout0_s3c2412_p[] = { "mpll", "upll", "rtc_clkout", - "hclk", "pclk", "gate_dclk0" }; -static const char *clkout1_s3c2412_p[] = { "xti", "upll", "fclk", "hclk", "pclk", - "gate_dclk1" }; - -static const char *clkout0_s3c2440_p[] = { "xti", "upll", "fclk", "hclk", "pclk", - "gate_dclk0" }; -static const char *clkout1_s3c2440_p[] = { "mpll", "upll", "rtc_clkout", - "hclk", "pclk", "gate_dclk1" }; - -static const char *dclk_s3c2443_p[] = { "pclk", "epll" }; -static const char *clkout0_s3c2443_p[] = { "xti", "epll", "armclk", "hclk", "pclk", - "gate_dclk0" }; -static const char *clkout1_s3c2443_p[] = { "dummy", "epll", "rtc_clkout", - "hclk", "pclk", "gate_dclk1" }; - -#define DCLKCON_DCLK_DIV_MASK 0xf -#define DCLKCON_DCLK0_DIV_SHIFT 4 -#define DCLKCON_DCLK0_CMP_SHIFT 8 -#define DCLKCON_DCLK1_DIV_SHIFT 20 -#define DCLKCON_DCLK1_CMP_SHIFT 24 - -static void s3c24xx_dclk_update_cmp(struct s3c24xx_dclk *s3c24xx_dclk, - int div_shift, int cmp_shift) -{ - unsigned long flags = 0; - u32 dclk_con, div, cmp; - - spin_lock_irqsave(&s3c24xx_dclk->dclk_lock, flags); - - dclk_con = readl_relaxed(s3c24xx_dclk->base); - - div = ((dclk_con >> div_shift) & DCLKCON_DCLK_DIV_MASK) + 1; - cmp = ((div + 1) / 2) - 1; - - dclk_con &= ~(DCLKCON_DCLK_DIV_MASK << cmp_shift); - dclk_con |= (cmp << cmp_shift); - - writel_relaxed(dclk_con, s3c24xx_dclk->base); - - spin_unlock_irqrestore(&s3c24xx_dclk->dclk_lock, flags); -} - -static int s3c24xx_dclk0_div_notify(struct notifier_block *nb, - unsigned long event, void *data) -{ - struct s3c24xx_dclk *s3c24xx_dclk = to_s3c24xx_dclk0(nb); - - if (event == POST_RATE_CHANGE) { - s3c24xx_dclk_update_cmp(s3c24xx_dclk, - DCLKCON_DCLK0_DIV_SHIFT, DCLKCON_DCLK0_CMP_SHIFT); - } - - return NOTIFY_DONE; -} - -static int s3c24xx_dclk1_div_notify(struct notifier_block *nb, - unsigned long event, void *data) -{ - struct s3c24xx_dclk *s3c24xx_dclk = to_s3c24xx_dclk1(nb); - - if (event == POST_RATE_CHANGE) { - s3c24xx_dclk_update_cmp(s3c24xx_dclk, - DCLKCON_DCLK1_DIV_SHIFT, DCLKCON_DCLK1_CMP_SHIFT); - } - - return NOTIFY_DONE; -} - -#ifdef CONFIG_PM_SLEEP -static int s3c24xx_dclk_suspend(struct device *dev) -{ - struct s3c24xx_dclk *s3c24xx_dclk = dev_get_drvdata(dev); - - s3c24xx_dclk->reg_save = readl_relaxed(s3c24xx_dclk->base); - return 0; -} - -static int s3c24xx_dclk_resume(struct device *dev) -{ - struct s3c24xx_dclk *s3c24xx_dclk = dev_get_drvdata(dev); - - writel_relaxed(s3c24xx_dclk->reg_save, s3c24xx_dclk->base); - return 0; -} -#endif - -static SIMPLE_DEV_PM_OPS(s3c24xx_dclk_pm_ops, - s3c24xx_dclk_suspend, s3c24xx_dclk_resume); - -static int s3c24xx_dclk_probe(struct platform_device *pdev) -{ - struct s3c24xx_dclk *s3c24xx_dclk; - struct s3c24xx_dclk_drv_data *dclk_variant; - struct clk_hw **clk_table; - int ret, i; - - s3c24xx_dclk = devm_kzalloc(&pdev->dev, - struct_size(s3c24xx_dclk, clk_data.hws, - DCLK_MAX_CLKS), - GFP_KERNEL); - if (!s3c24xx_dclk) - return -ENOMEM; - - clk_table = s3c24xx_dclk->clk_data.hws; - - s3c24xx_dclk->dev = &pdev->dev; - s3c24xx_dclk->clk_data.num = DCLK_MAX_CLKS; - platform_set_drvdata(pdev, s3c24xx_dclk); - spin_lock_init(&s3c24xx_dclk->dclk_lock); - - s3c24xx_dclk->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(s3c24xx_dclk->base)) - return PTR_ERR(s3c24xx_dclk->base); - - dclk_variant = (struct s3c24xx_dclk_drv_data *) - platform_get_device_id(pdev)->driver_data; - - - clk_table[MUX_DCLK0] = clk_hw_register_mux(&pdev->dev, "mux_dclk0", - dclk_variant->mux_parent_names, - dclk_variant->mux_num_parents, 0, - s3c24xx_dclk->base, 1, 1, 0, - &s3c24xx_dclk->dclk_lock); - clk_table[MUX_DCLK1] = clk_hw_register_mux(&pdev->dev, "mux_dclk1", - dclk_variant->mux_parent_names, - dclk_variant->mux_num_parents, 0, - s3c24xx_dclk->base, 17, 1, 0, - &s3c24xx_dclk->dclk_lock); - - clk_table[DIV_DCLK0] = clk_hw_register_divider(&pdev->dev, "div_dclk0", - "mux_dclk0", 0, s3c24xx_dclk->base, - 4, 4, 0, &s3c24xx_dclk->dclk_lock); - clk_table[DIV_DCLK1] = clk_hw_register_divider(&pdev->dev, "div_dclk1", - "mux_dclk1", 0, s3c24xx_dclk->base, - 20, 4, 0, &s3c24xx_dclk->dclk_lock); - - clk_table[GATE_DCLK0] = clk_hw_register_gate(&pdev->dev, "gate_dclk0", - "div_dclk0", CLK_SET_RATE_PARENT, - s3c24xx_dclk->base, 0, 0, - &s3c24xx_dclk->dclk_lock); - clk_table[GATE_DCLK1] = clk_hw_register_gate(&pdev->dev, "gate_dclk1", - "div_dclk1", CLK_SET_RATE_PARENT, - s3c24xx_dclk->base, 16, 0, - &s3c24xx_dclk->dclk_lock); - - clk_table[MUX_CLKOUT0] = s3c24xx_register_clkout(&pdev->dev, - "clkout0", dclk_variant->clkout0_parent_names, - dclk_variant->clkout0_num_parents, 4, 7); - clk_table[MUX_CLKOUT1] = s3c24xx_register_clkout(&pdev->dev, - "clkout1", dclk_variant->clkout1_parent_names, - dclk_variant->clkout1_num_parents, 8, 7); - - for (i = 0; i < DCLK_MAX_CLKS; i++) - if (IS_ERR(clk_table[i])) { - dev_err(&pdev->dev, "clock %d failed to register\n", i); - ret = PTR_ERR(clk_table[i]); - goto err_clk_register; - } - - ret = clk_hw_register_clkdev(clk_table[MUX_DCLK0], "dclk0", NULL); - if (!ret) - ret = clk_hw_register_clkdev(clk_table[MUX_DCLK1], "dclk1", - NULL); - if (!ret) - ret = clk_hw_register_clkdev(clk_table[MUX_CLKOUT0], - "clkout0", NULL); - if (!ret) - ret = clk_hw_register_clkdev(clk_table[MUX_CLKOUT1], - "clkout1", NULL); - if (ret) { - dev_err(&pdev->dev, "failed to register aliases, %d\n", ret); - goto err_clk_register; - } - - s3c24xx_dclk->dclk0_div_change_nb.notifier_call = - s3c24xx_dclk0_div_notify; - - s3c24xx_dclk->dclk1_div_change_nb.notifier_call = - s3c24xx_dclk1_div_notify; - - ret = clk_notifier_register(clk_table[DIV_DCLK0]->clk, - &s3c24xx_dclk->dclk0_div_change_nb); - if (ret) - goto err_clk_register; - - ret = clk_notifier_register(clk_table[DIV_DCLK1]->clk, - &s3c24xx_dclk->dclk1_div_change_nb); - if (ret) - goto err_dclk_notify; - - return 0; - -err_dclk_notify: - clk_notifier_unregister(clk_table[DIV_DCLK0]->clk, - &s3c24xx_dclk->dclk0_div_change_nb); -err_clk_register: - for (i = 0; i < DCLK_MAX_CLKS; i++) - if (clk_table[i] && !IS_ERR(clk_table[i])) - clk_hw_unregister(clk_table[i]); - - return ret; -} - -static int s3c24xx_dclk_remove(struct platform_device *pdev) -{ - struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev); - struct clk_hw **clk_table = s3c24xx_dclk->clk_data.hws; - int i; - - clk_notifier_unregister(clk_table[DIV_DCLK1]->clk, - &s3c24xx_dclk->dclk1_div_change_nb); - clk_notifier_unregister(clk_table[DIV_DCLK0]->clk, - &s3c24xx_dclk->dclk0_div_change_nb); - - for (i = 0; i < DCLK_MAX_CLKS; i++) - clk_hw_unregister(clk_table[i]); - - return 0; -} - -static struct s3c24xx_dclk_drv_data dclk_variants[] = { - [S3C2410] = { - .clkout0_parent_names = clkout0_s3c2410_p, - .clkout0_num_parents = ARRAY_SIZE(clkout0_s3c2410_p), - .clkout1_parent_names = clkout1_s3c2410_p, - .clkout1_num_parents = ARRAY_SIZE(clkout1_s3c2410_p), - .mux_parent_names = dclk_s3c2410_p, - .mux_num_parents = ARRAY_SIZE(dclk_s3c2410_p), - }, - [S3C2412] = { - .clkout0_parent_names = clkout0_s3c2412_p, - .clkout0_num_parents = ARRAY_SIZE(clkout0_s3c2412_p), - .clkout1_parent_names = clkout1_s3c2412_p, - .clkout1_num_parents = ARRAY_SIZE(clkout1_s3c2412_p), - .mux_parent_names = dclk_s3c2410_p, - .mux_num_parents = ARRAY_SIZE(dclk_s3c2410_p), - }, - [S3C2440] = { - .clkout0_parent_names = clkout0_s3c2440_p, - .clkout0_num_parents = ARRAY_SIZE(clkout0_s3c2440_p), - .clkout1_parent_names = clkout1_s3c2440_p, - .clkout1_num_parents = ARRAY_SIZE(clkout1_s3c2440_p), - .mux_parent_names = dclk_s3c2410_p, - .mux_num_parents = ARRAY_SIZE(dclk_s3c2410_p), - }, - [S3C2443] = { - .clkout0_parent_names = clkout0_s3c2443_p, - .clkout0_num_parents = ARRAY_SIZE(clkout0_s3c2443_p), - .clkout1_parent_names = clkout1_s3c2443_p, - .clkout1_num_parents = ARRAY_SIZE(clkout1_s3c2443_p), - .mux_parent_names = dclk_s3c2443_p, - .mux_num_parents = ARRAY_SIZE(dclk_s3c2443_p), - }, -}; - -static const struct platform_device_id s3c24xx_dclk_driver_ids[] = { - { - .name = "s3c2410-dclk", - .driver_data = (kernel_ulong_t)&dclk_variants[S3C2410], - }, { - .name = "s3c2412-dclk", - .driver_data = (kernel_ulong_t)&dclk_variants[S3C2412], - }, { - .name = "s3c2440-dclk", - .driver_data = (kernel_ulong_t)&dclk_variants[S3C2440], - }, { - .name = "s3c2443-dclk", - .driver_data = (kernel_ulong_t)&dclk_variants[S3C2443], - }, - { } -}; - -MODULE_DEVICE_TABLE(platform, s3c24xx_dclk_driver_ids); - -static struct platform_driver s3c24xx_dclk_driver = { - .driver = { - .name = "s3c24xx-dclk", - .pm = &s3c24xx_dclk_pm_ops, - .suppress_bind_attrs = true, - }, - .probe = s3c24xx_dclk_probe, - .remove = s3c24xx_dclk_remove, - .id_table = s3c24xx_dclk_driver_ids, -}; -module_platform_driver(s3c24xx_dclk_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>"); -MODULE_DESCRIPTION("Driver for the S3C24XX external clock outputs"); diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c deleted file mode 100644 index 3d152a46169b..000000000000 --- a/drivers/clk/samsung/clk-s3c2410.c +++ /dev/null @@ -1,446 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * Common Clock Framework support for S3C2410 and following SoCs. - */ - -#include <linux/clk-provider.h> -#include <linux/clk/samsung.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#include <dt-bindings/clock/s3c2410.h> - -#include "clk.h" -#include "clk-pll.h" - -#define LOCKTIME 0x00 -#define MPLLCON 0x04 -#define UPLLCON 0x08 -#define CLKCON 0x0c -#define CLKSLOW 0x10 -#define CLKDIVN 0x14 -#define CAMDIVN 0x18 - -/* the soc types */ -enum supported_socs { - S3C2410, - S3C2440, - S3C2442, -}; - -/* list of PLLs to be registered */ -enum s3c2410_plls { - mpll, upll, -}; - -static void __iomem *reg_base; - -/* - * list of controller registers to be saved and restored during a - * suspend/resume cycle. - */ -static unsigned long s3c2410_clk_regs[] __initdata = { - LOCKTIME, - MPLLCON, - UPLLCON, - CLKCON, - CLKSLOW, - CLKDIVN, - CAMDIVN, -}; - -PNAME(fclk_p) = { "mpll", "div_slow" }; - -static struct samsung_mux_clock s3c2410_common_muxes[] __initdata = { - MUX(FCLK, "fclk", fclk_p, CLKSLOW, 4, 1), -}; - -static struct clk_div_table divslow_d[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 6 }, - { .val = 4, .div = 8 }, - { .val = 5, .div = 10 }, - { .val = 6, .div = 12 }, - { .val = 7, .div = 14 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c2410_common_dividers[] __initdata = { - DIV_T(0, "div_slow", "xti", CLKSLOW, 0, 3, divslow_d), - DIV(PCLK, "pclk", "hclk", CLKDIVN, 0, 1), -}; - -static struct samsung_gate_clock s3c2410_common_gates[] __initdata = { - GATE(PCLK_SPI, "spi", "pclk", CLKCON, 18, 0, 0), - GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 17, 0, 0), - GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 16, 0, 0), - GATE(PCLK_ADC, "adc", "pclk", CLKCON, 15, 0, 0), - GATE(PCLK_RTC, "rtc", "pclk", CLKCON, 14, 0, 0), - GATE(PCLK_GPIO, "gpio", "pclk", CLKCON, 13, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 12, 0, 0), - GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 11, 0, 0), - GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 10, 0, 0), - GATE(PCLK_SDI, "sdi", "pclk", CLKCON, 9, 0, 0), - GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 8, 0, 0), - GATE(HCLK_USBD, "usb-device", "hclk", CLKCON, 7, 0, 0), - GATE(HCLK_USBH, "usb-host", "hclk", CLKCON, 6, 0, 0), - GATE(HCLK_LCD, "lcd", "hclk", CLKCON, 5, 0, 0), - GATE(HCLK_NAND, "nand", "hclk", CLKCON, 4, 0, 0), -}; - -/* should be added _after_ the soc-specific clocks are created */ -static struct samsung_clock_alias s3c2410_common_aliases[] __initdata = { - ALIAS(PCLK_I2C, "s3c2410-i2c.0", "i2c"), - ALIAS(PCLK_ADC, NULL, "adc"), - ALIAS(PCLK_RTC, NULL, "rtc"), - ALIAS(PCLK_PWM, NULL, "timers"), - ALIAS(HCLK_LCD, NULL, "lcd"), - ALIAS(HCLK_USBD, NULL, "usb-device"), - ALIAS(HCLK_USBH, NULL, "usb-host"), - ALIAS(UCLK, NULL, "usb-bus-host"), - ALIAS(UCLK, NULL, "usb-bus-gadget"), - ALIAS(ARMCLK, NULL, "armclk"), - ALIAS(UCLK, NULL, "uclk"), - ALIAS(HCLK, NULL, "hclk"), - ALIAS(MPLL, NULL, "mpll"), - ALIAS(FCLK, NULL, "fclk"), - ALIAS(PCLK, NULL, "watchdog"), - ALIAS(PCLK_SDI, NULL, "sdi"), - ALIAS(HCLK_NAND, NULL, "nand"), - ALIAS(PCLK_I2S, NULL, "iis"), - ALIAS(PCLK_I2C, NULL, "i2c"), -}; - -/* S3C2410 specific clocks */ - -static struct samsung_pll_rate_table pll_s3c2410_12mhz_tbl[] __initdata = { - /* sorted in descending order */ - /* 2410A extras */ - PLL_S3C2410_MPLL_RATE(12 * MHZ, 270000000, 127, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 268000000, 126, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 266000000, 125, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 226000000, 105, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 210000000, 132, 2, 1), - /* 2410 common */ - PLL_S3C2410_MPLL_RATE(12 * MHZ, 202800000, 161, 3, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 192000000, 88, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 186000000, 85, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 180000000, 82, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 170000000, 77, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 158000000, 71, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 152000000, 68, 1, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 147000000, 90, 2, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 135000000, 82, 2, 1), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 124000000, 116, 1, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 118500000, 150, 2, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 113000000, 105, 1, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 101250000, 127, 2, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 90000000, 112, 2, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 84750000, 105, 2, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 79000000, 71, 1, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 67500000, 82, 2, 2), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 56250000, 142, 2, 3), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 48000000, 120, 2, 3), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 50700000, 161, 3, 3), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 45000000, 82, 1, 3), - PLL_S3C2410_MPLL_RATE(12 * MHZ, 33750000, 82, 2, 3), - { /* sentinel */ }, -}; - -static struct samsung_pll_clock s3c2410_plls[] __initdata = { - [mpll] = PLL(pll_s3c2410_mpll, MPLL, "mpll", "xti", - LOCKTIME, MPLLCON, NULL), - [upll] = PLL(pll_s3c2410_upll, UPLL, "upll", "xti", - LOCKTIME, UPLLCON, NULL), -}; - -static struct samsung_div_clock s3c2410_dividers[] __initdata = { - DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1), -}; - -static struct samsung_fixed_factor_clock s3c2410_ffactor[] __initdata = { - /* - * armclk is directly supplied by the fclk, without - * switching possibility like on the s3c244x below. - */ - FFACTOR(ARMCLK, "armclk", "fclk", 1, 1, 0), - - /* uclk is fed from the unmodified upll */ - FFACTOR(UCLK, "uclk", "upll", 1, 1, 0), -}; - -static struct samsung_clock_alias s3c2410_aliases[] __initdata = { - ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"), - ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"), - ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"), - ALIAS(PCLK_UART0, "s3c2410-uart.0", "clk_uart_baud0"), - ALIAS(PCLK_UART1, "s3c2410-uart.1", "clk_uart_baud0"), - ALIAS(PCLK_UART2, "s3c2410-uart.2", "clk_uart_baud0"), - ALIAS(UCLK, NULL, "clk_uart_baud1"), -}; - -/* S3C244x specific clocks */ - -static struct samsung_pll_rate_table pll_s3c244x_12mhz_tbl[] __initdata = { - /* sorted in descending order */ - PLL_S3C2440_MPLL_RATE(12 * MHZ, 400000000, 0x5c, 1, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 390000000, 0x7a, 2, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 380000000, 0x57, 1, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 370000000, 0xb1, 4, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 360000000, 0x70, 2, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 350000000, 0xa7, 4, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 340000000, 0x4d, 1, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 330000000, 0x66, 2, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 320000000, 0x98, 4, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 310000000, 0x93, 4, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 300000000, 0x75, 3, 1), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 240000000, 0x70, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 230000000, 0x6b, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 220000000, 0x66, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 210000000, 0x84, 2, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 200000000, 0x5c, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 190000000, 0x57, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 180000000, 0x70, 2, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 170000000, 0x4d, 1, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 160000000, 0x98, 4, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 150000000, 0x75, 3, 2), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 120000000, 0x70, 1, 3), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 110000000, 0x66, 1, 3), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 100000000, 0x5c, 1, 3), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 90000000, 0x70, 2, 3), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 80000000, 0x98, 4, 3), - PLL_S3C2440_MPLL_RATE(12 * MHZ, 75000000, 0x75, 3, 3), - { /* sentinel */ }, -}; - -static struct samsung_pll_clock s3c244x_common_plls[] __initdata = { - [mpll] = PLL(pll_s3c2440_mpll, MPLL, "mpll", "xti", - LOCKTIME, MPLLCON, NULL), - [upll] = PLL(pll_s3c2410_upll, UPLL, "upll", "xti", - LOCKTIME, UPLLCON, NULL), -}; - -PNAME(hclk_p) = { "fclk", "div_hclk_2", "div_hclk_4", "div_hclk_3" }; -PNAME(armclk_p) = { "fclk", "hclk" }; - -static struct samsung_mux_clock s3c244x_common_muxes[] __initdata = { - MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2), - MUX(ARMCLK, "armclk", armclk_p, CAMDIVN, 12, 1), -}; - -static struct samsung_fixed_factor_clock s3c244x_common_ffactor[] __initdata = { - FFACTOR(0, "div_hclk_2", "fclk", 1, 2, 0), - FFACTOR(0, "ff_cam", "div_cam", 2, 1, CLK_SET_RATE_PARENT), -}; - -static struct clk_div_table div_hclk_4_d[] = { - { .val = 0, .div = 4 }, - { .val = 1, .div = 8 }, - { /* sentinel */ }, -}; - -static struct clk_div_table div_hclk_3_d[] = { - { .val = 0, .div = 3 }, - { .val = 1, .div = 6 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c244x_common_dividers[] __initdata = { - DIV(UCLK, "uclk", "upll", CLKDIVN, 3, 1), - DIV(0, "div_hclk", "fclk", CLKDIVN, 1, 1), - DIV_T(0, "div_hclk_4", "fclk", CAMDIVN, 9, 1, div_hclk_4_d), - DIV_T(0, "div_hclk_3", "fclk", CAMDIVN, 8, 1, div_hclk_3_d), - DIV(0, "div_cam", "upll", CAMDIVN, 0, 3), -}; - -static struct samsung_gate_clock s3c244x_common_gates[] __initdata = { - GATE(HCLK_CAM, "cam", "hclk", CLKCON, 19, 0, 0), -}; - -static struct samsung_clock_alias s3c244x_common_aliases[] __initdata = { - ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), - ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"), - ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), - ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"), - ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"), - ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"), - ALIAS(HCLK_CAM, NULL, "camif"), - ALIAS(CAMIF, NULL, "camif-upll"), -}; - -/* S3C2440 specific clocks */ - -PNAME(s3c2440_camif_p) = { "upll", "ff_cam" }; - -static struct samsung_mux_clock s3c2440_muxes[] __initdata = { - MUX(CAMIF, "camif", s3c2440_camif_p, CAMDIVN, 4, 1), -}; - -static struct samsung_gate_clock s3c2440_gates[] __initdata = { - GATE(PCLK_AC97, "ac97", "pclk", CLKCON, 20, 0, 0), -}; - -/* S3C2442 specific clocks */ - -static struct samsung_fixed_factor_clock s3c2442_ffactor[] __initdata = { - FFACTOR(0, "upll_3", "upll", 1, 3, 0), -}; - -PNAME(s3c2442_camif_p) = { "upll", "ff_cam", "upll", "upll_3" }; - -static struct samsung_mux_clock s3c2442_muxes[] __initdata = { - MUX(CAMIF, "camif", s3c2442_camif_p, CAMDIVN, 4, 2), -}; - -/* - * fixed rate clocks generated outside the soc - * Only necessary until the devicetree-move is complete - */ -#define XTI 1 -static struct samsung_fixed_rate_clock s3c2410_common_frate_clks[] __initdata = { - FRATE(XTI, "xti", NULL, 0, 0), -}; - -static void __init s3c2410_common_clk_register_fixed_ext( - struct samsung_clk_provider *ctx, - unsigned long xti_f) -{ - struct samsung_clock_alias xti_alias = ALIAS(XTI, NULL, "xtal"); - - s3c2410_common_frate_clks[0].fixed_rate = xti_f; - samsung_clk_register_fixed_rate(ctx, s3c2410_common_frate_clks, - ARRAY_SIZE(s3c2410_common_frate_clks)); - - samsung_clk_register_alias(ctx, &xti_alias, 1); -} - -void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f, - int current_soc, - void __iomem *base) -{ - struct samsung_clk_provider *ctx; - struct clk_hw **hws; - reg_base = base; - - if (np) { - reg_base = of_iomap(np, 0); - if (!reg_base) - panic("%s: failed to map registers\n", __func__); - } - - ctx = samsung_clk_init(np, reg_base, NR_CLKS); - hws = ctx->clk_data.hws; - - /* Register external clocks only in non-dt cases */ - if (!np) - s3c2410_common_clk_register_fixed_ext(ctx, xti_f); - - if (current_soc == S3C2410) { - if (clk_hw_get_rate(hws[XTI]) == 12 * MHZ) { - s3c2410_plls[mpll].rate_table = pll_s3c2410_12mhz_tbl; - s3c2410_plls[upll].rate_table = pll_s3c2410_12mhz_tbl; - } - - /* Register PLLs. */ - samsung_clk_register_pll(ctx, s3c2410_plls, - ARRAY_SIZE(s3c2410_plls), reg_base); - - } else { /* S3C2440, S3C2442 */ - if (clk_hw_get_rate(hws[XTI]) == 12 * MHZ) { - /* - * plls follow different calculation schemes, with the - * upll following the same scheme as the s3c2410 plls - */ - s3c244x_common_plls[mpll].rate_table = - pll_s3c244x_12mhz_tbl; - s3c244x_common_plls[upll].rate_table = - pll_s3c2410_12mhz_tbl; - } - - /* Register PLLs. */ - samsung_clk_register_pll(ctx, s3c244x_common_plls, - ARRAY_SIZE(s3c244x_common_plls), reg_base); - } - - /* Register common internal clocks. */ - samsung_clk_register_mux(ctx, s3c2410_common_muxes, - ARRAY_SIZE(s3c2410_common_muxes)); - samsung_clk_register_div(ctx, s3c2410_common_dividers, - ARRAY_SIZE(s3c2410_common_dividers)); - samsung_clk_register_gate(ctx, s3c2410_common_gates, - ARRAY_SIZE(s3c2410_common_gates)); - - if (current_soc == S3C2440 || current_soc == S3C2442) { - samsung_clk_register_div(ctx, s3c244x_common_dividers, - ARRAY_SIZE(s3c244x_common_dividers)); - samsung_clk_register_gate(ctx, s3c244x_common_gates, - ARRAY_SIZE(s3c244x_common_gates)); - samsung_clk_register_mux(ctx, s3c244x_common_muxes, - ARRAY_SIZE(s3c244x_common_muxes)); - samsung_clk_register_fixed_factor(ctx, s3c244x_common_ffactor, - ARRAY_SIZE(s3c244x_common_ffactor)); - } - - /* Register SoC-specific clocks. */ - switch (current_soc) { - case S3C2410: - samsung_clk_register_div(ctx, s3c2410_dividers, - ARRAY_SIZE(s3c2410_dividers)); - samsung_clk_register_fixed_factor(ctx, s3c2410_ffactor, - ARRAY_SIZE(s3c2410_ffactor)); - samsung_clk_register_alias(ctx, s3c2410_aliases, - ARRAY_SIZE(s3c2410_aliases)); - break; - case S3C2440: - samsung_clk_register_mux(ctx, s3c2440_muxes, - ARRAY_SIZE(s3c2440_muxes)); - samsung_clk_register_gate(ctx, s3c2440_gates, - ARRAY_SIZE(s3c2440_gates)); - break; - case S3C2442: - samsung_clk_register_mux(ctx, s3c2442_muxes, - ARRAY_SIZE(s3c2442_muxes)); - samsung_clk_register_fixed_factor(ctx, s3c2442_ffactor, - ARRAY_SIZE(s3c2442_ffactor)); - break; - } - - /* - * Register common aliases at the end, as some of the aliased clocks - * are SoC specific. - */ - samsung_clk_register_alias(ctx, s3c2410_common_aliases, - ARRAY_SIZE(s3c2410_common_aliases)); - - if (current_soc == S3C2440 || current_soc == S3C2442) { - samsung_clk_register_alias(ctx, s3c244x_common_aliases, - ARRAY_SIZE(s3c244x_common_aliases)); - } - - samsung_clk_sleep_init(reg_base, s3c2410_clk_regs, - ARRAY_SIZE(s3c2410_clk_regs)); - - samsung_clk_of_add_provider(np, ctx); -} - -static void __init s3c2410_clk_init(struct device_node *np) -{ - s3c2410_common_clk_init(np, 0, S3C2410, NULL); -} -CLK_OF_DECLARE(s3c2410_clk, "samsung,s3c2410-clock", s3c2410_clk_init); - -static void __init s3c2440_clk_init(struct device_node *np) -{ - s3c2410_common_clk_init(np, 0, S3C2440, NULL); -} -CLK_OF_DECLARE(s3c2440_clk, "samsung,s3c2440-clock", s3c2440_clk_init); - -static void __init s3c2442_clk_init(struct device_node *np) -{ - s3c2410_common_clk_init(np, 0, S3C2442, NULL); -} -CLK_OF_DECLARE(s3c2442_clk, "samsung,s3c2442-clock", s3c2442_clk_init); diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c deleted file mode 100644 index 724ef642f048..000000000000 --- a/drivers/clk/samsung/clk-s3c2412.c +++ /dev/null @@ -1,254 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * Common Clock Framework support for S3C2412 and S3C2413. - */ - -#include <linux/clk-provider.h> -#include <linux/clk/samsung.h> -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/reboot.h> - -#include <dt-bindings/clock/s3c2412.h> - -#include "clk.h" -#include "clk-pll.h" - -#define LOCKTIME 0x00 -#define MPLLCON 0x04 -#define UPLLCON 0x08 -#define CLKCON 0x0c -#define CLKDIVN 0x14 -#define CLKSRC 0x1c -#define SWRST 0x30 - -static void __iomem *reg_base; - -/* - * list of controller registers to be saved and restored during a - * suspend/resume cycle. - */ -static unsigned long s3c2412_clk_regs[] __initdata = { - LOCKTIME, - MPLLCON, - UPLLCON, - CLKCON, - CLKDIVN, - CLKSRC, -}; - -static struct clk_div_table divxti_d[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 4 }, - { .val = 3, .div = 6 }, - { .val = 4, .div = 8 }, - { .val = 5, .div = 10 }, - { .val = 6, .div = 12 }, - { .val = 7, .div = 14 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c2412_dividers[] __initdata = { - DIV_T(0, "div_xti", "xti", CLKSRC, 0, 3, divxti_d), - DIV(0, "div_cam", "mux_cam", CLKDIVN, 16, 4), - DIV(0, "div_i2s", "mux_i2s", CLKDIVN, 12, 4), - DIV(0, "div_uart", "mux_uart", CLKDIVN, 8, 4), - DIV(0, "div_usb", "mux_usb", CLKDIVN, 6, 1), - DIV(0, "div_hclk_half", "hclk", CLKDIVN, 5, 1), - DIV(ARMDIV, "armdiv", "msysclk", CLKDIVN, 3, 1), - DIV(PCLK, "pclk", "hclk", CLKDIVN, 2, 1), - DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2), -}; - -static struct samsung_fixed_factor_clock s3c2412_ffactor[] __initdata = { - FFACTOR(0, "ff_hclk", "hclk", 2, 1, CLK_SET_RATE_PARENT), -}; - -/* - * The first two use the OM[4] setting, which is not readable from - * software, so assume it is set to xti. - */ -PNAME(erefclk_p) = { "xti", "xti", "xti", "ext" }; -PNAME(urefclk_p) = { "xti", "xti", "xti", "ext" }; - -PNAME(camclk_p) = { "usysclk", "hclk" }; -PNAME(usbclk_p) = { "usysclk", "hclk" }; -PNAME(i2sclk_p) = { "erefclk", "mpll" }; -PNAME(uartclk_p) = { "erefclk", "mpll" }; -PNAME(usysclk_p) = { "urefclk", "upll" }; -PNAME(msysclk_p) = { "mdivclk", "mpll" }; -PNAME(mdivclk_p) = { "xti", "div_xti" }; -PNAME(armclk_p) = { "armdiv", "hclk" }; - -static struct samsung_mux_clock s3c2412_muxes[] __initdata = { - MUX(0, "erefclk", erefclk_p, CLKSRC, 14, 2), - MUX(0, "urefclk", urefclk_p, CLKSRC, 12, 2), - MUX(0, "mux_cam", camclk_p, CLKSRC, 11, 1), - MUX(0, "mux_usb", usbclk_p, CLKSRC, 10, 1), - MUX(0, "mux_i2s", i2sclk_p, CLKSRC, 9, 1), - MUX(0, "mux_uart", uartclk_p, CLKSRC, 8, 1), - MUX(USYSCLK, "usysclk", usysclk_p, CLKSRC, 5, 1), - MUX(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1), - MUX(MDIVCLK, "mdivclk", mdivclk_p, CLKSRC, 3, 1), - MUX(ARMCLK, "armclk", armclk_p, CLKDIVN, 4, 1), -}; - -static struct samsung_pll_clock s3c2412_plls[] __initdata = { - PLL(pll_s3c2440_mpll, MPLL, "mpll", "xti", LOCKTIME, MPLLCON, NULL), - PLL(pll_s3c2410_upll, UPLL, "upll", "urefclk", LOCKTIME, UPLLCON, NULL), -}; - -static struct samsung_gate_clock s3c2412_gates[] __initdata = { - GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0), - GATE(PCLK_SPI, "spi", "pclk", CLKCON, 27, 0, 0), - GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 26, 0, 0), - GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 25, 0, 0), - GATE(PCLK_ADC, "adc", "pclk", CLKCON, 24, 0, 0), - GATE(PCLK_RTC, "rtc", "pclk", CLKCON, 23, 0, 0), - GATE(PCLK_GPIO, "gpio", "pclk", CLKCON, 22, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0), - GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 20, 0, 0), - GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0), - GATE(PCLK_SDI, "sdi", "pclk", CLKCON, 18, 0, 0), - GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0), - GATE(PCLK_USBD, "usb-device", "pclk", CLKCON, 16, 0, 0), - GATE(SCLK_CAM, "sclk_cam", "div_cam", CLKCON, 15, 0, 0), - GATE(SCLK_UART, "sclk_uart", "div_uart", CLKCON, 14, 0, 0), - GATE(SCLK_I2S, "sclk_i2s", "div_i2s", CLKCON, 13, 0, 0), - GATE(SCLK_USBH, "sclk_usbh", "div_usb", CLKCON, 12, 0, 0), - GATE(SCLK_USBD, "sclk_usbd", "div_usb", CLKCON, 11, 0, 0), - GATE(HCLK_HALF, "hclk_half", "div_hclk_half", CLKCON, 10, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_X2, "hclkx2", "ff_hclk", CLKCON, 9, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_SDRAM, "sdram", "hclk", CLKCON, 8, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_USBH, "usb-host", "hclk", CLKCON, 6, 0, 0), - GATE(HCLK_LCD, "lcd", "hclk", CLKCON, 5, 0, 0), - GATE(HCLK_NAND, "nand", "hclk", CLKCON, 4, 0, 0), - GATE(HCLK_DMA3, "dma3", "hclk", CLKCON, 3, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA2, "dma2", "hclk", CLKCON, 2, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA1, "dma1", "hclk", CLKCON, 1, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA0, "dma0", "hclk", CLKCON, 0, CLK_IGNORE_UNUSED, 0), -}; - -static struct samsung_clock_alias s3c2412_aliases[] __initdata = { - ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"), - ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"), - ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"), - ALIAS(PCLK_UART0, "s3c2412-uart.0", "clk_uart_baud2"), - ALIAS(PCLK_UART1, "s3c2412-uart.1", "clk_uart_baud2"), - ALIAS(PCLK_UART2, "s3c2412-uart.2", "clk_uart_baud2"), - ALIAS(SCLK_UART, NULL, "clk_uart_baud3"), - ALIAS(PCLK_I2C, "s3c2410-i2c.0", "i2c"), - ALIAS(PCLK_ADC, NULL, "adc"), - ALIAS(PCLK_RTC, NULL, "rtc"), - ALIAS(PCLK_PWM, NULL, "timers"), - ALIAS(HCLK_LCD, NULL, "lcd"), - ALIAS(PCLK_USBD, NULL, "usb-device"), - ALIAS(SCLK_USBD, NULL, "usb-bus-gadget"), - ALIAS(HCLK_USBH, NULL, "usb-host"), - ALIAS(SCLK_USBH, NULL, "usb-bus-host"), - ALIAS(ARMCLK, NULL, "armclk"), - ALIAS(HCLK, NULL, "hclk"), - ALIAS(MPLL, NULL, "mpll"), - ALIAS(MSYSCLK, NULL, "fclk"), -}; - -static int s3c2412_restart(struct notifier_block *this, - unsigned long mode, void *cmd) -{ - /* errata "Watch-dog/Software Reset Problem" specifies that - * this reset must be done with the SYSCLK sourced from - * EXTCLK instead of FOUT to avoid a glitch in the reset - * mechanism. - * - * See the watchdog section of the S3C2412 manual for more - * information on this fix. - */ - - __raw_writel(0x00, reg_base + CLKSRC); - __raw_writel(0x533C2412, reg_base + SWRST); - return NOTIFY_DONE; -} - -static struct notifier_block s3c2412_restart_handler = { - .notifier_call = s3c2412_restart, - .priority = 129, -}; - -/* - * fixed rate clocks generated outside the soc - * Only necessary until the devicetree-move is complete - */ -#define XTI 1 -static struct samsung_fixed_rate_clock s3c2412_common_frate_clks[] __initdata = { - FRATE(XTI, "xti", NULL, 0, 0), - FRATE(0, "ext", NULL, 0, 0), -}; - -static void __init s3c2412_common_clk_register_fixed_ext( - struct samsung_clk_provider *ctx, - unsigned long xti_f, unsigned long ext_f) -{ - /* xtal alias is necessary for the current cpufreq driver */ - struct samsung_clock_alias xti_alias = ALIAS(XTI, NULL, "xtal"); - - s3c2412_common_frate_clks[0].fixed_rate = xti_f; - s3c2412_common_frate_clks[1].fixed_rate = ext_f; - samsung_clk_register_fixed_rate(ctx, s3c2412_common_frate_clks, - ARRAY_SIZE(s3c2412_common_frate_clks)); - - samsung_clk_register_alias(ctx, &xti_alias, 1); -} - -void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f, - unsigned long ext_f, void __iomem *base) -{ - struct samsung_clk_provider *ctx; - int ret; - reg_base = base; - - if (np) { - reg_base = of_iomap(np, 0); - if (!reg_base) - panic("%s: failed to map registers\n", __func__); - } - - ctx = samsung_clk_init(np, reg_base, NR_CLKS); - - /* Register external clocks only in non-dt cases */ - if (!np) - s3c2412_common_clk_register_fixed_ext(ctx, xti_f, ext_f); - - /* Register PLLs. */ - samsung_clk_register_pll(ctx, s3c2412_plls, ARRAY_SIZE(s3c2412_plls), - reg_base); - - /* Register common internal clocks. */ - samsung_clk_register_mux(ctx, s3c2412_muxes, ARRAY_SIZE(s3c2412_muxes)); - samsung_clk_register_div(ctx, s3c2412_dividers, - ARRAY_SIZE(s3c2412_dividers)); - samsung_clk_register_gate(ctx, s3c2412_gates, - ARRAY_SIZE(s3c2412_gates)); - samsung_clk_register_fixed_factor(ctx, s3c2412_ffactor, - ARRAY_SIZE(s3c2412_ffactor)); - samsung_clk_register_alias(ctx, s3c2412_aliases, - ARRAY_SIZE(s3c2412_aliases)); - - samsung_clk_sleep_init(reg_base, s3c2412_clk_regs, - ARRAY_SIZE(s3c2412_clk_regs)); - - samsung_clk_of_add_provider(np, ctx); - - ret = register_restart_handler(&s3c2412_restart_handler); - if (ret) - pr_warn("cannot register restart handler, %d\n", ret); -} - -static void __init s3c2412_clk_init(struct device_node *np) -{ - s3c2412_common_clk_init(np, 0, 0, NULL); -} -CLK_OF_DECLARE(s3c2412_clk, "samsung,s3c2412-clock", s3c2412_clk_init); diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c deleted file mode 100644 index a827d63766d1..000000000000 --- a/drivers/clk/samsung/clk-s3c2443.c +++ /dev/null @@ -1,438 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * Common Clock Framework support for S3C2443 and following SoCs. - */ - -#include <linux/clk-provider.h> -#include <linux/clk/samsung.h> -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/reboot.h> - -#include <dt-bindings/clock/s3c2443.h> - -#include "clk.h" -#include "clk-pll.h" - -/* S3C2416 clock controller register offsets */ -#define LOCKCON0 0x00 -#define LOCKCON1 0x04 -#define MPLLCON 0x10 -#define EPLLCON 0x18 -#define EPLLCON_K 0x1C -#define CLKSRC 0x20 -#define CLKDIV0 0x24 -#define CLKDIV1 0x28 -#define CLKDIV2 0x2C -#define HCLKCON 0x30 -#define PCLKCON 0x34 -#define SCLKCON 0x38 -#define SWRST 0x44 - -/* the soc types */ -enum supported_socs { - S3C2416, - S3C2443, - S3C2450, -}; - -static void __iomem *reg_base; - -/* - * list of controller registers to be saved and restored during a - * suspend/resume cycle. - */ -static unsigned long s3c2443_clk_regs[] __initdata = { - LOCKCON0, - LOCKCON1, - MPLLCON, - EPLLCON, - EPLLCON_K, - CLKSRC, - CLKDIV0, - CLKDIV1, - CLKDIV2, - PCLKCON, - HCLKCON, - SCLKCON, -}; - -PNAME(epllref_p) = { "mpllref", "mpllref", "xti", "ext" }; -PNAME(esysclk_p) = { "epllref", "epll" }; -PNAME(mpllref_p) = { "xti", "mdivclk" }; -PNAME(msysclk_p) = { "mpllref", "mpll" }; -PNAME(armclk_p) = { "armdiv" , "hclk" }; -PNAME(i2s0_p) = { "div_i2s0", "ext_i2s", "epllref", "epllref" }; - -static struct samsung_mux_clock s3c2443_common_muxes[] __initdata = { - MUX(0, "epllref", epllref_p, CLKSRC, 7, 2), - MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1), - MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1), - MUX(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1), - MUX(ARMCLK, "armclk", armclk_p, CLKDIV0, 13, 1), - MUX(0, "mux_i2s0", i2s0_p, CLKSRC, 14, 2), -}; - -static struct clk_div_table hclk_d[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 3, .div = 4 }, - { /* sentinel */ }, -}; - -static struct clk_div_table mdivclk_d[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 3 }, - { .val = 2, .div = 5 }, - { .val = 3, .div = 7 }, - { .val = 4, .div = 9 }, - { .val = 5, .div = 11 }, - { .val = 6, .div = 13 }, - { .val = 7, .div = 15 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c2443_common_dividers[] __initdata = { - DIV_T(0, "mdivclk", "xti", CLKDIV0, 6, 3, mdivclk_d), - DIV(0, "prediv", "msysclk", CLKDIV0, 4, 2), - DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d), - DIV(PCLK, "pclk", "hclk", CLKDIV0, 2, 1), - DIV(0, "div_hsspi0_epll", "esysclk", CLKDIV1, 24, 2), - DIV(0, "div_fimd", "esysclk", CLKDIV1, 16, 8), - DIV(0, "div_i2s0", "esysclk", CLKDIV1, 12, 4), - DIV(0, "div_uart", "esysclk", CLKDIV1, 8, 4), - DIV(0, "div_hsmmc1", "esysclk", CLKDIV1, 6, 2), - DIV(0, "div_usbhost", "esysclk", CLKDIV1, 4, 2), -}; - -static struct samsung_gate_clock s3c2443_common_gates[] __initdata = { - GATE(SCLK_HSMMC_EXT, "sclk_hsmmcext", "ext", SCLKCON, 13, 0, 0), - GATE(SCLK_HSMMC1, "sclk_hsmmc1", "div_hsmmc1", SCLKCON, 12, 0, 0), - GATE(SCLK_FIMD, "sclk_fimd", "div_fimd", SCLKCON, 10, 0, 0), - GATE(SCLK_I2S0, "sclk_i2s0", "mux_i2s0", SCLKCON, 9, 0, 0), - GATE(SCLK_UART, "sclk_uart", "div_uart", SCLKCON, 8, 0, 0), - GATE(SCLK_USBH, "sclk_usbhost", "div_usbhost", SCLKCON, 1, 0, 0), - GATE(HCLK_DRAM, "dram", "hclk", HCLKCON, 19, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_SSMC, "ssmc", "hclk", HCLKCON, 18, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_HSMMC1, "hsmmc1", "hclk", HCLKCON, 16, 0, 0), - GATE(HCLK_USBD, "usb-device", "hclk", HCLKCON, 12, 0, 0), - GATE(HCLK_USBH, "usb-host", "hclk", HCLKCON, 11, 0, 0), - GATE(HCLK_LCD, "lcd", "hclk", HCLKCON, 9, 0, 0), - GATE(HCLK_DMA5, "dma5", "hclk", HCLKCON, 5, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA4, "dma4", "hclk", HCLKCON, 4, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA3, "dma3", "hclk", HCLKCON, 3, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA2, "dma2", "hclk", HCLKCON, 2, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA1, "dma1", "hclk", HCLKCON, 1, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA0, "dma0", "hclk", HCLKCON, 0, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_GPIO, "gpio", "pclk", PCLKCON, 13, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_RTC, "rtc", "pclk", PCLKCON, 12, 0, 0), - GATE(PCLK_WDT, "wdt", "pclk", PCLKCON, 11, 0, 0), - GATE(PCLK_PWM, "pwm", "pclk", PCLKCON, 10, 0, 0), - GATE(PCLK_I2S0, "i2s0", "pclk", PCLKCON, 9, 0, 0), - GATE(PCLK_AC97, "ac97", "pclk", PCLKCON, 8, 0, 0), - GATE(PCLK_ADC, "adc", "pclk", PCLKCON, 7, 0, 0), - GATE(PCLK_SPI0, "spi0", "pclk", PCLKCON, 6, 0, 0), - GATE(PCLK_I2C0, "i2c0", "pclk", PCLKCON, 4, 0, 0), - GATE(PCLK_UART3, "uart3", "pclk", PCLKCON, 3, 0, 0), - GATE(PCLK_UART2, "uart2", "pclk", PCLKCON, 2, 0, 0), - GATE(PCLK_UART1, "uart1", "pclk", PCLKCON, 1, 0, 0), - GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0), -}; - -static struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { - ALIAS(MSYSCLK, NULL, "msysclk"), - ALIAS(ARMCLK, NULL, "armclk"), - ALIAS(MPLL, NULL, "mpll"), - ALIAS(EPLL, NULL, "epll"), - ALIAS(HCLK, NULL, "hclk"), - ALIAS(HCLK_SSMC, NULL, "nand"), - ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), - ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"), - ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), - ALIAS(PCLK_UART3, "s3c2440-uart.3", "uart"), - ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"), - ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"), - ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"), - ALIAS(PCLK_UART3, "s3c2440-uart.3", "clk_uart_baud2"), - ALIAS(SCLK_UART, NULL, "clk_uart_baud3"), - ALIAS(PCLK_PWM, NULL, "timers"), - ALIAS(PCLK_RTC, NULL, "rtc"), - ALIAS(PCLK_WDT, NULL, "watchdog"), - ALIAS(PCLK_ADC, NULL, "adc"), - ALIAS(PCLK_I2C0, "s3c2410-i2c.0", "i2c"), - ALIAS(HCLK_USBD, NULL, "usb-device"), - ALIAS(HCLK_USBH, NULL, "usb-host"), - ALIAS(SCLK_USBH, NULL, "usb-bus-host"), - ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi"), - ALIAS(PCLK_SPI0, "s3c2443-spi.0", "spi_busclk0"), - ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "hsmmc"), - ALIAS(HCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.0"), - ALIAS(PCLK_I2S0, "samsung-i2s.0", "iis"), - ALIAS(SCLK_I2S0, NULL, "i2s-if"), - ALIAS(HCLK_LCD, NULL, "lcd"), - ALIAS(SCLK_FIMD, NULL, "sclk_fimd"), -}; - -/* S3C2416 specific clocks */ - -static struct samsung_pll_clock s3c2416_pll_clks[] __initdata = { - PLL(pll_6552_s3c2416, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - PLL(pll_6553, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), -}; - -PNAME(s3c2416_hsmmc0_p) = { "sclk_hsmmc0", "sclk_hsmmcext" }; -PNAME(s3c2416_hsmmc1_p) = { "sclk_hsmmc1", "sclk_hsmmcext" }; -PNAME(s3c2416_hsspi0_p) = { "hsspi0_epll", "hsspi0_mpll" }; - -static struct clk_div_table armdiv_s3c2416_d[] = { - { .val = 0, .div = 1 }, - { .val = 1, .div = 2 }, - { .val = 2, .div = 3 }, - { .val = 3, .div = 4 }, - { .val = 5, .div = 6 }, - { .val = 7, .div = 8 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c2416_dividers[] __initdata = { - DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 3, armdiv_s3c2416_d), - DIV(0, "div_hsspi0_mpll", "msysclk", CLKDIV2, 0, 4), - DIV(0, "div_hsmmc0", "esysclk", CLKDIV2, 6, 2), -}; - -static struct samsung_mux_clock s3c2416_muxes[] __initdata = { - MUX(MUX_HSMMC0, "mux_hsmmc0", s3c2416_hsmmc0_p, CLKSRC, 16, 1), - MUX(MUX_HSMMC1, "mux_hsmmc1", s3c2416_hsmmc1_p, CLKSRC, 17, 1), - MUX(MUX_HSSPI0, "mux_hsspi0", s3c2416_hsspi0_p, CLKSRC, 18, 1), -}; - -static struct samsung_gate_clock s3c2416_gates[] __initdata = { - GATE(0, "hsspi0_mpll", "div_hsspi0_mpll", SCLKCON, 19, 0, 0), - GATE(0, "hsspi0_epll", "div_hsspi0_epll", SCLKCON, 14, 0, 0), - GATE(0, "sclk_hsmmc0", "div_hsmmc0", SCLKCON, 6, 0, 0), - GATE(HCLK_2D, "2d", "hclk", HCLKCON, 20, 0, 0), - GATE(HCLK_HSMMC0, "hsmmc0", "hclk", HCLKCON, 15, 0, 0), - GATE(HCLK_IROM, "irom", "hclk", HCLKCON, 13, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_PCM, "pcm", "pclk", PCLKCON, 19, 0, 0), -}; - -static struct samsung_clock_alias s3c2416_aliases[] __initdata = { - ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"), - ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"), - ALIAS(MUX_HSMMC0, "s3c-sdhci.0", "mmc_busclk.2"), - ALIAS(MUX_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"), - ALIAS(MUX_HSSPI0, "s3c2443-spi.0", "spi_busclk2"), - ALIAS(ARMDIV, NULL, "armdiv"), -}; - -/* S3C2443 specific clocks */ - -static struct samsung_pll_clock s3c2443_pll_clks[] __initdata = { - PLL(pll_3000, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL), - PLL(pll_2126, EPLL, "epll", "epllref", LOCKCON1, EPLLCON, NULL), -}; - -static struct clk_div_table armdiv_s3c2443_d[] = { - { .val = 0, .div = 1 }, - { .val = 8, .div = 2 }, - { .val = 2, .div = 3 }, - { .val = 9, .div = 4 }, - { .val = 10, .div = 6 }, - { .val = 11, .div = 8 }, - { .val = 13, .div = 12 }, - { .val = 15, .div = 16 }, - { /* sentinel */ }, -}; - -static struct samsung_div_clock s3c2443_dividers[] __initdata = { - DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 4, armdiv_s3c2443_d), - DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), -}; - -static struct samsung_gate_clock s3c2443_gates[] __initdata = { - GATE(SCLK_HSSPI0, "sclk_hsspi0", "div_hsspi0_epll", SCLKCON, 14, 0, 0), - GATE(SCLK_CAM, "sclk_cam", "div_cam", SCLKCON, 11, 0, 0), - GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0), - GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 15, 0, 0), - GATE(PCLK_SDI, "sdi", "pclk", PCLKCON, 5, 0, 0), -}; - -static struct samsung_clock_alias s3c2443_aliases[] __initdata = { - ALIAS(SCLK_HSSPI0, "s3c2443-spi.0", "spi_busclk2"), - ALIAS(SCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"), - ALIAS(SCLK_CAM, NULL, "camif-upll"), - ALIAS(PCLK_SPI1, "s3c2410-spi.0", "spi"), - ALIAS(PCLK_SDI, NULL, "sdi"), - ALIAS(HCLK_CFC, NULL, "cfc"), - ALIAS(ARMDIV, NULL, "armdiv"), -}; - -/* S3C2450 specific clocks */ - -PNAME(s3c2450_cam_p) = { "div_cam", "hclk" }; -PNAME(s3c2450_hsspi1_p) = { "hsspi1_epll", "hsspi1_mpll" }; -PNAME(i2s1_p) = { "div_i2s1", "ext_i2s", "epllref", "epllref" }; - -static struct samsung_div_clock s3c2450_dividers[] __initdata = { - DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), - DIV(0, "div_hsspi1_epll", "esysclk", CLKDIV2, 24, 2), - DIV(0, "div_hsspi1_mpll", "msysclk", CLKDIV2, 16, 4), - DIV(0, "div_i2s1", "esysclk", CLKDIV2, 12, 4), -}; - -static struct samsung_mux_clock s3c2450_muxes[] __initdata = { - MUX(0, "mux_cam", s3c2450_cam_p, CLKSRC, 20, 1), - MUX(MUX_HSSPI1, "mux_hsspi1", s3c2450_hsspi1_p, CLKSRC, 19, 1), - MUX(0, "mux_i2s1", i2s1_p, CLKSRC, 12, 2), -}; - -static struct samsung_gate_clock s3c2450_gates[] __initdata = { - GATE(SCLK_I2S1, "sclk_i2s1", "div_i2s1", SCLKCON, 5, 0, 0), - GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, 0, 0), - GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0), - GATE(HCLK_DMA7, "dma7", "hclk", HCLKCON, 7, CLK_IGNORE_UNUSED, 0), - GATE(HCLK_DMA6, "dma6", "hclk", HCLKCON, 6, CLK_IGNORE_UNUSED, 0), - GATE(PCLK_I2S1, "i2s1", "pclk", PCLKCON, 17, 0, 0), - GATE(PCLK_I2C1, "i2c1", "pclk", PCLKCON, 16, 0, 0), - GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 14, 0, 0), -}; - -static struct samsung_clock_alias s3c2450_aliases[] __initdata = { - ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi"), - ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi_busclk0"), - ALIAS(MUX_HSSPI1, "s3c2443-spi.1", "spi_busclk2"), - ALIAS(PCLK_I2C1, "s3c2410-i2c.1", "i2c"), -}; - -static int s3c2443_restart(struct notifier_block *this, - unsigned long mode, void *cmd) -{ - __raw_writel(0x533c2443, reg_base + SWRST); - return NOTIFY_DONE; -} - -static struct notifier_block s3c2443_restart_handler = { - .notifier_call = s3c2443_restart, - .priority = 129, -}; - -/* - * fixed rate clocks generated outside the soc - * Only necessary until the devicetree-move is complete - */ -static struct samsung_fixed_rate_clock s3c2443_common_frate_clks[] __initdata = { - FRATE(0, "xti", NULL, 0, 0), - FRATE(0, "ext", NULL, 0, 0), - FRATE(0, "ext_i2s", NULL, 0, 0), - FRATE(0, "ext_uart", NULL, 0, 0), -}; - -static void __init s3c2443_common_clk_register_fixed_ext( - struct samsung_clk_provider *ctx, unsigned long xti_f) -{ - s3c2443_common_frate_clks[0].fixed_rate = xti_f; - samsung_clk_register_fixed_rate(ctx, s3c2443_common_frate_clks, - ARRAY_SIZE(s3c2443_common_frate_clks)); -} - -void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f, - int current_soc, - void __iomem *base) -{ - struct samsung_clk_provider *ctx; - int ret; - reg_base = base; - - if (np) { - reg_base = of_iomap(np, 0); - if (!reg_base) - panic("%s: failed to map registers\n", __func__); - } - - ctx = samsung_clk_init(np, reg_base, NR_CLKS); - - /* Register external clocks only in non-dt cases */ - if (!np) - s3c2443_common_clk_register_fixed_ext(ctx, xti_f); - - /* Register PLLs. */ - if (current_soc == S3C2416 || current_soc == S3C2450) - samsung_clk_register_pll(ctx, s3c2416_pll_clks, - ARRAY_SIZE(s3c2416_pll_clks), reg_base); - else - samsung_clk_register_pll(ctx, s3c2443_pll_clks, - ARRAY_SIZE(s3c2443_pll_clks), reg_base); - - /* Register common internal clocks. */ - samsung_clk_register_mux(ctx, s3c2443_common_muxes, - ARRAY_SIZE(s3c2443_common_muxes)); - samsung_clk_register_div(ctx, s3c2443_common_dividers, - ARRAY_SIZE(s3c2443_common_dividers)); - samsung_clk_register_gate(ctx, s3c2443_common_gates, - ARRAY_SIZE(s3c2443_common_gates)); - samsung_clk_register_alias(ctx, s3c2443_common_aliases, - ARRAY_SIZE(s3c2443_common_aliases)); - - /* Register SoC-specific clocks. */ - switch (current_soc) { - case S3C2450: - samsung_clk_register_div(ctx, s3c2450_dividers, - ARRAY_SIZE(s3c2450_dividers)); - samsung_clk_register_mux(ctx, s3c2450_muxes, - ARRAY_SIZE(s3c2450_muxes)); - samsung_clk_register_gate(ctx, s3c2450_gates, - ARRAY_SIZE(s3c2450_gates)); - samsung_clk_register_alias(ctx, s3c2450_aliases, - ARRAY_SIZE(s3c2450_aliases)); - fallthrough; /* as s3c2450 extends the s3c2416 clocks */ - case S3C2416: - samsung_clk_register_div(ctx, s3c2416_dividers, - ARRAY_SIZE(s3c2416_dividers)); - samsung_clk_register_mux(ctx, s3c2416_muxes, - ARRAY_SIZE(s3c2416_muxes)); - samsung_clk_register_gate(ctx, s3c2416_gates, - ARRAY_SIZE(s3c2416_gates)); - samsung_clk_register_alias(ctx, s3c2416_aliases, - ARRAY_SIZE(s3c2416_aliases)); - break; - case S3C2443: - samsung_clk_register_div(ctx, s3c2443_dividers, - ARRAY_SIZE(s3c2443_dividers)); - samsung_clk_register_gate(ctx, s3c2443_gates, - ARRAY_SIZE(s3c2443_gates)); - samsung_clk_register_alias(ctx, s3c2443_aliases, - ARRAY_SIZE(s3c2443_aliases)); - break; - } - - samsung_clk_sleep_init(reg_base, s3c2443_clk_regs, - ARRAY_SIZE(s3c2443_clk_regs)); - - samsung_clk_of_add_provider(np, ctx); - - ret = register_restart_handler(&s3c2443_restart_handler); - if (ret) - pr_warn("cannot register restart handler, %d\n", ret); -} - -static void __init s3c2416_clk_init(struct device_node *np) -{ - s3c2443_common_clk_init(np, 0, S3C2416, NULL); -} -CLK_OF_DECLARE(s3c2416_clk, "samsung,s3c2416-clock", s3c2416_clk_init); - -static void __init s3c2443_clk_init(struct device_node *np) -{ - s3c2443_common_clk_init(np, 0, S3C2443, NULL); -} -CLK_OF_DECLARE(s3c2443_clk, "samsung,s3c2443-clock", s3c2443_clk_init); - -static void __init s3c2450_clk_init(struct device_node *np) -{ - s3c2443_common_clk_init(np, 0, S3C2450, NULL); -} -CLK_OF_DECLARE(s3c2450_clk, "samsung,s3c2450-clock", s3c2450_clk_init); diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4469e7f555e9..fc10ecc3602d 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -441,7 +441,7 @@ config CLKSRC_EXYNOS_MCT config CLKSRC_SAMSUNG_PWM bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST depends on HAS_IOMEM - depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST + depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST help This is a new clocksource driver for the PWM timer found in Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig index 2a84fc63371e..8466f78651fc 100644 --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig @@ -37,7 +37,7 @@ config CPU_FREQ_STAT choice prompt "Default CPUFreq governor" - default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ + default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP default CPU_FREQ_DEFAULT_GOV_PERFORMANCE diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 0a0352d8fa45..97acaa2136fd 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -189,84 +189,6 @@ config ARM_RASPBERRYPI_CPUFREQ If in doubt, say N. -config ARM_S3C_CPUFREQ - bool - help - Internal configuration node for common cpufreq on Samsung SoC - -config ARM_S3C24XX_CPUFREQ - bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" - depends on ARCH_S3C24XX - select ARM_S3C_CPUFREQ - help - This enables the CPUfreq driver for the Samsung S3C24XX family - of CPUs. - - For details, take a look at <file:Documentation/cpu-freq>. - - If in doubt, say N. - -config ARM_S3C24XX_CPUFREQ_DEBUG - bool "Debug CPUfreq Samsung driver core" - depends on ARM_S3C24XX_CPUFREQ - help - Enable s3c_freq_dbg for the Samsung S3C CPUfreq core - -config ARM_S3C24XX_CPUFREQ_IODEBUG - bool "Debug CPUfreq Samsung driver IO timing" - depends on ARM_S3C24XX_CPUFREQ - help - Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core - -config ARM_S3C24XX_CPUFREQ_DEBUGFS - bool "Export debugfs for CPUFreq" - depends on ARM_S3C24XX_CPUFREQ && DEBUG_FS - help - Export status information via debugfs. - -config ARM_S3C2410_CPUFREQ - bool - depends on ARM_S3C24XX_CPUFREQ && CPU_S3C2410 - help - CPU Frequency scaling support for S3C2410 - -config ARM_S3C2412_CPUFREQ - bool - depends on ARM_S3C24XX_CPUFREQ && CPU_S3C2412 - default y - select S3C2412_IOTIMING - help - CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs. - -config ARM_S3C2416_CPUFREQ - bool "S3C2416 CPU Frequency scaling support" - depends on CPU_S3C2416 - help - This adds the CPUFreq driver for the Samsung S3C2416 and - S3C2450 SoC. The S3C2416 supports changing the rate of the - armdiv clock source and also entering a so called dynamic - voltage scaling mode in which it is possible to reduce the - core voltage of the CPU. - - If in doubt, say N. - -config ARM_S3C2416_CPUFREQ_VCORESCALE - bool "Allow voltage scaling for S3C2416 arm core" - depends on ARM_S3C2416_CPUFREQ && REGULATOR - help - Enable CPU voltage scaling when entering the dvs mode. - It uses information gathered through existing hardware and - tests but not documented in any datasheet. - - If in doubt, say N. - -config ARM_S3C2440_CPUFREQ - bool "S3C2440/S3C2442 CPU Frequency scaling support" - depends on ARM_S3C24XX_CPUFREQ && (CPU_S3C2440 || CPU_S3C2442) - default y - help - CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. - config ARM_S3C64XX_CPUFREQ bool "Samsung S3C64XX" depends on CPU_S3C6410 @@ -286,9 +208,6 @@ config ARM_S5PV210_CPUFREQ If in doubt, say N. -config ARM_SA1100_CPUFREQ - bool - config ARM_SA1110_CPUFREQ bool diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index 32a7029e25ed..a19842fbd521 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -71,15 +71,8 @@ obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW) += qcom-cpufreq-hw.o obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM) += qcom-cpufreq-nvmem.o obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) += raspberrypi-cpufreq.o -obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o -obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o -obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o -obj-$(CONFIG_ARM_S3C2440_CPUFREQ) += s3c2440-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o -obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o -obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o -obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o diff --git a/drivers/cpufreq/s3c2410-cpufreq.c b/drivers/cpufreq/s3c2410-cpufreq.c deleted file mode 100644 index 5dcfbf0bfb74..000000000000 --- a/drivers/cpufreq/s3c2410-cpufreq.c +++ /dev/null @@ -1,155 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2006-2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 CPU Frequency scaling -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/device.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#define S3C2410_CLKDIVN_PDIVN (1<<0) -#define S3C2410_CLKDIVN_HDIVN (1<<1) - -/* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */ - -static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) -{ - u32 clkdiv = 0; - - if (cfg->divs.h_divisor == 2) - clkdiv |= S3C2410_CLKDIVN_HDIVN; - - if (cfg->divs.p_divisor != cfg->divs.h_divisor) - clkdiv |= S3C2410_CLKDIVN_PDIVN; - - s3c24xx_write_clkdivn(clkdiv); -} - -static int s3c2410_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) -{ - unsigned long hclk, fclk, pclk; - unsigned int hdiv, pdiv; - unsigned long hclk_max; - - fclk = cfg->freq.fclk; - hclk_max = cfg->max.hclk; - - cfg->freq.armclk = fclk; - - s3c_freq_dbg("%s: fclk is %lu, max hclk %lu\n", - __func__, fclk, hclk_max); - - hdiv = (fclk > cfg->max.hclk) ? 2 : 1; - hclk = fclk / hdiv; - - if (hclk > cfg->max.hclk) { - s3c_freq_dbg("%s: hclk too big\n", __func__); - return -EINVAL; - } - - pdiv = (hclk > cfg->max.pclk) ? 2 : 1; - pclk = hclk / pdiv; - - if (pclk > cfg->max.pclk) { - s3c_freq_dbg("%s: pclk too big\n", __func__); - return -EINVAL; - } - - pdiv *= hdiv; - - /* record the result */ - cfg->divs.p_divisor = pdiv; - cfg->divs.h_divisor = hdiv; - - return 0; -} - -static struct s3c_cpufreq_info s3c2410_cpufreq_info = { - .max = { - .fclk = 200000000, - .hclk = 100000000, - .pclk = 50000000, - }, - - /* transition latency is about 5ms worst-case, so - * set 10ms to be sure */ - .latency = 10000000, - - .locktime_m = 150, - .locktime_u = 150, - .locktime_bits = 12, - - .need_pll = 1, - - .name = "s3c2410", - .calc_iotiming = s3c2410_iotiming_calc, - .set_iotiming = s3c2410_iotiming_set, - .get_iotiming = s3c2410_iotiming_get, - - .set_fvco = s3c2410_set_fvco, - .set_refresh = s3c2410_cpufreq_setrefresh, - .set_divs = s3c2410_cpufreq_setdivs, - .calc_divs = s3c2410_cpufreq_calcdivs, - - .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), -}; - -static int s3c2410_cpufreq_add(struct device *dev, - struct subsys_interface *sif) -{ - return s3c_cpufreq_register(&s3c2410_cpufreq_info); -} - -static struct subsys_interface s3c2410_cpufreq_interface = { - .name = "s3c2410_cpufreq", - .subsys = &s3c2410_subsys, - .add_dev = s3c2410_cpufreq_add, -}; - -static int __init s3c2410_cpufreq_init(void) -{ - return subsys_interface_register(&s3c2410_cpufreq_interface); -} -arch_initcall(s3c2410_cpufreq_init); - -static int s3c2410a_cpufreq_add(struct device *dev, - struct subsys_interface *sif) -{ - /* alter the maximum freq settings for S3C2410A. If a board knows - * it only has a maximum of 200, then it should register its own - * limits. */ - - s3c2410_cpufreq_info.max.fclk = 266000000; - s3c2410_cpufreq_info.max.hclk = 133000000; - s3c2410_cpufreq_info.max.pclk = 66500000; - s3c2410_cpufreq_info.name = "s3c2410a"; - - return s3c2410_cpufreq_add(dev, sif); -} - -static struct subsys_interface s3c2410a_cpufreq_interface = { - .name = "s3c2410a_cpufreq", - .subsys = &s3c2410a_subsys, - .add_dev = s3c2410a_cpufreq_add, -}; - -static int __init s3c2410a_cpufreq_init(void) -{ - return subsys_interface_register(&s3c2410a_cpufreq_interface); -} -arch_initcall(s3c2410a_cpufreq_init); diff --git a/drivers/cpufreq/s3c2412-cpufreq.c b/drivers/cpufreq/s3c2412-cpufreq.c deleted file mode 100644 index 5945945ead7c..000000000000 --- a/drivers/cpufreq/s3c2412-cpufreq.c +++ /dev/null @@ -1,240 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2412 CPU Frequency scalling -*/ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/device.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#define S3C2412_CLKDIVN_PDIVN (1<<2) -#define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) -#define S3C2412_CLKDIVN_ARMDIVN (1<<3) -#define S3C2412_CLKDIVN_DVSEN (1<<4) -#define S3C2412_CLKDIVN_HALFHCLK (1<<5) -#define S3C2412_CLKDIVN_USB48DIV (1<<6) -#define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) -#define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) -#define S3C2412_CLKDIVN_I2SDIV_MASK (15<<12) -#define S3C2412_CLKDIVN_I2SDIV_SHIFT (12) -#define S3C2412_CLKDIVN_CAMDIV_MASK (15<<16) -#define S3C2412_CLKDIVN_CAMDIV_SHIFT (16) - -/* our clock resources. */ -static struct clk *xtal; -static struct clk *fclk; -static struct clk *hclk; -static struct clk *armclk; - -/* HDIV: 1, 2, 3, 4, 6, 8 */ - -static int s3c2412_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) -{ - unsigned int hdiv, pdiv, armdiv, dvs; - unsigned long hclk, fclk, armclk, armdiv_clk; - unsigned long hclk_max; - - fclk = cfg->freq.fclk; - armclk = cfg->freq.armclk; - hclk_max = cfg->max.hclk; - - /* We can't run hclk above armclk as at the best we have to - * have armclk and hclk in dvs mode. */ - - if (hclk_max > armclk) - hclk_max = armclk; - - s3c_freq_dbg("%s: fclk=%lu, armclk=%lu, hclk_max=%lu\n", - __func__, fclk, armclk, hclk_max); - s3c_freq_dbg("%s: want f=%lu, arm=%lu, h=%lu, p=%lu\n", - __func__, cfg->freq.fclk, cfg->freq.armclk, - cfg->freq.hclk, cfg->freq.pclk); - - armdiv = fclk / armclk; - - if (armdiv < 1) - armdiv = 1; - if (armdiv > 2) - armdiv = 2; - - cfg->divs.arm_divisor = armdiv; - armdiv_clk = fclk / armdiv; - - hdiv = armdiv_clk / hclk_max; - if (hdiv < 1) - hdiv = 1; - - cfg->freq.hclk = hclk = armdiv_clk / hdiv; - - /* set dvs depending on whether we reached armclk or not. */ - cfg->divs.dvs = dvs = armclk < armdiv_clk; - - /* update the actual armclk we achieved. */ - cfg->freq.armclk = dvs ? hclk : armdiv_clk; - - s3c_freq_dbg("%s: armclk %lu, hclk %lu, armdiv %d, hdiv %d, dvs %d\n", - __func__, armclk, hclk, armdiv, hdiv, cfg->divs.dvs); - - if (hdiv > 4) - goto invalid; - - pdiv = (hclk > cfg->max.pclk) ? 2 : 1; - - if ((hclk / pdiv) > cfg->max.pclk) - pdiv++; - - cfg->freq.pclk = hclk / pdiv; - - s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); - - if (pdiv > 2) - goto invalid; - - pdiv *= hdiv; - - /* store the result, and then return */ - - cfg->divs.h_divisor = hdiv * armdiv; - cfg->divs.p_divisor = pdiv * armdiv; - - return 0; - -invalid: - return -EINVAL; -} - -static void s3c2412_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) -{ - unsigned long clkdiv; - unsigned long olddiv; - - olddiv = clkdiv = s3c24xx_read_clkdivn(); - - /* clear off current clock info */ - - clkdiv &= ~S3C2412_CLKDIVN_ARMDIVN; - clkdiv &= ~S3C2412_CLKDIVN_HDIVN_MASK; - clkdiv &= ~S3C2412_CLKDIVN_PDIVN; - - if (cfg->divs.arm_divisor == 2) - clkdiv |= S3C2412_CLKDIVN_ARMDIVN; - - clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); - - if (cfg->divs.p_divisor != cfg->divs.h_divisor) - clkdiv |= S3C2412_CLKDIVN_PDIVN; - - s3c_freq_dbg("%s: div %08lx => %08lx\n", __func__, olddiv, clkdiv); - s3c24xx_write_clkdivn(clkdiv); - - clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); -} - -/* set the default cpu frequency information, based on an 200MHz part - * as we have no other way of detecting the speed rating in software. - */ - -static struct s3c_cpufreq_info s3c2412_cpufreq_info = { - .max = { - .fclk = 200000000, - .hclk = 100000000, - .pclk = 50000000, - }, - - .latency = 5000000, /* 5ms */ - - .locktime_m = 150, - .locktime_u = 150, - .locktime_bits = 16, - - .name = "s3c2412", - .set_refresh = s3c2412_cpufreq_setrefresh, - .set_divs = s3c2412_cpufreq_setdivs, - .calc_divs = s3c2412_cpufreq_calcdivs, - - .calc_iotiming = s3c2412_iotiming_calc, - .set_iotiming = s3c2412_iotiming_set, - .get_iotiming = s3c2412_iotiming_get, - - .debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs), -}; - -static int s3c2412_cpufreq_add(struct device *dev, - struct subsys_interface *sif) -{ - unsigned long fclk_rate; - - hclk = clk_get(NULL, "hclk"); - if (IS_ERR(hclk)) { - pr_err("cannot find hclk clock\n"); - return -ENOENT; - } - - fclk = clk_get(NULL, "fclk"); - if (IS_ERR(fclk)) { - pr_err("cannot find fclk clock\n"); - goto err_fclk; - } - - fclk_rate = clk_get_rate(fclk); - if (fclk_rate > 200000000) { - pr_info("fclk %ld MHz, assuming 266MHz capable part\n", - fclk_rate / 1000000); - s3c2412_cpufreq_info.max.fclk = 266000000; - s3c2412_cpufreq_info.max.hclk = 133000000; - s3c2412_cpufreq_info.max.pclk = 66000000; - } - - armclk = clk_get(NULL, "armclk"); - if (IS_ERR(armclk)) { - pr_err("cannot find arm clock\n"); - goto err_armclk; - } - - xtal = clk_get(NULL, "xtal"); - if (IS_ERR(xtal)) { - pr_err("cannot find xtal clock\n"); - goto err_xtal; - } - - return s3c_cpufreq_register(&s3c2412_cpufreq_info); - -err_xtal: - clk_put(armclk); -err_armclk: - clk_put(fclk); -err_fclk: - clk_put(hclk); - - return -ENOENT; -} - -static struct subsys_interface s3c2412_cpufreq_interface = { - .name = "s3c2412_cpufreq", - .subsys = &s3c2412_subsys, - .add_dev = s3c2412_cpufreq_add, -}; - -static int s3c2412_cpufreq_init(void) -{ - return subsys_interface_register(&s3c2412_cpufreq_interface); -} -arch_initcall(s3c2412_cpufreq_init); diff --git a/drivers/cpufreq/s3c2416-cpufreq.c b/drivers/cpufreq/s3c2416-cpufreq.c deleted file mode 100644 index 5c221bc90210..000000000000 --- a/drivers/cpufreq/s3c2416-cpufreq.c +++ /dev/null @@ -1,492 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * S3C2416/2450 CPUfreq Support - * - * Copyright 2011 Heiko Stuebner <heiko@sntech.de> - * - * based on s3c64xx_cpufreq.c - * - * Copyright 2009 Wolfson Microelectronics plc - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/cpufreq.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/regulator/consumer.h> -#include <linux/reboot.h> -#include <linux/module.h> - -static DEFINE_MUTEX(cpufreq_lock); - -struct s3c2416_data { - struct clk *armdiv; - struct clk *armclk; - struct clk *hclk; - - unsigned long regulator_latency; -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - struct regulator *vddarm; -#endif - - struct cpufreq_frequency_table *freq_table; - - bool is_dvs; - bool disable_dvs; -}; - -static struct s3c2416_data s3c2416_cpufreq; - -struct s3c2416_dvfs { - unsigned int vddarm_min; - unsigned int vddarm_max; -}; - -/* pseudo-frequency for dvs mode */ -#define FREQ_DVS 132333 - -/* frequency to sleep and reboot in - * it's essential to leave dvs, as some boards do not reconfigure the - * regulator on reboot - */ -#define FREQ_SLEEP 133333 - -/* Sources for the ARMCLK */ -#define SOURCE_HCLK 0 -#define SOURCE_ARMDIV 1 - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE -/* S3C2416 only supports changing the voltage in the dvs-mode. - * Voltages down to 1.0V seem to work, so we take what the regulator - * can get us. - */ -static struct s3c2416_dvfs s3c2416_dvfs_table[] = { - [SOURCE_HCLK] = { 950000, 1250000 }, - [SOURCE_ARMDIV] = { 1250000, 1350000 }, -}; -#endif - -static struct cpufreq_frequency_table s3c2416_freq_table[] = { - { 0, SOURCE_HCLK, FREQ_DVS }, - { 0, SOURCE_ARMDIV, 133333 }, - { 0, SOURCE_ARMDIV, 266666 }, - { 0, SOURCE_ARMDIV, 400000 }, - { 0, 0, CPUFREQ_TABLE_END }, -}; - -static struct cpufreq_frequency_table s3c2450_freq_table[] = { - { 0, SOURCE_HCLK, FREQ_DVS }, - { 0, SOURCE_ARMDIV, 133500 }, - { 0, SOURCE_ARMDIV, 267000 }, - { 0, SOURCE_ARMDIV, 534000 }, - { 0, 0, CPUFREQ_TABLE_END }, -}; - -static unsigned int s3c2416_cpufreq_get_speed(unsigned int cpu) -{ - struct s3c2416_data *s3c_freq = &s3c2416_cpufreq; - - if (cpu != 0) - return 0; - - /* return our pseudo-frequency when in dvs mode */ - if (s3c_freq->is_dvs) - return FREQ_DVS; - - return clk_get_rate(s3c_freq->armclk) / 1000; -} - -static int s3c2416_cpufreq_set_armdiv(struct s3c2416_data *s3c_freq, - unsigned int freq) -{ - int ret; - - if (clk_get_rate(s3c_freq->armdiv) / 1000 != freq) { - ret = clk_set_rate(s3c_freq->armdiv, freq * 1000); - if (ret < 0) { - pr_err("cpufreq: Failed to set armdiv rate %dkHz: %d\n", - freq, ret); - return ret; - } - } - - return 0; -} - -static int s3c2416_cpufreq_enter_dvs(struct s3c2416_data *s3c_freq, int idx) -{ -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - struct s3c2416_dvfs *dvfs; -#endif - int ret; - - if (s3c_freq->is_dvs) { - pr_debug("cpufreq: already in dvs mode, nothing to do\n"); - return 0; - } - - pr_debug("cpufreq: switching armclk to hclk (%lukHz)\n", - clk_get_rate(s3c_freq->hclk) / 1000); - ret = clk_set_parent(s3c_freq->armclk, s3c_freq->hclk); - if (ret < 0) { - pr_err("cpufreq: Failed to switch armclk to hclk: %d\n", ret); - return ret; - } - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - /* changing the core voltage is only allowed when in dvs mode */ - if (s3c_freq->vddarm) { - dvfs = &s3c2416_dvfs_table[idx]; - - pr_debug("cpufreq: setting regulator to %d-%d\n", - dvfs->vddarm_min, dvfs->vddarm_max); - ret = regulator_set_voltage(s3c_freq->vddarm, - dvfs->vddarm_min, - dvfs->vddarm_max); - - /* when lowering the voltage failed, there is nothing to do */ - if (ret != 0) - pr_err("cpufreq: Failed to set VDDARM: %d\n", ret); - } -#endif - - s3c_freq->is_dvs = 1; - - return 0; -} - -static int s3c2416_cpufreq_leave_dvs(struct s3c2416_data *s3c_freq, int idx) -{ -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - struct s3c2416_dvfs *dvfs; -#endif - int ret; - - if (!s3c_freq->is_dvs) { - pr_debug("cpufreq: not in dvs mode, so can't leave\n"); - return 0; - } - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - if (s3c_freq->vddarm) { - dvfs = &s3c2416_dvfs_table[idx]; - - pr_debug("cpufreq: setting regulator to %d-%d\n", - dvfs->vddarm_min, dvfs->vddarm_max); - ret = regulator_set_voltage(s3c_freq->vddarm, - dvfs->vddarm_min, - dvfs->vddarm_max); - if (ret != 0) { - pr_err("cpufreq: Failed to set VDDARM: %d\n", ret); - return ret; - } - } -#endif - - /* force armdiv to hclk frequency for transition from dvs*/ - if (clk_get_rate(s3c_freq->armdiv) > clk_get_rate(s3c_freq->hclk)) { - pr_debug("cpufreq: force armdiv to hclk frequency (%lukHz)\n", - clk_get_rate(s3c_freq->hclk) / 1000); - ret = s3c2416_cpufreq_set_armdiv(s3c_freq, - clk_get_rate(s3c_freq->hclk) / 1000); - if (ret < 0) { - pr_err("cpufreq: Failed to set the armdiv to %lukHz: %d\n", - clk_get_rate(s3c_freq->hclk) / 1000, ret); - return ret; - } - } - - pr_debug("cpufreq: switching armclk parent to armdiv (%lukHz)\n", - clk_get_rate(s3c_freq->armdiv) / 1000); - - ret = clk_set_parent(s3c_freq->armclk, s3c_freq->armdiv); - if (ret < 0) { - pr_err("cpufreq: Failed to switch armclk clock parent to armdiv: %d\n", - ret); - return ret; - } - - s3c_freq->is_dvs = 0; - - return 0; -} - -static int s3c2416_cpufreq_set_target(struct cpufreq_policy *policy, - unsigned int index) -{ - struct s3c2416_data *s3c_freq = &s3c2416_cpufreq; - unsigned int new_freq; - int idx, ret, to_dvs = 0; - - mutex_lock(&cpufreq_lock); - - idx = s3c_freq->freq_table[index].driver_data; - - if (idx == SOURCE_HCLK) - to_dvs = 1; - - /* switching to dvs when it's not allowed */ - if (to_dvs && s3c_freq->disable_dvs) { - pr_debug("cpufreq: entering dvs mode not allowed\n"); - ret = -EINVAL; - goto out; - } - - /* When leavin dvs mode, always switch the armdiv to the hclk rate - * The S3C2416 has stability issues when switching directly to - * higher frequencies. - */ - new_freq = (s3c_freq->is_dvs && !to_dvs) - ? clk_get_rate(s3c_freq->hclk) / 1000 - : s3c_freq->freq_table[index].frequency; - - if (to_dvs) { - pr_debug("cpufreq: enter dvs\n"); - ret = s3c2416_cpufreq_enter_dvs(s3c_freq, idx); - } else if (s3c_freq->is_dvs) { - pr_debug("cpufreq: leave dvs\n"); - ret = s3c2416_cpufreq_leave_dvs(s3c_freq, idx); - } else { - pr_debug("cpufreq: change armdiv to %dkHz\n", new_freq); - ret = s3c2416_cpufreq_set_armdiv(s3c_freq, new_freq); - } - -out: - mutex_unlock(&cpufreq_lock); - - return ret; -} - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE -static void s3c2416_cpufreq_cfg_regulator(struct s3c2416_data *s3c_freq) -{ - int count, v, i, found; - struct cpufreq_frequency_table *pos; - struct s3c2416_dvfs *dvfs; - - count = regulator_count_voltages(s3c_freq->vddarm); - if (count < 0) { - pr_err("cpufreq: Unable to check supported voltages\n"); - return; - } - - if (!count) - goto out; - - cpufreq_for_each_valid_entry(pos, s3c_freq->freq_table) { - dvfs = &s3c2416_dvfs_table[pos->driver_data]; - found = 0; - - /* Check only the min-voltage, more is always ok on S3C2416 */ - for (i = 0; i < count; i++) { - v = regulator_list_voltage(s3c_freq->vddarm, i); - if (v >= dvfs->vddarm_min) - found = 1; - } - - if (!found) { - pr_debug("cpufreq: %dkHz unsupported by regulator\n", - pos->frequency); - pos->frequency = CPUFREQ_ENTRY_INVALID; - } - } - -out: - /* Guessed */ - s3c_freq->regulator_latency = 1 * 1000 * 1000; -} -#endif - -static int s3c2416_cpufreq_reboot_notifier_evt(struct notifier_block *this, - unsigned long event, void *ptr) -{ - struct s3c2416_data *s3c_freq = &s3c2416_cpufreq; - int ret; - struct cpufreq_policy *policy; - - mutex_lock(&cpufreq_lock); - - /* disable further changes */ - s3c_freq->disable_dvs = 1; - - mutex_unlock(&cpufreq_lock); - - /* some boards don't reconfigure the regulator on reboot, which - * could lead to undervolting the cpu when the clock is reset. - * Therefore we always leave the DVS mode on reboot. - */ - if (s3c_freq->is_dvs) { - pr_debug("cpufreq: leave dvs on reboot\n"); - - policy = cpufreq_cpu_get(0); - if (!policy) { - pr_debug("cpufreq: get no policy for cpu0\n"); - return NOTIFY_BAD; - } - - ret = cpufreq_driver_target(policy, FREQ_SLEEP, 0); - cpufreq_cpu_put(policy); - - if (ret < 0) - return NOTIFY_BAD; - } - - return NOTIFY_DONE; -} - -static struct notifier_block s3c2416_cpufreq_reboot_notifier = { - .notifier_call = s3c2416_cpufreq_reboot_notifier_evt, -}; - -static int s3c2416_cpufreq_driver_init(struct cpufreq_policy *policy) -{ - struct s3c2416_data *s3c_freq = &s3c2416_cpufreq; - struct cpufreq_frequency_table *pos; - struct clk *msysclk; - unsigned long rate; - int ret; - - if (policy->cpu != 0) - return -EINVAL; - - msysclk = clk_get(NULL, "msysclk"); - if (IS_ERR(msysclk)) { - ret = PTR_ERR(msysclk); - pr_err("cpufreq: Unable to obtain msysclk: %d\n", ret); - return ret; - } - - /* - * S3C2416 and S3C2450 share the same processor-ID and also provide no - * other means to distinguish them other than through the rate of - * msysclk. On S3C2416 msysclk runs at 800MHz and on S3C2450 at 533MHz. - */ - rate = clk_get_rate(msysclk); - if (rate == 800 * 1000 * 1000) { - pr_info("cpufreq: msysclk running at %lukHz, using S3C2416 frequency table\n", - rate / 1000); - s3c_freq->freq_table = s3c2416_freq_table; - policy->cpuinfo.max_freq = 400000; - } else if (rate / 1000 == 534000) { - pr_info("cpufreq: msysclk running at %lukHz, using S3C2450 frequency table\n", - rate / 1000); - s3c_freq->freq_table = s3c2450_freq_table; - policy->cpuinfo.max_freq = 534000; - } - - /* not needed anymore */ - clk_put(msysclk); - - if (s3c_freq->freq_table == NULL) { - pr_err("cpufreq: No frequency information for this CPU, msysclk at %lukHz\n", - rate / 1000); - return -ENODEV; - } - - s3c_freq->is_dvs = 0; - - s3c_freq->armdiv = clk_get(NULL, "armdiv"); - if (IS_ERR(s3c_freq->armdiv)) { - ret = PTR_ERR(s3c_freq->armdiv); - pr_err("cpufreq: Unable to obtain ARMDIV: %d\n", ret); - return ret; - } - - s3c_freq->hclk = clk_get(NULL, "hclk"); - if (IS_ERR(s3c_freq->hclk)) { - ret = PTR_ERR(s3c_freq->hclk); - pr_err("cpufreq: Unable to obtain HCLK: %d\n", ret); - goto err_hclk; - } - - /* chech hclk rate, we only support the common 133MHz for now - * hclk could also run at 66MHz, but this not often used - */ - rate = clk_get_rate(s3c_freq->hclk); - if (rate < 133 * 1000 * 1000) { - pr_err("cpufreq: HCLK not at 133MHz\n"); - ret = -EINVAL; - goto err_armclk; - } - - s3c_freq->armclk = clk_get(NULL, "armclk"); - if (IS_ERR(s3c_freq->armclk)) { - ret = PTR_ERR(s3c_freq->armclk); - pr_err("cpufreq: Unable to obtain ARMCLK: %d\n", ret); - goto err_armclk; - } - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE - s3c_freq->vddarm = regulator_get(NULL, "vddarm"); - if (IS_ERR(s3c_freq->vddarm)) { - ret = PTR_ERR(s3c_freq->vddarm); - pr_err("cpufreq: Failed to obtain VDDARM: %d\n", ret); - goto err_vddarm; - } - - s3c2416_cpufreq_cfg_regulator(s3c_freq); -#else - s3c_freq->regulator_latency = 0; -#endif - - cpufreq_for_each_entry(pos, s3c_freq->freq_table) { - /* special handling for dvs mode */ - if (pos->driver_data == 0) { - if (!s3c_freq->hclk) { - pr_debug("cpufreq: %dkHz unsupported as it would need unavailable dvs mode\n", - pos->frequency); - pos->frequency = CPUFREQ_ENTRY_INVALID; - } else { - continue; - } - } - - /* Check for frequencies we can generate */ - rate = clk_round_rate(s3c_freq->armdiv, - pos->frequency * 1000); - rate /= 1000; - if (rate != pos->frequency) { - pr_debug("cpufreq: %dkHz unsupported by clock (clk_round_rate return %lu)\n", - pos->frequency, rate); - pos->frequency = CPUFREQ_ENTRY_INVALID; - } - } - - /* Datasheet says PLL stabalisation time must be at least 300us, - * so but add some fudge. (reference in LOCKCON0 register description) - */ - cpufreq_generic_init(policy, s3c_freq->freq_table, - (500 * 1000) + s3c_freq->regulator_latency); - register_reboot_notifier(&s3c2416_cpufreq_reboot_notifier); - - return 0; - -#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE -err_vddarm: - clk_put(s3c_freq->armclk); -#endif -err_armclk: - clk_put(s3c_freq->hclk); -err_hclk: - clk_put(s3c_freq->armdiv); - - return ret; -} - -static struct cpufreq_driver s3c2416_cpufreq_driver = { - .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK, - .verify = cpufreq_generic_frequency_table_verify, - .target_index = s3c2416_cpufreq_set_target, - .get = s3c2416_cpufreq_get_speed, - .init = s3c2416_cpufreq_driver_init, - .name = "s3c2416", - .attr = cpufreq_generic_attr, -}; - -static int __init s3c2416_cpufreq_init(void) -{ - return cpufreq_register_driver(&s3c2416_cpufreq_driver); -} -module_init(s3c2416_cpufreq_init); diff --git a/drivers/cpufreq/s3c2440-cpufreq.c b/drivers/cpufreq/s3c2440-cpufreq.c deleted file mode 100644 index 2011fb9c03a4..000000000000 --- a/drivers/cpufreq/s3c2440-cpufreq.c +++ /dev/null @@ -1,321 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2006-2009 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * Vincent Sanders <vince@simtec.co.uk> - * - * S3C2440/S3C2442 CPU Frequency scaling -*/ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/device.h> -#include <linux/delay.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#define S3C2440_CLKDIVN_PDIVN (1<<0) -#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) -#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) -#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) -#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) -#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) -#define S3C2440_CLKDIVN_UCLK (1<<3) - -#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) -#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) -#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) -#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) -#define S3C2440_CAMDIVN_DVSEN (1<<12) - -#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) - -static struct clk *xtal; -static struct clk *fclk; -static struct clk *hclk; -static struct clk *armclk; - -/* HDIV: 1, 2, 3, 4, 6, 8 */ - -static inline int within_khz(unsigned long a, unsigned long b) -{ - long diff = a - b; - - return (diff >= -1000 && diff <= 1000); -} - -/** - * s3c2440_cpufreq_calcdivs - calculate divider settings - * @cfg: The cpu frequency settings. - * - * Calcualte the divider values for the given frequency settings - * specified in @cfg. The values are stored in @cfg for later use - * by the relevant set routine if the request settings can be reached. - */ -static int s3c2440_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) -{ - unsigned int hdiv, pdiv; - unsigned long hclk, fclk, armclk; - unsigned long hclk_max; - - fclk = cfg->freq.fclk; - armclk = cfg->freq.armclk; - hclk_max = cfg->max.hclk; - - s3c_freq_dbg("%s: fclk is %lu, armclk %lu, max hclk %lu\n", - __func__, fclk, armclk, hclk_max); - - if (armclk > fclk) { - pr_warn("%s: armclk > fclk\n", __func__); - armclk = fclk; - } - - /* if we are in DVS, we need HCLK to be <= ARMCLK */ - if (armclk < fclk && armclk < hclk_max) - hclk_max = armclk; - - for (hdiv = 1; hdiv < 9; hdiv++) { - if (hdiv == 5 || hdiv == 7) - hdiv++; - - hclk = (fclk / hdiv); - if (hclk <= hclk_max || within_khz(hclk, hclk_max)) - break; - } - - s3c_freq_dbg("%s: hclk %lu, div %d\n", __func__, hclk, hdiv); - - if (hdiv > 8) - goto invalid; - - pdiv = (hclk > cfg->max.pclk) ? 2 : 1; - - if ((hclk / pdiv) > cfg->max.pclk) - pdiv++; - - s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); - - if (pdiv > 2) - goto invalid; - - pdiv *= hdiv; - - /* calculate a valid armclk */ - - if (armclk < hclk) - armclk = hclk; - - /* if we're running armclk lower than fclk, this really means - * that the system should go into dvs mode, which means that - * armclk is connected to hclk. */ - if (armclk < fclk) { - cfg->divs.dvs = 1; - armclk = hclk; - } else - cfg->divs.dvs = 0; - - cfg->freq.armclk = armclk; - - /* store the result, and then return */ - - cfg->divs.h_divisor = hdiv; - cfg->divs.p_divisor = pdiv; - - return 0; - - invalid: - return -EINVAL; -} - -#define CAMDIVN_HCLK_HALF (S3C2440_CAMDIVN_HCLK3_HALF | \ - S3C2440_CAMDIVN_HCLK4_HALF) - -/** - * s3c2440_cpufreq_setdivs - set the cpu frequency divider settings - * @cfg: The cpu frequency settings. - * - * Set the divisors from the settings in @cfg, which where generated - * during the calculation phase by s3c2440_cpufreq_calcdivs(). - */ -static void s3c2440_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) -{ - unsigned long clkdiv, camdiv; - - s3c_freq_dbg("%s: divisors: h=%d, p=%d\n", __func__, - cfg->divs.h_divisor, cfg->divs.p_divisor); - - clkdiv = s3c24xx_read_clkdivn(); - camdiv = s3c2440_read_camdivn(); - - clkdiv &= ~(S3C2440_CLKDIVN_HDIVN_MASK | S3C2440_CLKDIVN_PDIVN); - camdiv &= ~CAMDIVN_HCLK_HALF; - - switch (cfg->divs.h_divisor) { - case 1: - clkdiv |= S3C2440_CLKDIVN_HDIVN_1; - break; - - case 2: - clkdiv |= S3C2440_CLKDIVN_HDIVN_2; - break; - - case 6: - camdiv |= S3C2440_CAMDIVN_HCLK3_HALF; - fallthrough; - case 3: - clkdiv |= S3C2440_CLKDIVN_HDIVN_3_6; - break; - - case 8: - camdiv |= S3C2440_CAMDIVN_HCLK4_HALF; - fallthrough; - case 4: - clkdiv |= S3C2440_CLKDIVN_HDIVN_4_8; - break; - - default: - BUG(); /* we don't expect to get here. */ - } - - if (cfg->divs.p_divisor != cfg->divs.h_divisor) - clkdiv |= S3C2440_CLKDIVN_PDIVN; - - /* todo - set pclk. */ - - /* Write the divisors first with hclk intentionally halved so that - * when we write clkdiv we will under-frequency instead of over. We - * then make a short delay and remove the hclk halving if necessary. - */ - - s3c2440_write_camdivn(camdiv | CAMDIVN_HCLK_HALF); - s3c24xx_write_clkdivn(clkdiv); - - ndelay(20); - s3c2440_write_camdivn(camdiv); - - clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); -} - -static int run_freq_for(unsigned long max_hclk, unsigned long fclk, - int *divs, - struct cpufreq_frequency_table *table, - size_t table_size) -{ - unsigned long freq; - int index = 0; - int div; - - for (div = *divs; div > 0; div = *divs++) { - freq = fclk / div; - - if (freq > max_hclk && div != 1) - continue; - - freq /= 1000; /* table is in kHz */ - index = s3c_cpufreq_addfreq(table, index, table_size, freq); - if (index < 0) - break; - } - - return index; -} - -static int hclk_divs[] = { 1, 2, 3, 4, 6, 8, -1 }; - -static int s3c2440_cpufreq_calctable(struct s3c_cpufreq_config *cfg, - struct cpufreq_frequency_table *table, - size_t table_size) -{ - int ret; - - WARN_ON(cfg->info == NULL); - WARN_ON(cfg->board == NULL); - - ret = run_freq_for(cfg->info->max.hclk, - cfg->info->max.fclk, - hclk_divs, - table, table_size); - - s3c_freq_dbg("%s: returning %d\n", __func__, ret); - - return ret; -} - -static struct s3c_cpufreq_info s3c2440_cpufreq_info = { - .max = { - .fclk = 400000000, - .hclk = 133333333, - .pclk = 66666666, - }, - - .locktime_m = 300, - .locktime_u = 300, - .locktime_bits = 16, - - .name = "s3c244x", - .calc_iotiming = s3c2410_iotiming_calc, - .set_iotiming = s3c2410_iotiming_set, - .get_iotiming = s3c2410_iotiming_get, - .set_fvco = s3c2410_set_fvco, - - .set_refresh = s3c2410_cpufreq_setrefresh, - .set_divs = s3c2440_cpufreq_setdivs, - .calc_divs = s3c2440_cpufreq_calcdivs, - .calc_freqtable = s3c2440_cpufreq_calctable, - - .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), -}; - -static int s3c2440_cpufreq_add(struct device *dev, - struct subsys_interface *sif) -{ - xtal = s3c_cpufreq_clk_get(NULL, "xtal"); - hclk = s3c_cpufreq_clk_get(NULL, "hclk"); - fclk = s3c_cpufreq_clk_get(NULL, "fclk"); - armclk = s3c_cpufreq_clk_get(NULL, "armclk"); - - if (IS_ERR(xtal) || IS_ERR(hclk) || IS_ERR(fclk) || IS_ERR(armclk)) { - pr_err("%s: failed to get clocks\n", __func__); - return -ENOENT; - } - - return s3c_cpufreq_register(&s3c2440_cpufreq_info); -} - -static struct subsys_interface s3c2440_cpufreq_interface = { - .name = "s3c2440_cpufreq", - .subsys = &s3c2440_subsys, - .add_dev = s3c2440_cpufreq_add, -}; - -static int s3c2440_cpufreq_init(void) -{ - return subsys_interface_register(&s3c2440_cpufreq_interface); -} - -/* arch_initcall adds the clocks we need, so use subsys_initcall. */ -subsys_initcall(s3c2440_cpufreq_init); - -static struct subsys_interface s3c2442_cpufreq_interface = { - .name = "s3c2442_cpufreq", - .subsys = &s3c2442_subsys, - .add_dev = s3c2440_cpufreq_add, -}; - -static int s3c2442_cpufreq_init(void) -{ - return subsys_interface_register(&s3c2442_cpufreq_interface); -} -subsys_initcall(s3c2442_cpufreq_init); diff --git a/drivers/cpufreq/s3c24xx-cpufreq-debugfs.c b/drivers/cpufreq/s3c24xx-cpufreq-debugfs.c deleted file mode 100644 index 93971dfe7c75..000000000000 --- a/drivers/cpufreq/s3c24xx-cpufreq-debugfs.c +++ /dev/null @@ -1,163 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2009 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX CPU Frequency scaling - debugfs status support -*/ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/init.h> -#include <linux/export.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/debugfs.h> -#include <linux/seq_file.h> -#include <linux/err.h> - -#include <linux/soc/samsung/s3c-cpufreq-core.h> - -static struct dentry *dbgfs_root; -static struct dentry *dbgfs_file_io; -static struct dentry *dbgfs_file_info; -static struct dentry *dbgfs_file_board; - -#define print_ns(x) ((x) / 10), ((x) % 10) - -static void show_max(struct seq_file *seq, struct s3c_freq *f) -{ - seq_printf(seq, "MAX: F=%lu, H=%lu, P=%lu, A=%lu\n", - f->fclk, f->hclk, f->pclk, f->armclk); -} - -static int board_show(struct seq_file *seq, void *p) -{ - struct s3c_cpufreq_config *cfg; - struct s3c_cpufreq_board *brd; - - cfg = s3c_cpufreq_getconfig(); - if (!cfg) { - seq_printf(seq, "no configuration registered\n"); - return 0; - } - - brd = cfg->board; - if (!brd) { - seq_printf(seq, "no board definition set?\n"); - return 0; - } - - seq_printf(seq, "SDRAM refresh %u ns\n", brd->refresh); - seq_printf(seq, "auto_io=%u\n", brd->auto_io); - seq_printf(seq, "need_io=%u\n", brd->need_io); - - show_max(seq, &brd->max); - - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(board); - -static int info_show(struct seq_file *seq, void *p) -{ - struct s3c_cpufreq_config *cfg; - - cfg = s3c_cpufreq_getconfig(); - if (!cfg) { - seq_printf(seq, "no configuration registered\n"); - return 0; - } - - seq_printf(seq, " FCLK %ld Hz\n", cfg->freq.fclk); - seq_printf(seq, " HCLK %ld Hz (%lu.%lu ns)\n", - cfg->freq.hclk, print_ns(cfg->freq.hclk_tns)); - seq_printf(seq, " PCLK %ld Hz\n", cfg->freq.hclk); - seq_printf(seq, "ARMCLK %ld Hz\n", cfg->freq.armclk); - seq_printf(seq, "\n"); - - show_max(seq, &cfg->max); - - seq_printf(seq, "Divisors: P=%d, H=%d, A=%d, dvs=%s\n", - cfg->divs.h_divisor, cfg->divs.p_divisor, - cfg->divs.arm_divisor, cfg->divs.dvs ? "on" : "off"); - seq_printf(seq, "\n"); - - seq_printf(seq, "lock_pll=%u\n", cfg->lock_pll); - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(info); - -static int io_show(struct seq_file *seq, void *p) -{ - void (*show_bank)(struct seq_file *, struct s3c_cpufreq_config *, union s3c_iobank *); - struct s3c_cpufreq_config *cfg; - struct s3c_iotimings *iot; - union s3c_iobank *iob; - int bank; - - cfg = s3c_cpufreq_getconfig(); - if (!cfg) { - seq_printf(seq, "no configuration registered\n"); - return 0; - } - - show_bank = cfg->info->debug_io_show; - if (!show_bank) { - seq_printf(seq, "no code to show bank timing\n"); - return 0; - } - - iot = s3c_cpufreq_getiotimings(); - if (!iot) { - seq_printf(seq, "no io timings registered\n"); - return 0; - } - - seq_printf(seq, "hclk period is %lu.%lu ns\n", print_ns(cfg->freq.hclk_tns)); - - for (bank = 0; bank < MAX_BANKS; bank++) { - iob = &iot->bank[bank]; - - seq_printf(seq, "bank %d: ", bank); - - if (!iob->io_2410) { - seq_printf(seq, "nothing set\n"); - continue; - } - - show_bank(seq, cfg, iob); - } - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(io); - -static int __init s3c_freq_debugfs_init(void) -{ - dbgfs_root = debugfs_create_dir("s3c-cpufreq", NULL); - if (IS_ERR(dbgfs_root)) { - pr_err("%s: error creating debugfs root\n", __func__); - return PTR_ERR(dbgfs_root); - } - - dbgfs_file_io = debugfs_create_file("io-timing", S_IRUGO, dbgfs_root, - NULL, &io_fops); - - dbgfs_file_info = debugfs_create_file("info", S_IRUGO, dbgfs_root, - NULL, &info_fops); - - dbgfs_file_board = debugfs_create_file("board", S_IRUGO, dbgfs_root, - NULL, &board_fops); - - return 0; -} - -late_initcall(s3c_freq_debugfs_init); - diff --git a/drivers/cpufreq/s3c24xx-cpufreq.c b/drivers/cpufreq/s3c24xx-cpufreq.c deleted file mode 100644 index 7380c32b238e..000000000000 --- a/drivers/cpufreq/s3c24xx-cpufreq.c +++ /dev/null @@ -1,648 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2006-2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX CPU Frequency scaling -*/ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/cpufreq.h> -#include <linux/cpu.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/sysfs.h> -#include <linux/slab.h> -#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <linux/soc/samsung/s3c-pm.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -/* note, cpufreq support deals in kHz, no Hz */ -static struct cpufreq_driver s3c24xx_driver; -static struct s3c_cpufreq_config cpu_cur; -static struct s3c_iotimings s3c24xx_iotiming; -static struct cpufreq_frequency_table *pll_reg; -static unsigned int last_target = ~0; -static unsigned int ftab_size; -static struct cpufreq_frequency_table *ftab; - -static struct clk *_clk_mpll; -static struct clk *_clk_xtal; -static struct clk *clk_fclk; -static struct clk *clk_hclk; -static struct clk *clk_pclk; -static struct clk *clk_arm; - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS -struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void) -{ - return &cpu_cur; -} - -struct s3c_iotimings *s3c_cpufreq_getiotimings(void) -{ - return &s3c24xx_iotiming; -} -#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS */ - -static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg) -{ - unsigned long fclk, pclk, hclk, armclk; - - cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); - cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); - cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); - cfg->freq.armclk = armclk = clk_get_rate(clk_arm); - - cfg->pll.driver_data = s3c24xx_read_mpllcon(); - cfg->pll.frequency = fclk; - - cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); - - cfg->divs.h_divisor = fclk / hclk; - cfg->divs.p_divisor = fclk / pclk; -} - -static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg) -{ - unsigned long pll = cfg->pll.frequency; - - cfg->freq.fclk = pll; - cfg->freq.hclk = pll / cfg->divs.h_divisor; - cfg->freq.pclk = pll / cfg->divs.p_divisor; - - /* convert hclk into 10ths of nanoseconds for io calcs */ - cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); -} - -static inline int closer(unsigned int target, unsigned int n, unsigned int c) -{ - int diff_cur = abs(target - c); - int diff_new = abs(target - n); - - return (diff_new < diff_cur); -} - -static void s3c_cpufreq_show(const char *pfx, - struct s3c_cpufreq_config *cfg) -{ - s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n", - pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, - cfg->freq.hclk, cfg->divs.h_divisor, - cfg->freq.pclk, cfg->divs.p_divisor); -} - -/* functions to wrapper the driver info calls to do the cpu specific work */ - -static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg) -{ - if (cfg->info->set_iotiming) - (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming); -} - -static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg) -{ - if (cfg->info->calc_iotiming) - return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming); - - return 0; -} - -static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) -{ - (cfg->info->set_refresh)(cfg); -} - -static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) -{ - (cfg->info->set_divs)(cfg); -} - -static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) -{ - return (cfg->info->calc_divs)(cfg); -} - -static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg) -{ - cfg->mpll = _clk_mpll; - (cfg->info->set_fvco)(cfg); -} - -static inline void s3c_cpufreq_updateclk(struct clk *clk, - unsigned int freq) -{ - clk_set_rate(clk, freq); -} - -static int s3c_cpufreq_settarget(struct cpufreq_policy *policy, - unsigned int target_freq, - struct cpufreq_frequency_table *pll) -{ - struct s3c_cpufreq_freqs freqs; - struct s3c_cpufreq_config cpu_new; - unsigned long flags; - - cpu_new = cpu_cur; /* copy new from current */ - - s3c_cpufreq_show("cur", &cpu_cur); - - /* TODO - check for DMA currently outstanding */ - - cpu_new.pll = pll ? *pll : cpu_cur.pll; - - if (pll) - freqs.pll_changing = 1; - - /* update our frequencies */ - - cpu_new.freq.armclk = target_freq; - cpu_new.freq.fclk = cpu_new.pll.frequency; - - if (s3c_cpufreq_calcdivs(&cpu_new) < 0) { - pr_err("no divisors for %d\n", target_freq); - goto err_notpossible; - } - - s3c_freq_dbg("%s: got divs\n", __func__); - - s3c_cpufreq_calc(&cpu_new); - - s3c_freq_dbg("%s: calculated frequencies for new\n", __func__); - - if (cpu_new.freq.hclk != cpu_cur.freq.hclk) { - if (s3c_cpufreq_calcio(&cpu_new) < 0) { - pr_err("%s: no IO timings\n", __func__); - goto err_notpossible; - } - } - - s3c_cpufreq_show("new", &cpu_new); - - /* setup our cpufreq parameters */ - - freqs.old = cpu_cur.freq; - freqs.new = cpu_new.freq; - - freqs.freqs.old = cpu_cur.freq.armclk / 1000; - freqs.freqs.new = cpu_new.freq.armclk / 1000; - - /* update f/h/p clock settings before we issue the change - * notification, so that drivers do not need to do anything - * special if they want to recalculate on CPUFREQ_PRECHANGE. */ - - s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency); - s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk); - s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk); - s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk); - - /* start the frequency change */ - cpufreq_freq_transition_begin(policy, &freqs.freqs); - - /* If hclk is staying the same, then we do not need to - * re-write the IO or the refresh timings whilst we are changing - * speed. */ - - local_irq_save(flags); - - /* is our memory clock slowing down? */ - if (cpu_new.freq.hclk < cpu_cur.freq.hclk) { - s3c_cpufreq_setrefresh(&cpu_new); - s3c_cpufreq_setio(&cpu_new); - } - - if (cpu_new.freq.fclk == cpu_cur.freq.fclk) { - /* not changing PLL, just set the divisors */ - - s3c_cpufreq_setdivs(&cpu_new); - } else { - if (cpu_new.freq.fclk < cpu_cur.freq.fclk) { - /* slow the cpu down, then set divisors */ - - s3c_cpufreq_setfvco(&cpu_new); - s3c_cpufreq_setdivs(&cpu_new); - } else { - /* set the divisors, then speed up */ - - s3c_cpufreq_setdivs(&cpu_new); - s3c_cpufreq_setfvco(&cpu_new); - } - } - - /* did our memory clock speed up */ - if (cpu_new.freq.hclk > cpu_cur.freq.hclk) { - s3c_cpufreq_setrefresh(&cpu_new); - s3c_cpufreq_setio(&cpu_new); - } - - /* update our current settings */ - cpu_cur = cpu_new; - - local_irq_restore(flags); - - /* notify everyone we've done this */ - cpufreq_freq_transition_end(policy, &freqs.freqs, 0); - - s3c_freq_dbg("%s: finished\n", __func__); - return 0; - - err_notpossible: - pr_err("no compatible settings for %d\n", target_freq); - return -EINVAL; -} - -/* s3c_cpufreq_target - * - * called by the cpufreq core to adjust the frequency that the CPU - * is currently running at. - */ - -static int s3c_cpufreq_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) -{ - struct cpufreq_frequency_table *pll; - unsigned int index; - - /* avoid repeated calls which cause a needless amout of duplicated - * logging output (and CPU time as the calculation process is - * done) */ - if (target_freq == last_target) - return 0; - - last_target = target_freq; - - s3c_freq_dbg("%s: policy %p, target %u, relation %u\n", - __func__, policy, target_freq, relation); - - if (ftab) { - index = cpufreq_frequency_table_target(policy, target_freq, - relation); - - s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__, - target_freq, index, ftab[index].frequency); - target_freq = ftab[index].frequency; - } - - target_freq *= 1000; /* convert target to Hz */ - - /* find the settings for our new frequency */ - - if (!pll_reg || cpu_cur.lock_pll) { - /* either we've not got any PLL values, or we've locked - * to the current one. */ - pll = NULL; - } else { - struct cpufreq_policy tmp_policy; - - /* we keep the cpu pll table in Hz, to ensure we get an - * accurate value for the PLL output. */ - - tmp_policy.min = policy->min * 1000; - tmp_policy.max = policy->max * 1000; - tmp_policy.cpu = policy->cpu; - tmp_policy.freq_table = pll_reg; - - /* cpufreq_frequency_table_target returns the index - * of the table entry, not the value of - * the table entry's index field. */ - - index = cpufreq_frequency_table_target(&tmp_policy, target_freq, - relation); - pll = pll_reg + index; - - s3c_freq_dbg("%s: target %u => %u\n", - __func__, target_freq, pll->frequency); - - target_freq = pll->frequency; - } - - return s3c_cpufreq_settarget(policy, target_freq, pll); -} - -struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name) -{ - struct clk *clk; - - clk = clk_get(dev, name); - if (IS_ERR(clk)) - pr_err("failed to get clock '%s'\n", name); - - return clk; -} - -static int s3c_cpufreq_init(struct cpufreq_policy *policy) -{ - policy->clk = clk_arm; - policy->cpuinfo.transition_latency = cpu_cur.info->latency; - policy->freq_table = ftab; - - return 0; -} - -static int __init s3c_cpufreq_initclks(void) -{ - _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll"); - _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal"); - clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk"); - clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk"); - clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk"); - clk_arm = s3c_cpufreq_clk_get(NULL, "armclk"); - - if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) || - IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) { - pr_err("%s: could not get clock(s)\n", __func__); - return -ENOENT; - } - - pr_info("%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", - __func__, - clk_get_rate(clk_fclk) / 1000, - clk_get_rate(clk_hclk) / 1000, - clk_get_rate(clk_pclk) / 1000, - clk_get_rate(clk_arm) / 1000); - - return 0; -} - -#ifdef CONFIG_PM -static struct cpufreq_frequency_table suspend_pll; -static unsigned int suspend_freq; - -static int s3c_cpufreq_suspend(struct cpufreq_policy *policy) -{ - suspend_pll.frequency = clk_get_rate(_clk_mpll); - suspend_pll.driver_data = s3c24xx_read_mpllcon(); - suspend_freq = clk_get_rate(clk_arm); - - return 0; -} - -static int s3c_cpufreq_resume(struct cpufreq_policy *policy) -{ - int ret; - - s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy); - - last_target = ~0; /* invalidate last_target setting */ - - /* whilst we will be called later on, we try and re-set the - * cpu frequencies as soon as possible so that we do not end - * up resuming devices and then immediately having to re-set - * a number of settings once these devices have restarted. - * - * as a note, it is expected devices are not used until they - * have been un-suspended and at that time they should have - * used the updated clock settings. - */ - - ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll); - if (ret) { - pr_err("%s: failed to reset pll/freq\n", __func__); - return ret; - } - - return 0; -} -#else -#define s3c_cpufreq_resume NULL -#define s3c_cpufreq_suspend NULL -#endif - -static struct cpufreq_driver s3c24xx_driver = { - .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK, - .target = s3c_cpufreq_target, - .get = cpufreq_generic_get, - .init = s3c_cpufreq_init, - .suspend = s3c_cpufreq_suspend, - .resume = s3c_cpufreq_resume, - .name = "s3c24xx", -}; - - -int s3c_cpufreq_register(struct s3c_cpufreq_info *info) -{ - if (!info || !info->name) { - pr_err("%s: failed to pass valid information\n", __func__); - return -EINVAL; - } - - pr_info("S3C24XX CPU Frequency driver, %s cpu support\n", - info->name); - - /* check our driver info has valid data */ - - BUG_ON(info->set_refresh == NULL); - BUG_ON(info->set_divs == NULL); - BUG_ON(info->calc_divs == NULL); - - /* info->set_fvco is optional, depending on whether there - * is a need to set the clock code. */ - - cpu_cur.info = info; - - /* Note, driver registering should probably update locktime */ - - return 0; -} - -int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) -{ - struct s3c_cpufreq_board *ours; - - if (!board) { - pr_info("%s: no board data\n", __func__); - return -EINVAL; - } - - /* Copy the board information so that each board can make this - * initdata. */ - - ours = kzalloc(sizeof(*ours), GFP_KERNEL); - if (!ours) - return -ENOMEM; - - *ours = *board; - cpu_cur.board = ours; - - return 0; -} - -static int __init s3c_cpufreq_auto_io(void) -{ - int ret; - - if (!cpu_cur.info->get_iotiming) { - pr_err("%s: get_iotiming undefined\n", __func__); - return -ENOENT; - } - - pr_info("%s: working out IO settings\n", __func__); - - ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming); - if (ret) - pr_err("%s: failed to get timings\n", __func__); - - return ret; -} - -/* if one or is zero, then return the other, otherwise return the min */ -#define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b)) - -/** - * s3c_cpufreq_freq_min - find the minimum settings for the given freq. - * @dst: The destination structure - * @a: One argument. - * @b: The other argument. - * - * Create a minimum of each frequency entry in the 'struct s3c_freq', - * unless the entry is zero when it is ignored and the non-zero argument - * used. - */ -static void s3c_cpufreq_freq_min(struct s3c_freq *dst, - struct s3c_freq *a, struct s3c_freq *b) -{ - dst->fclk = do_min(a->fclk, b->fclk); - dst->hclk = do_min(a->hclk, b->hclk); - dst->pclk = do_min(a->pclk, b->pclk); - dst->armclk = do_min(a->armclk, b->armclk); -} - -static inline u32 calc_locktime(u32 freq, u32 time_us) -{ - u32 result; - - result = freq * time_us; - result = DIV_ROUND_UP(result, 1000 * 1000); - - return result; -} - -static void s3c_cpufreq_update_loctkime(void) -{ - unsigned int bits = cpu_cur.info->locktime_bits; - u32 rate = (u32)clk_get_rate(_clk_xtal); - u32 val; - - if (bits == 0) { - WARN_ON(1); - return; - } - - val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits; - val |= calc_locktime(rate, cpu_cur.info->locktime_m); - - pr_info("%s: new locktime is 0x%08x\n", __func__, val); - s3c24xx_write_locktime(val); -} - -static int s3c_cpufreq_build_freq(void) -{ - int size, ret; - - kfree(ftab); - - size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0); - size++; - - ftab = kcalloc(size, sizeof(*ftab), GFP_KERNEL); - if (!ftab) - return -ENOMEM; - - ftab_size = size; - - ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size); - s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END); - - return 0; -} - -static int __init s3c_cpufreq_initcall(void) -{ - int ret = 0; - - if (cpu_cur.info && cpu_cur.board) { - ret = s3c_cpufreq_initclks(); - if (ret) - goto out; - - /* get current settings */ - s3c_cpufreq_getcur(&cpu_cur); - s3c_cpufreq_show("cur", &cpu_cur); - - if (cpu_cur.board->auto_io) { - ret = s3c_cpufreq_auto_io(); - if (ret) { - pr_err("%s: failed to get io timing\n", - __func__); - goto out; - } - } - - if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) { - pr_err("%s: no IO support registered\n", __func__); - ret = -EINVAL; - goto out; - } - - if (!cpu_cur.info->need_pll) - cpu_cur.lock_pll = 1; - - s3c_cpufreq_update_loctkime(); - - s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max, - &cpu_cur.info->max); - - if (cpu_cur.info->calc_freqtable) - s3c_cpufreq_build_freq(); - - ret = cpufreq_register_driver(&s3c24xx_driver); - } - - out: - return ret; -} - -late_initcall(s3c_cpufreq_initcall); - -/** - * s3c_plltab_register - register CPU PLL table. - * @plls: The list of PLL entries. - * @plls_no: The size of the PLL entries @plls. - * - * Register the given set of PLLs with the system. - */ -int s3c_plltab_register(struct cpufreq_frequency_table *plls, - unsigned int plls_no) -{ - struct cpufreq_frequency_table *vals; - unsigned int size; - - size = sizeof(*vals) * (plls_no + 1); - - vals = kzalloc(size, GFP_KERNEL); - if (vals) { - memcpy(vals, plls, size); - pll_reg = vals; - - /* write a terminating entry, we don't store it in the - * table that is stored in the kernel */ - vals += plls_no; - vals->frequency = CPUFREQ_TABLE_END; - - pr_info("%d PLL entries\n", plls_no); - } else - pr_err("no memory for PLL tables\n"); - - return vals ? 0 : -ENOMEM; -} diff --git a/drivers/cpufreq/sa1100-cpufreq.c b/drivers/cpufreq/sa1100-cpufreq.c deleted file mode 100644 index 252b9fc26124..000000000000 --- a/drivers/cpufreq/sa1100-cpufreq.c +++ /dev/null @@ -1,206 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * cpu-sa1100.c: clock scaling for the SA1100 - * - * Copyright (C) 2000 2001, The Delft University of Technology - * - * Authors: - * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version - * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): - * - major rewrite for linux-2.3.99 - * - rewritten for the more generic power management scheme in - * linux-2.4.5-rmk1 - * - * This software has been developed while working on the LART - * computing board (http://www.lartmaker.nl/), which is - * sponsored by the Mobile Multi-media Communications - * (http://www.mobimedia.org/) and Ubiquitous Communications - * (http://www.ubicom.tudelft.nl/) projects. - * - * The authors can be reached at: - * - * Erik Mouw - * Information and Communication Theory Group - * Faculty of Information Technology and Systems - * Delft University of Technology - * P.O. Box 5031 - * 2600 GA Delft - * The Netherlands - * - * Theory of operations - * ==================== - * - * Clock scaling can be used to lower the power consumption of the CPU - * core. This will give you a somewhat longer running time. - * - * The SA-1100 has a single register to change the core clock speed: - * - * PPCR 0x90020014 PLL config - * - * However, the DRAM timings are closely related to the core clock - * speed, so we need to change these, too. The used registers are: - * - * MDCNFG 0xA0000000 DRAM config - * MDCAS0 0xA0000004 Access waveform - * MDCAS1 0xA0000008 Access waveform - * MDCAS2 0xA000000C Access waveform - * - * Care must be taken to change the DRAM parameters the correct way, - * because otherwise the DRAM becomes unusable and the kernel will - * crash. - * - * The simple solution to avoid a kernel crash is to put the actual - * clock change in ROM and jump to that code from the kernel. The main - * disadvantage is that the ROM has to be modified, which is not - * possible on all SA-1100 platforms. Another disadvantage is that - * jumping to ROM makes clock switching unnecessary complicated. - * - * The idea behind this driver is that the memory configuration can be - * changed while running from DRAM (even with interrupts turned on!) - * as long as all re-configuration steps yield a valid DRAM - * configuration. The advantages are clear: it will run on all SA-1100 - * platforms, and the code is very simple. - * - * If you really want to understand what is going on in - * sa1100_update_dram_timings(), you'll have to read sections 8.2, - * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor - * Developers Manual" (available for free from Intel). - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/cpufreq.h> -#include <linux/io.h> - -#include <asm/cputype.h> - -#include <mach/generic.h> -#include <mach/hardware.h> - -struct sa1100_dram_regs { - int speed; - u32 mdcnfg; - u32 mdcas0; - u32 mdcas1; - u32 mdcas2; -}; - - -static struct cpufreq_driver sa1100_driver; - -static struct sa1100_dram_regs sa1100_dram_settings[] = { - /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */ - { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */ - { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */ - { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */ - {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */ - {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */ - {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */ - {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */ - {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */ - {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */ - {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */ - {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */ - {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */ - {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */ - {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */ - {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */ - {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */ - { 0, 0, 0, 0, 0 } /* last entry */ -}; - -static void sa1100_update_dram_timings(int current_speed, int new_speed) -{ - struct sa1100_dram_regs *settings = sa1100_dram_settings; - - /* find speed */ - while (settings->speed != 0) { - if (new_speed == settings->speed) - break; - - settings++; - } - - if (settings->speed == 0) { - panic("%s: couldn't find dram setting for speed %d\n", - __func__, new_speed); - } - - /* No risk, no fun: run with interrupts on! */ - if (new_speed > current_speed) { - /* We're going FASTER, so first relax the memory - * timings before changing the core frequency - */ - - /* Half the memory access clock */ - MDCNFG |= MDCNFG_CDB2; - - /* The order of these statements IS important, keep 8 - * pulses!! - */ - MDCAS2 = settings->mdcas2; - MDCAS1 = settings->mdcas1; - MDCAS0 = settings->mdcas0; - MDCNFG = settings->mdcnfg; - } else { - /* We're going SLOWER: first decrease the core - * frequency and then tighten the memory settings. - */ - - /* Half the memory access clock */ - MDCNFG |= MDCNFG_CDB2; - - /* The order of these statements IS important, keep 8 - * pulses!! - */ - MDCAS0 = settings->mdcas0; - MDCAS1 = settings->mdcas1; - MDCAS2 = settings->mdcas2; - MDCNFG = settings->mdcnfg; - } -} - -static int sa1100_target(struct cpufreq_policy *policy, unsigned int ppcr) -{ - unsigned int cur = sa11x0_getspeed(0); - unsigned int new_freq; - - new_freq = sa11x0_freq_table[ppcr].frequency; - - if (new_freq > cur) - sa1100_update_dram_timings(cur, new_freq); - - PPCR = ppcr; - - if (new_freq < cur) - sa1100_update_dram_timings(cur, new_freq); - - return 0; -} - -static int __init sa1100_cpu_init(struct cpufreq_policy *policy) -{ - cpufreq_generic_init(policy, sa11x0_freq_table, 0); - return 0; -} - -static struct cpufreq_driver sa1100_driver __refdata = { - .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK | - CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING, - .verify = cpufreq_generic_frequency_table_verify, - .target_index = sa1100_target, - .get = sa11x0_getspeed, - .init = sa1100_cpu_init, - .name = "sa1100", -}; - -static int __init sa1100_dram_init(void) -{ - if (cpu_is_sa1100()) - return cpufreq_register_driver(&sa1100_driver); - else - return -ENODEV; -} - -arch_initcall(sa1100_dram_init); diff --git a/drivers/cpufreq/sa1110-cpufreq.c b/drivers/cpufreq/sa1110-cpufreq.c index 1a83c8678a63..bb7f591a8b05 100644 --- a/drivers/cpufreq/sa1110-cpufreq.c +++ b/drivers/cpufreq/sa1110-cpufreq.c @@ -344,14 +344,8 @@ static int __init sa1110_clk_init(void) if (!name[0]) { if (machine_is_assabet()) name = "TC59SM716-CL3"; - if (machine_is_pt_system3()) - name = "K4S641632D"; - if (machine_is_h3100()) - name = "KM416S4030CT"; if (machine_is_jornada720() || machine_is_h3600()) name = "K4S281632B-1H"; - if (machine_is_nanoengine()) - name = "MT48LC8M16A2TG-75"; } sdram = sa1110_find_sdram(name); diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index b6d48d54f42f..2f2a2dd0b95d 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -610,18 +610,6 @@ config SPRD_DMA help Enable support for the on-chip DMA controller on Spreadtrum platform. -config S3C24XX_DMAC - bool "Samsung S3C24XX DMA support" - depends on ARCH_S3C24XX || COMPILE_TEST - select DMA_ENGINE - select DMA_VIRTUAL_CHANNELS - help - Support for the Samsung S3C24XX DMA controller driver. The - DMA controller is having multiple DMA channels which can be - configured for different peripherals like audio, UART, SPI. - The DMA controller can transfer data from memory to peripheral, - periphal to memory, periphal to periphal and memory to memory. - config TXX9_DMAC tristate "Toshiba TXx9 SoC DMA support" depends on MACH_TX49XX diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index 5b55ada052a7..a4fd1ce29510 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_STM32_DMA) += stm32-dma.o obj-$(CONFIG_STM32_DMAMUX) += stm32-dmamux.o obj-$(CONFIG_STM32_MDMA) += stm32-mdma.o obj-$(CONFIG_SPRD_DMA) += sprd-dma.o -obj-$(CONFIG_S3C24XX_DMAC) += s3c24xx-dma.o obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o obj-$(CONFIG_TEGRA186_GPC_DMA) += tegra186-gpc-dma.o obj-$(CONFIG_TEGRA20_APB_DMA) += tegra20-apb-dma.o diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c index a262e0eb4cc9..d83e608dca05 100644 --- a/drivers/dma/mmp_tdma.c +++ b/drivers/dma/mmp_tdma.c @@ -15,7 +15,7 @@ #include <linux/dmaengine.h> #include <linux/platform_device.h> #include <linux/device.h> -#include <linux/platform_data/dma-mmp_tdma.h> +#include <linux/genalloc.h> #include <linux/of_device.h> #include <linux/of_dma.h> @@ -670,10 +670,7 @@ static int mmp_tdma_probe(struct platform_device *pdev) INIT_LIST_HEAD(&tdev->device.channels); - if (pdev->dev.of_node) - pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0); - else - pool = sram_get_gpool("asram"); + pool = of_gen_pool_get(pdev->dev.of_node, "asram", 0); if (!pool) { dev_err(&pdev->dev, "asram pool not available\n"); return -ENOMEM; diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c deleted file mode 100644 index a09eeb545f7d..000000000000 --- a/drivers/dma/s3c24xx-dma.c +++ /dev/null @@ -1,1428 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * S3C24XX DMA handling - * - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * based on amba-pl08x.c - * - * Copyright (c) 2006 ARM Ltd. - * Copyright (c) 2010 ST-Ericsson SA - * - * Author: Peter Pearse <peter.pearse@arm.com> - * Author: Linus Walleij <linus.walleij@stericsson.com> - * - * The DMA controllers in S3C24XX SoCs have a varying number of DMA signals - * that can be routed to any of the 4 to 8 hardware-channels. - * - * Therefore on these DMA controllers the number of channels - * and the number of incoming DMA signals are two totally different things. - * It is usually not possible to theoretically handle all physical signals, - * so a multiplexing scheme with possible denial of use is necessary. - * - * Open items: - * - bursts - */ - -#include <linux/platform_device.h> -#include <linux/types.h> -#include <linux/dmaengine.h> -#include <linux/dma-mapping.h> -#include <linux/interrupt.h> -#include <linux/clk.h> -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <linux/slab.h> -#include <linux/platform_data/dma-s3c24xx.h> - -#include "dmaengine.h" -#include "virt-dma.h" - -#define MAX_DMA_CHANNELS 8 - -#define S3C24XX_DISRC 0x00 -#define S3C24XX_DISRCC 0x04 -#define S3C24XX_DISRCC_INC_INCREMENT 0 -#define S3C24XX_DISRCC_INC_FIXED BIT(0) -#define S3C24XX_DISRCC_LOC_AHB 0 -#define S3C24XX_DISRCC_LOC_APB BIT(1) - -#define S3C24XX_DIDST 0x08 -#define S3C24XX_DIDSTC 0x0c -#define S3C24XX_DIDSTC_INC_INCREMENT 0 -#define S3C24XX_DIDSTC_INC_FIXED BIT(0) -#define S3C24XX_DIDSTC_LOC_AHB 0 -#define S3C24XX_DIDSTC_LOC_APB BIT(1) -#define S3C24XX_DIDSTC_INT_TC0 0 -#define S3C24XX_DIDSTC_INT_RELOAD BIT(2) - -#define S3C24XX_DCON 0x10 - -#define S3C24XX_DCON_TC_MASK 0xfffff -#define S3C24XX_DCON_DSZ_BYTE (0 << 20) -#define S3C24XX_DCON_DSZ_HALFWORD (1 << 20) -#define S3C24XX_DCON_DSZ_WORD (2 << 20) -#define S3C24XX_DCON_DSZ_MASK (3 << 20) -#define S3C24XX_DCON_DSZ_SHIFT 20 -#define S3C24XX_DCON_AUTORELOAD 0 -#define S3C24XX_DCON_NORELOAD BIT(22) -#define S3C24XX_DCON_HWTRIG BIT(23) -#define S3C24XX_DCON_HWSRC_SHIFT 24 -#define S3C24XX_DCON_SERV_SINGLE 0 -#define S3C24XX_DCON_SERV_WHOLE BIT(27) -#define S3C24XX_DCON_TSZ_UNIT 0 -#define S3C24XX_DCON_TSZ_BURST4 BIT(28) -#define S3C24XX_DCON_INT BIT(29) -#define S3C24XX_DCON_SYNC_PCLK 0 -#define S3C24XX_DCON_SYNC_HCLK BIT(30) -#define S3C24XX_DCON_DEMAND 0 -#define S3C24XX_DCON_HANDSHAKE BIT(31) - -#define S3C24XX_DSTAT 0x14 -#define S3C24XX_DSTAT_STAT_BUSY BIT(20) -#define S3C24XX_DSTAT_CURRTC_MASK 0xfffff - -#define S3C24XX_DMASKTRIG 0x20 -#define S3C24XX_DMASKTRIG_SWTRIG BIT(0) -#define S3C24XX_DMASKTRIG_ON BIT(1) -#define S3C24XX_DMASKTRIG_STOP BIT(2) - -#define S3C24XX_DMAREQSEL 0x24 -#define S3C24XX_DMAREQSEL_HW BIT(0) - -/* - * S3C2410, S3C2440 and S3C2442 SoCs cannot select any physical channel - * for a DMA source. Instead only specific channels are valid. - * All of these SoCs have 4 physical channels and the number of request - * source bits is 3. Additionally we also need 1 bit to mark the channel - * as valid. - * Therefore we separate the chansel element of the channel data into 4 - * parts of 4 bits each, to hold the information if the channel is valid - * and the hw request source to use. - * - * Example: - * SDI is valid on channels 0, 2 and 3 - with varying hw request sources. - * For it the chansel field would look like - * - * ((BIT(3) | 1) << 3 * 4) | // channel 3, with request source 1 - * ((BIT(3) | 2) << 2 * 4) | // channel 2, with request source 2 - * ((BIT(3) | 2) << 0 * 4) // channel 0, with request source 2 - */ -#define S3C24XX_CHANSEL_WIDTH 4 -#define S3C24XX_CHANSEL_VALID BIT(3) -#define S3C24XX_CHANSEL_REQ_MASK 7 - -/* - * struct soc_data - vendor-specific config parameters for individual SoCs - * @stride: spacing between the registers of each channel - * @has_reqsel: does the controller use the newer requestselection mechanism - * @has_clocks: are controllable dma-clocks present - */ -struct soc_data { - int stride; - bool has_reqsel; - bool has_clocks; -}; - -/* - * enum s3c24xx_dma_chan_state - holds the virtual channel states - * @S3C24XX_DMA_CHAN_IDLE: the channel is idle - * @S3C24XX_DMA_CHAN_RUNNING: the channel has allocated a physical transport - * channel and is running a transfer on it - * @S3C24XX_DMA_CHAN_WAITING: the channel is waiting for a physical transport - * channel to become available (only pertains to memcpy channels) - */ -enum s3c24xx_dma_chan_state { - S3C24XX_DMA_CHAN_IDLE, - S3C24XX_DMA_CHAN_RUNNING, - S3C24XX_DMA_CHAN_WAITING, -}; - -/* - * struct s3c24xx_sg - structure containing data per sg - * @src_addr: src address of sg - * @dst_addr: dst address of sg - * @len: transfer len in bytes - * @node: node for txd's dsg_list - */ -struct s3c24xx_sg { - dma_addr_t src_addr; - dma_addr_t dst_addr; - size_t len; - struct list_head node; -}; - -/* - * struct s3c24xx_txd - wrapper for struct dma_async_tx_descriptor - * @vd: virtual DMA descriptor - * @dsg_list: list of children sg's - * @at: sg currently being transfered - * @width: transfer width - * @disrcc: value for source control register - * @didstc: value for destination control register - * @dcon: base value for dcon register - * @cyclic: indicate cyclic transfer - */ -struct s3c24xx_txd { - struct virt_dma_desc vd; - struct list_head dsg_list; - struct list_head *at; - u8 width; - u32 disrcc; - u32 didstc; - u32 dcon; - bool cyclic; -}; - -struct s3c24xx_dma_chan; - -/* - * struct s3c24xx_dma_phy - holder for the physical channels - * @id: physical index to this channel - * @valid: does the channel have all required elements - * @base: virtual memory base (remapped) for the this channel - * @irq: interrupt for this channel - * @clk: clock for this channel - * @lock: a lock to use when altering an instance of this struct - * @serving: virtual channel currently being served by this physicalchannel - * @host: a pointer to the host (internal use) - */ -struct s3c24xx_dma_phy { - unsigned int id; - bool valid; - void __iomem *base; - int irq; - struct clk *clk; - spinlock_t lock; - struct s3c24xx_dma_chan *serving; - struct s3c24xx_dma_engine *host; -}; - -/* - * struct s3c24xx_dma_chan - this structure wraps a DMA ENGINE channel - * @id: the id of the channel - * @name: name of the channel - * @vc: wrapped virtual channel - * @phy: the physical channel utilized by this channel, if there is one - * @runtime_addr: address for RX/TX according to the runtime config - * @at: active transaction on this channel - * @lock: a lock for this channel data - * @host: a pointer to the host (internal use) - * @state: whether the channel is idle, running etc - * @slave: whether this channel is a device (slave) or for memcpy - */ -struct s3c24xx_dma_chan { - int id; - const char *name; - struct virt_dma_chan vc; - struct s3c24xx_dma_phy *phy; - struct dma_slave_config cfg; - struct s3c24xx_txd *at; - struct s3c24xx_dma_engine *host; - enum s3c24xx_dma_chan_state state; - bool slave; -}; - -/* - * struct s3c24xx_dma_engine - the local state holder for the S3C24XX - * @pdev: the corresponding platform device - * @pdata: platform data passed in from the platform/machine - * @base: virtual memory base (remapped) - * @slave: slave engine for this instance - * @memcpy: memcpy engine for this instance - * @phy_chans: array of data for the physical channels - */ -struct s3c24xx_dma_engine { - struct platform_device *pdev; - const struct s3c24xx_dma_platdata *pdata; - struct soc_data *sdata; - void __iomem *base; - struct dma_device slave; - struct dma_device memcpy; - struct s3c24xx_dma_phy *phy_chans; -}; - -/* - * Physical channel handling - */ - -/* - * Check whether a certain channel is busy or not. - */ -static int s3c24xx_dma_phy_busy(struct s3c24xx_dma_phy *phy) -{ - unsigned int val = readl(phy->base + S3C24XX_DSTAT); - return val & S3C24XX_DSTAT_STAT_BUSY; -} - -static bool s3c24xx_dma_phy_valid(struct s3c24xx_dma_chan *s3cchan, - struct s3c24xx_dma_phy *phy) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - const struct s3c24xx_dma_platdata *pdata = s3cdma->pdata; - struct s3c24xx_dma_channel *cdata = &pdata->channels[s3cchan->id]; - int phyvalid; - - /* every phy is valid for memcopy channels */ - if (!s3cchan->slave) - return true; - - /* On newer variants all phys can be used for all virtual channels */ - if (s3cdma->sdata->has_reqsel) - return true; - - phyvalid = (cdata->chansel >> (phy->id * S3C24XX_CHANSEL_WIDTH)); - return (phyvalid & S3C24XX_CHANSEL_VALID) ? true : false; -} - -/* - * Allocate a physical channel for a virtual channel - * - * Try to locate a physical channel to be used for this transfer. If all - * are taken return NULL and the requester will have to cope by using - * some fallback PIO mode or retrying later. - */ -static -struct s3c24xx_dma_phy *s3c24xx_dma_get_phy(struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - struct s3c24xx_dma_phy *phy = NULL; - unsigned long flags; - int i; - int ret; - - for (i = 0; i < s3cdma->pdata->num_phy_channels; i++) { - phy = &s3cdma->phy_chans[i]; - - if (!phy->valid) - continue; - - if (!s3c24xx_dma_phy_valid(s3cchan, phy)) - continue; - - spin_lock_irqsave(&phy->lock, flags); - - if (!phy->serving) { - phy->serving = s3cchan; - spin_unlock_irqrestore(&phy->lock, flags); - break; - } - - spin_unlock_irqrestore(&phy->lock, flags); - } - - /* No physical channel available, cope with it */ - if (i == s3cdma->pdata->num_phy_channels) { - dev_warn(&s3cdma->pdev->dev, "no phy channel available\n"); - return NULL; - } - - /* start the phy clock */ - if (s3cdma->sdata->has_clocks) { - ret = clk_enable(phy->clk); - if (ret) { - dev_err(&s3cdma->pdev->dev, "could not enable clock for channel %d, err %d\n", - phy->id, ret); - phy->serving = NULL; - return NULL; - } - } - - return phy; -} - -/* - * Mark the physical channel as free. - * - * This drops the link between the physical and virtual channel. - */ -static inline void s3c24xx_dma_put_phy(struct s3c24xx_dma_phy *phy) -{ - struct s3c24xx_dma_engine *s3cdma = phy->host; - - if (s3cdma->sdata->has_clocks) - clk_disable(phy->clk); - - phy->serving = NULL; -} - -/* - * Stops the channel by writing the stop bit. - * This should not be used for an on-going transfer, but as a method of - * shutting down a channel (eg, when it's no longer used) or terminating a - * transfer. - */ -static void s3c24xx_dma_terminate_phy(struct s3c24xx_dma_phy *phy) -{ - writel(S3C24XX_DMASKTRIG_STOP, phy->base + S3C24XX_DMASKTRIG); -} - -/* - * Virtual channel handling - */ - -static inline -struct s3c24xx_dma_chan *to_s3c24xx_dma_chan(struct dma_chan *chan) -{ - return container_of(chan, struct s3c24xx_dma_chan, vc.chan); -} - -static u32 s3c24xx_dma_getbytes_chan(struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_phy *phy = s3cchan->phy; - struct s3c24xx_txd *txd = s3cchan->at; - u32 tc = readl(phy->base + S3C24XX_DSTAT) & S3C24XX_DSTAT_CURRTC_MASK; - - return tc * txd->width; -} - -static int s3c24xx_dma_set_runtime_config(struct dma_chan *chan, - struct dma_slave_config *config) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - unsigned long flags; - int ret = 0; - - /* Reject definitely invalid configurations */ - if (config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES || - config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES) - return -EINVAL; - - spin_lock_irqsave(&s3cchan->vc.lock, flags); - - if (!s3cchan->slave) { - ret = -EINVAL; - goto out; - } - - s3cchan->cfg = *config; - -out: - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); - return ret; -} - -/* - * Transfer handling - */ - -static inline -struct s3c24xx_txd *to_s3c24xx_txd(struct dma_async_tx_descriptor *tx) -{ - return container_of(tx, struct s3c24xx_txd, vd.tx); -} - -static struct s3c24xx_txd *s3c24xx_dma_get_txd(void) -{ - struct s3c24xx_txd *txd = kzalloc(sizeof(*txd), GFP_NOWAIT); - - if (txd) { - INIT_LIST_HEAD(&txd->dsg_list); - txd->dcon = S3C24XX_DCON_INT | S3C24XX_DCON_NORELOAD; - } - - return txd; -} - -static void s3c24xx_dma_free_txd(struct s3c24xx_txd *txd) -{ - struct s3c24xx_sg *dsg, *_dsg; - - list_for_each_entry_safe(dsg, _dsg, &txd->dsg_list, node) { - list_del(&dsg->node); - kfree(dsg); - } - - kfree(txd); -} - -static void s3c24xx_dma_start_next_sg(struct s3c24xx_dma_chan *s3cchan, - struct s3c24xx_txd *txd) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - struct s3c24xx_dma_phy *phy = s3cchan->phy; - const struct s3c24xx_dma_platdata *pdata = s3cdma->pdata; - struct s3c24xx_sg *dsg = list_entry(txd->at, struct s3c24xx_sg, node); - u32 dcon = txd->dcon; - u32 val; - - /* transfer-size and -count from len and width */ - switch (txd->width) { - case 1: - dcon |= S3C24XX_DCON_DSZ_BYTE | dsg->len; - break; - case 2: - dcon |= S3C24XX_DCON_DSZ_HALFWORD | (dsg->len / 2); - break; - case 4: - dcon |= S3C24XX_DCON_DSZ_WORD | (dsg->len / 4); - break; - } - - if (s3cchan->slave) { - struct s3c24xx_dma_channel *cdata = - &pdata->channels[s3cchan->id]; - - if (s3cdma->sdata->has_reqsel) { - writel_relaxed((cdata->chansel << 1) | - S3C24XX_DMAREQSEL_HW, - phy->base + S3C24XX_DMAREQSEL); - } else { - int csel = cdata->chansel >> (phy->id * - S3C24XX_CHANSEL_WIDTH); - - csel &= S3C24XX_CHANSEL_REQ_MASK; - dcon |= csel << S3C24XX_DCON_HWSRC_SHIFT; - dcon |= S3C24XX_DCON_HWTRIG; - } - } else { - if (s3cdma->sdata->has_reqsel) - writel_relaxed(0, phy->base + S3C24XX_DMAREQSEL); - } - - writel_relaxed(dsg->src_addr, phy->base + S3C24XX_DISRC); - writel_relaxed(txd->disrcc, phy->base + S3C24XX_DISRCC); - writel_relaxed(dsg->dst_addr, phy->base + S3C24XX_DIDST); - writel_relaxed(txd->didstc, phy->base + S3C24XX_DIDSTC); - writel_relaxed(dcon, phy->base + S3C24XX_DCON); - - val = readl_relaxed(phy->base + S3C24XX_DMASKTRIG); - val &= ~S3C24XX_DMASKTRIG_STOP; - val |= S3C24XX_DMASKTRIG_ON; - - /* trigger the dma operation for memcpy transfers */ - if (!s3cchan->slave) - val |= S3C24XX_DMASKTRIG_SWTRIG; - - writel(val, phy->base + S3C24XX_DMASKTRIG); -} - -/* - * Set the initial DMA register values and start first sg. - */ -static void s3c24xx_dma_start_next_txd(struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_phy *phy = s3cchan->phy; - struct virt_dma_desc *vd = vchan_next_desc(&s3cchan->vc); - struct s3c24xx_txd *txd = to_s3c24xx_txd(&vd->tx); - - list_del(&txd->vd.node); - - s3cchan->at = txd; - - /* Wait for channel inactive */ - while (s3c24xx_dma_phy_busy(phy)) - cpu_relax(); - - /* point to the first element of the sg list */ - txd->at = txd->dsg_list.next; - s3c24xx_dma_start_next_sg(s3cchan, txd); -} - -/* - * Try to allocate a physical channel. When successful, assign it to - * this virtual channel, and initiate the next descriptor. The - * virtual channel lock must be held at this point. - */ -static void s3c24xx_dma_phy_alloc_and_start(struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - struct s3c24xx_dma_phy *phy; - - phy = s3c24xx_dma_get_phy(s3cchan); - if (!phy) { - dev_dbg(&s3cdma->pdev->dev, "no physical channel available for xfer on %s\n", - s3cchan->name); - s3cchan->state = S3C24XX_DMA_CHAN_WAITING; - return; - } - - dev_dbg(&s3cdma->pdev->dev, "allocated physical channel %d for xfer on %s\n", - phy->id, s3cchan->name); - - s3cchan->phy = phy; - s3cchan->state = S3C24XX_DMA_CHAN_RUNNING; - - s3c24xx_dma_start_next_txd(s3cchan); -} - -static void s3c24xx_dma_phy_reassign_start(struct s3c24xx_dma_phy *phy, - struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - - dev_dbg(&s3cdma->pdev->dev, "reassigned physical channel %d for xfer on %s\n", - phy->id, s3cchan->name); - - /* - * We do this without taking the lock; we're really only concerned - * about whether this pointer is NULL or not, and we're guaranteed - * that this will only be called when it _already_ is non-NULL. - */ - phy->serving = s3cchan; - s3cchan->phy = phy; - s3cchan->state = S3C24XX_DMA_CHAN_RUNNING; - s3c24xx_dma_start_next_txd(s3cchan); -} - -/* - * Free a physical DMA channel, potentially reallocating it to another - * virtual channel if we have any pending. - */ -static void s3c24xx_dma_phy_free(struct s3c24xx_dma_chan *s3cchan) -{ - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - struct s3c24xx_dma_chan *p, *next; - -retry: - next = NULL; - - /* Find a waiting virtual channel for the next transfer. */ - list_for_each_entry(p, &s3cdma->memcpy.channels, vc.chan.device_node) - if (p->state == S3C24XX_DMA_CHAN_WAITING) { - next = p; - break; - } - - if (!next) { - list_for_each_entry(p, &s3cdma->slave.channels, - vc.chan.device_node) - if (p->state == S3C24XX_DMA_CHAN_WAITING && - s3c24xx_dma_phy_valid(p, s3cchan->phy)) { - next = p; - break; - } - } - - /* Ensure that the physical channel is stopped */ - s3c24xx_dma_terminate_phy(s3cchan->phy); - - if (next) { - bool success; - - /* - * Eww. We know this isn't going to deadlock - * but lockdep probably doesn't. - */ - spin_lock(&next->vc.lock); - /* Re-check the state now that we have the lock */ - success = next->state == S3C24XX_DMA_CHAN_WAITING; - if (success) - s3c24xx_dma_phy_reassign_start(s3cchan->phy, next); - spin_unlock(&next->vc.lock); - - /* If the state changed, try to find another channel */ - if (!success) - goto retry; - } else { - /* No more jobs, so free up the physical channel */ - s3c24xx_dma_put_phy(s3cchan->phy); - } - - s3cchan->phy = NULL; - s3cchan->state = S3C24XX_DMA_CHAN_IDLE; -} - -static void s3c24xx_dma_desc_free(struct virt_dma_desc *vd) -{ - struct s3c24xx_txd *txd = to_s3c24xx_txd(&vd->tx); - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(vd->tx.chan); - - if (!s3cchan->slave) - dma_descriptor_unmap(&vd->tx); - - s3c24xx_dma_free_txd(txd); -} - -static irqreturn_t s3c24xx_dma_irq(int irq, void *data) -{ - struct s3c24xx_dma_phy *phy = data; - struct s3c24xx_dma_chan *s3cchan = phy->serving; - struct s3c24xx_txd *txd; - - dev_dbg(&phy->host->pdev->dev, "interrupt on channel %d\n", phy->id); - - /* - * Interrupts happen to notify the completion of a transfer and the - * channel should have moved into its stop state already on its own. - * Therefore interrupts on channels not bound to a virtual channel - * should never happen. Nevertheless send a terminate command to the - * channel if the unlikely case happens. - */ - if (unlikely(!s3cchan)) { - dev_err(&phy->host->pdev->dev, "interrupt on unused channel %d\n", - phy->id); - - s3c24xx_dma_terminate_phy(phy); - - return IRQ_HANDLED; - } - - spin_lock(&s3cchan->vc.lock); - txd = s3cchan->at; - if (txd) { - /* when more sg's are in this txd, start the next one */ - if (!list_is_last(txd->at, &txd->dsg_list)) { - txd->at = txd->at->next; - if (txd->cyclic) - vchan_cyclic_callback(&txd->vd); - s3c24xx_dma_start_next_sg(s3cchan, txd); - } else if (!txd->cyclic) { - s3cchan->at = NULL; - vchan_cookie_complete(&txd->vd); - - /* - * And start the next descriptor (if any), - * otherwise free this channel. - */ - if (vchan_next_desc(&s3cchan->vc)) - s3c24xx_dma_start_next_txd(s3cchan); - else - s3c24xx_dma_phy_free(s3cchan); - } else { - vchan_cyclic_callback(&txd->vd); - - /* Cyclic: reset at beginning */ - txd->at = txd->dsg_list.next; - s3c24xx_dma_start_next_sg(s3cchan, txd); - } - } - spin_unlock(&s3cchan->vc.lock); - - return IRQ_HANDLED; -} - -/* - * The DMA ENGINE API - */ - -static int s3c24xx_dma_terminate_all(struct dma_chan *chan) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - LIST_HEAD(head); - unsigned long flags; - int ret; - - spin_lock_irqsave(&s3cchan->vc.lock, flags); - - if (!s3cchan->phy && !s3cchan->at) { - dev_err(&s3cdma->pdev->dev, "trying to terminate already stopped channel %d\n", - s3cchan->id); - ret = -EINVAL; - goto unlock; - } - - s3cchan->state = S3C24XX_DMA_CHAN_IDLE; - - /* Mark physical channel as free */ - if (s3cchan->phy) - s3c24xx_dma_phy_free(s3cchan); - - /* Dequeue current job */ - if (s3cchan->at) { - vchan_terminate_vdesc(&s3cchan->at->vd); - s3cchan->at = NULL; - } - - /* Dequeue jobs not yet fired as well */ - - vchan_get_all_descriptors(&s3cchan->vc, &head); - - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); - - vchan_dma_desc_free_list(&s3cchan->vc, &head); - - return 0; - -unlock: - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); - - return ret; -} - -static void s3c24xx_dma_synchronize(struct dma_chan *chan) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - - vchan_synchronize(&s3cchan->vc); -} - -static void s3c24xx_dma_free_chan_resources(struct dma_chan *chan) -{ - /* Ensure all queued descriptors are freed */ - vchan_free_chan_resources(to_virt_chan(chan)); -} - -static enum dma_status s3c24xx_dma_tx_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *txstate) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - struct s3c24xx_txd *txd; - struct s3c24xx_sg *dsg; - struct virt_dma_desc *vd; - unsigned long flags; - enum dma_status ret; - size_t bytes = 0; - - spin_lock_irqsave(&s3cchan->vc.lock, flags); - ret = dma_cookie_status(chan, cookie, txstate); - - /* - * There's no point calculating the residue if there's - * no txstate to store the value. - */ - if (ret == DMA_COMPLETE || !txstate) { - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); - return ret; - } - - vd = vchan_find_desc(&s3cchan->vc, cookie); - if (vd) { - /* On the issued list, so hasn't been processed yet */ - txd = to_s3c24xx_txd(&vd->tx); - - list_for_each_entry(dsg, &txd->dsg_list, node) - bytes += dsg->len; - } else { - /* - * Currently running, so sum over the pending sg's and - * the currently active one. - */ - txd = s3cchan->at; - - dsg = list_entry(txd->at, struct s3c24xx_sg, node); - list_for_each_entry_from(dsg, &txd->dsg_list, node) - bytes += dsg->len; - - bytes += s3c24xx_dma_getbytes_chan(s3cchan); - } - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); - - /* - * This cookie not complete yet - * Get number of bytes left in the active transactions and queue - */ - dma_set_residue(txstate, bytes); - - /* Whether waiting or running, we're in progress */ - return ret; -} - -/* - * Initialize a descriptor to be used by memcpy submit - */ -static struct dma_async_tx_descriptor *s3c24xx_dma_prep_memcpy( - struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, - size_t len, unsigned long flags) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - struct s3c24xx_txd *txd; - struct s3c24xx_sg *dsg; - int src_mod, dest_mod; - - dev_dbg(&s3cdma->pdev->dev, "prepare memcpy of %zu bytes from %s\n", - len, s3cchan->name); - - if ((len & S3C24XX_DCON_TC_MASK) != len) { - dev_err(&s3cdma->pdev->dev, "memcpy size %zu to large\n", len); - return NULL; - } - - txd = s3c24xx_dma_get_txd(); - if (!txd) - return NULL; - - dsg = kzalloc(sizeof(*dsg), GFP_NOWAIT); - if (!dsg) { - s3c24xx_dma_free_txd(txd); - return NULL; - } - list_add_tail(&dsg->node, &txd->dsg_list); - - dsg->src_addr = src; - dsg->dst_addr = dest; - dsg->len = len; - - /* - * Determine a suitable transfer width. - * The DMA controller cannot fetch/store information which is not - * naturally aligned on the bus, i.e., a 4 byte fetch must start at - * an address divisible by 4 - more generally addr % width must be 0. - */ - src_mod = src % 4; - dest_mod = dest % 4; - switch (len % 4) { - case 0: - txd->width = (src_mod == 0 && dest_mod == 0) ? 4 : 1; - break; - case 2: - txd->width = ((src_mod == 2 || src_mod == 0) && - (dest_mod == 2 || dest_mod == 0)) ? 2 : 1; - break; - default: - txd->width = 1; - break; - } - - txd->disrcc = S3C24XX_DISRCC_LOC_AHB | S3C24XX_DISRCC_INC_INCREMENT; - txd->didstc = S3C24XX_DIDSTC_LOC_AHB | S3C24XX_DIDSTC_INC_INCREMENT; - txd->dcon |= S3C24XX_DCON_DEMAND | S3C24XX_DCON_SYNC_HCLK | - S3C24XX_DCON_SERV_WHOLE; - - return vchan_tx_prep(&s3cchan->vc, &txd->vd, flags); -} - -static struct dma_async_tx_descriptor *s3c24xx_dma_prep_dma_cyclic( - struct dma_chan *chan, dma_addr_t addr, size_t size, size_t period, - enum dma_transfer_direction direction, unsigned long flags) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - const struct s3c24xx_dma_platdata *pdata = s3cdma->pdata; - struct s3c24xx_dma_channel *cdata = &pdata->channels[s3cchan->id]; - struct s3c24xx_txd *txd; - struct s3c24xx_sg *dsg; - unsigned sg_len; - dma_addr_t slave_addr; - u32 hwcfg = 0; - int i; - - dev_dbg(&s3cdma->pdev->dev, - "prepare cyclic transaction of %zu bytes with period %zu from %s\n", - size, period, s3cchan->name); - - if (!is_slave_direction(direction)) { - dev_err(&s3cdma->pdev->dev, - "direction %d unsupported\n", direction); - return NULL; - } - - txd = s3c24xx_dma_get_txd(); - if (!txd) - return NULL; - - txd->cyclic = 1; - - if (cdata->handshake) - txd->dcon |= S3C24XX_DCON_HANDSHAKE; - - switch (cdata->bus) { - case S3C24XX_DMA_APB: - txd->dcon |= S3C24XX_DCON_SYNC_PCLK; - hwcfg |= S3C24XX_DISRCC_LOC_APB; - break; - case S3C24XX_DMA_AHB: - txd->dcon |= S3C24XX_DCON_SYNC_HCLK; - hwcfg |= S3C24XX_DISRCC_LOC_AHB; - break; - } - - /* - * Always assume our peripheral desintation is a fixed - * address in memory. - */ - hwcfg |= S3C24XX_DISRCC_INC_FIXED; - - /* - * Individual dma operations are requested by the slave, - * so serve only single atomic operations (S3C24XX_DCON_SERV_SINGLE). - */ - txd->dcon |= S3C24XX_DCON_SERV_SINGLE; - - if (direction == DMA_MEM_TO_DEV) { - txd->disrcc = S3C24XX_DISRCC_LOC_AHB | - S3C24XX_DISRCC_INC_INCREMENT; - txd->didstc = hwcfg; - slave_addr = s3cchan->cfg.dst_addr; - txd->width = s3cchan->cfg.dst_addr_width; - } else { - txd->disrcc = hwcfg; - txd->didstc = S3C24XX_DIDSTC_LOC_AHB | - S3C24XX_DIDSTC_INC_INCREMENT; - slave_addr = s3cchan->cfg.src_addr; - txd->width = s3cchan->cfg.src_addr_width; - } - - sg_len = size / period; - - for (i = 0; i < sg_len; i++) { - dsg = kzalloc(sizeof(*dsg), GFP_NOWAIT); - if (!dsg) { - s3c24xx_dma_free_txd(txd); - return NULL; - } - list_add_tail(&dsg->node, &txd->dsg_list); - - dsg->len = period; - /* Check last period length */ - if (i == sg_len - 1) - dsg->len = size - period * i; - if (direction == DMA_MEM_TO_DEV) { - dsg->src_addr = addr + period * i; - dsg->dst_addr = slave_addr; - } else { /* DMA_DEV_TO_MEM */ - dsg->src_addr = slave_addr; - dsg->dst_addr = addr + period * i; - } - } - - return vchan_tx_prep(&s3cchan->vc, &txd->vd, flags); -} - -static struct dma_async_tx_descriptor *s3c24xx_dma_prep_slave_sg( - struct dma_chan *chan, struct scatterlist *sgl, - unsigned int sg_len, enum dma_transfer_direction direction, - unsigned long flags, void *context) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - struct s3c24xx_dma_engine *s3cdma = s3cchan->host; - const struct s3c24xx_dma_platdata *pdata = s3cdma->pdata; - struct s3c24xx_dma_channel *cdata = &pdata->channels[s3cchan->id]; - struct s3c24xx_txd *txd; - struct s3c24xx_sg *dsg; - struct scatterlist *sg; - dma_addr_t slave_addr; - u32 hwcfg = 0; - int tmp; - - dev_dbg(&s3cdma->pdev->dev, "prepare transaction of %d bytes from %s\n", - sg_dma_len(sgl), s3cchan->name); - - txd = s3c24xx_dma_get_txd(); - if (!txd) - return NULL; - - if (cdata->handshake) - txd->dcon |= S3C24XX_DCON_HANDSHAKE; - - switch (cdata->bus) { - case S3C24XX_DMA_APB: - txd->dcon |= S3C24XX_DCON_SYNC_PCLK; - hwcfg |= S3C24XX_DISRCC_LOC_APB; - break; - case S3C24XX_DMA_AHB: - txd->dcon |= S3C24XX_DCON_SYNC_HCLK; - hwcfg |= S3C24XX_DISRCC_LOC_AHB; - break; - } - - /* - * Always assume our peripheral desintation is a fixed - * address in memory. - */ - hwcfg |= S3C24XX_DISRCC_INC_FIXED; - - /* - * Individual dma operations are requested by the slave, - * so serve only single atomic operations (S3C24XX_DCON_SERV_SINGLE). - */ - txd->dcon |= S3C24XX_DCON_SERV_SINGLE; - - if (direction == DMA_MEM_TO_DEV) { - txd->disrcc = S3C24XX_DISRCC_LOC_AHB | - S3C24XX_DISRCC_INC_INCREMENT; - txd->didstc = hwcfg; - slave_addr = s3cchan->cfg.dst_addr; - txd->width = s3cchan->cfg.dst_addr_width; - } else if (direction == DMA_DEV_TO_MEM) { - txd->disrcc = hwcfg; - txd->didstc = S3C24XX_DIDSTC_LOC_AHB | - S3C24XX_DIDSTC_INC_INCREMENT; - slave_addr = s3cchan->cfg.src_addr; - txd->width = s3cchan->cfg.src_addr_width; - } else { - s3c24xx_dma_free_txd(txd); - dev_err(&s3cdma->pdev->dev, - "direction %d unsupported\n", direction); - return NULL; - } - - for_each_sg(sgl, sg, sg_len, tmp) { - dsg = kzalloc(sizeof(*dsg), GFP_NOWAIT); - if (!dsg) { - s3c24xx_dma_free_txd(txd); - return NULL; - } - list_add_tail(&dsg->node, &txd->dsg_list); - - dsg->len = sg_dma_len(sg); - if (direction == DMA_MEM_TO_DEV) { - dsg->src_addr = sg_dma_address(sg); - dsg->dst_addr = slave_addr; - } else { /* DMA_DEV_TO_MEM */ - dsg->src_addr = slave_addr; - dsg->dst_addr = sg_dma_address(sg); - } - } - - return vchan_tx_prep(&s3cchan->vc, &txd->vd, flags); -} - -/* - * Slave transactions callback to the slave device to allow - * synchronization of slave DMA signals with the DMAC enable - */ -static void s3c24xx_dma_issue_pending(struct dma_chan *chan) -{ - struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); - unsigned long flags; - - spin_lock_irqsave(&s3cchan->vc.lock, flags); - if (vchan_issue_pending(&s3cchan->vc)) { - if (!s3cchan->phy && s3cchan->state != S3C24XX_DMA_CHAN_WAITING) - s3c24xx_dma_phy_alloc_and_start(s3cchan); - } - spin_unlock_irqrestore(&s3cchan->vc.lock, flags); -} - -/* - * Bringup and teardown - */ - -/* - * Initialise the DMAC memcpy/slave channels. - * Make a local wrapper to hold required data - */ -static int s3c24xx_dma_init_virtual_channels(struct s3c24xx_dma_engine *s3cdma, - struct dma_device *dmadev, unsigned int channels, bool slave) -{ - struct s3c24xx_dma_chan *chan; - int i; - - INIT_LIST_HEAD(&dmadev->channels); - - /* - * Register as many memcpy as we have physical channels, - * we won't always be able to use all but the code will have - * to cope with that situation. - */ - for (i = 0; i < channels; i++) { - chan = devm_kzalloc(dmadev->dev, sizeof(*chan), GFP_KERNEL); - if (!chan) - return -ENOMEM; - - chan->id = i; - chan->host = s3cdma; - chan->state = S3C24XX_DMA_CHAN_IDLE; - - if (slave) { - chan->slave = true; - chan->name = kasprintf(GFP_KERNEL, "slave%d", i); - if (!chan->name) - return -ENOMEM; - } else { - chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i); - if (!chan->name) - return -ENOMEM; - } - dev_dbg(dmadev->dev, - "initialize virtual channel \"%s\"\n", - chan->name); - - chan->vc.desc_free = s3c24xx_dma_desc_free; - vchan_init(&chan->vc, dmadev); - } - dev_info(dmadev->dev, "initialized %d virtual %s channels\n", - i, slave ? "slave" : "memcpy"); - return i; -} - -static void s3c24xx_dma_free_virtual_channels(struct dma_device *dmadev) -{ - struct s3c24xx_dma_chan *chan = NULL; - struct s3c24xx_dma_chan *next; - - list_for_each_entry_safe(chan, - next, &dmadev->channels, vc.chan.device_node) { - list_del(&chan->vc.chan.device_node); - tasklet_kill(&chan->vc.task); - } -} - -/* s3c2410, s3c2440 and s3c2442 have a 0x40 stride without separate clocks */ -static struct soc_data soc_s3c2410 = { - .stride = 0x40, - .has_reqsel = false, - .has_clocks = false, -}; - -/* s3c2412 and s3c2413 have a 0x40 stride and dmareqsel mechanism */ -static struct soc_data soc_s3c2412 = { - .stride = 0x40, - .has_reqsel = true, - .has_clocks = true, -}; - -/* s3c2443 and following have a 0x100 stride and dmareqsel mechanism */ -static struct soc_data soc_s3c2443 = { - .stride = 0x100, - .has_reqsel = true, - .has_clocks = true, -}; - -static const struct platform_device_id s3c24xx_dma_driver_ids[] = { - { - .name = "s3c2410-dma", - .driver_data = (kernel_ulong_t)&soc_s3c2410, - }, { - .name = "s3c2412-dma", - .driver_data = (kernel_ulong_t)&soc_s3c2412, - }, { - .name = "s3c2443-dma", - .driver_data = (kernel_ulong_t)&soc_s3c2443, - }, - { }, -}; - -static struct soc_data *s3c24xx_dma_get_soc_data(struct platform_device *pdev) -{ - return (struct soc_data *) - platform_get_device_id(pdev)->driver_data; -} - -static int s3c24xx_dma_probe(struct platform_device *pdev) -{ - const struct s3c24xx_dma_platdata *pdata = dev_get_platdata(&pdev->dev); - struct s3c24xx_dma_engine *s3cdma; - struct soc_data *sdata; - struct resource *res; - int ret; - int i; - - if (!pdata) { - dev_err(&pdev->dev, "platform data missing\n"); - return -ENODEV; - } - - /* Basic sanity check */ - if (pdata->num_phy_channels > MAX_DMA_CHANNELS) { - dev_err(&pdev->dev, "too many dma channels %d, max %d\n", - pdata->num_phy_channels, MAX_DMA_CHANNELS); - return -EINVAL; - } - - sdata = s3c24xx_dma_get_soc_data(pdev); - if (!sdata) - return -EINVAL; - - s3cdma = devm_kzalloc(&pdev->dev, sizeof(*s3cdma), GFP_KERNEL); - if (!s3cdma) - return -ENOMEM; - - s3cdma->pdev = pdev; - s3cdma->pdata = pdata; - s3cdma->sdata = sdata; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - s3cdma->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(s3cdma->base)) - return PTR_ERR(s3cdma->base); - - s3cdma->phy_chans = devm_kcalloc(&pdev->dev, - pdata->num_phy_channels, - sizeof(struct s3c24xx_dma_phy), - GFP_KERNEL); - if (!s3cdma->phy_chans) - return -ENOMEM; - - /* acquire irqs and clocks for all physical channels */ - for (i = 0; i < pdata->num_phy_channels; i++) { - struct s3c24xx_dma_phy *phy = &s3cdma->phy_chans[i]; - char clk_name[6]; - - phy->id = i; - phy->base = s3cdma->base + (i * sdata->stride); - phy->host = s3cdma; - - phy->irq = platform_get_irq(pdev, i); - if (phy->irq < 0) - continue; - - ret = devm_request_irq(&pdev->dev, phy->irq, s3c24xx_dma_irq, - 0, pdev->name, phy); - if (ret) { - dev_err(&pdev->dev, "Unable to request irq for channel %d, error %d\n", - i, ret); - continue; - } - - if (sdata->has_clocks) { - sprintf(clk_name, "dma.%d", i); - phy->clk = devm_clk_get(&pdev->dev, clk_name); - if (IS_ERR(phy->clk) && sdata->has_clocks) { - dev_err(&pdev->dev, "unable to acquire clock for channel %d, error %lu\n", - i, PTR_ERR(phy->clk)); - continue; - } - - ret = clk_prepare(phy->clk); - if (ret) { - dev_err(&pdev->dev, "clock for phy %d failed, error %d\n", - i, ret); - continue; - } - } - - spin_lock_init(&phy->lock); - phy->valid = true; - - dev_dbg(&pdev->dev, "physical channel %d is %s\n", - i, s3c24xx_dma_phy_busy(phy) ? "BUSY" : "FREE"); - } - - /* Initialize memcpy engine */ - dma_cap_set(DMA_MEMCPY, s3cdma->memcpy.cap_mask); - dma_cap_set(DMA_PRIVATE, s3cdma->memcpy.cap_mask); - s3cdma->memcpy.dev = &pdev->dev; - s3cdma->memcpy.device_free_chan_resources = - s3c24xx_dma_free_chan_resources; - s3cdma->memcpy.device_prep_dma_memcpy = s3c24xx_dma_prep_memcpy; - s3cdma->memcpy.device_tx_status = s3c24xx_dma_tx_status; - s3cdma->memcpy.device_issue_pending = s3c24xx_dma_issue_pending; - s3cdma->memcpy.device_config = s3c24xx_dma_set_runtime_config; - s3cdma->memcpy.device_terminate_all = s3c24xx_dma_terminate_all; - s3cdma->memcpy.device_synchronize = s3c24xx_dma_synchronize; - - /* Initialize slave engine for SoC internal dedicated peripherals */ - dma_cap_set(DMA_SLAVE, s3cdma->slave.cap_mask); - dma_cap_set(DMA_CYCLIC, s3cdma->slave.cap_mask); - dma_cap_set(DMA_PRIVATE, s3cdma->slave.cap_mask); - s3cdma->slave.dev = &pdev->dev; - s3cdma->slave.device_free_chan_resources = - s3c24xx_dma_free_chan_resources; - s3cdma->slave.device_tx_status = s3c24xx_dma_tx_status; - s3cdma->slave.device_issue_pending = s3c24xx_dma_issue_pending; - s3cdma->slave.device_prep_slave_sg = s3c24xx_dma_prep_slave_sg; - s3cdma->slave.device_prep_dma_cyclic = s3c24xx_dma_prep_dma_cyclic; - s3cdma->slave.device_config = s3c24xx_dma_set_runtime_config; - s3cdma->slave.device_terminate_all = s3c24xx_dma_terminate_all; - s3cdma->slave.device_synchronize = s3c24xx_dma_synchronize; - s3cdma->slave.filter.map = pdata->slave_map; - s3cdma->slave.filter.mapcnt = pdata->slavecnt; - s3cdma->slave.filter.fn = s3c24xx_dma_filter; - - /* Register as many memcpy channels as there are physical channels */ - ret = s3c24xx_dma_init_virtual_channels(s3cdma, &s3cdma->memcpy, - pdata->num_phy_channels, false); - if (ret <= 0) { - dev_warn(&pdev->dev, - "%s failed to enumerate memcpy channels - %d\n", - __func__, ret); - goto err_memcpy; - } - - /* Register slave channels */ - ret = s3c24xx_dma_init_virtual_channels(s3cdma, &s3cdma->slave, - pdata->num_channels, true); - if (ret <= 0) { - dev_warn(&pdev->dev, - "%s failed to enumerate slave channels - %d\n", - __func__, ret); - goto err_slave; - } - - ret = dma_async_device_register(&s3cdma->memcpy); - if (ret) { - dev_warn(&pdev->dev, - "%s failed to register memcpy as an async device - %d\n", - __func__, ret); - goto err_memcpy_reg; - } - - ret = dma_async_device_register(&s3cdma->slave); - if (ret) { - dev_warn(&pdev->dev, - "%s failed to register slave as an async device - %d\n", - __func__, ret); - goto err_slave_reg; - } - - platform_set_drvdata(pdev, s3cdma); - dev_info(&pdev->dev, "Loaded dma driver with %d physical channels\n", - pdata->num_phy_channels); - - return 0; - -err_slave_reg: - dma_async_device_unregister(&s3cdma->memcpy); -err_memcpy_reg: - s3c24xx_dma_free_virtual_channels(&s3cdma->slave); -err_slave: - s3c24xx_dma_free_virtual_channels(&s3cdma->memcpy); -err_memcpy: - if (sdata->has_clocks) - for (i = 0; i < pdata->num_phy_channels; i++) { - struct s3c24xx_dma_phy *phy = &s3cdma->phy_chans[i]; - if (phy->valid) - clk_unprepare(phy->clk); - } - - return ret; -} - -static void s3c24xx_dma_free_irq(struct platform_device *pdev, - struct s3c24xx_dma_engine *s3cdma) -{ - int i; - - for (i = 0; i < s3cdma->pdata->num_phy_channels; i++) { - struct s3c24xx_dma_phy *phy = &s3cdma->phy_chans[i]; - - devm_free_irq(&pdev->dev, phy->irq, phy); - } -} - -static int s3c24xx_dma_remove(struct platform_device *pdev) -{ - const struct s3c24xx_dma_platdata *pdata = dev_get_platdata(&pdev->dev); - struct s3c24xx_dma_engine *s3cdma = platform_get_drvdata(pdev); - struct soc_data *sdata = s3c24xx_dma_get_soc_data(pdev); - int i; - - dma_async_device_unregister(&s3cdma->slave); - dma_async_device_unregister(&s3cdma->memcpy); - - s3c24xx_dma_free_irq(pdev, s3cdma); - - s3c24xx_dma_free_virtual_channels(&s3cdma->slave); - s3c24xx_dma_free_virtual_channels(&s3cdma->memcpy); - - if (sdata->has_clocks) - for (i = 0; i < pdata->num_phy_channels; i++) { - struct s3c24xx_dma_phy *phy = &s3cdma->phy_chans[i]; - if (phy->valid) - clk_unprepare(phy->clk); - } - - return 0; -} - -static struct platform_driver s3c24xx_dma_driver = { - .driver = { - .name = "s3c24xx-dma", - }, - .id_table = s3c24xx_dma_driver_ids, - .probe = s3c24xx_dma_probe, - .remove = s3c24xx_dma_remove, -}; - -module_platform_driver(s3c24xx_dma_driver); - -bool s3c24xx_dma_filter(struct dma_chan *chan, void *param) -{ - struct s3c24xx_dma_chan *s3cchan; - - if (chan->device->dev->driver != &s3c24xx_dma_driver.driver) - return false; - - s3cchan = to_s3c24xx_dma_chan(chan); - - return s3cchan->id == (uintptr_t)param; -} -EXPORT_SYMBOL(s3c24xx_dma_filter); - -MODULE_DESCRIPTION("S3C24XX DMA Driver"); -MODULE_AUTHOR("Heiko Stuebner"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e9917a45b005..c85726a6831f 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -354,16 +354,6 @@ config GPIO_IMX_SCU def_bool y depends on IMX_SCU -config GPIO_IOP - tristate "Intel IOP GPIO" - depends on ARCH_IOP32X || COMPILE_TEST - select GPIO_GENERIC - help - Say yes here to support the GPIO functionality of a number of Intel - IOP32X or IOP33X series of chips. - - If unsure, say N. - config GPIO_IXP4XX bool "Intel IXP4xx GPIO" depends on ARCH_IXP4XX @@ -1438,13 +1428,6 @@ config GPIO_TWL6040 Say yes here to access the GPO signals of twl6040 audio chip from Texas Instruments. -config GPIO_UCB1400 - tristate "Philips UCB1400 GPIO" - depends on UCB1400_CORE - help - This enables support for the Philips UCB1400 GPIO pins. - The UCB1400 is an AC97 audio codec. - config GPIO_WHISKEY_COVE tristate "GPIO support for Whiskey Cove PMIC" depends on (X86 || COMPILE_TEST) && INTEL_SOC_PMIC_BXTWC diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 010587025fc8..c048ba003367 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -72,7 +72,6 @@ obj-$(CONFIG_GPIO_ICH) += gpio-ich.o obj-$(CONFIG_GPIO_IDIO_16) += gpio-idio-16.o obj-$(CONFIG_GPIO_IDT3243X) += gpio-idt3243x.o obj-$(CONFIG_GPIO_IMX_SCU) += gpio-imx-scu.o -obj-$(CONFIG_GPIO_IOP) += gpio-iop.o obj-$(CONFIG_GPIO_IT87) += gpio-it87.o obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o @@ -166,7 +165,6 @@ obj-$(CONFIG_GPIO_TS4900) += gpio-ts4900.o obj-$(CONFIG_GPIO_TS5500) += gpio-ts5500.o obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o -obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o obj-$(CONFIG_GPIO_UNIPHIER) += gpio-uniphier.o obj-$(CONFIG_GPIO_VF610) += gpio-vf610.o obj-$(CONFIG_GPIO_VIPERBOARD) += gpio-viperboard.o diff --git a/drivers/gpio/gpio-iop.c b/drivers/gpio/gpio-iop.c deleted file mode 100644 index 7390b5ca09e3..000000000000 --- a/drivers/gpio/gpio-iop.c +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/plat-iop/gpio.c - * GPIO handling for Intel IOP3xx processors. - * - * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> - */ - -#include <linux/err.h> -#include <linux/module.h> -#include <linux/gpio/driver.h> -#include <linux/platform_device.h> - -#define IOP3XX_GPOE 0x0000 -#define IOP3XX_GPID 0x0004 -#define IOP3XX_GPOD 0x0008 - -static int iop3xx_gpio_probe(struct platform_device *pdev) -{ - struct gpio_chip *gc; - void __iomem *base; - int err; - - gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); - if (!gc) - return -ENOMEM; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - err = bgpio_init(gc, &pdev->dev, 1, base + IOP3XX_GPID, - base + IOP3XX_GPOD, NULL, NULL, base + IOP3XX_GPOE, 0); - if (err) - return err; - - gc->base = 0; - gc->owner = THIS_MODULE; - gc->label = "gpio-iop"; - - return devm_gpiochip_add_data(&pdev->dev, gc, NULL); -} - -static struct platform_driver iop3xx_gpio_driver = { - .driver = { - .name = "gpio-iop", - }, - .probe = iop3xx_gpio_probe, -}; - -static int __init iop3xx_gpio_init(void) -{ - return platform_driver_register(&iop3xx_gpio_driver); -} -arch_initcall(iop3xx_gpio_init); - -MODULE_DESCRIPTION("GPIO handling for Intel IOP3xx processors"); -MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>"); -MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-ucb1400.c b/drivers/gpio/gpio-ucb1400.c deleted file mode 100644 index 676adf1f198a..000000000000 --- a/drivers/gpio/gpio-ucb1400.c +++ /dev/null @@ -1,85 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Philips UCB1400 GPIO driver - * - * Author: Marek Vasut <marek.vasut@gmail.com> - */ - -#include <linux/module.h> -#include <linux/ucb1400.h> -#include <linux/gpio/driver.h> - -static int ucb1400_gpio_dir_in(struct gpio_chip *gc, unsigned off) -{ - struct ucb1400_gpio *gpio; - gpio = gpiochip_get_data(gc); - ucb1400_gpio_set_direction(gpio->ac97, off, 0); - return 0; -} - -static int ucb1400_gpio_dir_out(struct gpio_chip *gc, unsigned off, int val) -{ - struct ucb1400_gpio *gpio; - gpio = gpiochip_get_data(gc); - ucb1400_gpio_set_direction(gpio->ac97, off, 1); - ucb1400_gpio_set_value(gpio->ac97, off, val); - return 0; -} - -static int ucb1400_gpio_get(struct gpio_chip *gc, unsigned off) -{ - struct ucb1400_gpio *gpio; - - gpio = gpiochip_get_data(gc); - return !!ucb1400_gpio_get_value(gpio->ac97, off); -} - -static void ucb1400_gpio_set(struct gpio_chip *gc, unsigned off, int val) -{ - struct ucb1400_gpio *gpio; - gpio = gpiochip_get_data(gc); - ucb1400_gpio_set_value(gpio->ac97, off, val); -} - -static int ucb1400_gpio_probe(struct platform_device *dev) -{ - struct ucb1400_gpio *ucb = dev_get_platdata(&dev->dev); - int err = 0; - - if (!(ucb && ucb->gpio_offset)) { - err = -EINVAL; - goto err; - } - - platform_set_drvdata(dev, ucb); - - ucb->gc.label = "ucb1400_gpio"; - ucb->gc.base = ucb->gpio_offset; - ucb->gc.ngpio = 10; - ucb->gc.owner = THIS_MODULE; - - ucb->gc.direction_input = ucb1400_gpio_dir_in; - ucb->gc.direction_output = ucb1400_gpio_dir_out; - ucb->gc.get = ucb1400_gpio_get; - ucb->gc.set = ucb1400_gpio_set; - ucb->gc.can_sleep = true; - - err = devm_gpiochip_add_data(&dev->dev, &ucb->gc, ucb); - -err: - return err; - -} - -static struct platform_driver ucb1400_gpio_driver = { - .probe = ucb1400_gpio_probe, - .driver = { - .name = "ucb1400_gpio" - }, -}; - -module_platform_driver(ucb1400_gpio_driver); - -MODULE_DESCRIPTION("Philips UCB1400 GPIO driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:ucb1400_gpio"); diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 3176c33af6c6..497cbfb460e5 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1749,23 +1749,6 @@ config SENSORS_SHTC1 This driver can also be built as a module. If so, the module will be called shtc1. -config SENSORS_S3C - tristate "Samsung built-in ADC" - depends on S3C_ADC - help - If you say yes here you get support for the on-board ADCs of - the Samsung S3C24XX, S3C64XX and other series of SoC - - This driver can also be built as a module. If so, the module - will be called s3c-hwmon. - -config SENSORS_S3C_RAW - bool "Include raw channel attributes in sysfs" - depends on SENSORS_S3C - help - Say Y here if you want to include raw copies of all the ADC - channels in sysfs. - config SENSORS_SIS5595 tristate "Silicon Integrated Systems Corp. SiS5595" depends on PCI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index e2e4e87b282f..4f71d9807dae 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -174,7 +174,6 @@ obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o -obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o diff --git a/drivers/hwmon/s3c-hwmon.c b/drivers/hwmon/s3c-hwmon.c deleted file mode 100644 index 70ae665db477..000000000000 --- a/drivers/hwmon/s3c-hwmon.c +++ /dev/null @@ -1,379 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* linux/drivers/hwmon/s3c-hwmon.c - * - * Copyright (C) 2005, 2008, 2009 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX/S3C64XX ADC hwmon support -*/ - -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/io.h> -#include <linux/init.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -#include <linux/hwmon.h> -#include <linux/hwmon-sysfs.h> - -#include <linux/soc/samsung/s3c-adc.h> -#include <linux/platform_data/hwmon-s3c.h> - -struct s3c_hwmon_attr { - struct sensor_device_attribute in; - struct sensor_device_attribute label; - char in_name[12]; - char label_name[12]; -}; - -/** - * struct s3c_hwmon - ADC hwmon client information - * @lock: Access lock to serialise the conversions. - * @client: The client we registered with the S3C ADC core. - * @hwmon_dev: The hwmon device we created. - * @attr: The holders for the channel attributes. -*/ -struct s3c_hwmon { - struct mutex lock; - struct s3c_adc_client *client; - struct device *hwmon_dev; - - struct s3c_hwmon_attr attrs[8]; -}; - -/** - * s3c_hwmon_read_ch - read a value from a given adc channel. - * @dev: The device. - * @hwmon: Our state. - * @channel: The channel we're reading from. - * - * Read a value from the @channel with the proper locking and sleep until - * either the read completes or we timeout awaiting the ADC core to get - * back to us. - */ -static int s3c_hwmon_read_ch(struct device *dev, - struct s3c_hwmon *hwmon, int channel) -{ - int ret; - - ret = mutex_lock_interruptible(&hwmon->lock); - if (ret < 0) - return ret; - - dev_dbg(dev, "reading channel %d\n", channel); - - ret = s3c_adc_read(hwmon->client, channel); - mutex_unlock(&hwmon->lock); - - return ret; -} - -#ifdef CONFIG_SENSORS_S3C_RAW -/** - * s3c_hwmon_show_raw - show a conversion from the raw channel number. - * @dev: The device that the attribute belongs to. - * @attr: The attribute being read. - * @buf: The result buffer. - * - * This show deals with the raw attribute, registered for each possible - * ADC channel. This does a conversion and returns the raw (un-scaled) - * value returned from the hardware. - */ -static ssize_t s3c_hwmon_show_raw(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct s3c_hwmon *adc = dev_get_drvdata(dev); - struct sensor_device_attribute *sa = to_sensor_dev_attr(attr); - int ret; - - ret = s3c_hwmon_read_ch(dev, adc, sa->index); - - return (ret < 0) ? ret : snprintf(buf, PAGE_SIZE, "%d\n", ret); -} - -static SENSOR_DEVICE_ATTR(adc0_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 0); -static SENSOR_DEVICE_ATTR(adc1_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 1); -static SENSOR_DEVICE_ATTR(adc2_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 2); -static SENSOR_DEVICE_ATTR(adc3_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 3); -static SENSOR_DEVICE_ATTR(adc4_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 4); -static SENSOR_DEVICE_ATTR(adc5_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 5); -static SENSOR_DEVICE_ATTR(adc6_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 6); -static SENSOR_DEVICE_ATTR(adc7_raw, S_IRUGO, s3c_hwmon_show_raw, NULL, 7); - -static struct attribute *s3c_hwmon_attrs[9] = { - &sensor_dev_attr_adc0_raw.dev_attr.attr, - &sensor_dev_attr_adc1_raw.dev_attr.attr, - &sensor_dev_attr_adc2_raw.dev_attr.attr, - &sensor_dev_attr_adc3_raw.dev_attr.attr, - &sensor_dev_attr_adc4_raw.dev_attr.attr, - &sensor_dev_attr_adc5_raw.dev_attr.attr, - &sensor_dev_attr_adc6_raw.dev_attr.attr, - &sensor_dev_attr_adc7_raw.dev_attr.attr, - NULL, -}; - -static struct attribute_group s3c_hwmon_attrgroup = { - .attrs = s3c_hwmon_attrs, -}; - -static inline int s3c_hwmon_add_raw(struct device *dev) -{ - return sysfs_create_group(&dev->kobj, &s3c_hwmon_attrgroup); -} - -static inline void s3c_hwmon_remove_raw(struct device *dev) -{ - sysfs_remove_group(&dev->kobj, &s3c_hwmon_attrgroup); -} - -#else - -static inline int s3c_hwmon_add_raw(struct device *dev) { return 0; } -static inline void s3c_hwmon_remove_raw(struct device *dev) { } - -#endif /* CONFIG_SENSORS_S3C_RAW */ - -/** - * s3c_hwmon_ch_show - show value of a given channel - * @dev: The device that the attribute belongs to. - * @attr: The attribute being read. - * @buf: The result buffer. - * - * Read a value from the ADC and scale it before returning it to the - * caller. The scale factor is gained from the channel configuration - * passed via the platform data when the device was registered. - */ -static ssize_t s3c_hwmon_ch_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct sensor_device_attribute *sen_attr = to_sensor_dev_attr(attr); - struct s3c_hwmon *hwmon = dev_get_drvdata(dev); - struct s3c_hwmon_pdata *pdata = dev_get_platdata(dev); - struct s3c_hwmon_chcfg *cfg; - int ret; - - cfg = pdata->in[sen_attr->index]; - - ret = s3c_hwmon_read_ch(dev, hwmon, sen_attr->index); - if (ret < 0) - return ret; - - ret *= cfg->mult; - ret = DIV_ROUND_CLOSEST(ret, cfg->div); - - return sysfs_emit(buf, "%d\n", ret); -} - -/** - * s3c_hwmon_label_show - show label name of the given channel. - * @dev: The device that the attribute belongs to. - * @attr: The attribute being read. - * @buf: The result buffer. - * - * Return the label name of a given channel - */ -static ssize_t s3c_hwmon_label_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct sensor_device_attribute *sen_attr = to_sensor_dev_attr(attr); - struct s3c_hwmon_pdata *pdata = dev_get_platdata(dev); - struct s3c_hwmon_chcfg *cfg; - - cfg = pdata->in[sen_attr->index]; - - return sysfs_emit(buf, "%s\n", cfg->name); -} - -/** - * s3c_hwmon_create_attr - create hwmon attribute for given channel. - * @dev: The device to create the attribute on. - * @cfg: The channel configuration passed from the platform data. - * @channel: The ADC channel number to process. - * - * Create the scaled attribute for use with hwmon from the specified - * platform data in @pdata. The sysfs entry is handled by the routine - * s3c_hwmon_ch_show(). - * - * The attribute name is taken from the configuration data if present - * otherwise the name is taken by concatenating in_ with the channel - * number. - */ -static int s3c_hwmon_create_attr(struct device *dev, - struct s3c_hwmon_chcfg *cfg, - struct s3c_hwmon_attr *attrs, - int channel) -{ - struct sensor_device_attribute *attr; - int ret; - - snprintf(attrs->in_name, sizeof(attrs->in_name), "in%d_input", channel); - - attr = &attrs->in; - attr->index = channel; - sysfs_attr_init(&attr->dev_attr.attr); - attr->dev_attr.attr.name = attrs->in_name; - attr->dev_attr.attr.mode = S_IRUGO; - attr->dev_attr.show = s3c_hwmon_ch_show; - - ret = device_create_file(dev, &attr->dev_attr); - if (ret < 0) { - dev_err(dev, "failed to create input attribute\n"); - return ret; - } - - /* if this has a name, add a label */ - if (cfg->name) { - snprintf(attrs->label_name, sizeof(attrs->label_name), - "in%d_label", channel); - - attr = &attrs->label; - attr->index = channel; - sysfs_attr_init(&attr->dev_attr.attr); - attr->dev_attr.attr.name = attrs->label_name; - attr->dev_attr.attr.mode = S_IRUGO; - attr->dev_attr.show = s3c_hwmon_label_show; - - ret = device_create_file(dev, &attr->dev_attr); - if (ret < 0) { - device_remove_file(dev, &attrs->in.dev_attr); - dev_err(dev, "failed to create label attribute\n"); - } - } - - return ret; -} - -static void s3c_hwmon_remove_attr(struct device *dev, - struct s3c_hwmon_attr *attrs) -{ - device_remove_file(dev, &attrs->in.dev_attr); - device_remove_file(dev, &attrs->label.dev_attr); -} - -/** - * s3c_hwmon_probe - device probe entry. - * @dev: The device being probed. -*/ -static int s3c_hwmon_probe(struct platform_device *dev) -{ - struct s3c_hwmon_pdata *pdata = dev_get_platdata(&dev->dev); - struct s3c_hwmon *hwmon; - int ret = 0; - int i; - - if (!pdata) { - dev_err(&dev->dev, "no platform data supplied\n"); - return -EINVAL; - } - - hwmon = devm_kzalloc(&dev->dev, sizeof(struct s3c_hwmon), GFP_KERNEL); - if (hwmon == NULL) - return -ENOMEM; - - platform_set_drvdata(dev, hwmon); - - mutex_init(&hwmon->lock); - - /* Register with the core ADC driver. */ - - hwmon->client = s3c_adc_register(dev, NULL, NULL, 0); - if (IS_ERR(hwmon->client)) { - dev_err(&dev->dev, "cannot register adc\n"); - return PTR_ERR(hwmon->client); - } - - /* add attributes for our adc devices. */ - - ret = s3c_hwmon_add_raw(&dev->dev); - if (ret) - goto err_registered; - - /* register with the hwmon core */ - - hwmon->hwmon_dev = hwmon_device_register(&dev->dev); - if (IS_ERR(hwmon->hwmon_dev)) { - dev_err(&dev->dev, "error registering with hwmon\n"); - ret = PTR_ERR(hwmon->hwmon_dev); - goto err_raw_attribute; - } - - for (i = 0; i < ARRAY_SIZE(pdata->in); i++) { - struct s3c_hwmon_chcfg *cfg = pdata->in[i]; - - if (!cfg) - continue; - - if (cfg->mult >= 0x10000) - dev_warn(&dev->dev, - "channel %d multiplier too large\n", - i); - - if (cfg->div == 0) { - dev_err(&dev->dev, "channel %d divider zero\n", i); - continue; - } - - ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i], - &hwmon->attrs[i], i); - if (ret) { - dev_err(&dev->dev, - "error creating channel %d\n", i); - - for (i--; i >= 0; i--) - s3c_hwmon_remove_attr(&dev->dev, - &hwmon->attrs[i]); - - goto err_hwmon_register; - } - } - - return 0; - - err_hwmon_register: - hwmon_device_unregister(hwmon->hwmon_dev); - - err_raw_attribute: - s3c_hwmon_remove_raw(&dev->dev); - - err_registered: - s3c_adc_release(hwmon->client); - - return ret; -} - -static int s3c_hwmon_remove(struct platform_device *dev) -{ - struct s3c_hwmon *hwmon = platform_get_drvdata(dev); - int i; - - s3c_hwmon_remove_raw(&dev->dev); - - for (i = 0; i < ARRAY_SIZE(hwmon->attrs); i++) - s3c_hwmon_remove_attr(&dev->dev, &hwmon->attrs[i]); - - hwmon_device_unregister(hwmon->hwmon_dev); - s3c_adc_release(hwmon->client); - - return 0; -} - -static struct platform_driver s3c_hwmon_driver = { - .driver = { - .name = "s3c-hwmon", - }, - .probe = s3c_hwmon_probe, - .remove = s3c_hwmon_remove, -}; - -module_platform_driver(s3c_hwmon_driver); - -MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); -MODULE_DESCRIPTION("S3C ADC HWMon driver"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:s3c-hwmon"); diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index a7bfddf08fa7..d4975444a32d 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -723,11 +723,11 @@ config I2C_IMX_LPI2C will be called i2c-imx-lpi2c. config I2C_IOP3XX - tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface" - depends on ARCH_IOP32X || ARCH_IXP4XX || COMPILE_TEST + tristate "Intel IXP4xx on-chip I2C interface" + depends on ARCH_IXP4XX || COMPILE_TEST help Say Y here if you want to use the IIC bus controller on - the Intel IOPx3xx I/O Processors or IXP4xx Network Processors. + the Intel IXP4xx Network Processors. This driver can also be built as a module. If so, the module will be called i2c-iop3xx. @@ -874,7 +874,7 @@ config I2C_OCORES config I2C_OMAP tristate "OMAP I2C adapter" depends on ARCH_OMAP || ARCH_K3 || COMPILE_TEST - default y if MACH_OMAP_H3 || MACH_OMAP_OSK + default MACH_OMAP_OSK help If you say yes to this option, support will be included for the I2C interface on the Texas Instruments OMAP1/2 family of processors. @@ -1010,8 +1010,7 @@ config I2C_RZV2M config I2C_S3C2410 tristate "S3C/Exynos I2C Driver" - depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || \ - ARCH_S5PV210 || COMPILE_TEST + depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || COMPILE_TEST help Say Y here to include support for I2C controller in the Samsung SoCs (S3C, S5Pv210, Exynos). diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 36dab9cd208c..45e9df81345a 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -116,9 +116,6 @@ struct s3c24xx_i2c { struct s3c2410_platform_i2c *pdata; struct gpio_desc *gpios[2]; struct pinctrl *pctrl; -#if defined(CONFIG_ARM_S3C24XX_CPUFREQ) - struct notifier_block freq_transition; -#endif struct regmap *sysreg; unsigned int sys_i2c_cfg; }; @@ -885,65 +882,6 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) return 0; } -#if defined(CONFIG_ARM_S3C24XX_CPUFREQ) - -#define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition) - -static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct s3c24xx_i2c *i2c = freq_to_i2c(nb); - unsigned int got; - int delta_f; - int ret; - - delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; - - /* if we're post-change and the input clock has slowed down - * or at pre-change and the clock is about to speed up, then - * adjust our clock rate. <0 is slow, >0 speedup. - */ - - if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) || - (val == CPUFREQ_PRECHANGE && delta_f > 0)) { - i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); - ret = s3c24xx_i2c_clockrate(i2c, &got); - i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); - - if (ret < 0) - dev_err(i2c->dev, "cannot find frequency (%d)\n", ret); - else - dev_info(i2c->dev, "setting freq %d\n", got); - } - - return 0; -} - -static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) -{ - i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition; - - return cpufreq_register_notifier(&i2c->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) -{ - cpufreq_unregister_notifier(&i2c->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) -{ - return 0; -} - -static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) -{ -} -#endif - #ifdef CONFIG_OF static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) { @@ -1152,13 +1090,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) } } - ret = s3c24xx_i2c_register_cpufreq(i2c); - if (ret < 0) { - dev_err(&pdev->dev, "failed to register cpufreq notifier\n"); - clk_unprepare(i2c->clk); - return ret; - } - /* * Note, previous versions of the driver used i2c_add_adapter() * to add the bus at any number. We now pass the bus number via @@ -1175,7 +1106,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) ret = i2c_add_numbered_adapter(&i2c->adap); if (ret < 0) { pm_runtime_disable(&pdev->dev); - s3c24xx_i2c_deregister_cpufreq(i2c); clk_unprepare(i2c->clk); return ret; } @@ -1192,8 +1122,6 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); - s3c24xx_i2c_deregister_cpufreq(i2c); - i2c_del_adapter(&i2c->adap); return 0; diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 63f80d747cbd..99cd305b59d9 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -452,11 +452,11 @@ config EP93XX_ADC config EXYNOS_ADC tristate "Exynos ADC driver support" - depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST) + depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || (OF && COMPILE_TEST) depends on HAS_IOMEM help - Driver for the ADC block found in the Samsung S3C (S3C2410, S3C2416, - S3C2440, S3C2443, S3C6410), S5Pv210 and Exynos SoCs. + Driver for the ADC block found in the Samsung S3C6410, S5Pv210 and + Exynos SoCs. Choose Y here only if you build for such Samsung SoC. To compile this driver as a module, choose M here: the module will be diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 84490915ae4d..d98650426dc2 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -550,15 +550,6 @@ config KEYBOARD_PXA27x To compile this driver as a module, choose M here: the module will be called pxa27x_keypad. -config KEYBOARD_PXA930_ROTARY - tristate "PXA930/PXA935 Enhanced Rotary Controller Support" - depends on CPU_PXA930 || CPU_PXA935 - help - Enable support for PXA930/PXA935 Enhanced Rotary Controller. - - To compile this driver as a module, choose M here: the - module will be called pxa930_rotary. - config KEYBOARD_PMIC8XXX tristate "Qualcomm PMIC8XXX keypad support" depends on MFD_PM8XXX @@ -657,16 +648,6 @@ config KEYBOARD_SUN4I_LRADC To compile this driver as a module, choose M here: the module will be called sun4i-lradc-keys. -config KEYBOARD_DAVINCI - tristate "TI DaVinci Key Scan" - depends on ARCH_DAVINCI_DM365 - help - Say Y to enable keypad module support for the TI DaVinci - platforms (DM365). - - To compile this driver as a module, choose M here: the - module will be called davinci_keyscan. - config KEYBOARD_IPAQ_MICRO tristate "Buttons on Micro SoC (iPaq h3100,h3600,h3700)" depends on MFD_IPAQ_MICRO diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile index 5f67196bb2c1..aecef00c5d09 100644 --- a/drivers/input/keyboard/Makefile +++ b/drivers/input/keyboard/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_KEYBOARD_CAP11XX) += cap11xx.o obj-$(CONFIG_KEYBOARD_CLPS711X) += clps711x-keypad.o obj-$(CONFIG_KEYBOARD_CROS_EC) += cros_ec_keyb.o obj-$(CONFIG_KEYBOARD_CYPRESS_SF) += cypress-sf.o -obj-$(CONFIG_KEYBOARD_DAVINCI) += davinci_keyscan.o obj-$(CONFIG_KEYBOARD_DLINK_DIR685) += dlink-dir685-touchkeys.o obj-$(CONFIG_KEYBOARD_EP93XX) += ep93xx_keypad.o obj-$(CONFIG_KEYBOARD_GOLDFISH_EVENTS) += goldfish_events.o @@ -55,7 +54,6 @@ obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o obj-$(CONFIG_KEYBOARD_PINEPHONE) += pinephone-keyboard.o obj-$(CONFIG_KEYBOARD_PMIC8XXX) += pmic8xxx-keypad.o obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keypad.o -obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o obj-$(CONFIG_KEYBOARD_QT1050) += qt1050.o obj-$(CONFIG_KEYBOARD_QT1070) += qt1070.o obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o diff --git a/drivers/input/keyboard/davinci_keyscan.c b/drivers/input/keyboard/davinci_keyscan.c deleted file mode 100644 index f489cd585b33..000000000000 --- a/drivers/input/keyboard/davinci_keyscan.c +++ /dev/null @@ -1,315 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * DaVinci Key Scan Driver for TI platforms - * - * Copyright (C) 2009 Texas Instruments, Inc - * - * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com> - * - * Initial Code: Sandeep Paulraj <s-paulraj@ti.com> - */ -#include <linux/module.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/types.h> -#include <linux/input.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/errno.h> -#include <linux/slab.h> - -#include <linux/platform_data/keyscan-davinci.h> - -/* Key scan registers */ -#define DAVINCI_KEYSCAN_KEYCTRL 0x0000 -#define DAVINCI_KEYSCAN_INTENA 0x0004 -#define DAVINCI_KEYSCAN_INTFLAG 0x0008 -#define DAVINCI_KEYSCAN_INTCLR 0x000c -#define DAVINCI_KEYSCAN_STRBWIDTH 0x0010 -#define DAVINCI_KEYSCAN_INTERVAL 0x0014 -#define DAVINCI_KEYSCAN_CONTTIME 0x0018 -#define DAVINCI_KEYSCAN_CURRENTST 0x001c -#define DAVINCI_KEYSCAN_PREVSTATE 0x0020 -#define DAVINCI_KEYSCAN_EMUCTRL 0x0024 -#define DAVINCI_KEYSCAN_IODFTCTRL 0x002c - -/* Key Control Register (KEYCTRL) */ -#define DAVINCI_KEYSCAN_KEYEN 0x00000001 -#define DAVINCI_KEYSCAN_PREVMODE 0x00000002 -#define DAVINCI_KEYSCAN_CHATOFF 0x00000004 -#define DAVINCI_KEYSCAN_AUTODET 0x00000008 -#define DAVINCI_KEYSCAN_SCANMODE 0x00000010 -#define DAVINCI_KEYSCAN_OUTTYPE 0x00000020 - -/* Masks for the interrupts */ -#define DAVINCI_KEYSCAN_INT_CONT 0x00000008 -#define DAVINCI_KEYSCAN_INT_OFF 0x00000004 -#define DAVINCI_KEYSCAN_INT_ON 0x00000002 -#define DAVINCI_KEYSCAN_INT_CHANGE 0x00000001 -#define DAVINCI_KEYSCAN_INT_ALL 0x0000000f - -struct davinci_ks { - struct input_dev *input; - struct davinci_ks_platform_data *pdata; - int irq; - void __iomem *base; - resource_size_t pbase; - size_t base_size; - unsigned short keymap[]; -}; - -/* Initializing the kp Module */ -static int __init davinci_ks_initialize(struct davinci_ks *davinci_ks) -{ - struct device *dev = &davinci_ks->input->dev; - struct davinci_ks_platform_data *pdata = davinci_ks->pdata; - u32 matrix_ctrl; - - /* Enable all interrupts */ - __raw_writel(DAVINCI_KEYSCAN_INT_ALL, - davinci_ks->base + DAVINCI_KEYSCAN_INTENA); - - /* Clear interrupts if any */ - __raw_writel(DAVINCI_KEYSCAN_INT_ALL, - davinci_ks->base + DAVINCI_KEYSCAN_INTCLR); - - /* Setup the scan period = strobe + interval */ - __raw_writel(pdata->strobe, - davinci_ks->base + DAVINCI_KEYSCAN_STRBWIDTH); - __raw_writel(pdata->interval, - davinci_ks->base + DAVINCI_KEYSCAN_INTERVAL); - __raw_writel(0x01, - davinci_ks->base + DAVINCI_KEYSCAN_CONTTIME); - - /* Define matrix type */ - switch (pdata->matrix_type) { - case DAVINCI_KEYSCAN_MATRIX_4X4: - matrix_ctrl = 0; - break; - case DAVINCI_KEYSCAN_MATRIX_5X3: - matrix_ctrl = (1 << 6); - break; - default: - dev_err(dev->parent, "wrong matrix type\n"); - return -EINVAL; - } - - /* Enable key scan module and set matrix type */ - __raw_writel(DAVINCI_KEYSCAN_AUTODET | DAVINCI_KEYSCAN_KEYEN | - matrix_ctrl, davinci_ks->base + DAVINCI_KEYSCAN_KEYCTRL); - - return 0; -} - -static irqreturn_t davinci_ks_interrupt(int irq, void *dev_id) -{ - struct davinci_ks *davinci_ks = dev_id; - struct device *dev = &davinci_ks->input->dev; - unsigned short *keymap = davinci_ks->keymap; - int keymapsize = davinci_ks->pdata->keymapsize; - u32 prev_status, new_status, changed; - bool release; - int keycode = KEY_UNKNOWN; - int i; - - /* Disable interrupt */ - __raw_writel(0x0, davinci_ks->base + DAVINCI_KEYSCAN_INTENA); - - /* Reading previous and new status of the key scan */ - prev_status = __raw_readl(davinci_ks->base + DAVINCI_KEYSCAN_PREVSTATE); - new_status = __raw_readl(davinci_ks->base + DAVINCI_KEYSCAN_CURRENTST); - - changed = prev_status ^ new_status; - - if (changed) { - /* - * It goes through all bits in 'changed' to ensure - * that no key changes are being missed - */ - for (i = 0 ; i < keymapsize; i++) { - if ((changed>>i) & 0x1) { - keycode = keymap[i]; - release = (new_status >> i) & 0x1; - dev_dbg(dev->parent, "key %d %s\n", keycode, - release ? "released" : "pressed"); - input_report_key(davinci_ks->input, keycode, - !release); - input_sync(davinci_ks->input); - } - } - /* Clearing interrupt */ - __raw_writel(DAVINCI_KEYSCAN_INT_ALL, - davinci_ks->base + DAVINCI_KEYSCAN_INTCLR); - } - - /* Enable interrupts */ - __raw_writel(0x1, davinci_ks->base + DAVINCI_KEYSCAN_INTENA); - - return IRQ_HANDLED; -} - -static int __init davinci_ks_probe(struct platform_device *pdev) -{ - struct davinci_ks *davinci_ks; - struct input_dev *key_dev; - struct resource *res, *mem; - struct device *dev = &pdev->dev; - struct davinci_ks_platform_data *pdata = dev_get_platdata(dev); - int error, i; - - if (pdata->device_enable) { - error = pdata->device_enable(dev); - if (error < 0) { - dev_dbg(dev, "device enable function failed\n"); - return error; - } - } - - if (!pdata->keymap) { - dev_dbg(dev, "no keymap from pdata\n"); - return -EINVAL; - } - - davinci_ks = kzalloc(sizeof(struct davinci_ks) + - sizeof(unsigned short) * pdata->keymapsize, GFP_KERNEL); - if (!davinci_ks) { - dev_dbg(dev, "could not allocate memory for private data\n"); - return -ENOMEM; - } - - memcpy(davinci_ks->keymap, pdata->keymap, - sizeof(unsigned short) * pdata->keymapsize); - - key_dev = input_allocate_device(); - if (!key_dev) { - dev_dbg(dev, "could not allocate input device\n"); - error = -ENOMEM; - goto fail1; - } - - davinci_ks->input = key_dev; - - davinci_ks->irq = platform_get_irq(pdev, 0); - if (davinci_ks->irq < 0) { - error = davinci_ks->irq; - goto fail2; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(dev, "no mem resource\n"); - error = -EINVAL; - goto fail2; - } - - davinci_ks->pbase = res->start; - davinci_ks->base_size = resource_size(res); - - mem = request_mem_region(davinci_ks->pbase, davinci_ks->base_size, - pdev->name); - if (!mem) { - dev_err(dev, "key scan registers at %08x are not free\n", - davinci_ks->pbase); - error = -EBUSY; - goto fail2; - } - - davinci_ks->base = ioremap(davinci_ks->pbase, davinci_ks->base_size); - if (!davinci_ks->base) { - dev_err(dev, "can't ioremap MEM resource.\n"); - error = -ENOMEM; - goto fail3; - } - - /* Enable auto repeat feature of Linux input subsystem */ - if (pdata->rep) - __set_bit(EV_REP, key_dev->evbit); - - /* Setup input device */ - __set_bit(EV_KEY, key_dev->evbit); - - /* Setup the platform data */ - davinci_ks->pdata = pdata; - - for (i = 0; i < davinci_ks->pdata->keymapsize; i++) - __set_bit(davinci_ks->pdata->keymap[i], key_dev->keybit); - - key_dev->name = "davinci_keyscan"; - key_dev->phys = "davinci_keyscan/input0"; - key_dev->dev.parent = dev; - key_dev->id.bustype = BUS_HOST; - key_dev->id.vendor = 0x0001; - key_dev->id.product = 0x0001; - key_dev->id.version = 0x0001; - key_dev->keycode = davinci_ks->keymap; - key_dev->keycodesize = sizeof(davinci_ks->keymap[0]); - key_dev->keycodemax = davinci_ks->pdata->keymapsize; - - error = input_register_device(davinci_ks->input); - if (error < 0) { - dev_err(dev, "unable to register davinci key scan device\n"); - goto fail4; - } - - error = request_irq(davinci_ks->irq, davinci_ks_interrupt, - 0, pdev->name, davinci_ks); - if (error < 0) { - dev_err(dev, "unable to register davinci key scan interrupt\n"); - goto fail5; - } - - error = davinci_ks_initialize(davinci_ks); - if (error < 0) { - dev_err(dev, "unable to initialize davinci key scan device\n"); - goto fail6; - } - - platform_set_drvdata(pdev, davinci_ks); - return 0; - -fail6: - free_irq(davinci_ks->irq, davinci_ks); -fail5: - input_unregister_device(davinci_ks->input); - key_dev = NULL; -fail4: - iounmap(davinci_ks->base); -fail3: - release_mem_region(davinci_ks->pbase, davinci_ks->base_size); -fail2: - input_free_device(key_dev); -fail1: - kfree(davinci_ks); - - return error; -} - -static int davinci_ks_remove(struct platform_device *pdev) -{ - struct davinci_ks *davinci_ks = platform_get_drvdata(pdev); - - free_irq(davinci_ks->irq, davinci_ks); - - input_unregister_device(davinci_ks->input); - - iounmap(davinci_ks->base); - release_mem_region(davinci_ks->pbase, davinci_ks->base_size); - - kfree(davinci_ks); - - return 0; -} - -static struct platform_driver davinci_ks_driver = { - .driver = { - .name = "davinci_keyscan", - }, - .remove = davinci_ks_remove, -}; - -module_platform_driver_probe(davinci_ks_driver, davinci_ks_probe); - -MODULE_AUTHOR("Miguel Aguilar"); -MODULE_DESCRIPTION("Texas Instruments DaVinci Key Scan Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/input/keyboard/pxa930_rotary.c b/drivers/input/keyboard/pxa930_rotary.c deleted file mode 100644 index 2fe9dcfe0a6f..000000000000 --- a/drivers/input/keyboard/pxa930_rotary.c +++ /dev/null @@ -1,195 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Driver for the enhanced rotary controller on pxa930 and pxa935 - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/input.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include <linux/platform_data/keyboard-pxa930_rotary.h> - -#define SBCR (0x04) -#define ERCR (0x0c) - -#define SBCR_ERSB (1 << 5) - -struct pxa930_rotary { - struct input_dev *input_dev; - void __iomem *mmio_base; - int last_ercr; - - struct pxa930_rotary_platform_data *pdata; -}; - -static void clear_sbcr(struct pxa930_rotary *r) -{ - uint32_t sbcr = __raw_readl(r->mmio_base + SBCR); - - __raw_writel(sbcr | SBCR_ERSB, r->mmio_base + SBCR); - __raw_writel(sbcr & ~SBCR_ERSB, r->mmio_base + SBCR); -} - -static irqreturn_t rotary_irq(int irq, void *dev_id) -{ - struct pxa930_rotary *r = dev_id; - struct pxa930_rotary_platform_data *pdata = r->pdata; - int ercr, delta, key; - - ercr = __raw_readl(r->mmio_base + ERCR) & 0xf; - clear_sbcr(r); - - delta = ercr - r->last_ercr; - if (delta == 0) - return IRQ_HANDLED; - - r->last_ercr = ercr; - - if (pdata->up_key && pdata->down_key) { - key = (delta > 0) ? pdata->up_key : pdata->down_key; - input_report_key(r->input_dev, key, 1); - input_sync(r->input_dev); - input_report_key(r->input_dev, key, 0); - } else - input_report_rel(r->input_dev, pdata->rel_code, delta); - - input_sync(r->input_dev); - - return IRQ_HANDLED; -} - -static int pxa930_rotary_open(struct input_dev *dev) -{ - struct pxa930_rotary *r = input_get_drvdata(dev); - - clear_sbcr(r); - - return 0; -} - -static void pxa930_rotary_close(struct input_dev *dev) -{ - struct pxa930_rotary *r = input_get_drvdata(dev); - - clear_sbcr(r); -} - -static int pxa930_rotary_probe(struct platform_device *pdev) -{ - struct pxa930_rotary_platform_data *pdata = - dev_get_platdata(&pdev->dev); - struct pxa930_rotary *r; - struct input_dev *input_dev; - struct resource *res; - int irq; - int err; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -ENXIO; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "no I/O memory defined\n"); - return -ENXIO; - } - - if (!pdata) { - dev_err(&pdev->dev, "no platform data defined\n"); - return -EINVAL; - } - - r = kzalloc(sizeof(struct pxa930_rotary), GFP_KERNEL); - if (!r) - return -ENOMEM; - - r->mmio_base = ioremap(res->start, resource_size(res)); - if (r->mmio_base == NULL) { - dev_err(&pdev->dev, "failed to remap IO memory\n"); - err = -ENXIO; - goto failed_free; - } - - r->pdata = pdata; - platform_set_drvdata(pdev, r); - - /* allocate and register the input device */ - input_dev = input_allocate_device(); - if (!input_dev) { - dev_err(&pdev->dev, "failed to allocate input device\n"); - err = -ENOMEM; - goto failed_free_io; - } - - input_dev->name = pdev->name; - input_dev->id.bustype = BUS_HOST; - input_dev->open = pxa930_rotary_open; - input_dev->close = pxa930_rotary_close; - input_dev->dev.parent = &pdev->dev; - - if (pdata->up_key && pdata->down_key) { - __set_bit(pdata->up_key, input_dev->keybit); - __set_bit(pdata->down_key, input_dev->keybit); - __set_bit(EV_KEY, input_dev->evbit); - } else { - __set_bit(pdata->rel_code, input_dev->relbit); - __set_bit(EV_REL, input_dev->evbit); - } - - r->input_dev = input_dev; - input_set_drvdata(input_dev, r); - - err = request_irq(irq, rotary_irq, 0, - "enhanced rotary", r); - if (err) { - dev_err(&pdev->dev, "failed to request IRQ\n"); - goto failed_free_input; - } - - err = input_register_device(input_dev); - if (err) { - dev_err(&pdev->dev, "failed to register input device\n"); - goto failed_free_irq; - } - - return 0; - -failed_free_irq: - free_irq(irq, r); -failed_free_input: - input_free_device(input_dev); -failed_free_io: - iounmap(r->mmio_base); -failed_free: - kfree(r); - return err; -} - -static int pxa930_rotary_remove(struct platform_device *pdev) -{ - struct pxa930_rotary *r = platform_get_drvdata(pdev); - - free_irq(platform_get_irq(pdev, 0), r); - input_unregister_device(r->input_dev); - iounmap(r->mmio_base); - kfree(r); - - return 0; -} - -static struct platform_driver pxa930_rotary_driver = { - .driver = { - .name = "pxa930-rotary", - }, - .probe = pxa930_rotary_probe, - .remove = pxa930_rotary_remove, -}; -module_platform_driver(pxa930_rotary_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Driver for PXA93x Enhanced Rotary Controller"); -MODULE_AUTHOR("Yao Yong <yaoyong@marvell.com>"); diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig index 63c9cda555c3..32cc4c62a716 100644 --- a/drivers/input/mouse/Kconfig +++ b/drivers/input/mouse/Kconfig @@ -393,12 +393,6 @@ config MOUSE_GPIO To compile this driver as a module, choose M here: the module will be called gpio_mouse. -config MOUSE_PXA930_TRKBALL - tristate "PXA930 Trackball mouse" - depends on CPU_PXA930 || CPU_PXA935 - help - Say Y here to support PXA930 Trackball mouse. - config MOUSE_MAPLE tristate "Maple mouse (for the Dreamcast)" depends on MAPLE diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile index e49f08565076..92b3204ce84e 100644 --- a/drivers/input/mouse/Makefile +++ b/drivers/input/mouse/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_MOUSE_MAPLE) += maplemouse.o obj-$(CONFIG_MOUSE_NAVPOINT_PXA27x) += navpoint.o obj-$(CONFIG_MOUSE_PC110PAD) += pc110pad.o obj-$(CONFIG_MOUSE_PS2) += psmouse.o -obj-$(CONFIG_MOUSE_PXA930_TRKBALL) += pxa930_trkball.o obj-$(CONFIG_MOUSE_RISCPC) += rpcmouse.o obj-$(CONFIG_MOUSE_SERIAL) += sermouse.o obj-$(CONFIG_MOUSE_SYNAPTICS_I2C) += synaptics_i2c.o diff --git a/drivers/input/mouse/pxa930_trkball.c b/drivers/input/mouse/pxa930_trkball.c deleted file mode 100644 index f04ba12dbfa8..000000000000 --- a/drivers/input/mouse/pxa930_trkball.c +++ /dev/null @@ -1,250 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * PXA930 track ball mouse driver - * - * Copyright (C) 2007 Marvell International Ltd. - * 2008-02-28: Yong Yao <yaoyong@marvell.com> - * initial version - */ - -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include <linux/platform_data/mouse-pxa930_trkball.h> - -/* Trackball Controller Register Definitions */ -#define TBCR (0x000C) -#define TBCNTR (0x0010) -#define TBSBC (0x0014) - -#define TBCR_TBRST (1 << 1) -#define TBCR_TBSB (1 << 10) - -#define TBCR_Y_FLT(n) (((n) & 0xf) << 6) -#define TBCR_X_FLT(n) (((n) & 0xf) << 2) - -#define TBCNTR_YM(n) (((n) >> 24) & 0xff) -#define TBCNTR_YP(n) (((n) >> 16) & 0xff) -#define TBCNTR_XM(n) (((n) >> 8) & 0xff) -#define TBCNTR_XP(n) ((n) & 0xff) - -#define TBSBC_TBSBC (0x1) - -struct pxa930_trkball { - struct pxa930_trkball_platform_data *pdata; - - /* Memory Mapped Register */ - struct resource *mem; - void __iomem *mmio_base; - - struct input_dev *input; -}; - -static irqreturn_t pxa930_trkball_interrupt(int irq, void *dev_id) -{ - struct pxa930_trkball *trkball = dev_id; - struct input_dev *input = trkball->input; - int tbcntr, x, y; - - /* According to the spec software must read TBCNTR twice: - * if the read value is the same, the reading is valid - */ - tbcntr = __raw_readl(trkball->mmio_base + TBCNTR); - - if (tbcntr == __raw_readl(trkball->mmio_base + TBCNTR)) { - x = (TBCNTR_XP(tbcntr) - TBCNTR_XM(tbcntr)) / 2; - y = (TBCNTR_YP(tbcntr) - TBCNTR_YM(tbcntr)) / 2; - - input_report_rel(input, REL_X, x); - input_report_rel(input, REL_Y, y); - input_sync(input); - } - - __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); - __raw_writel(0, trkball->mmio_base + TBSBC); - - return IRQ_HANDLED; -} - -/* For TBCR, we need to wait for a while to make sure it has been modified. */ -static int write_tbcr(struct pxa930_trkball *trkball, int v) -{ - int i = 100; - - __raw_writel(v, trkball->mmio_base + TBCR); - - while (--i) { - if (__raw_readl(trkball->mmio_base + TBCR) == v) - break; - msleep(1); - } - - if (i == 0) { - pr_err("%s: timed out writing TBCR(%x)!\n", __func__, v); - return -ETIMEDOUT; - } - - return 0; -} - -static void pxa930_trkball_config(struct pxa930_trkball *trkball) -{ - uint32_t tbcr; - - /* According to spec, need to write the filters of x,y to 0xf first! */ - tbcr = __raw_readl(trkball->mmio_base + TBCR); - write_tbcr(trkball, tbcr | TBCR_X_FLT(0xf) | TBCR_Y_FLT(0xf)); - write_tbcr(trkball, TBCR_X_FLT(trkball->pdata->x_filter) | - TBCR_Y_FLT(trkball->pdata->y_filter)); - - /* According to spec, set TBCR_TBRST first, before clearing it! */ - tbcr = __raw_readl(trkball->mmio_base + TBCR); - write_tbcr(trkball, tbcr | TBCR_TBRST); - write_tbcr(trkball, tbcr & ~TBCR_TBRST); - - __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); - __raw_writel(0, trkball->mmio_base + TBSBC); - - pr_debug("%s: final TBCR=%x!\n", __func__, - __raw_readl(trkball->mmio_base + TBCR)); -} - -static int pxa930_trkball_open(struct input_dev *dev) -{ - struct pxa930_trkball *trkball = input_get_drvdata(dev); - - pxa930_trkball_config(trkball); - - return 0; -} - -static void pxa930_trkball_disable(struct pxa930_trkball *trkball) -{ - uint32_t tbcr = __raw_readl(trkball->mmio_base + TBCR); - - /* Held in reset, gate the 32-KHz input clock off */ - write_tbcr(trkball, tbcr | TBCR_TBRST); -} - -static void pxa930_trkball_close(struct input_dev *dev) -{ - struct pxa930_trkball *trkball = input_get_drvdata(dev); - - pxa930_trkball_disable(trkball); -} - -static int pxa930_trkball_probe(struct platform_device *pdev) -{ - struct pxa930_trkball *trkball; - struct input_dev *input; - struct resource *res; - int irq, error; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -ENXIO; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get register memory\n"); - return -ENXIO; - } - - trkball = kzalloc(sizeof(struct pxa930_trkball), GFP_KERNEL); - if (!trkball) - return -ENOMEM; - - trkball->pdata = dev_get_platdata(&pdev->dev); - if (!trkball->pdata) { - dev_err(&pdev->dev, "no platform data defined\n"); - error = -EINVAL; - goto failed; - } - - trkball->mmio_base = ioremap(res->start, resource_size(res)); - if (!trkball->mmio_base) { - dev_err(&pdev->dev, "failed to ioremap registers\n"); - error = -ENXIO; - goto failed; - } - - /* held the module in reset, will be enabled in open() */ - pxa930_trkball_disable(trkball); - - error = request_irq(irq, pxa930_trkball_interrupt, 0, - pdev->name, trkball); - if (error) { - dev_err(&pdev->dev, "failed to request irq: %d\n", error); - goto failed_free_io; - } - - platform_set_drvdata(pdev, trkball); - - input = input_allocate_device(); - if (!input) { - dev_err(&pdev->dev, "failed to allocate input device\n"); - error = -ENOMEM; - goto failed_free_irq; - } - - input->name = pdev->name; - input->id.bustype = BUS_HOST; - input->open = pxa930_trkball_open; - input->close = pxa930_trkball_close; - input->dev.parent = &pdev->dev; - input_set_drvdata(input, trkball); - - trkball->input = input; - - input_set_capability(input, EV_REL, REL_X); - input_set_capability(input, EV_REL, REL_Y); - - error = input_register_device(input); - if (error) { - dev_err(&pdev->dev, "unable to register input device\n"); - goto failed_free_input; - } - - return 0; - -failed_free_input: - input_free_device(input); -failed_free_irq: - free_irq(irq, trkball); -failed_free_io: - iounmap(trkball->mmio_base); -failed: - kfree(trkball); - return error; -} - -static int pxa930_trkball_remove(struct platform_device *pdev) -{ - struct pxa930_trkball *trkball = platform_get_drvdata(pdev); - int irq = platform_get_irq(pdev, 0); - - input_unregister_device(trkball->input); - free_irq(irq, trkball); - iounmap(trkball->mmio_base); - kfree(trkball); - - return 0; -} - -static struct platform_driver pxa930_trkball_driver = { - .driver = { - .name = "pxa930-trkball", - }, - .probe = pxa930_trkball_probe, - .remove = pxa930_trkball_remove, -}; -module_platform_driver(pxa930_trkball_driver); - -MODULE_AUTHOR("Yong Yao <yaoyong@marvell.com>"); -MODULE_DESCRIPTION("PXA930 Trackball Mouse Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 68d99a112e14..1a2049b336a6 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig @@ -490,18 +490,6 @@ config TOUCHSCREEN_IPROC To compile this driver as a module, choose M here: the module will be called bcm_iproc_tsc. -config TOUCHSCREEN_S3C2410 - tristate "Samsung S3C2410/generic touchscreen input driver" - depends on ARCH_S3C24XX || SAMSUNG_DEV_TS - depends on S3C_ADC - help - Say Y here if you have the s3c2410 touchscreen. - - If unsure, say N. - - To compile this driver as a module, choose M here: the - module will be called s3c2410_ts. - config TOUCHSCREEN_S6SY761 tristate "Samsung S6SY761 Touchscreen driver" depends on I2C @@ -839,22 +827,6 @@ config TOUCHSCREEN_TI_AM335X_TSC To compile this driver as a module, choose M here: the module will be called ti_am335x_tsc. -config TOUCHSCREEN_UCB1400 - tristate "Philips UCB1400 touchscreen" - depends on AC97_BUS - depends on UCB1400_CORE - help - This enables support for the Philips UCB1400 touchscreen interface. - The UCB1400 is an AC97 audio codec. The touchscreen interface - will be initialized only after the ALSA subsystem has been - brought up and the UCB1400 detected. You therefore have to - configure ALSA support as well (either built-in or modular, - independently of whether this driver is itself built-in or - modular) for this driver to work. - - To compile this driver as a module, choose M here: the - module will be called ucb1400_ts. - config TOUCHSCREEN_PIXCIR tristate "PIXCIR I2C touchscreens" depends on I2C @@ -940,20 +912,6 @@ config TOUCHSCREEN_WM97XX_MAINSTONE To compile this driver as a module, choose M here: the module will be called mainstone-wm97xx. -config TOUCHSCREEN_WM97XX_ZYLONITE - tristate "Zylonite accelerated touch" - depends on TOUCHSCREEN_WM97XX && MACH_ZYLONITE - depends on SND_PXA2XX_LIB_AC97 - select TOUCHSCREEN_WM9713 - help - Say Y here for support for streaming mode with the touchscreen - on Zylonite systems. - - If unsure, say N. - - To compile this driver as a module, choose M here: the - module will be called zylonite-wm97xx. - config TOUCHSCREEN_USB_COMPOSITE tristate "USB Touchscreen Driver" depends on USB_ARCH_HAS_HCD diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile index 4968c370479a..f2fd28cc34a6 100644 --- a/drivers/input/touchscreen/Makefile +++ b/drivers/input/touchscreen/Makefile @@ -76,7 +76,6 @@ obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o obj-$(CONFIG_TOUCHSCREEN_PIXCIR) += pixcir_i2c_ts.o obj-$(CONFIG_TOUCHSCREEN_RM_TS) += raydium_i2c_ts.o -obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o obj-$(CONFIG_TOUCHSCREEN_S6SY761) += s6sy761.o obj-$(CONFIG_TOUCHSCREEN_SILEAD) += silead.o obj-$(CONFIG_TOUCHSCREEN_SIS_I2C) += sis_i2c.o @@ -98,7 +97,6 @@ obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o tsc2007-y := tsc2007_core.o tsc2007-$(CONFIG_TOUCHSCREEN_TSC2007_IIO) += tsc2007_iio.o obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o -obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o obj-$(CONFIG_TOUCHSCREEN_WACOM_I2C) += wacom_i2c.o obj-$(CONFIG_TOUCHSCREEN_WDT87XX_I2C) += wdt87xx_i2c.o @@ -108,7 +106,6 @@ wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705) += wm9705.o wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9712) += wm9712.o wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9713) += wm9713.o obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o -obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o obj-$(CONFIG_TOUCHSCREEN_SX8654) += sx8654.o obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o obj-$(CONFIG_TOUCHSCREEN_ZET6223) += zet6223.o diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c index c39f49720fe4..85b95ed461e7 100644 --- a/drivers/input/touchscreen/mainstone-wm97xx.c +++ b/drivers/input/touchscreen/mainstone-wm97xx.c @@ -187,16 +187,6 @@ static int wm97xx_acc_startup(struct wm97xx *wm) "mainstone accelerated touchscreen driver, %d samples/sec\n", cinfo[sp_idx].speed); - /* IRQ driven touchscreen is used on Palm hardware */ - if (machine_is_palmt5() || machine_is_palmtx() || machine_is_palmld()) { - pen_int = 1; - /* There is some obscure mutant of WM9712 interbred with WM9713 - * used on Palm HW */ - wm->variant = WM97xx_WM1613; - } else if (machine_is_zylonite()) { - pen_int = 1; - } - if (pen_int) { gpiod_irq = gpiod_get(wm->dev, "touch", GPIOD_IN); if (IS_ERR(gpiod_irq)) diff --git a/drivers/input/touchscreen/s3c2410_ts.c b/drivers/input/touchscreen/s3c2410_ts.c deleted file mode 100644 index 2e70c0b79444..000000000000 --- a/drivers/input/touchscreen/s3c2410_ts.c +++ /dev/null @@ -1,464 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Samsung S3C24XX touchscreen driver - * - * Copyright 2004 Arnaud Patard <arnaud.patard@rtp-net.org> - * Copyright 2008 Ben Dooks <ben-linux@fluff.org> - * Copyright 2009 Simtec Electronics <linux@simtec.co.uk> - * - * Additional work by Herbert Pötzl <herbert@13thfloor.at> and - * Harald Welte <laforge@openmoko.org> - */ - -#include <linux/errno.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/input.h> -#include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include <linux/soc/samsung/s3c-adc.h> -#include <linux/platform_data/touchscreen-s3c2410.h> - -#define S3C2410_ADCCON (0x00) -#define S3C2410_ADCTSC (0x04) -#define S3C2410_ADCDLY (0x08) -#define S3C2410_ADCDAT0 (0x0C) -#define S3C2410_ADCDAT1 (0x10) -#define S3C64XX_ADCUPDN (0x14) -#define S3C2443_ADCMUX (0x18) -#define S3C64XX_ADCCLRINT (0x18) -#define S5P_ADCMUX (0x1C) -#define S3C64XX_ADCCLRINTPNDNUP (0x20) - -/* ADCTSC Register Bits */ -#define S3C2443_ADCTSC_UD_SEN (1 << 8) -#define S3C2410_ADCTSC_YM_SEN (1<<7) -#define S3C2410_ADCTSC_YP_SEN (1<<6) -#define S3C2410_ADCTSC_XM_SEN (1<<5) -#define S3C2410_ADCTSC_XP_SEN (1<<4) -#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3) -#define S3C2410_ADCTSC_AUTO_PST (1<<2) -#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0) - -/* ADCDAT0 Bits */ -#define S3C2410_ADCDAT0_UPDOWN (1<<15) -#define S3C2410_ADCDAT0_AUTO_PST (1<<14) -#define S3C2410_ADCDAT0_XY_PST (0x3<<12) -#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF) - -/* ADCDAT1 Bits */ -#define S3C2410_ADCDAT1_UPDOWN (1<<15) -#define S3C2410_ADCDAT1_AUTO_PST (1<<14) -#define S3C2410_ADCDAT1_XY_PST (0x3<<12) -#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) - - -#define TSC_SLEEP (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0)) - -#define INT_DOWN (0) -#define INT_UP (1 << 8) - -#define WAIT4INT (S3C2410_ADCTSC_YM_SEN | \ - S3C2410_ADCTSC_YP_SEN | \ - S3C2410_ADCTSC_XP_SEN | \ - S3C2410_ADCTSC_XY_PST(3)) - -#define AUTOPST (S3C2410_ADCTSC_YM_SEN | \ - S3C2410_ADCTSC_YP_SEN | \ - S3C2410_ADCTSC_XP_SEN | \ - S3C2410_ADCTSC_AUTO_PST | \ - S3C2410_ADCTSC_XY_PST(0)) - -#define FEAT_PEN_IRQ (1 << 0) /* HAS ADCCLRINTPNDNUP */ - -/* Per-touchscreen data. */ - -/** - * struct s3c2410ts - driver touchscreen state. - * @client: The ADC client we registered with the core driver. - * @dev: The device we are bound to. - * @input: The input device we registered with the input subsystem. - * @clock: The clock for the adc. - * @io: Pointer to the IO base. - * @xp: The accumulated X position data. - * @yp: The accumulated Y position data. - * @irq_tc: The interrupt number for pen up/down interrupt - * @count: The number of samples collected. - * @shift: The log2 of the maximum count to read in one go. - * @features: The features supported by the TSADC MOdule. - */ -struct s3c2410ts { - struct s3c_adc_client *client; - struct device *dev; - struct input_dev *input; - struct clk *clock; - void __iomem *io; - unsigned long xp; - unsigned long yp; - int irq_tc; - int count; - int shift; - int features; -}; - -static struct s3c2410ts ts; - -/** - * get_down - return the down state of the pen - * @data0: The data read from ADCDAT0 register. - * @data1: The data read from ADCDAT1 register. - * - * Return non-zero if both readings show that the pen is down. - */ -static inline bool get_down(unsigned long data0, unsigned long data1) -{ - /* returns true if both data values show stylus down */ - return (!(data0 & S3C2410_ADCDAT0_UPDOWN) && - !(data1 & S3C2410_ADCDAT0_UPDOWN)); -} - -static void touch_timer_fire(struct timer_list *unused) -{ - unsigned long data0; - unsigned long data1; - bool down; - - data0 = readl(ts.io + S3C2410_ADCDAT0); - data1 = readl(ts.io + S3C2410_ADCDAT1); - - down = get_down(data0, data1); - - if (down) { - if (ts.count == (1 << ts.shift)) { - ts.xp >>= ts.shift; - ts.yp >>= ts.shift; - - dev_dbg(ts.dev, "%s: X=%lu, Y=%lu, count=%d\n", - __func__, ts.xp, ts.yp, ts.count); - - input_report_abs(ts.input, ABS_X, ts.xp); - input_report_abs(ts.input, ABS_Y, ts.yp); - - input_report_key(ts.input, BTN_TOUCH, 1); - input_sync(ts.input); - - ts.xp = 0; - ts.yp = 0; - ts.count = 0; - } - - s3c_adc_start(ts.client, 0, 1 << ts.shift); - } else { - ts.xp = 0; - ts.yp = 0; - ts.count = 0; - - input_report_key(ts.input, BTN_TOUCH, 0); - input_sync(ts.input); - - writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC); - } -} - -static DEFINE_TIMER(touch_timer, touch_timer_fire); - -/** - * stylus_irq - touchscreen stylus event interrupt - * @irq: The interrupt number - * @dev_id: The device ID. - * - * Called when the IRQ_TC is fired for a pen up or down event. - */ -static irqreturn_t stylus_irq(int irq, void *dev_id) -{ - unsigned long data0; - unsigned long data1; - bool down; - - data0 = readl(ts.io + S3C2410_ADCDAT0); - data1 = readl(ts.io + S3C2410_ADCDAT1); - - down = get_down(data0, data1); - - /* TODO we should never get an interrupt with down set while - * the timer is running, but maybe we ought to verify that the - * timer isn't running anyways. */ - - if (down) - s3c_adc_start(ts.client, 0, 1 << ts.shift); - else - dev_dbg(ts.dev, "%s: count=%d\n", __func__, ts.count); - - if (ts.features & FEAT_PEN_IRQ) { - /* Clear pen down/up interrupt */ - writel(0x0, ts.io + S3C64XX_ADCCLRINTPNDNUP); - } - - return IRQ_HANDLED; -} - -/** - * s3c24xx_ts_conversion - ADC conversion callback - * @client: The client that was registered with the ADC core. - * @data0: The reading from ADCDAT0. - * @data1: The reading from ADCDAT1. - * @left: The number of samples left. - * - * Called when a conversion has finished. - */ -static void s3c24xx_ts_conversion(struct s3c_adc_client *client, - unsigned data0, unsigned data1, - unsigned *left) -{ - dev_dbg(ts.dev, "%s: %d,%d\n", __func__, data0, data1); - - ts.xp += data0; - ts.yp += data1; - - ts.count++; - - /* From tests, it seems that it is unlikely to get a pen-up - * event during the conversion process which means we can - * ignore any pen-up events with less than the requisite - * count done. - * - * In several thousand conversions, no pen-ups where detected - * before count completed. - */ -} - -/** - * s3c24xx_ts_select - ADC selection callback. - * @client: The client that was registered with the ADC core. - * @select: The reason for select. - * - * Called when the ADC core selects (or deslects) us as a client. - */ -static void s3c24xx_ts_select(struct s3c_adc_client *client, unsigned select) -{ - if (select) { - writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST, - ts.io + S3C2410_ADCTSC); - } else { - mod_timer(&touch_timer, jiffies+1); - writel(WAIT4INT | INT_UP, ts.io + S3C2410_ADCTSC); - } -} - -/** - * s3c2410ts_probe - device core probe entry point - * @pdev: The device we are being bound to. - * - * Initialise, find and allocate any resources we need to run and then - * register with the ADC and input systems. - */ -static int s3c2410ts_probe(struct platform_device *pdev) -{ - struct s3c2410_ts_mach_info *info; - struct device *dev = &pdev->dev; - struct input_dev *input_dev; - struct resource *res; - int ret = -EINVAL; - - /* Initialise input stuff */ - memset(&ts, 0, sizeof(struct s3c2410ts)); - - ts.dev = dev; - - info = dev_get_platdata(dev); - if (!info) { - dev_err(dev, "no platform data, cannot attach\n"); - return -EINVAL; - } - - dev_dbg(dev, "initialising touchscreen\n"); - - ts.clock = clk_get(dev, "adc"); - if (IS_ERR(ts.clock)) { - dev_err(dev, "cannot get adc clock source\n"); - return -ENOENT; - } - - ret = clk_prepare_enable(ts.clock); - if (ret) { - dev_err(dev, "Failed! to enabled clocks\n"); - goto err_clk_get; - } - dev_dbg(dev, "got and enabled clocks\n"); - - ts.irq_tc = ret = platform_get_irq(pdev, 0); - if (ret < 0) { - dev_err(dev, "no resource for interrupt\n"); - goto err_clk; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(dev, "no resource for registers\n"); - ret = -ENOENT; - goto err_clk; - } - - ts.io = ioremap(res->start, resource_size(res)); - if (ts.io == NULL) { - dev_err(dev, "cannot map registers\n"); - ret = -ENOMEM; - goto err_clk; - } - - /* inititalise the gpio */ - if (info->cfg_gpio) - info->cfg_gpio(to_platform_device(ts.dev)); - - ts.client = s3c_adc_register(pdev, s3c24xx_ts_select, - s3c24xx_ts_conversion, 1); - if (IS_ERR(ts.client)) { - dev_err(dev, "failed to register adc client\n"); - ret = PTR_ERR(ts.client); - goto err_iomap; - } - - /* Initialise registers */ - if ((info->delay & 0xffff) > 0) - writel(info->delay & 0xffff, ts.io + S3C2410_ADCDLY); - - writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC); - - input_dev = input_allocate_device(); - if (!input_dev) { - dev_err(dev, "Unable to allocate the input device !!\n"); - ret = -ENOMEM; - goto err_iomap; - } - - ts.input = input_dev; - ts.input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); - ts.input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); - input_set_abs_params(ts.input, ABS_X, 0, 0x3FF, 0, 0); - input_set_abs_params(ts.input, ABS_Y, 0, 0x3FF, 0, 0); - - ts.input->name = "S3C24XX TouchScreen"; - ts.input->id.bustype = BUS_HOST; - ts.input->id.vendor = 0xDEAD; - ts.input->id.product = 0xBEEF; - ts.input->id.version = 0x0102; - - ts.shift = info->oversampling_shift; - ts.features = platform_get_device_id(pdev)->driver_data; - - ret = request_irq(ts.irq_tc, stylus_irq, 0, - "s3c2410_ts_pen", ts.input); - if (ret) { - dev_err(dev, "cannot get TC interrupt\n"); - goto err_inputdev; - } - - dev_info(dev, "driver attached, registering input device\n"); - - /* All went ok, so register to the input system */ - ret = input_register_device(ts.input); - if (ret < 0) { - dev_err(dev, "failed to register input device\n"); - ret = -EIO; - goto err_tcirq; - } - - return 0; - - err_tcirq: - free_irq(ts.irq_tc, ts.input); - err_inputdev: - input_free_device(ts.input); - err_iomap: - iounmap(ts.io); - err_clk: - clk_disable_unprepare(ts.clock); - del_timer_sync(&touch_timer); - err_clk_get: - clk_put(ts.clock); - return ret; -} - -/** - * s3c2410ts_remove - device core removal entry point - * @pdev: The device we are being removed from. - * - * Free up our state ready to be removed. - */ -static int s3c2410ts_remove(struct platform_device *pdev) -{ - free_irq(ts.irq_tc, ts.input); - del_timer_sync(&touch_timer); - - clk_disable_unprepare(ts.clock); - clk_put(ts.clock); - - input_unregister_device(ts.input); - iounmap(ts.io); - - return 0; -} - -#ifdef CONFIG_PM -static int s3c2410ts_suspend(struct device *dev) -{ - writel(TSC_SLEEP, ts.io + S3C2410_ADCTSC); - disable_irq(ts.irq_tc); - clk_disable(ts.clock); - - return 0; -} - -static int s3c2410ts_resume(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct s3c2410_ts_mach_info *info = dev_get_platdata(&pdev->dev); - - clk_enable(ts.clock); - enable_irq(ts.irq_tc); - - /* Initialise registers */ - if ((info->delay & 0xffff) > 0) - writel(info->delay & 0xffff, ts.io + S3C2410_ADCDLY); - - writel(WAIT4INT | INT_DOWN, ts.io + S3C2410_ADCTSC); - - return 0; -} - -static const struct dev_pm_ops s3c_ts_pmops = { - .suspend = s3c2410ts_suspend, - .resume = s3c2410ts_resume, -}; -#endif - -static const struct platform_device_id s3cts_driver_ids[] = { - { "s3c2410-ts", 0 }, - { "s3c2440-ts", 0 }, - { "s3c64xx-ts", FEAT_PEN_IRQ }, - { } -}; -MODULE_DEVICE_TABLE(platform, s3cts_driver_ids); - -static struct platform_driver s3c_ts_driver = { - .driver = { - .name = "samsung-ts", -#ifdef CONFIG_PM - .pm = &s3c_ts_pmops, -#endif - }, - .id_table = s3cts_driver_ids, - .probe = s3c2410ts_probe, - .remove = s3c2410ts_remove, -}; -module_platform_driver(s3c_ts_driver); - -MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>, " - "Ben Dooks <ben@simtec.co.uk>, " - "Simtec Electronics <linux@simtec.co.uk>"); -MODULE_DESCRIPTION("S3C24XX Touchscreen driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/input/touchscreen/ucb1400_ts.c b/drivers/input/touchscreen/ucb1400_ts.c deleted file mode 100644 index dfd3b35590c3..000000000000 --- a/drivers/input/touchscreen/ucb1400_ts.c +++ /dev/null @@ -1,458 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Philips UCB1400 touchscreen driver - * - * Author: Nicolas Pitre - * Created: September 25, 2006 - * Copyright: MontaVista Software, Inc. - * - * Spliting done by: Marek Vasut <marek.vasut@gmail.com> - * If something doesn't work and it worked before spliting, e-mail me, - * dont bother Nicolas please ;-) - * - * This code is heavily based on ucb1x00-*.c copyrighted by Russell King - * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has - * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/sched.h> -#include <linux/wait.h> -#include <linux/input.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/ucb1400.h> - -#define UCB1400_TS_POLL_PERIOD 10 /* ms */ - -static bool adcsync; -static int ts_delay = 55; /* us */ -static int ts_delay_pressure; /* us */ - -/* Switch to interrupt mode. */ -static void ucb1400_ts_mode_int(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | - UCB_TS_CR_MODE_INT); -} - -/* - * Switch to pressure mode, and read pressure. We don't need to wait - * here, since both plates are being driven. - */ -static unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - - udelay(ts_delay_pressure); - - return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); -} - -/* - * Switch to X position mode and measure Y plate. We switch the plate - * configuration in pressure mode, then switch to position mode. This - * gives a faster response time. Even so, we need to wait about 55us - * for things to stabilise. - */ -static unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); - - udelay(ts_delay); - - return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); -} - -/* - * Switch to Y position mode and measure X plate. We switch the plate - * configuration in pressure mode, then switch to position mode. This - * gives a faster response time. Even so, we need to wait about 55us - * for things to stabilise. - */ -static int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | - UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); - - udelay(ts_delay); - - return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync); -} - -/* - * Switch to X plate resistance mode. Set MX to ground, PX to - * supply. Measure current. - */ -static unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - return ucb1400_adc_read(ucb->ac97, 0, adcsync); -} - -/* - * Switch to Y plate resistance mode. Set MY to ground, PY to - * supply. Measure current. - */ -static unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); - return ucb1400_adc_read(ucb->ac97, 0, adcsync); -} - -static int ucb1400_ts_pen_up(struct ucb1400_ts *ucb) -{ - unsigned short val = ucb1400_reg_read(ucb->ac97, UCB_TS_CR); - - return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW); -} - -static void ucb1400_ts_irq_enable(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, UCB_IE_TSPX); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); - ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_TSPX); -} - -static void ucb1400_ts_irq_disable(struct ucb1400_ts *ucb) -{ - ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); -} - -static void ucb1400_ts_report_event(struct input_dev *idev, u16 pressure, u16 x, u16 y) -{ - input_report_abs(idev, ABS_X, x); - input_report_abs(idev, ABS_Y, y); - input_report_abs(idev, ABS_PRESSURE, pressure); - input_report_key(idev, BTN_TOUCH, 1); - input_sync(idev); -} - -static void ucb1400_ts_event_release(struct input_dev *idev) -{ - input_report_abs(idev, ABS_PRESSURE, 0); - input_report_key(idev, BTN_TOUCH, 0); - input_sync(idev); -} - -static void ucb1400_clear_pending_irq(struct ucb1400_ts *ucb) -{ - unsigned int isr; - - isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); - - if (isr & UCB_IE_TSPX) - ucb1400_ts_irq_disable(ucb); - else - dev_dbg(&ucb->ts_idev->dev, - "ucb1400: unexpected IE_STATUS = %#x\n", isr); -} - -/* - * A restriction with interrupts exists when using the ucb1400, as - * the codec read/write routines may sleep while waiting for codec - * access completion and uses semaphores for access control to the - * AC97 bus. Therefore the driver is forced to use threaded interrupt - * handler. - */ -static irqreturn_t ucb1400_irq(int irqnr, void *devid) -{ - struct ucb1400_ts *ucb = devid; - unsigned int x, y, p; - - if (unlikely(irqnr != ucb->irq)) - return IRQ_NONE; - - ucb1400_clear_pending_irq(ucb); - - /* Start with a small delay before checking pendown state */ - msleep(UCB1400_TS_POLL_PERIOD); - - while (!ucb->stopped && !ucb1400_ts_pen_up(ucb)) { - ucb1400_adc_enable(ucb->ac97); - x = ucb1400_ts_read_xpos(ucb); - y = ucb1400_ts_read_ypos(ucb); - p = ucb1400_ts_read_pressure(ucb); - ucb1400_adc_disable(ucb->ac97); - - ucb1400_ts_report_event(ucb->ts_idev, p, x, y); - - wait_event_timeout(ucb->ts_wait, ucb->stopped, - msecs_to_jiffies(UCB1400_TS_POLL_PERIOD)); - } - - ucb1400_ts_event_release(ucb->ts_idev); - - if (!ucb->stopped) { - /* Switch back to interrupt mode. */ - ucb1400_ts_mode_int(ucb); - ucb1400_ts_irq_enable(ucb); - } - - return IRQ_HANDLED; -} - -static void ucb1400_ts_stop(struct ucb1400_ts *ucb) -{ - /* Signal IRQ thread to stop polling and disable the handler. */ - ucb->stopped = true; - mb(); - wake_up(&ucb->ts_wait); - disable_irq(ucb->irq); - - ucb1400_ts_irq_disable(ucb); - ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0); -} - -/* Must be called with ts->lock held */ -static void ucb1400_ts_start(struct ucb1400_ts *ucb) -{ - /* Tell IRQ thread that it may poll the device. */ - ucb->stopped = false; - mb(); - - ucb1400_ts_mode_int(ucb); - ucb1400_ts_irq_enable(ucb); - - enable_irq(ucb->irq); -} - -static int ucb1400_ts_open(struct input_dev *idev) -{ - struct ucb1400_ts *ucb = input_get_drvdata(idev); - - ucb1400_ts_start(ucb); - - return 0; -} - -static void ucb1400_ts_close(struct input_dev *idev) -{ - struct ucb1400_ts *ucb = input_get_drvdata(idev); - - ucb1400_ts_stop(ucb); -} - -#ifndef NO_IRQ -#define NO_IRQ 0 -#endif - -/* - * Try to probe our interrupt, rather than relying on lots of - * hard-coded machine dependencies. - */ -static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb, - struct platform_device *pdev) -{ - unsigned long mask, timeout; - - mask = probe_irq_on(); - - /* Enable the ADC interrupt. */ - ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC); - ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); - - /* Cause an ADC interrupt. */ - ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA); - ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); - - /* Wait for the conversion to complete. */ - timeout = jiffies + HZ/2; - while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) & - UCB_ADC_DAT_VALID)) { - cpu_relax(); - if (time_after(jiffies, timeout)) { - dev_err(&pdev->dev, "timed out in IRQ probe\n"); - probe_irq_off(mask); - return -ENODEV; - } - } - ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0); - - /* Disable and clear interrupt. */ - ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0); - ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); - ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); - - /* Read triggered interrupt. */ - ucb->irq = probe_irq_off(mask); - if (ucb->irq < 0 || ucb->irq == NO_IRQ) - return -ENODEV; - - return 0; -} - -static int ucb1400_ts_probe(struct platform_device *pdev) -{ - struct ucb1400_ts *ucb = dev_get_platdata(&pdev->dev); - int error, x_res, y_res; - u16 fcsr; - - ucb->ts_idev = input_allocate_device(); - if (!ucb->ts_idev) { - error = -ENOMEM; - goto err; - } - - /* Only in case the IRQ line wasn't supplied, try detecting it */ - if (ucb->irq < 0) { - error = ucb1400_ts_detect_irq(ucb, pdev); - if (error) { - dev_err(&pdev->dev, "IRQ probe failed\n"); - goto err_free_devs; - } - } - dev_dbg(&pdev->dev, "found IRQ %d\n", ucb->irq); - - init_waitqueue_head(&ucb->ts_wait); - - input_set_drvdata(ucb->ts_idev, ucb); - - ucb->ts_idev->dev.parent = &pdev->dev; - ucb->ts_idev->name = "UCB1400 touchscreen interface"; - ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97, - AC97_VENDOR_ID1); - ucb->ts_idev->id.product = ucb->id; - ucb->ts_idev->open = ucb1400_ts_open; - ucb->ts_idev->close = ucb1400_ts_close; - ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY); - ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); - - /* - * Enable ADC filter to prevent horrible jitter on Colibri. - * This also further reduces jitter on boards where ADCSYNC - * pin is connected. - */ - fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR); - ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE); - - ucb1400_adc_enable(ucb->ac97); - x_res = ucb1400_ts_read_xres(ucb); - y_res = ucb1400_ts_read_yres(ucb); - ucb1400_adc_disable(ucb->ac97); - dev_dbg(&pdev->dev, "x/y = %d/%d\n", x_res, y_res); - - input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0); - input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0); - input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0); - - ucb1400_ts_stop(ucb); - - error = request_threaded_irq(ucb->irq, NULL, ucb1400_irq, - IRQF_TRIGGER_RISING | IRQF_ONESHOT, - "UCB1400", ucb); - if (error) { - dev_err(&pdev->dev, - "unable to grab irq%d: %d\n", ucb->irq, error); - goto err_free_devs; - } - - error = input_register_device(ucb->ts_idev); - if (error) - goto err_free_irq; - - return 0; - -err_free_irq: - free_irq(ucb->irq, ucb); -err_free_devs: - input_free_device(ucb->ts_idev); -err: - return error; -} - -static int ucb1400_ts_remove(struct platform_device *pdev) -{ - struct ucb1400_ts *ucb = dev_get_platdata(&pdev->dev); - - free_irq(ucb->irq, ucb); - input_unregister_device(ucb->ts_idev); - - return 0; -} - -static int __maybe_unused ucb1400_ts_suspend(struct device *dev) -{ - struct ucb1400_ts *ucb = dev_get_platdata(dev); - struct input_dev *idev = ucb->ts_idev; - - mutex_lock(&idev->mutex); - - if (input_device_enabled(idev)) - ucb1400_ts_stop(ucb); - - mutex_unlock(&idev->mutex); - return 0; -} - -static int __maybe_unused ucb1400_ts_resume(struct device *dev) -{ - struct ucb1400_ts *ucb = dev_get_platdata(dev); - struct input_dev *idev = ucb->ts_idev; - - mutex_lock(&idev->mutex); - - if (input_device_enabled(idev)) - ucb1400_ts_start(ucb); - - mutex_unlock(&idev->mutex); - return 0; -} - -static SIMPLE_DEV_PM_OPS(ucb1400_ts_pm_ops, - ucb1400_ts_suspend, ucb1400_ts_resume); - -static struct platform_driver ucb1400_ts_driver = { - .probe = ucb1400_ts_probe, - .remove = ucb1400_ts_remove, - .driver = { - .name = "ucb1400_ts", - .pm = &ucb1400_ts_pm_ops, - }, -}; -module_platform_driver(ucb1400_ts_driver); - -module_param(adcsync, bool, 0444); -MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); - -module_param(ts_delay, int, 0444); -MODULE_PARM_DESC(ts_delay, "Delay between panel setup and" - " position read. Default = 55us."); - -module_param(ts_delay_pressure, int, 0444); -MODULE_PARM_DESC(ts_delay_pressure, - "delay between panel setup and pressure read." - " Default = 0us."); - -MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c b/drivers/input/touchscreen/zylonite-wm97xx.c deleted file mode 100644 index a70fe4abe520..000000000000 --- a/drivers/input/touchscreen/zylonite-wm97xx.c +++ /dev/null @@ -1,220 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * zylonite-wm97xx.c -- Zylonite Continuous Touch screen driver - * - * Copyright 2004, 2007, 2008 Wolfson Microelectronics PLC. - * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> - * Parts Copyright : Ian Molton <spyro@f2s.com> - * Andrew Zabolotny <zap@homelink.ru> - * - * Notes: - * This is a wm97xx extended touch driver supporting interrupt driven - * and continuous operation on Marvell Zylonite development systems - * (which have a WM9713 on board). - */ - -#include <linux/module.h> -#include <linux/moduleparam.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/gpio/consumer.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/soc/pxa/cpu.h> -#include <linux/wm97xx.h> - -#include <sound/pxa2xx-lib.h> - -struct continuous { - u16 id; /* codec id */ - u8 code; /* continuous code */ - u8 reads; /* number of coord reads per read cycle */ - u32 speed; /* number of coords per second */ -}; - -#define WM_READS(sp) ((sp / HZ) + 1) - -static const struct continuous cinfo[] = { - { WM9713_ID2, 0, WM_READS(94), 94 }, - { WM9713_ID2, 1, WM_READS(120), 120 }, - { WM9713_ID2, 2, WM_READS(154), 154 }, - { WM9713_ID2, 3, WM_READS(188), 188 }, -}; - -/* continuous speed index */ -static int sp_idx; - -/* - * Pen sampling frequency (Hz) in continuous mode. - */ -static int cont_rate = 200; -module_param(cont_rate, int, 0); -MODULE_PARM_DESC(cont_rate, "Sampling rate in continuous mode (Hz)"); - -/* - * Pressure readback. - * - * Set to 1 to read back pen down pressure - */ -static int pressure; -module_param(pressure, int, 0); -MODULE_PARM_DESC(pressure, "Pressure readback (1 = pressure, 0 = no pressure)"); - -/* - * AC97 touch data slot. - * - * Touch screen readback data ac97 slot - */ -static int ac97_touch_slot = 5; -module_param(ac97_touch_slot, int, 0); -MODULE_PARM_DESC(ac97_touch_slot, "Touch screen data slot AC97 number"); - - -/* flush AC97 slot 5 FIFO machines */ -static void wm97xx_acc_pen_up(struct wm97xx *wm) -{ - int i; - - msleep(1); - - for (i = 0; i < 16; i++) - pxa2xx_ac97_read_modr(); -} - -static int wm97xx_acc_pen_down(struct wm97xx *wm) -{ - u16 x, y, p = 0x100 | WM97XX_ADCSEL_PRES; - int reads = 0; - static u16 last, tries; - - /* When the AC97 queue has been drained we need to allow time - * to buffer up samples otherwise we end up spinning polling - * for samples. The controller can't have a suitably low - * threshold set to use the notifications it gives. - */ - msleep(1); - - if (tries > 5) { - tries = 0; - return RC_PENUP; - } - - x = pxa2xx_ac97_read_modr(); - if (x == last) { - tries++; - return RC_AGAIN; - } - last = x; - do { - if (reads) - x = pxa2xx_ac97_read_modr(); - y = pxa2xx_ac97_read_modr(); - if (pressure) - p = pxa2xx_ac97_read_modr(); - - dev_dbg(wm->dev, "Raw coordinates: x=%x, y=%x, p=%x\n", - x, y, p); - - /* are samples valid */ - if ((x & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_X || - (y & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_Y || - (p & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_PRES) - goto up; - - /* coordinate is good */ - tries = 0; - input_report_abs(wm->input_dev, ABS_X, x & 0xfff); - input_report_abs(wm->input_dev, ABS_Y, y & 0xfff); - input_report_abs(wm->input_dev, ABS_PRESSURE, p & 0xfff); - input_report_key(wm->input_dev, BTN_TOUCH, (p != 0)); - input_sync(wm->input_dev); - reads++; - } while (reads < cinfo[sp_idx].reads); -up: - return RC_PENDOWN | RC_AGAIN; -} - -static int wm97xx_acc_startup(struct wm97xx *wm) -{ - int idx; - - /* check we have a codec */ - if (wm->ac97 == NULL) - return -ENODEV; - - /* Go you big red fire engine */ - for (idx = 0; idx < ARRAY_SIZE(cinfo); idx++) { - if (wm->id != cinfo[idx].id) - continue; - sp_idx = idx; - if (cont_rate <= cinfo[idx].speed) - break; - } - wm->acc_rate = cinfo[sp_idx].code; - wm->acc_slot = ac97_touch_slot; - dev_info(wm->dev, - "zylonite accelerated touchscreen driver, %d samples/sec\n", - cinfo[sp_idx].speed); - - return 0; -} - -static struct wm97xx_mach_ops zylonite_mach_ops = { - .acc_enabled = 1, - .acc_pen_up = wm97xx_acc_pen_up, - .acc_pen_down = wm97xx_acc_pen_down, - .acc_startup = wm97xx_acc_startup, - .irq_gpio = WM97XX_GPIO_2, -}; - -static int zylonite_wm97xx_probe(struct platform_device *pdev) -{ - struct wm97xx *wm = platform_get_drvdata(pdev); - struct gpio_desc *gpio_touch_irq; - int err; - - gpio_touch_irq = devm_gpiod_get(&pdev->dev, "touch", GPIOD_IN); - err = PTR_ERR_OR_ZERO(gpio_touch_irq); - if (err) { - dev_err(&pdev->dev, "Cannot get irq gpio: %d\n", err); - return err; - } - - wm->pen_irq = gpiod_to_irq(gpio_touch_irq); - irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); - - wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, - WM97XX_GPIO_POL_HIGH, - WM97XX_GPIO_STICKY, - WM97XX_GPIO_WAKE); - wm97xx_config_gpio(wm, WM97XX_GPIO_2, WM97XX_GPIO_OUT, - WM97XX_GPIO_POL_HIGH, - WM97XX_GPIO_NOTSTICKY, - WM97XX_GPIO_NOWAKE); - - return wm97xx_register_mach_ops(wm, &zylonite_mach_ops); -} - -static int zylonite_wm97xx_remove(struct platform_device *pdev) -{ - struct wm97xx *wm = platform_get_drvdata(pdev); - - wm97xx_unregister_mach_ops(wm); - - return 0; -} - -static struct platform_driver zylonite_wm97xx_driver = { - .probe = zylonite_wm97xx_probe, - .remove = zylonite_wm97xx_remove, - .driver = { - .name = "wm97xx-touch", - }, -}; -module_platform_driver(zylonite_wm97xx_driver); - -/* Module information */ -MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); -MODULE_DESCRIPTION("wm97xx continuous touch driver for Zylonite"); -MODULE_LICENSE("GPL"); diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index caa952c40ff9..d79683154f7f 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -136,11 +136,6 @@ config BRCMSTB_L2_IRQ select GENERIC_IRQ_CHIP select IRQ_DOMAIN -config DAVINCI_AINTC - bool - select GENERIC_IRQ_CHIP - select IRQ_DOMAIN - config DAVINCI_CP_INTC bool select GENERIC_IRQ_CHIP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 87b49a10962c..ffd945fe71aa 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -8,7 +8,6 @@ obj-$(CONFIG_ATH79) += irq-ath79-misc.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o -obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o obj-$(CONFIG_EXYNOS_IRQ_COMBINER) += exynos-combiner.o obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o diff --git a/drivers/irqchip/irq-davinci-aintc.c b/drivers/irqchip/irq-davinci-aintc.c deleted file mode 100644 index 123eb7bfc117..000000000000 --- a/drivers/irqchip/irq-davinci-aintc.c +++ /dev/null @@ -1,163 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// -// Copyright (C) 2006, 2019 Texas Instruments. -// -// Interrupt handler for DaVinci boards. - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/irqchip/irq-davinci-aintc.h> -#include <linux/io.h> -#include <linux/irqdomain.h> - -#include <asm/exception.h> - -#define DAVINCI_AINTC_FIQ_REG0 0x00 -#define DAVINCI_AINTC_FIQ_REG1 0x04 -#define DAVINCI_AINTC_IRQ_REG0 0x08 -#define DAVINCI_AINTC_IRQ_REG1 0x0c -#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14 -#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18 -#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c -#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20 -#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24 -#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30 -#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c - -static void __iomem *davinci_aintc_base; -static struct irq_domain *davinci_aintc_irq_domain; - -static inline void davinci_aintc_writel(unsigned long value, int offset) -{ - writel_relaxed(value, davinci_aintc_base + offset); -} - -static inline unsigned long davinci_aintc_readl(int offset) -{ - return readl_relaxed(davinci_aintc_base + offset); -} - -static __init void -davinci_aintc_setup_gc(void __iomem *base, - unsigned int irq_start, unsigned int num) -{ - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - gc = irq_get_domain_generic_chip(davinci_aintc_irq_domain, irq_start); - gc->reg_base = base; - gc->irq_base = irq_start; - - ct = gc->chip_types; - ct->chip.irq_ack = irq_gc_ack_set_bit; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - - ct->regs.ack = DAVINCI_AINTC_IRQ_REG0; - ct->regs.mask = DAVINCI_AINTC_IRQ_ENT_REG0; - irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); -} - -static asmlinkage void __exception_irq_entry -davinci_aintc_handle_irq(struct pt_regs *regs) -{ - int irqnr = davinci_aintc_readl(DAVINCI_AINTC_IRQ_IRQENTRY); - - /* - * Use the formula for entry vector index generation from section - * 8.3.3 of the manual. - */ - irqnr >>= 2; - irqnr -= 1; - - generic_handle_domain_irq(davinci_aintc_irq_domain, irqnr); -} - -/* ARM Interrupt Controller Initialization */ -void __init davinci_aintc_init(const struct davinci_aintc_config *config) -{ - unsigned int irq_off, reg_off, prio, shift; - void __iomem *req; - int ret, irq_base; - const u8 *prios; - - req = request_mem_region(config->reg.start, - resource_size(&config->reg), - "davinci-cp-intc"); - if (!req) { - pr_err("%s: register range busy\n", __func__); - return; - } - - davinci_aintc_base = ioremap(config->reg.start, - resource_size(&config->reg)); - if (!davinci_aintc_base) { - pr_err("%s: unable to ioremap register range\n", __func__); - return; - } - - /* Clear all interrupt requests */ - davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1); - - /* Disable all interrupts */ - davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG0); - davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG1); - - /* Interrupts disabled immediately, IRQ entry reflects all */ - davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_INCTL_REG); - - /* we don't use the hardware vector table, just its entry addresses */ - davinci_aintc_writel(0, DAVINCI_AINTC_IRQ_EABASE_REG); - - /* Clear all interrupt requests */ - davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0); - davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1); - - prios = config->prios; - for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG; - reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) { - for (shift = 0, prio = 0; shift < 32; shift += 4, prios++) - prio |= (*prios & 0x07) << shift; - davinci_aintc_writel(prio, reg_off); - } - - irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); - if (irq_base < 0) { - pr_err("%s: unable to allocate interrupt descriptors: %d\n", - __func__, irq_base); - return; - } - - davinci_aintc_irq_domain = irq_domain_add_legacy(NULL, - config->num_irqs, irq_base, 0, - &irq_domain_simple_ops, NULL); - if (!davinci_aintc_irq_domain) { - pr_err("%s: unable to create interrupt domain\n", __func__); - return; - } - - ret = irq_alloc_domain_generic_chips(davinci_aintc_irq_domain, 32, 1, - "AINTC", handle_edge_irq, - IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0); - if (ret) { - pr_err("%s: unable to allocate generic irq chips for domain\n", - __func__); - return; - } - - for (irq_off = 0, reg_off = 0; - irq_off < config->num_irqs; - irq_off += 32, reg_off += 0x04) - davinci_aintc_setup_gc(davinci_aintc_base + reg_off, - irq_base + irq_off, 32); - - set_handle_irq(davinci_aintc_handle_irq); -} diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 499d0f215a8b..be2eeb3d6fd3 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -244,14 +244,6 @@ config LEDS_MT6323 This option enables support for on-chip LED drivers found on Mediatek MT6323 PMIC. -config LEDS_S3C24XX - tristate "LED Support for Samsung S3C24XX GPIO LEDs" - depends on LEDS_CLASS - depends on ARCH_S3C24XX || COMPILE_TEST - help - This option enables support for LEDs connected to GPIO lines - on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440. - config LEDS_NET48XX tristate "LED Support for Soekris net48xx series Error LED" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 4fd2f92cd198..a790c967fce9 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -74,7 +74,6 @@ obj-$(CONFIG_LEDS_PM8058) += leds-pm8058.o obj-$(CONFIG_LEDS_POWERNV) += leds-powernv.o obj-$(CONFIG_LEDS_PWM) += leds-pwm.o obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o -obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o obj-$(CONFIG_LEDS_SYSCON) += leds-syscon.o diff --git a/drivers/leds/leds-s3c24xx.c b/drivers/leds/leds-s3c24xx.c deleted file mode 100644 index 3c0c7aa63b8c..000000000000 --- a/drivers/leds/leds-s3c24xx.c +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* drivers/leds/leds-s3c24xx.c - * - * (c) 2006 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX - LEDs GPIO driver -*/ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/leds.h> -#include <linux/gpio/consumer.h> -#include <linux/slab.h> -#include <linux/module.h> -#include <linux/platform_data/leds-s3c24xx.h> - -/* our context */ - -struct s3c24xx_gpio_led { - struct led_classdev cdev; - struct s3c24xx_led_platdata *pdata; - struct gpio_desc *gpiod; -}; - -static inline struct s3c24xx_gpio_led *to_gpio(struct led_classdev *led_cdev) -{ - return container_of(led_cdev, struct s3c24xx_gpio_led, cdev); -} - -static void s3c24xx_led_set(struct led_classdev *led_cdev, - enum led_brightness value) -{ - struct s3c24xx_gpio_led *led = to_gpio(led_cdev); - - gpiod_set_value(led->gpiod, !!value); -} - -static int s3c24xx_led_probe(struct platform_device *dev) -{ - struct s3c24xx_led_platdata *pdata = dev_get_platdata(&dev->dev); - struct s3c24xx_gpio_led *led; - int ret; - - led = devm_kzalloc(&dev->dev, sizeof(struct s3c24xx_gpio_led), - GFP_KERNEL); - if (!led) - return -ENOMEM; - - led->cdev.brightness_set = s3c24xx_led_set; - led->cdev.default_trigger = pdata->def_trigger; - led->cdev.name = pdata->name; - led->cdev.flags |= LED_CORE_SUSPENDRESUME; - - led->pdata = pdata; - - /* Default to off */ - led->gpiod = devm_gpiod_get(&dev->dev, NULL, GPIOD_OUT_LOW); - if (IS_ERR(led->gpiod)) - return PTR_ERR(led->gpiod); - - /* register our new led device */ - ret = devm_led_classdev_register(&dev->dev, &led->cdev); - if (ret < 0) - dev_err(&dev->dev, "led_classdev_register failed\n"); - - return ret; -} - -static struct platform_driver s3c24xx_led_driver = { - .probe = s3c24xx_led_probe, - .driver = { - .name = "s3c24xx_led", - }, -}; - -module_platform_driver(s3c24xx_led_driver); - -MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); -MODULE_DESCRIPTION("S3C24XX LED driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:s3c24xx_led"); diff --git a/drivers/media/platform/samsung/s3c-camif/Kconfig b/drivers/media/platform/samsung/s3c-camif/Kconfig index 8cb8d1ac3edc..f359f6382fff 100644 --- a/drivers/media/platform/samsung/s3c-camif/Kconfig +++ b/drivers/media/platform/samsung/s3c-camif/Kconfig @@ -1,15 +1,15 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_S3C_CAMIF - tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver" + tristate "Samsung 3C64XX SoC Camera Interface driver" depends on V4L_PLATFORM_DRIVERS depends on VIDEO_DEV && I2C && PM - depends on ARCH_S3C64XX || PLAT_S3C24XX || COMPILE_TEST + depends on ARCH_S3C64XX || COMPILE_TEST select MEDIA_CONTROLLER select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG help - This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera - host interface (CAMIF). + This is a v4l2 driver for s3c64xx SoC series camera host interface + (CAMIF). To compile this driver as a module, choose M here: the module will be called s3c-camif. diff --git a/drivers/media/platform/ti/davinci/Kconfig b/drivers/media/platform/ti/davinci/Kconfig index 96d4bed7fe9e..542a602e66be 100644 --- a/drivers/media/platform/ti/davinci/Kconfig +++ b/drivers/media/platform/ti/davinci/Kconfig @@ -31,19 +31,3 @@ config VIDEO_DAVINCI_VPIF_CAPTURE To compile this driver as a module, choose M here. There will be two modules called vpif.ko and vpif_capture.ko - -config VIDEO_DAVINCI_VPBE_DISPLAY - tristate "TI DaVinci VPBE V4L2-Display driver" - depends on V4L_PLATFORM_DRIVERS - depends on VIDEO_DEV - depends on ARCH_DAVINCI || COMPILE_TEST - depends on I2C - select VIDEOBUF2_DMA_CONTIG - help - Enables Davinci VPBE module used for display devices. - This module is used for display on TI DM644x/DM365/DM355 - based display devices. - - To compile this driver as a module, choose M here. There will - be five modules created called vpss.ko, vpbe.ko, vpbe_osd.ko, - vpbe_venc.ko and vpbe_display.ko diff --git a/drivers/media/platform/ti/davinci/Makefile b/drivers/media/platform/ti/davinci/Makefile index b20a91653162..512f03369bae 100644 --- a/drivers/media/platform/ti/davinci/Makefile +++ b/drivers/media/platform/ti/davinci/Makefile @@ -7,6 +7,3 @@ obj-$(CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY) += vpif.o vpif_display.o #VPIF Capture driver obj-$(CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE) += vpif.o vpif_capture.o - -obj-$(CONFIG_VIDEO_DAVINCI_VPBE_DISPLAY) += vpss.o vpbe.o vpbe_osd.o \ - vpbe_venc.o vpbe_display.o diff --git a/drivers/media/platform/ti/davinci/vpbe.c b/drivers/media/platform/ti/davinci/vpbe.c deleted file mode 100644 index 509ecc84624e..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe.c +++ /dev/null @@ -1,840 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2010 Texas Instruments Inc - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/fs.h> -#include <linux/string.h> -#include <linux/wait.h> -#include <linux/time.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/clk.h> -#include <linux/err.h> - -#include <media/v4l2-device.h> -#include <media/davinci/vpbe_types.h> -#include <media/davinci/vpbe.h> -#include <media/davinci/vpss.h> -#include <media/davinci/vpbe_venc.h> - -#define VPBE_DEFAULT_OUTPUT "Composite" -#define VPBE_DEFAULT_MODE "ntsc" - -static char *def_output = VPBE_DEFAULT_OUTPUT; -static char *def_mode = VPBE_DEFAULT_MODE; -static int debug; - -module_param(def_output, charp, S_IRUGO); -module_param(def_mode, charp, S_IRUGO); -module_param(debug, int, 0644); - -MODULE_PARM_DESC(def_output, "vpbe output name (default:Composite)"); -MODULE_PARM_DESC(def_mode, "vpbe output mode name (default:ntsc"); -MODULE_PARM_DESC(debug, "Debug level 0-1"); - -MODULE_DESCRIPTION("TI DMXXX VPBE Display controller"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Texas Instruments"); - -/** - * vpbe_current_encoder_info - Get config info for current encoder - * @vpbe_dev: vpbe device ptr - * - * Return ptr to current encoder config info - */ -static struct encoder_config_info* -vpbe_current_encoder_info(struct vpbe_device *vpbe_dev) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int index = vpbe_dev->current_sd_index; - - return ((index == 0) ? &cfg->venc : - &cfg->ext_encoders[index-1]); -} - -/** - * vpbe_find_encoder_sd_index - Given a name find encoder sd index - * - * @cfg: ptr to vpbe cfg - * @index: index used by application - * - * Return sd index of the encoder - */ -static int vpbe_find_encoder_sd_index(struct vpbe_config *cfg, - int index) -{ - char *encoder_name = cfg->outputs[index].subdev_name; - int i; - - /* Venc is always first */ - if (!strcmp(encoder_name, cfg->venc.module_name)) - return 0; - - for (i = 0; i < cfg->num_ext_encoders; i++) { - if (!strcmp(encoder_name, - cfg->ext_encoders[i].module_name)) - return i+1; - } - - return -EINVAL; -} - -/** - * vpbe_enum_outputs - enumerate outputs - * @vpbe_dev: vpbe device ptr - * @output: ptr to v4l2_output structure - * - * Enumerates the outputs available at the vpbe display - * returns the status, -EINVAL if end of output list - */ -static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev, - struct v4l2_output *output) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - unsigned int temp_index = output->index; - - if (temp_index >= cfg->num_outputs) - return -EINVAL; - - *output = cfg->outputs[temp_index].output; - output->index = temp_index; - - return 0; -} - -static int vpbe_get_mode_info(struct vpbe_device *vpbe_dev, char *mode, - int output_index) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - struct vpbe_enc_mode_info var; - int curr_output = output_index; - int i; - - if (!mode) - return -EINVAL; - - for (i = 0; i < cfg->outputs[curr_output].num_modes; i++) { - var = cfg->outputs[curr_output].modes[i]; - if (!strcmp(mode, var.name)) { - vpbe_dev->current_timings = var; - return 0; - } - } - - return -EINVAL; -} - -static int vpbe_get_current_mode_info(struct vpbe_device *vpbe_dev, - struct vpbe_enc_mode_info *mode_info) -{ - if (!mode_info) - return -EINVAL; - - *mode_info = vpbe_dev->current_timings; - - return 0; -} - -/* Get std by std id */ -static int vpbe_get_std_info(struct vpbe_device *vpbe_dev, - v4l2_std_id std_id) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - struct vpbe_enc_mode_info var; - int curr_output = vpbe_dev->current_out_index; - int i; - - for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { - var = cfg->outputs[curr_output].modes[i]; - if ((var.timings_type & VPBE_ENC_STD) && - (var.std_id & std_id)) { - vpbe_dev->current_timings = var; - return 0; - } - } - - return -EINVAL; -} - -static int vpbe_get_std_info_by_name(struct vpbe_device *vpbe_dev, - char *std_name) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - struct vpbe_enc_mode_info var; - int curr_output = vpbe_dev->current_out_index; - int i; - - for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { - var = cfg->outputs[curr_output].modes[i]; - if (!strcmp(var.name, std_name)) { - vpbe_dev->current_timings = var; - return 0; - } - } - - return -EINVAL; -} - -/** - * vpbe_set_output - Set output - * @vpbe_dev: vpbe device ptr - * @index: index of output - * - * Set vpbe output to the output specified by the index - */ -static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index) -{ - struct encoder_config_info *curr_enc_info = - vpbe_current_encoder_info(vpbe_dev); - struct vpbe_config *cfg = vpbe_dev->cfg; - struct venc_platform_data *venc_device = vpbe_dev->venc_device; - int enc_out_index; - int sd_index; - int ret; - - if (index >= cfg->num_outputs) - return -EINVAL; - - mutex_lock(&vpbe_dev->lock); - - sd_index = vpbe_dev->current_sd_index; - enc_out_index = cfg->outputs[index].output.index; - /* - * Currently we switch the encoder based on output selected - * by the application. If media controller is implemented later - * there is will be an API added to setup_link between venc - * and external encoder. So in that case below comparison always - * match and encoder will not be switched. But if application - * chose not to use media controller, then this provides current - * way of switching encoder at the venc output. - */ - if (strcmp(curr_enc_info->module_name, - cfg->outputs[index].subdev_name)) { - /* Need to switch the encoder at the output */ - sd_index = vpbe_find_encoder_sd_index(cfg, index); - if (sd_index < 0) { - ret = -EINVAL; - goto unlock; - } - - ret = venc_device->setup_if_config(cfg->outputs[index].if_params); - if (ret) - goto unlock; - } - - /* Set output at the encoder */ - ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, - s_routing, 0, enc_out_index, 0); - if (ret) - goto unlock; - - /* - * It is assumed that venc or external encoder will set a default - * mode in the sub device. For external encoder or LCD pannel output, - * we also need to set up the lcd port for the required mode. So setup - * the lcd port for the default mode that is configured in the board - * arch/arm/mach-davinci/board-dm355-evm.setup file for the external - * encoder. - */ - ret = vpbe_get_mode_info(vpbe_dev, - cfg->outputs[index].default_mode, index); - if (!ret) { - struct osd_state *osd_device = vpbe_dev->osd_device; - - osd_device->ops.set_left_margin(osd_device, - vpbe_dev->current_timings.left_margin); - osd_device->ops.set_top_margin(osd_device, - vpbe_dev->current_timings.upper_margin); - vpbe_dev->current_sd_index = sd_index; - vpbe_dev->current_out_index = index; - } -unlock: - mutex_unlock(&vpbe_dev->lock); - return ret; -} - -static int vpbe_set_default_output(struct vpbe_device *vpbe_dev) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int i; - - for (i = 0; i < cfg->num_outputs; i++) { - if (!strcmp(def_output, - cfg->outputs[i].output.name)) { - int ret = vpbe_set_output(vpbe_dev, i); - - if (!ret) - vpbe_dev->current_out_index = i; - return ret; - } - } - return 0; -} - -/** - * vpbe_get_output - Get output - * @vpbe_dev: vpbe device ptr - * - * return current vpbe output to the index - */ -static unsigned int vpbe_get_output(struct vpbe_device *vpbe_dev) -{ - return vpbe_dev->current_out_index; -} - -/* - * vpbe_s_dv_timings - Set the given preset timings in the encoder - * - * Sets the timings if supported by the current encoder. Return the status. - * 0 - success & -EINVAL on error - */ -static int vpbe_s_dv_timings(struct vpbe_device *vpbe_dev, - struct v4l2_dv_timings *dv_timings) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int out_index = vpbe_dev->current_out_index; - struct vpbe_output *output = &cfg->outputs[out_index]; - int sd_index = vpbe_dev->current_sd_index; - int ret, i; - - - if (!(cfg->outputs[out_index].output.capabilities & - V4L2_OUT_CAP_DV_TIMINGS)) - return -ENODATA; - - for (i = 0; i < output->num_modes; i++) { - if (output->modes[i].timings_type == VPBE_ENC_DV_TIMINGS && - !memcmp(&output->modes[i].dv_timings, - dv_timings, sizeof(*dv_timings))) - break; - } - if (i >= output->num_modes) - return -EINVAL; - vpbe_dev->current_timings = output->modes[i]; - mutex_lock(&vpbe_dev->lock); - - ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, - s_dv_timings, dv_timings); - if (!ret && vpbe_dev->amp) { - /* Call amplifier subdevice */ - ret = v4l2_subdev_call(vpbe_dev->amp, video, - s_dv_timings, dv_timings); - } - /* set the lcd controller output for the given mode */ - if (!ret) { - struct osd_state *osd_device = vpbe_dev->osd_device; - - osd_device->ops.set_left_margin(osd_device, - vpbe_dev->current_timings.left_margin); - osd_device->ops.set_top_margin(osd_device, - vpbe_dev->current_timings.upper_margin); - } - mutex_unlock(&vpbe_dev->lock); - - return ret; -} - -/* - * vpbe_g_dv_timings - Get the timings in the current encoder - * - * Get the timings in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int vpbe_g_dv_timings(struct vpbe_device *vpbe_dev, - struct v4l2_dv_timings *dv_timings) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int out_index = vpbe_dev->current_out_index; - - if (!(cfg->outputs[out_index].output.capabilities & - V4L2_OUT_CAP_DV_TIMINGS)) - return -ENODATA; - - if (vpbe_dev->current_timings.timings_type & - VPBE_ENC_DV_TIMINGS) { - *dv_timings = vpbe_dev->current_timings.dv_timings; - return 0; - } - - return -EINVAL; -} - -/* - * vpbe_enum_dv_timings - Enumerate the dv timings in the current encoder - * - * Get the timings in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int vpbe_enum_dv_timings(struct vpbe_device *vpbe_dev, - struct v4l2_enum_dv_timings *timings) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int out_index = vpbe_dev->current_out_index; - struct vpbe_output *output = &cfg->outputs[out_index]; - int j = 0; - int i; - - if (!(output->output.capabilities & V4L2_OUT_CAP_DV_TIMINGS)) - return -ENODATA; - - for (i = 0; i < output->num_modes; i++) { - if (output->modes[i].timings_type == VPBE_ENC_DV_TIMINGS) { - if (j == timings->index) - break; - j++; - } - } - - if (i == output->num_modes) - return -EINVAL; - timings->timings = output->modes[i].dv_timings; - return 0; -} - -/* - * vpbe_s_std - Set the given standard in the encoder - * - * Sets the standard if supported by the current encoder. Return the status. - * 0 - success & -EINVAL on error - */ -static int vpbe_s_std(struct vpbe_device *vpbe_dev, v4l2_std_id std_id) -{ - struct vpbe_config *cfg = vpbe_dev->cfg; - int out_index = vpbe_dev->current_out_index; - int sd_index = vpbe_dev->current_sd_index; - int ret; - - if (!(cfg->outputs[out_index].output.capabilities & - V4L2_OUT_CAP_STD)) - return -ENODATA; - - ret = vpbe_get_std_info(vpbe_dev, std_id); - if (ret) - return ret; - - mutex_lock(&vpbe_dev->lock); - - ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, - s_std_output, std_id); - /* set the lcd controller output for the given mode */ - if (!ret) { - struct osd_state *osd_device = vpbe_dev->osd_device; - - osd_device->ops.set_left_margin(osd_device, - vpbe_dev->current_timings.left_margin); - osd_device->ops.set_top_margin(osd_device, - vpbe_dev->current_timings.upper_margin); - } - mutex_unlock(&vpbe_dev->lock); - - return ret; -} - -/* - * vpbe_g_std - Get the standard in the current encoder - * - * Get the standard in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int vpbe_g_std(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id) -{ - struct vpbe_enc_mode_info *cur_timings = &vpbe_dev->current_timings; - struct vpbe_config *cfg = vpbe_dev->cfg; - int out_index = vpbe_dev->current_out_index; - - if (!(cfg->outputs[out_index].output.capabilities & V4L2_OUT_CAP_STD)) - return -ENODATA; - - if (cur_timings->timings_type & VPBE_ENC_STD) { - *std_id = cur_timings->std_id; - return 0; - } - - return -EINVAL; -} - -/* - * vpbe_set_mode - Set mode in the current encoder using mode info - * - * Use the mode string to decide what timings to set in the encoder - * This is typically useful when fbset command is used to change the current - * timings by specifying a string to indicate the timings. - */ -static int vpbe_set_mode(struct vpbe_device *vpbe_dev, - struct vpbe_enc_mode_info *mode_info) -{ - struct vpbe_enc_mode_info *preset_mode = NULL; - struct vpbe_config *cfg = vpbe_dev->cfg; - struct v4l2_dv_timings dv_timings; - struct osd_state *osd_device; - int out_index = vpbe_dev->current_out_index; - int i; - - if (!mode_info || !mode_info->name) - return -EINVAL; - - for (i = 0; i < cfg->outputs[out_index].num_modes; i++) { - if (!strcmp(mode_info->name, - cfg->outputs[out_index].modes[i].name)) { - preset_mode = &cfg->outputs[out_index].modes[i]; - /* - * it may be one of the 3 timings type. Check and - * invoke right API - */ - if (preset_mode->timings_type & VPBE_ENC_STD) - return vpbe_s_std(vpbe_dev, - preset_mode->std_id); - if (preset_mode->timings_type & - VPBE_ENC_DV_TIMINGS) { - dv_timings = - preset_mode->dv_timings; - return vpbe_s_dv_timings(vpbe_dev, &dv_timings); - } - } - } - - /* Only custom timing should reach here */ - if (!preset_mode) - return -EINVAL; - - mutex_lock(&vpbe_dev->lock); - - osd_device = vpbe_dev->osd_device; - vpbe_dev->current_timings = *preset_mode; - osd_device->ops.set_left_margin(osd_device, - vpbe_dev->current_timings.left_margin); - osd_device->ops.set_top_margin(osd_device, - vpbe_dev->current_timings.upper_margin); - - mutex_unlock(&vpbe_dev->lock); - return 0; -} - -static int vpbe_set_default_mode(struct vpbe_device *vpbe_dev) -{ - int ret; - - ret = vpbe_get_std_info_by_name(vpbe_dev, def_mode); - if (ret) - return ret; - - /* set the default mode in the encoder */ - return vpbe_set_mode(vpbe_dev, &vpbe_dev->current_timings); -} - -static int platform_device_get(struct device *dev, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - struct vpbe_device *vpbe_dev = data; - - if (strstr(pdev->name, "vpbe-osd")) - vpbe_dev->osd_device = platform_get_drvdata(pdev); - if (strstr(pdev->name, "vpbe-venc")) - vpbe_dev->venc_device = dev_get_platdata(&pdev->dev); - - return 0; -} - -/** - * vpbe_initialize() - Initialize the vpbe display controller - * @dev: Master and slave device ptr - * @vpbe_dev: vpbe device ptr - * - * Master frame buffer device drivers calls this to initialize vpbe - * display controller. This will then registers v4l2 device and the sub - * devices and sets a current encoder sub device for display. v4l2 display - * device driver is the master and frame buffer display device driver is - * the slave. Frame buffer display driver checks the initialized during - * probe and exit if not initialized. Returns status. - */ -static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev) -{ - struct encoder_config_info *enc_info; - struct amp_config_info *amp_info; - struct v4l2_subdev **enc_subdev; - struct osd_state *osd_device; - struct i2c_adapter *i2c_adap; - int num_encoders; - int ret = 0; - int err; - int i; - - /* - * v4l2 abd FBDev frame buffer devices will get the vpbe_dev pointer - * from the platform device by iteration of platform drivers and - * matching with device name - */ - if (!vpbe_dev || !dev) { - printk(KERN_ERR "Null device pointers.\n"); - return -ENODEV; - } - - if (vpbe_dev->initialized) - return 0; - - mutex_lock(&vpbe_dev->lock); - - if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { - /* We have dac clock available for platform */ - vpbe_dev->dac_clk = clk_get(vpbe_dev->pdev, "vpss_dac"); - if (IS_ERR(vpbe_dev->dac_clk)) { - ret = PTR_ERR(vpbe_dev->dac_clk); - goto fail_mutex_unlock; - } - if (clk_prepare_enable(vpbe_dev->dac_clk)) { - ret = -ENODEV; - clk_put(vpbe_dev->dac_clk); - goto fail_mutex_unlock; - } - } - - /* first enable vpss clocks */ - vpss_enable_clock(VPSS_VPBE_CLOCK, 1); - - /* First register a v4l2 device */ - ret = v4l2_device_register(dev, &vpbe_dev->v4l2_dev); - if (ret) { - v4l2_err(dev->driver, - "Unable to register v4l2 device.\n"); - goto fail_clk_put; - } - v4l2_info(&vpbe_dev->v4l2_dev, "vpbe v4l2 device registered\n"); - - err = bus_for_each_dev(&platform_bus_type, NULL, vpbe_dev, - platform_device_get); - if (err < 0) { - ret = err; - goto fail_dev_unregister; - } - - vpbe_dev->venc = venc_sub_dev_init(&vpbe_dev->v4l2_dev, - vpbe_dev->cfg->venc.module_name); - /* register venc sub device */ - if (!vpbe_dev->venc) { - v4l2_err(&vpbe_dev->v4l2_dev, - "vpbe unable to init venc sub device\n"); - ret = -ENODEV; - goto fail_dev_unregister; - } - /* initialize osd device */ - osd_device = vpbe_dev->osd_device; - if (osd_device->ops.initialize) { - err = osd_device->ops.initialize(osd_device); - if (err) { - v4l2_err(&vpbe_dev->v4l2_dev, - "unable to initialize the OSD device"); - ret = -ENOMEM; - goto fail_dev_unregister; - } - } - - /* - * Register any external encoders that are configured. At index 0 we - * store venc sd index. - */ - num_encoders = vpbe_dev->cfg->num_ext_encoders + 1; - vpbe_dev->encoders = kmalloc_array(num_encoders, - sizeof(*vpbe_dev->encoders), - GFP_KERNEL); - if (!vpbe_dev->encoders) { - ret = -ENOMEM; - goto fail_dev_unregister; - } - - i2c_adap = i2c_get_adapter(vpbe_dev->cfg->i2c_adapter_id); - for (i = 0; i < (vpbe_dev->cfg->num_ext_encoders + 1); i++) { - if (i == 0) { - /* venc is at index 0 */ - enc_subdev = &vpbe_dev->encoders[i]; - *enc_subdev = vpbe_dev->venc; - continue; - } - enc_info = &vpbe_dev->cfg->ext_encoders[i]; - if (enc_info->is_i2c) { - enc_subdev = &vpbe_dev->encoders[i]; - *enc_subdev = v4l2_i2c_new_subdev_board( - &vpbe_dev->v4l2_dev, i2c_adap, - &enc_info->board_info, NULL); - if (*enc_subdev) - v4l2_info(&vpbe_dev->v4l2_dev, - "v4l2 sub device %s registered\n", - enc_info->module_name); - else { - v4l2_err(&vpbe_dev->v4l2_dev, "encoder %s failed to register", - enc_info->module_name); - ret = -ENODEV; - goto fail_kfree_encoders; - } - } else - v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c encoders currently not supported"); - } - /* Add amplifier subdevice for dm365 */ - if ((strcmp(vpbe_dev->cfg->module_name, "dm365-vpbe-display") == 0) && - vpbe_dev->cfg->amp) { - amp_info = vpbe_dev->cfg->amp; - if (amp_info->is_i2c) { - vpbe_dev->amp = v4l2_i2c_new_subdev_board( - &vpbe_dev->v4l2_dev, i2c_adap, - &_info->board_info, NULL); - if (!vpbe_dev->amp) { - v4l2_err(&vpbe_dev->v4l2_dev, - "amplifier %s failed to register", - amp_info->module_name); - ret = -ENODEV; - goto fail_kfree_encoders; - } - v4l2_info(&vpbe_dev->v4l2_dev, - "v4l2 sub device %s registered\n", - amp_info->module_name); - } else { - vpbe_dev->amp = NULL; - v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c amplifiers currently not supported"); - } - } else { - vpbe_dev->amp = NULL; - } - - /* set the current encoder and output to that of venc by default */ - vpbe_dev->current_sd_index = 0; - vpbe_dev->current_out_index = 0; - - mutex_unlock(&vpbe_dev->lock); - - printk(KERN_NOTICE "Setting default output to %s\n", def_output); - ret = vpbe_set_default_output(vpbe_dev); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default output %s", - def_output); - goto fail_kfree_amp; - } - - printk(KERN_NOTICE "Setting default mode to %s\n", def_mode); - ret = vpbe_set_default_mode(vpbe_dev); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default mode %s", - def_mode); - goto fail_kfree_amp; - } - vpbe_dev->initialized = 1; - /* TBD handling of bootargs for default output and mode */ - return 0; - -fail_kfree_amp: - mutex_lock(&vpbe_dev->lock); - kfree(vpbe_dev->amp); -fail_kfree_encoders: - kfree(vpbe_dev->encoders); -fail_dev_unregister: - v4l2_device_unregister(&vpbe_dev->v4l2_dev); -fail_clk_put: - if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { - clk_disable_unprepare(vpbe_dev->dac_clk); - clk_put(vpbe_dev->dac_clk); - } -fail_mutex_unlock: - mutex_unlock(&vpbe_dev->lock); - return ret; -} - -/** - * vpbe_deinitialize() - de-initialize the vpbe display controller - * @dev: Master and slave device ptr - * @vpbe_dev: vpbe device ptr - * - * vpbe_master and slave frame buffer devices calls this to de-initialize - * the display controller. It is called when master and slave device - * driver modules are removed and no longer requires the display controller. - */ -static void vpbe_deinitialize(struct device *dev, struct vpbe_device *vpbe_dev) -{ - v4l2_device_unregister(&vpbe_dev->v4l2_dev); - if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { - clk_disable_unprepare(vpbe_dev->dac_clk); - clk_put(vpbe_dev->dac_clk); - } - - kfree(vpbe_dev->amp); - kfree(vpbe_dev->encoders); - vpbe_dev->initialized = 0; - /* disable vpss clocks */ - vpss_enable_clock(VPSS_VPBE_CLOCK, 0); -} - -static const struct vpbe_device_ops vpbe_dev_ops = { - .enum_outputs = vpbe_enum_outputs, - .set_output = vpbe_set_output, - .get_output = vpbe_get_output, - .s_dv_timings = vpbe_s_dv_timings, - .g_dv_timings = vpbe_g_dv_timings, - .enum_dv_timings = vpbe_enum_dv_timings, - .s_std = vpbe_s_std, - .g_std = vpbe_g_std, - .initialize = vpbe_initialize, - .deinitialize = vpbe_deinitialize, - .get_mode_info = vpbe_get_current_mode_info, - .set_mode = vpbe_set_mode, -}; - -static int vpbe_probe(struct platform_device *pdev) -{ - struct vpbe_device *vpbe_dev; - struct vpbe_config *cfg; - - if (!pdev->dev.platform_data) { - v4l2_err(pdev->dev.driver, "No platform data\n"); - return -ENODEV; - } - cfg = pdev->dev.platform_data; - - if (!cfg->module_name[0] || - !cfg->osd.module_name[0] || - !cfg->venc.module_name[0]) { - v4l2_err(pdev->dev.driver, "vpbe display module names not defined\n"); - return -EINVAL; - } - - vpbe_dev = kzalloc(sizeof(*vpbe_dev), GFP_KERNEL); - if (!vpbe_dev) - return -ENOMEM; - - vpbe_dev->cfg = cfg; - vpbe_dev->ops = vpbe_dev_ops; - vpbe_dev->pdev = &pdev->dev; - - if (cfg->outputs->num_modes > 0) - vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0]; - else { - kfree(vpbe_dev); - return -ENODEV; - } - - /* set the driver data in platform device */ - platform_set_drvdata(pdev, vpbe_dev); - mutex_init(&vpbe_dev->lock); - - return 0; -} - -static int vpbe_remove(struct platform_device *device) -{ - struct vpbe_device *vpbe_dev = platform_get_drvdata(device); - - kfree(vpbe_dev); - - return 0; -} - -static struct platform_driver vpbe_driver = { - .driver = { - .name = "vpbe_controller", - }, - .probe = vpbe_probe, - .remove = vpbe_remove, -}; - -module_platform_driver(vpbe_driver); diff --git a/drivers/media/platform/ti/davinci/vpbe_display.c b/drivers/media/platform/ti/davinci/vpbe_display.c deleted file mode 100644 index 9ea70817538e..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe_display.c +++ /dev/null @@ -1,1510 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/string.h> -#include <linux/wait.h> -#include <linux/time.h> -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/mm.h> -#include <linux/mutex.h> -#include <linux/videodev2.h> -#include <linux/slab.h> - - -#include <media/v4l2-dev.h> -#include <media/v4l2-common.h> -#include <media/v4l2-ioctl.h> -#include <media/v4l2-device.h> -#include <media/davinci/vpbe_display.h> -#include <media/davinci/vpbe_types.h> -#include <media/davinci/vpbe.h> -#include <media/davinci/vpbe_venc.h> -#include <media/davinci/vpbe_osd.h> -#include "vpbe_venc_regs.h" - -#define VPBE_DISPLAY_DRIVER "vpbe-v4l2" - -static int debug; - -#define VPBE_DEFAULT_NUM_BUFS 3 - -module_param(debug, int, 0644); - -static int vpbe_set_osd_display_params(struct vpbe_display *disp_dev, - struct vpbe_layer *layer); - -static int venc_is_second_field(struct vpbe_display *disp_dev) -{ - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - int ret, val; - - ret = v4l2_subdev_call(vpbe_dev->venc, - core, - command, - VENC_GET_FLD, - &val); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in getting Field ID 0\n"); - return 1; - } - return val; -} - -static void vpbe_isr_even_field(struct vpbe_display *disp_obj, - struct vpbe_layer *layer) -{ - if (layer->cur_frm == layer->next_frm) - return; - - layer->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns(); - vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE); - /* Make cur_frm pointing to next_frm */ - layer->cur_frm = layer->next_frm; -} - -static void vpbe_isr_odd_field(struct vpbe_display *disp_obj, - struct vpbe_layer *layer) -{ - struct osd_state *osd_device = disp_obj->osd_device; - unsigned long addr; - - spin_lock(&disp_obj->dma_queue_lock); - if (list_empty(&layer->dma_queue) || - (layer->cur_frm != layer->next_frm)) { - spin_unlock(&disp_obj->dma_queue_lock); - return; - } - /* - * one field is displayed configure - * the next frame if it is available - * otherwise hold on current frame - * Get next from the buffer queue - */ - layer->next_frm = list_entry(layer->dma_queue.next, - struct vpbe_disp_buffer, list); - /* Remove that from the buffer queue */ - list_del(&layer->next_frm->list); - spin_unlock(&disp_obj->dma_queue_lock); - /* Mark state of the frame to active */ - layer->next_frm->vb.vb2_buf.state = VB2_BUF_STATE_ACTIVE; - addr = vb2_dma_contig_plane_dma_addr(&layer->next_frm->vb.vb2_buf, 0); - osd_device->ops.start_layer(osd_device, - layer->layer_info.id, - addr, - disp_obj->cbcr_ofst); -} - -/* interrupt service routine */ -static irqreturn_t venc_isr(int irq, void *arg) -{ - struct vpbe_display *disp_dev = (struct vpbe_display *)arg; - struct vpbe_layer *layer; - static unsigned last_event; - unsigned event = 0; - int fid; - int i; - - if (!arg || !disp_dev->dev[0]) - return IRQ_HANDLED; - - if (venc_is_second_field(disp_dev)) - event |= VENC_SECOND_FIELD; - else - event |= VENC_FIRST_FIELD; - - if (event == (last_event & ~VENC_END_OF_FRAME)) { - /* - * If the display is non-interlaced, then we need to flag the - * end-of-frame event at every interrupt regardless of the - * value of the FIDST bit. We can conclude that the display is - * non-interlaced if the value of the FIDST bit is unchanged - * from the previous interrupt. - */ - event |= VENC_END_OF_FRAME; - } else if (event == VENC_SECOND_FIELD) { - /* end-of-frame for interlaced display */ - event |= VENC_END_OF_FRAME; - } - last_event = event; - - for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { - layer = disp_dev->dev[i]; - - if (!vb2_start_streaming_called(&layer->buffer_queue)) - continue; - - if (layer->layer_first_int) { - layer->layer_first_int = 0; - continue; - } - /* Check the field format */ - if ((V4L2_FIELD_NONE == layer->pix_fmt.field) && - (event & VENC_END_OF_FRAME)) { - /* Progressive mode */ - - vpbe_isr_even_field(disp_dev, layer); - vpbe_isr_odd_field(disp_dev, layer); - } else { - /* Interlaced mode */ - - layer->field_id ^= 1; - if (event & VENC_FIRST_FIELD) - fid = 0; - else - fid = 1; - - /* - * If field id does not match with store - * field id - */ - if (fid != layer->field_id) { - /* Make them in sync */ - layer->field_id = fid; - continue; - } - /* - * device field id and local field id are - * in sync. If this is even field - */ - if (0 == fid) - vpbe_isr_even_field(disp_dev, layer); - else /* odd field */ - vpbe_isr_odd_field(disp_dev, layer); - } - } - - return IRQ_HANDLED; -} - -/* - * vpbe_buffer_prepare() - * This is the callback function called from vb2_qbuf() function - * the buffer is prepared and user space virtual address is converted into - * physical address - */ -static int vpbe_buffer_prepare(struct vb2_buffer *vb) -{ - struct vb2_queue *q = vb->vb2_queue; - struct vpbe_layer *layer = vb2_get_drv_priv(q); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - unsigned long addr; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "vpbe_buffer_prepare\n"); - - vb2_set_plane_payload(vb, 0, layer->pix_fmt.sizeimage); - if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0)) - return -EINVAL; - - addr = vb2_dma_contig_plane_dma_addr(vb, 0); - if (!IS_ALIGNED(addr, 8)) { - v4l2_err(&vpbe_dev->v4l2_dev, - "buffer_prepare:offset is not aligned to 32 bytes\n"); - return -EINVAL; - } - return 0; -} - -/* - * vpbe_buffer_setup() - * This function allocates memory for the buffers - */ -static int -vpbe_buffer_queue_setup(struct vb2_queue *vq, - unsigned int *nbuffers, unsigned int *nplanes, - unsigned int sizes[], struct device *alloc_devs[]) - -{ - /* Get the file handle object and layer object */ - struct vpbe_layer *layer = vb2_get_drv_priv(vq); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_buffer_setup\n"); - - /* Store number of buffers allocated in numbuffer member */ - if (vq->num_buffers + *nbuffers < VPBE_DEFAULT_NUM_BUFS) - *nbuffers = VPBE_DEFAULT_NUM_BUFS - vq->num_buffers; - - if (*nplanes) - return sizes[0] < layer->pix_fmt.sizeimage ? -EINVAL : 0; - - *nplanes = 1; - sizes[0] = layer->pix_fmt.sizeimage; - - return 0; -} - -/* - * vpbe_buffer_queue() - * This function adds the buffer to DMA queue - */ -static void vpbe_buffer_queue(struct vb2_buffer *vb) -{ - struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); - /* Get the file handle object and layer object */ - struct vpbe_disp_buffer *buf = container_of(vbuf, - struct vpbe_disp_buffer, vb); - struct vpbe_layer *layer = vb2_get_drv_priv(vb->vb2_queue); - struct vpbe_display *disp = layer->disp_dev; - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - unsigned long flags; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "vpbe_buffer_queue\n"); - - /* add the buffer to the DMA queue */ - spin_lock_irqsave(&disp->dma_queue_lock, flags); - list_add_tail(&buf->list, &layer->dma_queue); - spin_unlock_irqrestore(&disp->dma_queue_lock, flags); -} - -static int vpbe_start_streaming(struct vb2_queue *vq, unsigned int count) -{ - struct vpbe_layer *layer = vb2_get_drv_priv(vq); - struct osd_state *osd_device = layer->disp_dev->osd_device; - int ret; - - osd_device->ops.disable_layer(osd_device, layer->layer_info.id); - - /* Get the next frame from the buffer queue */ - layer->next_frm = layer->cur_frm = list_entry(layer->dma_queue.next, - struct vpbe_disp_buffer, list); - /* Remove buffer from the buffer queue */ - list_del(&layer->cur_frm->list); - /* Mark state of the current frame to active */ - layer->cur_frm->vb.vb2_buf.state = VB2_BUF_STATE_ACTIVE; - /* Initialize field_id and started member */ - layer->field_id = 0; - - /* Set parameters in OSD and VENC */ - ret = vpbe_set_osd_display_params(layer->disp_dev, layer); - if (ret < 0) { - struct vpbe_disp_buffer *buf, *tmp; - - vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, - VB2_BUF_STATE_QUEUED); - list_for_each_entry_safe(buf, tmp, &layer->dma_queue, list) { - list_del(&buf->list); - vb2_buffer_done(&buf->vb.vb2_buf, - VB2_BUF_STATE_QUEUED); - } - - return ret; - } - - /* - * if request format is yuv420 semiplanar, need to - * enable both video windows - */ - layer->layer_first_int = 1; - - return ret; -} - -static void vpbe_stop_streaming(struct vb2_queue *vq) -{ - struct vpbe_layer *layer = vb2_get_drv_priv(vq); - struct osd_state *osd_device = layer->disp_dev->osd_device; - struct vpbe_display *disp = layer->disp_dev; - unsigned long flags; - - if (!vb2_is_streaming(vq)) - return; - - osd_device->ops.disable_layer(osd_device, layer->layer_info.id); - - /* release all active buffers */ - spin_lock_irqsave(&disp->dma_queue_lock, flags); - if (layer->cur_frm == layer->next_frm) { - vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, - VB2_BUF_STATE_ERROR); - } else { - if (layer->cur_frm) - vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, - VB2_BUF_STATE_ERROR); - if (layer->next_frm) - vb2_buffer_done(&layer->next_frm->vb.vb2_buf, - VB2_BUF_STATE_ERROR); - } - - while (!list_empty(&layer->dma_queue)) { - layer->next_frm = list_entry(layer->dma_queue.next, - struct vpbe_disp_buffer, list); - list_del(&layer->next_frm->list); - vb2_buffer_done(&layer->next_frm->vb.vb2_buf, - VB2_BUF_STATE_ERROR); - } - spin_unlock_irqrestore(&disp->dma_queue_lock, flags); -} - -static const struct vb2_ops video_qops = { - .queue_setup = vpbe_buffer_queue_setup, - .wait_prepare = vb2_ops_wait_prepare, - .wait_finish = vb2_ops_wait_finish, - .buf_prepare = vpbe_buffer_prepare, - .start_streaming = vpbe_start_streaming, - .stop_streaming = vpbe_stop_streaming, - .buf_queue = vpbe_buffer_queue, -}; - -static -struct vpbe_layer* -_vpbe_display_get_other_win_layer(struct vpbe_display *disp_dev, - struct vpbe_layer *layer) -{ - enum vpbe_display_device_id thiswin, otherwin; - thiswin = layer->device_id; - - otherwin = (thiswin == VPBE_DISPLAY_DEVICE_0) ? - VPBE_DISPLAY_DEVICE_1 : VPBE_DISPLAY_DEVICE_0; - return disp_dev->dev[otherwin]; -} - -static int vpbe_set_osd_display_params(struct vpbe_display *disp_dev, - struct vpbe_layer *layer) -{ - struct osd_layer_config *cfg = &layer->layer_info.config; - struct osd_state *osd_device = disp_dev->osd_device; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - unsigned long addr; - int ret; - - addr = vb2_dma_contig_plane_dma_addr(&layer->cur_frm->vb.vb2_buf, 0); - /* Set address in the display registers */ - osd_device->ops.start_layer(osd_device, - layer->layer_info.id, - addr, - disp_dev->cbcr_ofst); - - ret = osd_device->ops.enable_layer(osd_device, - layer->layer_info.id, 0); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in enabling osd window layer 0\n"); - return -1; - } - - /* Enable the window */ - layer->layer_info.enable = 1; - if (cfg->pixfmt == PIXFMT_NV12) { - struct vpbe_layer *otherlayer = - _vpbe_display_get_other_win_layer(disp_dev, layer); - - ret = osd_device->ops.enable_layer(osd_device, - otherlayer->layer_info.id, 1); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in enabling osd window layer 1\n"); - return -1; - } - otherlayer->layer_info.enable = 1; - } - return 0; -} - -static void -vpbe_disp_calculate_scale_factor(struct vpbe_display *disp_dev, - struct vpbe_layer *layer, - int expected_xsize, int expected_ysize) -{ - struct display_layer_info *layer_info = &layer->layer_info; - struct v4l2_pix_format *pixfmt = &layer->pix_fmt; - struct osd_layer_config *cfg = &layer->layer_info.config; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - int calculated_xsize; - int h_exp = 0; - int v_exp = 0; - int h_scale; - int v_scale; - - v4l2_std_id standard_id = vpbe_dev->current_timings.std_id; - - /* - * Application initially set the image format. Current display - * size is obtained from the vpbe display controller. expected_xsize - * and expected_ysize are set through S_SELECTION ioctl. Based on this, - * driver will calculate the scale factors for vertical and - * horizontal direction so that the image is displayed scaled - * and expanded. Application uses expansion to display the image - * in a square pixel. Otherwise it is displayed using displays - * pixel aspect ratio.It is expected that application chooses - * the crop coordinates for cropped or scaled display. if crop - * size is less than the image size, it is displayed cropped or - * it is displayed scaled and/or expanded. - * - * to begin with, set the crop window same as expected. Later we - * will override with scaled window size - */ - - cfg->xsize = pixfmt->width; - cfg->ysize = pixfmt->height; - layer_info->h_zoom = ZOOM_X1; /* no horizontal zoom */ - layer_info->v_zoom = ZOOM_X1; /* no horizontal zoom */ - layer_info->h_exp = H_EXP_OFF; /* no horizontal zoom */ - layer_info->v_exp = V_EXP_OFF; /* no horizontal zoom */ - - if (pixfmt->width < expected_xsize) { - h_scale = vpbe_dev->current_timings.xres / pixfmt->width; - if (h_scale < 2) - h_scale = 1; - else if (h_scale >= 4) - h_scale = 4; - else - h_scale = 2; - cfg->xsize *= h_scale; - if (cfg->xsize < expected_xsize) { - if ((standard_id & V4L2_STD_525_60) || - (standard_id & V4L2_STD_625_50)) { - calculated_xsize = (cfg->xsize * - VPBE_DISPLAY_H_EXP_RATIO_N) / - VPBE_DISPLAY_H_EXP_RATIO_D; - if (calculated_xsize <= expected_xsize) { - h_exp = 1; - cfg->xsize = calculated_xsize; - } - } - } - if (h_scale == 2) - layer_info->h_zoom = ZOOM_X2; - else if (h_scale == 4) - layer_info->h_zoom = ZOOM_X4; - if (h_exp) - layer_info->h_exp = H_EXP_9_OVER_8; - } else { - /* no scaling, only cropping. Set display area to crop area */ - cfg->xsize = expected_xsize; - } - - if (pixfmt->height < expected_ysize) { - v_scale = expected_ysize / pixfmt->height; - if (v_scale < 2) - v_scale = 1; - else if (v_scale >= 4) - v_scale = 4; - else - v_scale = 2; - cfg->ysize *= v_scale; - if (cfg->ysize < expected_ysize) { - if ((standard_id & V4L2_STD_625_50)) { - calculated_xsize = (cfg->ysize * - VPBE_DISPLAY_V_EXP_RATIO_N) / - VPBE_DISPLAY_V_EXP_RATIO_D; - if (calculated_xsize <= expected_ysize) { - v_exp = 1; - cfg->ysize = calculated_xsize; - } - } - } - if (v_scale == 2) - layer_info->v_zoom = ZOOM_X2; - else if (v_scale == 4) - layer_info->v_zoom = ZOOM_X4; - if (v_exp) - layer_info->v_exp = V_EXP_6_OVER_5; - } else { - /* no scaling, only cropping. Set display area to crop area */ - cfg->ysize = expected_ysize; - } - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "crop display xsize = %d, ysize = %d\n", - cfg->xsize, cfg->ysize); -} - -static void vpbe_disp_adj_position(struct vpbe_display *disp_dev, - struct vpbe_layer *layer, - int top, int left) -{ - struct osd_layer_config *cfg = &layer->layer_info.config; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - - cfg->xpos = min((unsigned int)left, - vpbe_dev->current_timings.xres - cfg->xsize); - cfg->ypos = min((unsigned int)top, - vpbe_dev->current_timings.yres - cfg->ysize); - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "new xpos = %d, ypos = %d\n", - cfg->xpos, cfg->ypos); -} - -static void vpbe_disp_check_window_params(struct vpbe_display *disp_dev, - struct v4l2_rect *c) -{ - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - - if ((c->width == 0) || - ((c->width + c->left) > vpbe_dev->current_timings.xres)) - c->width = vpbe_dev->current_timings.xres - c->left; - - if ((c->height == 0) || ((c->height + c->top) > - vpbe_dev->current_timings.yres)) - c->height = vpbe_dev->current_timings.yres - c->top; - - /* window height must be even for interlaced display */ - if (vpbe_dev->current_timings.interlaced) - c->height &= (~0x01); - -} - -/* - * vpbe_try_format() - * If user application provides width and height, and have bytesperline set - * to zero, driver calculates bytesperline and sizeimage based on hardware - * limits. - */ -static int vpbe_try_format(struct vpbe_display *disp_dev, - struct v4l2_pix_format *pixfmt, int check) -{ - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - int min_height = 1; - int min_width = 32; - int max_height; - int max_width; - int bpp; - - if ((pixfmt->pixelformat != V4L2_PIX_FMT_UYVY) && - (pixfmt->pixelformat != V4L2_PIX_FMT_NV12)) - /* choose default as V4L2_PIX_FMT_UYVY */ - pixfmt->pixelformat = V4L2_PIX_FMT_UYVY; - - /* Check the field format */ - if ((pixfmt->field != V4L2_FIELD_INTERLACED) && - (pixfmt->field != V4L2_FIELD_NONE)) { - if (vpbe_dev->current_timings.interlaced) - pixfmt->field = V4L2_FIELD_INTERLACED; - else - pixfmt->field = V4L2_FIELD_NONE; - } - - if (pixfmt->field == V4L2_FIELD_INTERLACED) - min_height = 2; - - if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) - bpp = 1; - else - bpp = 2; - - max_width = vpbe_dev->current_timings.xres; - max_height = vpbe_dev->current_timings.yres; - - min_width /= bpp; - - if (!pixfmt->width || (pixfmt->width < min_width) || - (pixfmt->width > max_width)) { - pixfmt->width = vpbe_dev->current_timings.xres; - } - - if (!pixfmt->height || (pixfmt->height < min_height) || - (pixfmt->height > max_height)) { - pixfmt->height = vpbe_dev->current_timings.yres; - } - - if (pixfmt->bytesperline < (pixfmt->width * bpp)) - pixfmt->bytesperline = pixfmt->width * bpp; - - /* Make the bytesperline 32 byte aligned */ - pixfmt->bytesperline = ((pixfmt->width * bpp + 31) & ~31); - - if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) - pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height + - (pixfmt->bytesperline * pixfmt->height >> 1); - else - pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; - - return 0; -} - -static int vpbe_display_querycap(struct file *file, void *priv, - struct v4l2_capability *cap) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - snprintf(cap->driver, sizeof(cap->driver), "%s", - dev_name(vpbe_dev->pdev)); - strscpy(cap->card, vpbe_dev->cfg->module_name, sizeof(cap->card)); - - return 0; -} - -static int vpbe_display_s_selection(struct file *file, void *priv, - struct v4l2_selection *sel) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_display *disp_dev = layer->disp_dev; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - struct osd_layer_config *cfg = &layer->layer_info.config; - struct osd_state *osd_device = disp_dev->osd_device; - struct v4l2_rect rect = sel->r; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "VIDIOC_S_SELECTION, layer id = %d\n", layer->device_id); - - if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT || - sel->target != V4L2_SEL_TGT_CROP) - return -EINVAL; - - if (rect.top < 0) - rect.top = 0; - if (rect.left < 0) - rect.left = 0; - - vpbe_disp_check_window_params(disp_dev, &rect); - - osd_device->ops.get_layer_config(osd_device, - layer->layer_info.id, cfg); - - vpbe_disp_calculate_scale_factor(disp_dev, layer, - rect.width, - rect.height); - vpbe_disp_adj_position(disp_dev, layer, rect.top, - rect.left); - ret = osd_device->ops.set_layer_config(osd_device, - layer->layer_info.id, cfg); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in set layer config:\n"); - return -EINVAL; - } - - /* apply zooming and h or v expansion */ - osd_device->ops.set_zoom(osd_device, - layer->layer_info.id, - layer->layer_info.h_zoom, - layer->layer_info.v_zoom); - ret = osd_device->ops.set_vid_expansion(osd_device, - layer->layer_info.h_exp, - layer->layer_info.v_exp); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in set vid expansion:\n"); - return -EINVAL; - } - - if ((layer->layer_info.h_zoom != ZOOM_X1) || - (layer->layer_info.v_zoom != ZOOM_X1) || - (layer->layer_info.h_exp != H_EXP_OFF) || - (layer->layer_info.v_exp != V_EXP_OFF)) - /* Enable expansion filter */ - osd_device->ops.set_interpolation_filter(osd_device, 1); - else - osd_device->ops.set_interpolation_filter(osd_device, 0); - - sel->r = rect; - return 0; -} - -static int vpbe_display_g_selection(struct file *file, void *priv, - struct v4l2_selection *sel) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct osd_layer_config *cfg = &layer->layer_info.config; - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - struct osd_state *osd_device = layer->disp_dev->osd_device; - struct v4l2_rect *rect = &sel->r; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "VIDIOC_G_SELECTION, layer id = %d\n", - layer->device_id); - - if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) - return -EINVAL; - - switch (sel->target) { - case V4L2_SEL_TGT_CROP: - osd_device->ops.get_layer_config(osd_device, - layer->layer_info.id, cfg); - rect->top = cfg->ypos; - rect->left = cfg->xpos; - rect->width = cfg->xsize; - rect->height = cfg->ysize; - break; - case V4L2_SEL_TGT_CROP_DEFAULT: - case V4L2_SEL_TGT_CROP_BOUNDS: - rect->left = 0; - rect->top = 0; - rect->width = vpbe_dev->current_timings.xres; - rect->height = vpbe_dev->current_timings.yres; - break; - default: - return -EINVAL; - } - - return 0; -} - -static int vpbe_display_g_pixelaspect(struct file *file, void *priv, - int type, struct v4l2_fract *f) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_CROPCAP ioctl\n"); - - if (type != V4L2_BUF_TYPE_VIDEO_OUTPUT) - return -EINVAL; - - *f = vpbe_dev->current_timings.aspect; - return 0; -} - -static int vpbe_display_g_fmt(struct file *file, void *priv, - struct v4l2_format *fmt) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "VIDIOC_G_FMT, layer id = %d\n", - layer->device_id); - - /* If buffer type is video output */ - if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { - v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n"); - return -EINVAL; - } - /* Fill in the information about format */ - fmt->fmt.pix = layer->pix_fmt; - - return 0; -} - -static int vpbe_display_enum_fmt(struct file *file, void *priv, - struct v4l2_fmtdesc *fmt) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "VIDIOC_ENUM_FMT, layer id = %d\n", - layer->device_id); - if (fmt->index > 1) { - v4l2_err(&vpbe_dev->v4l2_dev, "Invalid format index\n"); - return -EINVAL; - } - - /* Fill in the information about format */ - if (fmt->index == 0) - fmt->pixelformat = V4L2_PIX_FMT_UYVY; - else - fmt->pixelformat = V4L2_PIX_FMT_NV12; - - return 0; -} - -static int vpbe_display_s_fmt(struct file *file, void *priv, - struct v4l2_format *fmt) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_display *disp_dev = layer->disp_dev; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - struct osd_layer_config *cfg = &layer->layer_info.config; - struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; - struct osd_state *osd_device = disp_dev->osd_device; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "VIDIOC_S_FMT, layer id = %d\n", - layer->device_id); - - if (vb2_is_busy(&layer->buffer_queue)) - return -EBUSY; - - if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "invalid type\n"); - return -EINVAL; - } - /* Check for valid pixel format */ - ret = vpbe_try_format(disp_dev, pixfmt, 1); - if (ret) - return ret; - - /* YUV420 is requested, check availability of the - other video window */ - - layer->pix_fmt = *pixfmt; - if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) { - struct vpbe_layer *otherlayer; - - otherlayer = _vpbe_display_get_other_win_layer(disp_dev, layer); - /* if other layer is available, only - * claim it, do not configure it - */ - ret = osd_device->ops.request_layer(osd_device, - otherlayer->layer_info.id); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Display Manager failed to allocate layer\n"); - return -EBUSY; - } - } - - /* Get osd layer config */ - osd_device->ops.get_layer_config(osd_device, - layer->layer_info.id, cfg); - /* Store the pixel format in the layer object */ - cfg->xsize = pixfmt->width; - cfg->ysize = pixfmt->height; - cfg->line_length = pixfmt->bytesperline; - cfg->ypos = 0; - cfg->xpos = 0; - cfg->interlaced = vpbe_dev->current_timings.interlaced; - - if (V4L2_PIX_FMT_UYVY == pixfmt->pixelformat) - cfg->pixfmt = PIXFMT_YCBCRI; - - /* Change of the default pixel format for both video windows */ - if (V4L2_PIX_FMT_NV12 == pixfmt->pixelformat) { - struct vpbe_layer *otherlayer; - cfg->pixfmt = PIXFMT_NV12; - otherlayer = _vpbe_display_get_other_win_layer(disp_dev, - layer); - otherlayer->layer_info.config.pixfmt = PIXFMT_NV12; - } - - /* Set the layer config in the osd window */ - ret = osd_device->ops.set_layer_config(osd_device, - layer->layer_info.id, cfg); - if (ret < 0) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Error in S_FMT params:\n"); - return -EINVAL; - } - - /* Readback and fill the local copy of current pix format */ - osd_device->ops.get_layer_config(osd_device, - layer->layer_info.id, cfg); - - return 0; -} - -static int vpbe_display_try_fmt(struct file *file, void *priv, - struct v4l2_format *fmt) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_display *disp_dev = layer->disp_dev; - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_TRY_FMT\n"); - - if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { - v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n"); - return -EINVAL; - } - - /* Check for valid field format */ - return vpbe_try_format(disp_dev, pixfmt, 0); - -} - -/* - * vpbe_display_s_std - Set the given standard in the encoder - * - * Sets the standard if supported by the current encoder. Return the status. - * 0 - success & -EINVAL on error - */ -static int vpbe_display_s_std(struct file *file, void *priv, - v4l2_std_id std_id) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_STD\n"); - - if (vb2_is_busy(&layer->buffer_queue)) - return -EBUSY; - - if (vpbe_dev->ops.s_std) { - ret = vpbe_dev->ops.s_std(vpbe_dev, std_id); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Failed to set standard for sub devices\n"); - return -EINVAL; - } - } else { - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_g_std - Get the standard in the current encoder - * - * Get the standard in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int vpbe_display_g_std(struct file *file, void *priv, - v4l2_std_id *std_id) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_STD\n"); - - /* Get the standard from the current encoder */ - if (vpbe_dev->current_timings.timings_type & VPBE_ENC_STD) { - *std_id = vpbe_dev->current_timings.std_id; - return 0; - } - - return -EINVAL; -} - -/* - * vpbe_display_enum_output - enumerate outputs - * - * Enumerates the outputs available at the vpbe display - * returns the status, -EINVAL if end of output list - */ -static int vpbe_display_enum_output(struct file *file, void *priv, - struct v4l2_output *output) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_OUTPUT\n"); - - /* Enumerate outputs */ - if (!vpbe_dev->ops.enum_outputs) - return -EINVAL; - - ret = vpbe_dev->ops.enum_outputs(vpbe_dev, output); - if (ret) { - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "Failed to enumerate outputs\n"); - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_s_output - Set output to - * the output specified by the index - */ -static int vpbe_display_s_output(struct file *file, void *priv, - unsigned int i) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_OUTPUT\n"); - - if (vb2_is_busy(&layer->buffer_queue)) - return -EBUSY; - - if (!vpbe_dev->ops.set_output) - return -EINVAL; - - ret = vpbe_dev->ops.set_output(vpbe_dev, i); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Failed to set output for sub devices\n"); - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_g_output - Get output from subdevice - * for a given by the index - */ -static int vpbe_display_g_output(struct file *file, void *priv, - unsigned int *i) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_OUTPUT\n"); - /* Get the standard from the current encoder */ - *i = vpbe_dev->current_out_index; - - return 0; -} - -/* - * vpbe_display_enum_dv_timings - Enumerate the dv timings - * - * enum the timings in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int -vpbe_display_enum_dv_timings(struct file *file, void *priv, - struct v4l2_enum_dv_timings *timings) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_DV_TIMINGS\n"); - - /* Enumerate outputs */ - if (!vpbe_dev->ops.enum_dv_timings) - return -EINVAL; - - ret = vpbe_dev->ops.enum_dv_timings(vpbe_dev, timings); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Failed to enumerate dv timings info\n"); - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_s_dv_timings - Set the dv timings - * - * Set the timings in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int -vpbe_display_s_dv_timings(struct file *file, void *priv, - struct v4l2_dv_timings *timings) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - int ret; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_DV_TIMINGS\n"); - - if (vb2_is_busy(&layer->buffer_queue)) - return -EBUSY; - - /* Set the given standard in the encoder */ - if (!vpbe_dev->ops.s_dv_timings) - return -EINVAL; - - ret = vpbe_dev->ops.s_dv_timings(vpbe_dev, timings); - if (ret) { - v4l2_err(&vpbe_dev->v4l2_dev, - "Failed to set the dv timings info\n"); - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_g_dv_timings - Set the dv timings - * - * Get the timings in the current encoder. Return the status. 0 - success - * -EINVAL on error - */ -static int -vpbe_display_g_dv_timings(struct file *file, void *priv, - struct v4l2_dv_timings *dv_timings) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_device *vpbe_dev = layer->disp_dev->vpbe_dev; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_DV_TIMINGS\n"); - - /* Get the given standard in the encoder */ - - if (vpbe_dev->current_timings.timings_type & - VPBE_ENC_DV_TIMINGS) { - *dv_timings = vpbe_dev->current_timings.dv_timings; - } else { - return -EINVAL; - } - - return 0; -} - -/* - * vpbe_display_open() - * It creates object of file handle structure and stores it in private_data - * member of filepointer - */ -static int vpbe_display_open(struct file *file) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct vpbe_display *disp_dev = layer->disp_dev; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - struct osd_state *osd_device = disp_dev->osd_device; - int err; - - /* creating context for file descriptor */ - err = v4l2_fh_open(file); - if (err) { - v4l2_err(&vpbe_dev->v4l2_dev, "v4l2_fh_open failed\n"); - return err; - } - - /* leaving if layer is already initialized */ - if (!v4l2_fh_is_singular_file(file)) - return err; - - if (!layer->usrs) { - if (mutex_lock_interruptible(&layer->opslock)) - return -ERESTARTSYS; - /* First claim the layer for this device */ - err = osd_device->ops.request_layer(osd_device, - layer->layer_info.id); - mutex_unlock(&layer->opslock); - if (err < 0) { - /* Couldn't get layer */ - v4l2_err(&vpbe_dev->v4l2_dev, - "Display Manager failed to allocate layer\n"); - v4l2_fh_release(file); - return -EINVAL; - } - } - /* Increment layer usrs counter */ - layer->usrs++; - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, - "vpbe display device opened successfully\n"); - return 0; -} - -/* - * vpbe_display_release() - * This function deletes buffer queue, frees the buffers and the davinci - * display file * handle - */ -static int vpbe_display_release(struct file *file) -{ - struct vpbe_layer *layer = video_drvdata(file); - struct osd_layer_config *cfg = &layer->layer_info.config; - struct vpbe_display *disp_dev = layer->disp_dev; - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - struct osd_state *osd_device = disp_dev->osd_device; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_release\n"); - - mutex_lock(&layer->opslock); - - osd_device->ops.disable_layer(osd_device, - layer->layer_info.id); - /* Decrement layer usrs counter */ - layer->usrs--; - /* If this file handle has initialize encoder device, reset it */ - if (!layer->usrs) { - if (cfg->pixfmt == PIXFMT_NV12) { - struct vpbe_layer *otherlayer; - otherlayer = - _vpbe_display_get_other_win_layer(disp_dev, layer); - osd_device->ops.disable_layer(osd_device, - otherlayer->layer_info.id); - osd_device->ops.release_layer(osd_device, - otherlayer->layer_info.id); - } - osd_device->ops.disable_layer(osd_device, - layer->layer_info.id); - osd_device->ops.release_layer(osd_device, - layer->layer_info.id); - } - - _vb2_fop_release(file, NULL); - mutex_unlock(&layer->opslock); - - disp_dev->cbcr_ofst = 0; - - return 0; -} - -/* vpbe capture ioctl operations */ -static const struct v4l2_ioctl_ops vpbe_ioctl_ops = { - .vidioc_querycap = vpbe_display_querycap, - .vidioc_g_fmt_vid_out = vpbe_display_g_fmt, - .vidioc_enum_fmt_vid_out = vpbe_display_enum_fmt, - .vidioc_s_fmt_vid_out = vpbe_display_s_fmt, - .vidioc_try_fmt_vid_out = vpbe_display_try_fmt, - - .vidioc_reqbufs = vb2_ioctl_reqbufs, - .vidioc_create_bufs = vb2_ioctl_create_bufs, - .vidioc_querybuf = vb2_ioctl_querybuf, - .vidioc_qbuf = vb2_ioctl_qbuf, - .vidioc_dqbuf = vb2_ioctl_dqbuf, - .vidioc_streamon = vb2_ioctl_streamon, - .vidioc_streamoff = vb2_ioctl_streamoff, - .vidioc_expbuf = vb2_ioctl_expbuf, - - .vidioc_g_pixelaspect = vpbe_display_g_pixelaspect, - .vidioc_g_selection = vpbe_display_g_selection, - .vidioc_s_selection = vpbe_display_s_selection, - - .vidioc_s_std = vpbe_display_s_std, - .vidioc_g_std = vpbe_display_g_std, - - .vidioc_enum_output = vpbe_display_enum_output, - .vidioc_s_output = vpbe_display_s_output, - .vidioc_g_output = vpbe_display_g_output, - - .vidioc_s_dv_timings = vpbe_display_s_dv_timings, - .vidioc_g_dv_timings = vpbe_display_g_dv_timings, - .vidioc_enum_dv_timings = vpbe_display_enum_dv_timings, -}; - -static const struct v4l2_file_operations vpbe_fops = { - .owner = THIS_MODULE, - .open = vpbe_display_open, - .release = vpbe_display_release, - .unlocked_ioctl = video_ioctl2, - .mmap = vb2_fop_mmap, - .poll = vb2_fop_poll, -}; - -static int vpbe_device_get(struct device *dev, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - struct vpbe_display *vpbe_disp = data; - - if (strcmp("vpbe_controller", pdev->name) == 0) - vpbe_disp->vpbe_dev = platform_get_drvdata(pdev); - - if (strstr(pdev->name, "vpbe-osd")) - vpbe_disp->osd_device = platform_get_drvdata(pdev); - - return 0; -} - -static int init_vpbe_layer(int i, struct vpbe_display *disp_dev, - struct platform_device *pdev) -{ - struct vpbe_layer *vpbe_display_layer = NULL; - struct video_device *vbd = NULL; - - /* Allocate memory for four plane display objects */ - disp_dev->dev[i] = kzalloc(sizeof(*disp_dev->dev[i]), GFP_KERNEL); - if (!disp_dev->dev[i]) - return -ENOMEM; - - spin_lock_init(&disp_dev->dev[i]->irqlock); - mutex_init(&disp_dev->dev[i]->opslock); - - /* Get the pointer to the layer object */ - vpbe_display_layer = disp_dev->dev[i]; - vbd = &vpbe_display_layer->video_dev; - /* Initialize field of video device */ - vbd->release = video_device_release_empty; - vbd->fops = &vpbe_fops; - vbd->ioctl_ops = &vpbe_ioctl_ops; - vbd->minor = -1; - vbd->v4l2_dev = &disp_dev->vpbe_dev->v4l2_dev; - vbd->lock = &vpbe_display_layer->opslock; - vbd->vfl_dir = VFL_DIR_TX; - vbd->device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; - - if (disp_dev->vpbe_dev->current_timings.timings_type & - VPBE_ENC_STD) - vbd->tvnorms = (V4L2_STD_525_60 | V4L2_STD_625_50); - - snprintf(vbd->name, sizeof(vbd->name), - "DaVinci_VPBE Display_DRIVER_V%d.%d.%d", - (VPBE_DISPLAY_VERSION_CODE >> 16) & 0xff, - (VPBE_DISPLAY_VERSION_CODE >> 8) & 0xff, - (VPBE_DISPLAY_VERSION_CODE) & 0xff); - - vpbe_display_layer->device_id = i; - - vpbe_display_layer->layer_info.id = - ((i == VPBE_DISPLAY_DEVICE_0) ? WIN_VID0 : WIN_VID1); - - - return 0; -} - -static int register_device(struct vpbe_layer *vpbe_display_layer, - struct vpbe_display *disp_dev, - struct platform_device *pdev) -{ - int err; - - v4l2_info(&disp_dev->vpbe_dev->v4l2_dev, - "Trying to register VPBE display device.\n"); - v4l2_info(&disp_dev->vpbe_dev->v4l2_dev, - "layer=%p,layer->video_dev=%p\n", - vpbe_display_layer, - &vpbe_display_layer->video_dev); - - vpbe_display_layer->video_dev.queue = &vpbe_display_layer->buffer_queue; - err = video_register_device(&vpbe_display_layer->video_dev, - VFL_TYPE_VIDEO, - -1); - if (err) - return -ENODEV; - - vpbe_display_layer->disp_dev = disp_dev; - /* set the driver data in platform device */ - platform_set_drvdata(pdev, disp_dev); - video_set_drvdata(&vpbe_display_layer->video_dev, - vpbe_display_layer); - - return 0; -} - - - -/* - * vpbe_display_probe() - * This function creates device entries by register itself to the V4L2 driver - * and initializes fields of each layer objects - */ -static int vpbe_display_probe(struct platform_device *pdev) -{ - struct vpbe_display *disp_dev; - struct v4l2_device *v4l2_dev; - struct resource *res = NULL; - struct vb2_queue *q; - int k; - int i; - int err; - int irq; - - printk(KERN_DEBUG "vpbe_display_probe\n"); - /* Allocate memory for vpbe_display */ - disp_dev = devm_kzalloc(&pdev->dev, sizeof(*disp_dev), GFP_KERNEL); - if (!disp_dev) - return -ENOMEM; - - spin_lock_init(&disp_dev->dma_queue_lock); - /* - * Scan all the platform devices to find the vpbe - * controller device and get the vpbe_dev object - */ - err = bus_for_each_dev(&platform_bus_type, NULL, disp_dev, - vpbe_device_get); - if (err < 0) - return err; - - v4l2_dev = &disp_dev->vpbe_dev->v4l2_dev; - /* Initialize the vpbe display controller */ - if (disp_dev->vpbe_dev->ops.initialize) { - err = disp_dev->vpbe_dev->ops.initialize(&pdev->dev, - disp_dev->vpbe_dev); - if (err) { - v4l2_err(v4l2_dev, "Error initing vpbe\n"); - err = -ENOMEM; - goto probe_out; - } - } - - for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { - if (init_vpbe_layer(i, disp_dev, pdev)) { - err = -ENODEV; - goto probe_out; - } - } - - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res) { - v4l2_err(v4l2_dev, "Unable to get VENC interrupt resource\n"); - err = -ENODEV; - goto probe_out; - } - - irq = res->start; - err = devm_request_irq(&pdev->dev, irq, venc_isr, 0, - VPBE_DISPLAY_DRIVER, disp_dev); - if (err) { - v4l2_err(v4l2_dev, "VPBE IRQ request failed\n"); - goto probe_out; - } - - for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { - /* initialize vb2 queue */ - q = &disp_dev->dev[i]->buffer_queue; - memset(q, 0, sizeof(*q)); - q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; - q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; - q->drv_priv = disp_dev->dev[i]; - q->ops = &video_qops; - q->mem_ops = &vb2_dma_contig_memops; - q->buf_struct_size = sizeof(struct vpbe_disp_buffer); - q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; - q->min_buffers_needed = 1; - q->lock = &disp_dev->dev[i]->opslock; - q->dev = disp_dev->vpbe_dev->pdev; - err = vb2_queue_init(q); - if (err) { - v4l2_err(v4l2_dev, "vb2_queue_init() failed\n"); - goto probe_out; - } - - INIT_LIST_HEAD(&disp_dev->dev[i]->dma_queue); - - if (register_device(disp_dev->dev[i], disp_dev, pdev)) { - err = -ENODEV; - goto probe_out; - } - } - - v4l2_dbg(1, debug, v4l2_dev, - "Successfully completed the probing of vpbe v4l2 device\n"); - - return 0; - -probe_out: - for (k = 0; k < VPBE_DISPLAY_MAX_DEVICES; k++) { - /* Unregister video device */ - if (disp_dev->dev[k]) { - video_unregister_device(&disp_dev->dev[k]->video_dev); - kfree(disp_dev->dev[k]); - } - } - return err; -} - -/* - * vpbe_display_remove() - * It un-register hardware layer from V4L2 driver - */ -static int vpbe_display_remove(struct platform_device *pdev) -{ - struct vpbe_layer *vpbe_display_layer; - struct vpbe_display *disp_dev = platform_get_drvdata(pdev); - struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; - int i; - - v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_remove\n"); - - /* deinitialize the vpbe display controller */ - if (vpbe_dev->ops.deinitialize) - vpbe_dev->ops.deinitialize(&pdev->dev, vpbe_dev); - /* un-register device */ - for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { - /* Get the pointer to the layer object */ - vpbe_display_layer = disp_dev->dev[i]; - /* Unregister video device */ - video_unregister_device(&vpbe_display_layer->video_dev); - - } - for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { - kfree(disp_dev->dev[i]); - disp_dev->dev[i] = NULL; - } - - return 0; -} - -static struct platform_driver vpbe_display_driver = { - .driver = { - .name = VPBE_DISPLAY_DRIVER, - .bus = &platform_bus_type, - }, - .probe = vpbe_display_probe, - .remove = vpbe_display_remove, -}; - -module_platform_driver(vpbe_display_driver); - -MODULE_DESCRIPTION("TI DM644x/DM355/DM365 VPBE Display controller"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Texas Instruments"); diff --git a/drivers/media/platform/ti/davinci/vpbe_osd.c b/drivers/media/platform/ti/davinci/vpbe_osd.c deleted file mode 100644 index 32f7ef547c82..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe_osd.c +++ /dev/null @@ -1,1582 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2007-2010 Texas Instruments Inc - * Copyright (C) 2007 MontaVista Software, Inc. - * - * Andy Lowe (alowe@mvista.com), MontaVista Software - * - Initial version - * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd. - * - ported to sub device interface - */ -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/slab.h> - -#include <media/davinci/vpss.h> -#include <media/v4l2-device.h> -#include <media/davinci/vpbe_types.h> -#include <media/davinci/vpbe_osd.h> - -#include <linux/io.h> -#include "vpbe_osd_regs.h" - -#define MODULE_NAME "davinci-vpbe-osd" - -static const struct platform_device_id vpbe_osd_devtype[] = { - { - .name = DM644X_VPBE_OSD_SUBDEV_NAME, - .driver_data = VPBE_VERSION_1, - }, { - .name = DM365_VPBE_OSD_SUBDEV_NAME, - .driver_data = VPBE_VERSION_2, - }, { - .name = DM355_VPBE_OSD_SUBDEV_NAME, - .driver_data = VPBE_VERSION_3, - }, - { - /* sentinel */ - } -}; - -MODULE_DEVICE_TABLE(platform, vpbe_osd_devtype); - -/* register access routines */ -static inline u32 __always_unused osd_read(struct osd_state *sd, u32 offset) -{ - struct osd_state *osd = sd; - - return readl(osd->osd_base + offset); -} - -static inline u32 osd_write(struct osd_state *sd, u32 val, u32 offset) -{ - struct osd_state *osd = sd; - - writel(val, osd->osd_base + offset); - - return val; -} - -static inline u32 osd_set(struct osd_state *sd, u32 mask, u32 offset) -{ - struct osd_state *osd = sd; - - void __iomem *addr = osd->osd_base + offset; - u32 val = readl(addr) | mask; - - writel(val, addr); - - return val; -} - -static inline u32 osd_clear(struct osd_state *sd, u32 mask, u32 offset) -{ - struct osd_state *osd = sd; - - void __iomem *addr = osd->osd_base + offset; - u32 val = readl(addr) & ~mask; - - writel(val, addr); - - return val; -} - -static inline u32 osd_modify(struct osd_state *sd, u32 mask, u32 val, - u32 offset) -{ - struct osd_state *osd = sd; - - void __iomem *addr = osd->osd_base + offset; - u32 new_val = (readl(addr) & ~mask) | (val & mask); - - writel(new_val, addr); - - return new_val; -} - -/* define some macros for layer and pixfmt classification */ -#define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1)) -#define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1)) -#define is_rgb_pixfmt(pixfmt) \ - (((pixfmt) == PIXFMT_RGB565) || ((pixfmt) == PIXFMT_RGB888)) -#define is_yc_pixfmt(pixfmt) \ - (((pixfmt) == PIXFMT_YCBCRI) || ((pixfmt) == PIXFMT_YCRCBI) || \ - ((pixfmt) == PIXFMT_NV12)) -#define MAX_WIN_SIZE OSD_VIDWIN0XP_V0X -#define MAX_LINE_LENGTH (OSD_VIDWIN0OFST_V0LO << 5) - -/** - * _osd_dm6446_vid0_pingpong() - field inversion fix for DM6446 - * @sd: ptr to struct osd_state - * @field_inversion: inversion flag - * @fb_base_phys: frame buffer address - * @lconfig: ptr to layer config - * - * This routine implements a workaround for the field signal inversion silicon - * erratum described in Advisory 1.3.8 for the DM6446. The fb_base_phys and - * lconfig parameters apply to the vid0 window. This routine should be called - * whenever the vid0 layer configuration or start address is modified, or when - * the OSD field inversion setting is modified. - * Returns: 1 if the ping-pong buffers need to be toggled in the vsync isr, or - * 0 otherwise - */ -static int _osd_dm6446_vid0_pingpong(struct osd_state *sd, - int field_inversion, - unsigned long fb_base_phys, - const struct osd_layer_config *lconfig) -{ - struct osd_platform_data *pdata; - - pdata = (struct osd_platform_data *)sd->dev->platform_data; - if (pdata != NULL && pdata->field_inv_wa_enable) { - - if (!field_inversion || !lconfig->interlaced) { - osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR); - osd_write(sd, fb_base_phys & ~0x1F, OSD_PPVWIN0ADR); - osd_modify(sd, OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, 0, - OSD_MISCCTL); - return 0; - } else { - unsigned miscctl = OSD_MISCCTL_PPRV; - - osd_write(sd, - (fb_base_phys & ~0x1F) - lconfig->line_length, - OSD_VIDWIN0ADR); - osd_write(sd, - (fb_base_phys & ~0x1F) + lconfig->line_length, - OSD_PPVWIN0ADR); - osd_modify(sd, - OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, miscctl, - OSD_MISCCTL); - - return 1; - } - } - - return 0; -} - -static void _osd_set_field_inversion(struct osd_state *sd, int enable) -{ - unsigned fsinv = 0; - - if (enable) - fsinv = OSD_MODE_FSINV; - - osd_modify(sd, OSD_MODE_FSINV, fsinv, OSD_MODE); -} - -static void _osd_set_blink_attribute(struct osd_state *sd, int enable, - enum osd_blink_interval blink) -{ - u32 osdatrmd = 0; - - if (enable) { - osdatrmd |= OSD_OSDATRMD_BLNK; - osdatrmd |= blink << OSD_OSDATRMD_BLNKINT_SHIFT; - } - /* caller must ensure that OSD1 is configured in attribute mode */ - osd_modify(sd, OSD_OSDATRMD_BLNKINT | OSD_OSDATRMD_BLNK, osdatrmd, - OSD_OSDATRMD); -} - -static void _osd_set_rom_clut(struct osd_state *sd, - enum osd_rom_clut rom_clut) -{ - if (rom_clut == ROM_CLUT0) - osd_clear(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL); - else - osd_set(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL); -} - -static void _osd_set_palette_map(struct osd_state *sd, - enum osd_win_layer osdwin, - unsigned char pixel_value, - unsigned char clut_index, - enum osd_pix_format pixfmt) -{ - static const int map_2bpp[] = { 0, 5, 10, 15 }; - static const int map_1bpp[] = { 0, 15 }; - int bmp_offset; - int bmp_shift; - int bmp_mask; - int bmp_reg; - - switch (pixfmt) { - case PIXFMT_1BPP: - bmp_reg = map_1bpp[pixel_value & 0x1]; - break; - case PIXFMT_2BPP: - bmp_reg = map_2bpp[pixel_value & 0x3]; - break; - case PIXFMT_4BPP: - bmp_reg = pixel_value & 0xf; - break; - default: - return; - } - - switch (osdwin) { - case OSDWIN_OSD0: - bmp_offset = OSD_W0BMP01 + (bmp_reg >> 1) * sizeof(u32); - break; - case OSDWIN_OSD1: - bmp_offset = OSD_W1BMP01 + (bmp_reg >> 1) * sizeof(u32); - break; - default: - return; - } - - if (bmp_reg & 1) { - bmp_shift = 8; - bmp_mask = 0xff << 8; - } else { - bmp_shift = 0; - bmp_mask = 0xff; - } - - osd_modify(sd, bmp_mask, clut_index << bmp_shift, bmp_offset); -} - -static void _osd_set_rec601_attenuation(struct osd_state *sd, - enum osd_win_layer osdwin, int enable) -{ - switch (osdwin) { - case OSDWIN_OSD0: - osd_modify(sd, OSD_OSDWIN0MD_ATN0E, - enable ? OSD_OSDWIN0MD_ATN0E : 0, - OSD_OSDWIN0MD); - if (sd->vpbe_type == VPBE_VERSION_1) - osd_modify(sd, OSD_OSDWIN0MD_ATN0E, - enable ? OSD_OSDWIN0MD_ATN0E : 0, - OSD_OSDWIN0MD); - else if ((sd->vpbe_type == VPBE_VERSION_3) || - (sd->vpbe_type == VPBE_VERSION_2)) - osd_modify(sd, OSD_EXTMODE_ATNOSD0EN, - enable ? OSD_EXTMODE_ATNOSD0EN : 0, - OSD_EXTMODE); - break; - case OSDWIN_OSD1: - osd_modify(sd, OSD_OSDWIN1MD_ATN1E, - enable ? OSD_OSDWIN1MD_ATN1E : 0, - OSD_OSDWIN1MD); - if (sd->vpbe_type == VPBE_VERSION_1) - osd_modify(sd, OSD_OSDWIN1MD_ATN1E, - enable ? OSD_OSDWIN1MD_ATN1E : 0, - OSD_OSDWIN1MD); - else if ((sd->vpbe_type == VPBE_VERSION_3) || - (sd->vpbe_type == VPBE_VERSION_2)) - osd_modify(sd, OSD_EXTMODE_ATNOSD1EN, - enable ? OSD_EXTMODE_ATNOSD1EN : 0, - OSD_EXTMODE); - break; - } -} - -static void _osd_set_blending_factor(struct osd_state *sd, - enum osd_win_layer osdwin, - enum osd_blending_factor blend) -{ - switch (osdwin) { - case OSDWIN_OSD0: - osd_modify(sd, OSD_OSDWIN0MD_BLND0, - blend << OSD_OSDWIN0MD_BLND0_SHIFT, OSD_OSDWIN0MD); - break; - case OSDWIN_OSD1: - osd_modify(sd, OSD_OSDWIN1MD_BLND1, - blend << OSD_OSDWIN1MD_BLND1_SHIFT, OSD_OSDWIN1MD); - break; - } -} - -static void _osd_enable_rgb888_pixblend(struct osd_state *sd, - enum osd_win_layer osdwin) -{ - - osd_modify(sd, OSD_MISCCTL_BLDSEL, 0, OSD_MISCCTL); - switch (osdwin) { - case OSDWIN_OSD0: - osd_modify(sd, OSD_EXTMODE_OSD0BLDCHR, - OSD_EXTMODE_OSD0BLDCHR, OSD_EXTMODE); - break; - case OSDWIN_OSD1: - osd_modify(sd, OSD_EXTMODE_OSD1BLDCHR, - OSD_EXTMODE_OSD1BLDCHR, OSD_EXTMODE); - break; - } -} - -static void _osd_enable_color_key(struct osd_state *sd, - enum osd_win_layer osdwin, - unsigned colorkey, - enum osd_pix_format pixfmt) -{ - switch (pixfmt) { - case PIXFMT_1BPP: - case PIXFMT_2BPP: - case PIXFMT_4BPP: - case PIXFMT_8BPP: - if (sd->vpbe_type == VPBE_VERSION_3) { - switch (osdwin) { - case OSDWIN_OSD0: - osd_modify(sd, OSD_TRANSPBMPIDX_BMP0, - colorkey << - OSD_TRANSPBMPIDX_BMP0_SHIFT, - OSD_TRANSPBMPIDX); - break; - case OSDWIN_OSD1: - osd_modify(sd, OSD_TRANSPBMPIDX_BMP1, - colorkey << - OSD_TRANSPBMPIDX_BMP1_SHIFT, - OSD_TRANSPBMPIDX); - break; - } - } - break; - case PIXFMT_RGB565: - if (sd->vpbe_type == VPBE_VERSION_1) - osd_write(sd, colorkey & OSD_TRANSPVAL_RGBTRANS, - OSD_TRANSPVAL); - else if (sd->vpbe_type == VPBE_VERSION_3) - osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL, - OSD_TRANSPVALL); - break; - case PIXFMT_YCBCRI: - case PIXFMT_YCRCBI: - if (sd->vpbe_type == VPBE_VERSION_3) - osd_modify(sd, OSD_TRANSPVALU_Y, colorkey, - OSD_TRANSPVALU); - break; - case PIXFMT_RGB888: - if (sd->vpbe_type == VPBE_VERSION_3) { - osd_write(sd, colorkey & OSD_TRANSPVALL_RGBL, - OSD_TRANSPVALL); - osd_modify(sd, OSD_TRANSPVALU_RGBU, colorkey >> 16, - OSD_TRANSPVALU); - } - break; - default: - break; - } - - switch (osdwin) { - case OSDWIN_OSD0: - osd_set(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD); - break; - case OSDWIN_OSD1: - osd_set(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD); - break; - } -} - -static void _osd_disable_color_key(struct osd_state *sd, - enum osd_win_layer osdwin) -{ - switch (osdwin) { - case OSDWIN_OSD0: - osd_clear(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD); - break; - case OSDWIN_OSD1: - osd_clear(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD); - break; - } -} - -static void _osd_set_osd_clut(struct osd_state *sd, - enum osd_win_layer osdwin, - enum osd_clut clut) -{ - u32 winmd = 0; - - switch (osdwin) { - case OSDWIN_OSD0: - if (clut == RAM_CLUT) - winmd |= OSD_OSDWIN0MD_CLUTS0; - osd_modify(sd, OSD_OSDWIN0MD_CLUTS0, winmd, OSD_OSDWIN0MD); - break; - case OSDWIN_OSD1: - if (clut == RAM_CLUT) - winmd |= OSD_OSDWIN1MD_CLUTS1; - osd_modify(sd, OSD_OSDWIN1MD_CLUTS1, winmd, OSD_OSDWIN1MD); - break; - } -} - -static void _osd_set_zoom(struct osd_state *sd, enum osd_layer layer, - enum osd_zoom_factor h_zoom, - enum osd_zoom_factor v_zoom) -{ - u32 winmd = 0; - - switch (layer) { - case WIN_OSD0: - winmd |= (h_zoom << OSD_OSDWIN0MD_OHZ0_SHIFT); - winmd |= (v_zoom << OSD_OSDWIN0MD_OVZ0_SHIFT); - osd_modify(sd, OSD_OSDWIN0MD_OHZ0 | OSD_OSDWIN0MD_OVZ0, winmd, - OSD_OSDWIN0MD); - break; - case WIN_VID0: - winmd |= (h_zoom << OSD_VIDWINMD_VHZ0_SHIFT); - winmd |= (v_zoom << OSD_VIDWINMD_VVZ0_SHIFT); - osd_modify(sd, OSD_VIDWINMD_VHZ0 | OSD_VIDWINMD_VVZ0, winmd, - OSD_VIDWINMD); - break; - case WIN_OSD1: - winmd |= (h_zoom << OSD_OSDWIN1MD_OHZ1_SHIFT); - winmd |= (v_zoom << OSD_OSDWIN1MD_OVZ1_SHIFT); - osd_modify(sd, OSD_OSDWIN1MD_OHZ1 | OSD_OSDWIN1MD_OVZ1, winmd, - OSD_OSDWIN1MD); - break; - case WIN_VID1: - winmd |= (h_zoom << OSD_VIDWINMD_VHZ1_SHIFT); - winmd |= (v_zoom << OSD_VIDWINMD_VVZ1_SHIFT); - osd_modify(sd, OSD_VIDWINMD_VHZ1 | OSD_VIDWINMD_VVZ1, winmd, - OSD_VIDWINMD); - break; - } -} - -static void _osd_disable_layer(struct osd_state *sd, enum osd_layer layer) -{ - switch (layer) { - case WIN_OSD0: - osd_clear(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD); - break; - case WIN_VID0: - osd_clear(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD); - break; - case WIN_OSD1: - /* disable attribute mode as well as disabling the window */ - osd_clear(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1, - OSD_OSDWIN1MD); - break; - case WIN_VID1: - osd_clear(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD); - break; - } -} - -static void osd_disable_layer(struct osd_state *sd, enum osd_layer layer) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - if (!win->is_enabled) { - spin_unlock_irqrestore(&osd->lock, flags); - return; - } - win->is_enabled = 0; - - _osd_disable_layer(sd, layer); - - spin_unlock_irqrestore(&osd->lock, flags); -} - -static void _osd_enable_attribute_mode(struct osd_state *sd) -{ - /* enable attribute mode for OSD1 */ - osd_set(sd, OSD_OSDWIN1MD_OASW, OSD_OSDWIN1MD); -} - -static void _osd_enable_layer(struct osd_state *sd, enum osd_layer layer) -{ - switch (layer) { - case WIN_OSD0: - osd_set(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD); - break; - case WIN_VID0: - osd_set(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD); - break; - case WIN_OSD1: - /* enable OSD1 and disable attribute mode */ - osd_modify(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1, - OSD_OSDWIN1MD_OACT1, OSD_OSDWIN1MD); - break; - case WIN_VID1: - osd_set(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD); - break; - } -} - -static int osd_enable_layer(struct osd_state *sd, enum osd_layer layer, - int otherwin) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - struct osd_layer_config *cfg = &win->lconfig; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - /* - * use otherwin flag to know this is the other vid window - * in YUV420 mode, if is, skip this check - */ - if (!otherwin && (!win->is_allocated || - !win->fb_base_phys || - !cfg->line_length || - !cfg->xsize || - !cfg->ysize)) { - spin_unlock_irqrestore(&osd->lock, flags); - return -1; - } - - if (win->is_enabled) { - spin_unlock_irqrestore(&osd->lock, flags); - return 0; - } - win->is_enabled = 1; - - if (cfg->pixfmt != PIXFMT_OSD_ATTR) - _osd_enable_layer(sd, layer); - else { - _osd_enable_attribute_mode(sd); - _osd_set_blink_attribute(sd, osd->is_blinking, osd->blink); - } - - spin_unlock_irqrestore(&osd->lock, flags); - - return 0; -} - -#define OSD_SRC_ADDR_HIGH4 0x7800000 -#define OSD_SRC_ADDR_HIGH7 0x7F0000 -#define OSD_SRCADD_OFSET_SFT 23 -#define OSD_SRCADD_ADD_SFT 16 -#define OSD_WINADL_MASK 0xFFFF -#define OSD_WINOFST_MASK 0x1000 -#define VPBE_REG_BASE 0x80000000 - -static void _osd_start_layer(struct osd_state *sd, enum osd_layer layer, - unsigned long fb_base_phys, - unsigned long cbcr_ofst) -{ - - if (sd->vpbe_type == VPBE_VERSION_1) { - switch (layer) { - case WIN_OSD0: - osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN0ADR); - break; - case WIN_VID0: - osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR); - break; - case WIN_OSD1: - osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN1ADR); - break; - case WIN_VID1: - osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN1ADR); - break; - } - } else if (sd->vpbe_type == VPBE_VERSION_3) { - unsigned long fb_offset_32 = - (fb_base_phys - VPBE_REG_BASE) >> 5; - - switch (layer) { - case WIN_OSD0: - osd_modify(sd, OSD_OSDWINADH_O0AH, - fb_offset_32 >> (OSD_SRCADD_ADD_SFT - - OSD_OSDWINADH_O0AH_SHIFT), - OSD_OSDWINADH); - osd_write(sd, fb_offset_32 & OSD_OSDWIN0ADL_O0AL, - OSD_OSDWIN0ADL); - break; - case WIN_VID0: - osd_modify(sd, OSD_VIDWINADH_V0AH, - fb_offset_32 >> (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V0AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, fb_offset_32 & OSD_VIDWIN0ADL_V0AL, - OSD_VIDWIN0ADL); - break; - case WIN_OSD1: - osd_modify(sd, OSD_OSDWINADH_O1AH, - fb_offset_32 >> (OSD_SRCADD_ADD_SFT - - OSD_OSDWINADH_O1AH_SHIFT), - OSD_OSDWINADH); - osd_write(sd, fb_offset_32 & OSD_OSDWIN1ADL_O1AL, - OSD_OSDWIN1ADL); - break; - case WIN_VID1: - osd_modify(sd, OSD_VIDWINADH_V1AH, - fb_offset_32 >> (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V1AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, fb_offset_32 & OSD_VIDWIN1ADL_V1AL, - OSD_VIDWIN1ADL); - break; - } - } else if (sd->vpbe_type == VPBE_VERSION_2) { - struct osd_window_state *win = &sd->win[layer]; - unsigned long fb_offset_32, cbcr_offset_32; - - fb_offset_32 = fb_base_phys - VPBE_REG_BASE; - if (cbcr_ofst) - cbcr_offset_32 = cbcr_ofst; - else - cbcr_offset_32 = win->lconfig.line_length * - win->lconfig.ysize; - cbcr_offset_32 += fb_offset_32; - fb_offset_32 = fb_offset_32 >> 5; - cbcr_offset_32 = cbcr_offset_32 >> 5; - /* - * DM365: start address is 27-bit long address b26 - b23 are - * in offset register b12 - b9, and * bit 26 has to be '1' - */ - if (win->lconfig.pixfmt == PIXFMT_NV12) { - switch (layer) { - case WIN_VID0: - case WIN_VID1: - /* Y is in VID0 */ - osd_modify(sd, OSD_VIDWIN0OFST_V0AH, - ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | - OSD_WINOFST_MASK, OSD_VIDWIN0OFST); - osd_modify(sd, OSD_VIDWINADH_V0AH, - (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V0AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, fb_offset_32 & OSD_WINADL_MASK, - OSD_VIDWIN0ADL); - /* CbCr is in VID1 */ - osd_modify(sd, OSD_VIDWIN1OFST_V1AH, - ((cbcr_offset_32 & - OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | - OSD_WINOFST_MASK, OSD_VIDWIN1OFST); - osd_modify(sd, OSD_VIDWINADH_V1AH, - (cbcr_offset_32 & - OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V1AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, cbcr_offset_32 & OSD_WINADL_MASK, - OSD_VIDWIN1ADL); - break; - default: - break; - } - } - - switch (layer) { - case WIN_OSD0: - osd_modify(sd, OSD_OSDWIN0OFST_O0AH, - ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK, - OSD_OSDWIN0OFST); - osd_modify(sd, OSD_OSDWINADH_O0AH, - (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_OSDWINADH_O0AH_SHIFT), OSD_OSDWINADH); - osd_write(sd, fb_offset_32 & OSD_WINADL_MASK, - OSD_OSDWIN0ADL); - break; - case WIN_VID0: - if (win->lconfig.pixfmt != PIXFMT_NV12) { - osd_modify(sd, OSD_VIDWIN0OFST_V0AH, - ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | - OSD_WINOFST_MASK, OSD_VIDWIN0OFST); - osd_modify(sd, OSD_VIDWINADH_V0AH, - (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V0AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, fb_offset_32 & OSD_WINADL_MASK, - OSD_VIDWIN0ADL); - } - break; - case WIN_OSD1: - osd_modify(sd, OSD_OSDWIN1OFST_O1AH, - ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | OSD_WINOFST_MASK, - OSD_OSDWIN1OFST); - osd_modify(sd, OSD_OSDWINADH_O1AH, - (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_OSDWINADH_O1AH_SHIFT), - OSD_OSDWINADH); - osd_write(sd, fb_offset_32 & OSD_WINADL_MASK, - OSD_OSDWIN1ADL); - break; - case WIN_VID1: - if (win->lconfig.pixfmt != PIXFMT_NV12) { - osd_modify(sd, OSD_VIDWIN1OFST_V1AH, - ((fb_offset_32 & OSD_SRC_ADDR_HIGH4) >> - (OSD_SRCADD_OFSET_SFT - - OSD_WINOFST_AH_SHIFT)) | - OSD_WINOFST_MASK, OSD_VIDWIN1OFST); - osd_modify(sd, OSD_VIDWINADH_V1AH, - (fb_offset_32 & OSD_SRC_ADDR_HIGH7) >> - (OSD_SRCADD_ADD_SFT - - OSD_VIDWINADH_V1AH_SHIFT), - OSD_VIDWINADH); - osd_write(sd, fb_offset_32 & OSD_WINADL_MASK, - OSD_VIDWIN1ADL); - } - break; - } - } -} - -static void osd_start_layer(struct osd_state *sd, enum osd_layer layer, - unsigned long fb_base_phys, - unsigned long cbcr_ofst) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - struct osd_layer_config *cfg = &win->lconfig; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - win->fb_base_phys = fb_base_phys & ~0x1F; - _osd_start_layer(sd, layer, fb_base_phys, cbcr_ofst); - - if (layer == WIN_VID0) { - osd->pingpong = - _osd_dm6446_vid0_pingpong(sd, osd->field_inversion, - win->fb_base_phys, - cfg); - } - - spin_unlock_irqrestore(&osd->lock, flags); -} - -static void osd_get_layer_config(struct osd_state *sd, enum osd_layer layer, - struct osd_layer_config *lconfig) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - *lconfig = win->lconfig; - - spin_unlock_irqrestore(&osd->lock, flags); -} - -/** - * try_layer_config() - Try a specific configuration for the layer - * @sd: ptr to struct osd_state - * @layer: layer to configure - * @lconfig: layer configuration to try - * - * If the requested lconfig is completely rejected and the value of lconfig on - * exit is the current lconfig, then try_layer_config() returns 1. Otherwise, - * try_layer_config() returns 0. A return value of 0 does not necessarily mean - * that the value of lconfig on exit is identical to the value of lconfig on - * entry, but merely that it represents a change from the current lconfig. - */ -static int try_layer_config(struct osd_state *sd, enum osd_layer layer, - struct osd_layer_config *lconfig) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - int bad_config = 0; - - /* verify that the pixel format is compatible with the layer */ - switch (lconfig->pixfmt) { - case PIXFMT_1BPP: - case PIXFMT_2BPP: - case PIXFMT_4BPP: - case PIXFMT_8BPP: - case PIXFMT_RGB565: - if (osd->vpbe_type == VPBE_VERSION_1) - bad_config = !is_vid_win(layer); - break; - case PIXFMT_YCBCRI: - case PIXFMT_YCRCBI: - bad_config = !is_vid_win(layer); - break; - case PIXFMT_RGB888: - if (osd->vpbe_type == VPBE_VERSION_1) - bad_config = !is_vid_win(layer); - else if ((osd->vpbe_type == VPBE_VERSION_3) || - (osd->vpbe_type == VPBE_VERSION_2)) - bad_config = !is_osd_win(layer); - break; - case PIXFMT_NV12: - if (osd->vpbe_type != VPBE_VERSION_2) - bad_config = 1; - else - bad_config = is_osd_win(layer); - break; - case PIXFMT_OSD_ATTR: - bad_config = (layer != WIN_OSD1); - break; - default: - bad_config = 1; - break; - } - if (bad_config) { - /* - * The requested pixel format is incompatible with the layer, - * so keep the current layer configuration. - */ - *lconfig = win->lconfig; - return bad_config; - } - - /* DM6446: */ - /* only one OSD window at a time can use RGB pixel formats */ - if ((osd->vpbe_type == VPBE_VERSION_1) && - is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) { - enum osd_pix_format pixfmt; - - if (layer == WIN_OSD0) - pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt; - else - pixfmt = osd->win[WIN_OSD0].lconfig.pixfmt; - - if (is_rgb_pixfmt(pixfmt)) { - /* - * The other OSD window is already configured for an - * RGB, so keep the current layer configuration. - */ - *lconfig = win->lconfig; - return 1; - } - } - - /* DM6446: only one video window at a time can use RGB888 */ - if ((osd->vpbe_type == VPBE_VERSION_1) && is_vid_win(layer) && - lconfig->pixfmt == PIXFMT_RGB888) { - enum osd_pix_format pixfmt; - - if (layer == WIN_VID0) - pixfmt = osd->win[WIN_VID1].lconfig.pixfmt; - else - pixfmt = osd->win[WIN_VID0].lconfig.pixfmt; - - if (pixfmt == PIXFMT_RGB888) { - /* - * The other video window is already configured for - * RGB888, so keep the current layer configuration. - */ - *lconfig = win->lconfig; - return 1; - } - } - - /* window dimensions must be non-zero */ - if (!lconfig->line_length || !lconfig->xsize || !lconfig->ysize) { - *lconfig = win->lconfig; - return 1; - } - - /* round line_length up to a multiple of 32 */ - lconfig->line_length = ((lconfig->line_length + 31) / 32) * 32; - lconfig->line_length = - min(lconfig->line_length, (unsigned)MAX_LINE_LENGTH); - lconfig->xsize = min(lconfig->xsize, (unsigned)MAX_WIN_SIZE); - lconfig->ysize = min(lconfig->ysize, (unsigned)MAX_WIN_SIZE); - lconfig->xpos = min(lconfig->xpos, (unsigned)MAX_WIN_SIZE); - lconfig->ypos = min(lconfig->ypos, (unsigned)MAX_WIN_SIZE); - lconfig->interlaced = (lconfig->interlaced != 0); - if (lconfig->interlaced) { - /* ysize and ypos must be even for interlaced displays */ - lconfig->ysize &= ~1; - lconfig->ypos &= ~1; - } - - return 0; -} - -static void _osd_disable_vid_rgb888(struct osd_state *sd) -{ - /* - * The DM6446 supports RGB888 pixel format in a single video window. - * This routine disables RGB888 pixel format for both video windows. - * The caller must ensure that neither video window is currently - * configured for RGB888 pixel format. - */ - if (sd->vpbe_type == VPBE_VERSION_1) - osd_clear(sd, OSD_MISCCTL_RGBEN, OSD_MISCCTL); -} - -static void _osd_enable_vid_rgb888(struct osd_state *sd, - enum osd_layer layer) -{ - /* - * The DM6446 supports RGB888 pixel format in a single video window. - * This routine enables RGB888 pixel format for the specified video - * window. The caller must ensure that the other video window is not - * currently configured for RGB888 pixel format, as this routine will - * disable RGB888 pixel format for the other window. - */ - if (sd->vpbe_type == VPBE_VERSION_1) { - if (layer == WIN_VID0) - osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, - OSD_MISCCTL_RGBEN, OSD_MISCCTL); - else if (layer == WIN_VID1) - osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, - OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, - OSD_MISCCTL); - } -} - -static void _osd_set_cbcr_order(struct osd_state *sd, - enum osd_pix_format pixfmt) -{ - /* - * The caller must ensure that all windows using YC pixfmt use the same - * Cb/Cr order. - */ - if (pixfmt == PIXFMT_YCBCRI) - osd_clear(sd, OSD_MODE_CS, OSD_MODE); - else if (pixfmt == PIXFMT_YCRCBI) - osd_set(sd, OSD_MODE_CS, OSD_MODE); -} - -static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer, - const struct osd_layer_config *lconfig) -{ - u32 winmd = 0, winmd_mask = 0, bmw = 0; - - _osd_set_cbcr_order(sd, lconfig->pixfmt); - - switch (layer) { - case WIN_OSD0: - if (sd->vpbe_type == VPBE_VERSION_1) { - winmd_mask |= OSD_OSDWIN0MD_RGB0E; - if (lconfig->pixfmt == PIXFMT_RGB565) - winmd |= OSD_OSDWIN0MD_RGB0E; - } else if ((sd->vpbe_type == VPBE_VERSION_3) || - (sd->vpbe_type == VPBE_VERSION_2)) { - winmd_mask |= OSD_OSDWIN0MD_BMP0MD; - switch (lconfig->pixfmt) { - case PIXFMT_RGB565: - winmd |= (1 << - OSD_OSDWIN0MD_BMP0MD_SHIFT); - break; - case PIXFMT_RGB888: - winmd |= (2 << OSD_OSDWIN0MD_BMP0MD_SHIFT); - _osd_enable_rgb888_pixblend(sd, OSDWIN_OSD0); - break; - case PIXFMT_YCBCRI: - case PIXFMT_YCRCBI: - winmd |= (3 << OSD_OSDWIN0MD_BMP0MD_SHIFT); - break; - default: - break; - } - } - - winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0; - - switch (lconfig->pixfmt) { - case PIXFMT_1BPP: - bmw = 0; - break; - case PIXFMT_2BPP: - bmw = 1; - break; - case PIXFMT_4BPP: - bmw = 2; - break; - case PIXFMT_8BPP: - bmw = 3; - break; - default: - break; - } - winmd |= (bmw << OSD_OSDWIN0MD_BMW0_SHIFT); - - if (lconfig->interlaced) - winmd |= OSD_OSDWIN0MD_OFF0; - - osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN0MD); - osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN0OFST); - osd_write(sd, lconfig->xpos, OSD_OSDWIN0XP); - osd_write(sd, lconfig->xsize, OSD_OSDWIN0XL); - if (lconfig->interlaced) { - osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN0YP); - osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN0YL); - } else { - osd_write(sd, lconfig->ypos, OSD_OSDWIN0YP); - osd_write(sd, lconfig->ysize, OSD_OSDWIN0YL); - } - break; - case WIN_VID0: - winmd_mask |= OSD_VIDWINMD_VFF0; - if (lconfig->interlaced) - winmd |= OSD_VIDWINMD_VFF0; - - osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD); - osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN0OFST); - osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP); - osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL); - /* - * For YUV420P format the register contents are - * duplicated in both VID registers - */ - if ((sd->vpbe_type == VPBE_VERSION_2) && - (lconfig->pixfmt == PIXFMT_NV12)) { - /* other window also */ - if (lconfig->interlaced) { - winmd_mask |= OSD_VIDWINMD_VFF1; - winmd |= OSD_VIDWINMD_VFF1; - osd_modify(sd, winmd_mask, winmd, - OSD_VIDWINMD); - } - - osd_modify(sd, OSD_MISCCTL_S420D, - OSD_MISCCTL_S420D, OSD_MISCCTL); - osd_write(sd, lconfig->line_length >> 5, - OSD_VIDWIN1OFST); - osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP); - osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL); - /* - * if NV21 pixfmt and line length not 32B - * aligned (e.g. NTSC), Need to set window - * X pixel size to be 32B aligned as well - */ - if (lconfig->xsize % 32) { - osd_write(sd, - ((lconfig->xsize + 31) & ~31), - OSD_VIDWIN1XL); - osd_write(sd, - ((lconfig->xsize + 31) & ~31), - OSD_VIDWIN0XL); - } - } else if ((sd->vpbe_type == VPBE_VERSION_2) && - (lconfig->pixfmt != PIXFMT_NV12)) { - osd_modify(sd, OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D, - OSD_MISCCTL); - } - - if (lconfig->interlaced) { - osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN0YP); - osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN0YL); - if ((sd->vpbe_type == VPBE_VERSION_2) && - lconfig->pixfmt == PIXFMT_NV12) { - osd_write(sd, lconfig->ypos >> 1, - OSD_VIDWIN1YP); - osd_write(sd, lconfig->ysize >> 1, - OSD_VIDWIN1YL); - } - } else { - osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP); - osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL); - if ((sd->vpbe_type == VPBE_VERSION_2) && - lconfig->pixfmt == PIXFMT_NV12) { - osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP); - osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL); - } - } - break; - case WIN_OSD1: - /* - * The caller must ensure that OSD1 is disabled prior to - * switching from a normal mode to attribute mode or from - * attribute mode to a normal mode. - */ - if (lconfig->pixfmt == PIXFMT_OSD_ATTR) { - if (sd->vpbe_type == VPBE_VERSION_1) { - winmd_mask |= OSD_OSDWIN1MD_ATN1E | - OSD_OSDWIN1MD_RGB1E | OSD_OSDWIN1MD_CLUTS1 | - OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1; - } else { - winmd_mask |= OSD_OSDWIN1MD_BMP1MD | - OSD_OSDWIN1MD_CLUTS1 | OSD_OSDWIN1MD_BLND1 | - OSD_OSDWIN1MD_TE1; - } - } else { - if (sd->vpbe_type == VPBE_VERSION_1) { - winmd_mask |= OSD_OSDWIN1MD_RGB1E; - if (lconfig->pixfmt == PIXFMT_RGB565) - winmd |= OSD_OSDWIN1MD_RGB1E; - } else if ((sd->vpbe_type == VPBE_VERSION_3) - || (sd->vpbe_type == VPBE_VERSION_2)) { - winmd_mask |= OSD_OSDWIN1MD_BMP1MD; - switch (lconfig->pixfmt) { - case PIXFMT_RGB565: - winmd |= - (1 << OSD_OSDWIN1MD_BMP1MD_SHIFT); - break; - case PIXFMT_RGB888: - winmd |= - (2 << OSD_OSDWIN1MD_BMP1MD_SHIFT); - _osd_enable_rgb888_pixblend(sd, - OSDWIN_OSD1); - break; - case PIXFMT_YCBCRI: - case PIXFMT_YCRCBI: - winmd |= - (3 << OSD_OSDWIN1MD_BMP1MD_SHIFT); - break; - default: - break; - } - } - - winmd_mask |= OSD_OSDWIN1MD_BMW1; - switch (lconfig->pixfmt) { - case PIXFMT_1BPP: - bmw = 0; - break; - case PIXFMT_2BPP: - bmw = 1; - break; - case PIXFMT_4BPP: - bmw = 2; - break; - case PIXFMT_8BPP: - bmw = 3; - break; - default: - break; - } - winmd |= (bmw << OSD_OSDWIN1MD_BMW1_SHIFT); - } - - winmd_mask |= OSD_OSDWIN1MD_OFF1; - if (lconfig->interlaced) - winmd |= OSD_OSDWIN1MD_OFF1; - - osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN1MD); - osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN1OFST); - osd_write(sd, lconfig->xpos, OSD_OSDWIN1XP); - osd_write(sd, lconfig->xsize, OSD_OSDWIN1XL); - if (lconfig->interlaced) { - osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN1YP); - osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN1YL); - } else { - osd_write(sd, lconfig->ypos, OSD_OSDWIN1YP); - osd_write(sd, lconfig->ysize, OSD_OSDWIN1YL); - } - break; - case WIN_VID1: - winmd_mask |= OSD_VIDWINMD_VFF1; - if (lconfig->interlaced) - winmd |= OSD_VIDWINMD_VFF1; - - osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD); - osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN1OFST); - osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP); - osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL); - /* - * For YUV420P format the register contents are - * duplicated in both VID registers - */ - if (sd->vpbe_type == VPBE_VERSION_2) { - if (lconfig->pixfmt == PIXFMT_NV12) { - /* other window also */ - if (lconfig->interlaced) { - winmd_mask |= OSD_VIDWINMD_VFF0; - winmd |= OSD_VIDWINMD_VFF0; - osd_modify(sd, winmd_mask, winmd, - OSD_VIDWINMD); - } - osd_modify(sd, OSD_MISCCTL_S420D, - OSD_MISCCTL_S420D, OSD_MISCCTL); - osd_write(sd, lconfig->line_length >> 5, - OSD_VIDWIN0OFST); - osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP); - osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL); - } else { - osd_modify(sd, OSD_MISCCTL_S420D, - ~OSD_MISCCTL_S420D, OSD_MISCCTL); - } - } - - if (lconfig->interlaced) { - osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN1YP); - osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN1YL); - if ((sd->vpbe_type == VPBE_VERSION_2) && - lconfig->pixfmt == PIXFMT_NV12) { - osd_write(sd, lconfig->ypos >> 1, - OSD_VIDWIN0YP); - osd_write(sd, lconfig->ysize >> 1, - OSD_VIDWIN0YL); - } - } else { - osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP); - osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL); - if ((sd->vpbe_type == VPBE_VERSION_2) && - lconfig->pixfmt == PIXFMT_NV12) { - osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP); - osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL); - } - } - break; - } -} - -static int osd_set_layer_config(struct osd_state *sd, enum osd_layer layer, - struct osd_layer_config *lconfig) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - struct osd_layer_config *cfg = &win->lconfig; - unsigned long flags; - int reject_config; - - spin_lock_irqsave(&osd->lock, flags); - - reject_config = try_layer_config(sd, layer, lconfig); - if (reject_config) { - spin_unlock_irqrestore(&osd->lock, flags); - return reject_config; - } - - /* update the current Cb/Cr order */ - if (is_yc_pixfmt(lconfig->pixfmt)) - osd->yc_pixfmt = lconfig->pixfmt; - - /* - * If we are switching OSD1 from normal mode to attribute mode or from - * attribute mode to normal mode, then we must disable the window. - */ - if (layer == WIN_OSD1) { - if (((lconfig->pixfmt == PIXFMT_OSD_ATTR) && - (cfg->pixfmt != PIXFMT_OSD_ATTR)) || - ((lconfig->pixfmt != PIXFMT_OSD_ATTR) && - (cfg->pixfmt == PIXFMT_OSD_ATTR))) { - win->is_enabled = 0; - _osd_disable_layer(sd, layer); - } - } - - _osd_set_layer_config(sd, layer, lconfig); - - if (layer == WIN_OSD1) { - struct osd_osdwin_state *osdwin_state = - &osd->osdwin[OSDWIN_OSD1]; - - if ((lconfig->pixfmt != PIXFMT_OSD_ATTR) && - (cfg->pixfmt == PIXFMT_OSD_ATTR)) { - /* - * We just switched OSD1 from attribute mode to normal - * mode, so we must initialize the CLUT select, the - * blend factor, transparency colorkey enable, and - * attenuation enable (DM6446 only) bits in the - * OSDWIN1MD register. - */ - _osd_set_osd_clut(sd, OSDWIN_OSD1, - osdwin_state->clut); - _osd_set_blending_factor(sd, OSDWIN_OSD1, - osdwin_state->blend); - if (osdwin_state->colorkey_blending) { - _osd_enable_color_key(sd, OSDWIN_OSD1, - osdwin_state-> - colorkey, - lconfig->pixfmt); - } else - _osd_disable_color_key(sd, OSDWIN_OSD1); - _osd_set_rec601_attenuation(sd, OSDWIN_OSD1, - osdwin_state-> - rec601_attenuation); - } else if ((lconfig->pixfmt == PIXFMT_OSD_ATTR) && - (cfg->pixfmt != PIXFMT_OSD_ATTR)) { - /* - * We just switched OSD1 from normal mode to attribute - * mode, so we must initialize the blink enable and - * blink interval bits in the OSDATRMD register. - */ - _osd_set_blink_attribute(sd, osd->is_blinking, - osd->blink); - } - } - - /* - * If we just switched to a 1-, 2-, or 4-bits-per-pixel bitmap format - * then configure a default palette map. - */ - if ((lconfig->pixfmt != cfg->pixfmt) && - ((lconfig->pixfmt == PIXFMT_1BPP) || - (lconfig->pixfmt == PIXFMT_2BPP) || - (lconfig->pixfmt == PIXFMT_4BPP))) { - enum osd_win_layer osdwin = - ((layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1); - struct osd_osdwin_state *osdwin_state = - &osd->osdwin[osdwin]; - unsigned char clut_index; - unsigned char clut_entries = 0; - - switch (lconfig->pixfmt) { - case PIXFMT_1BPP: - clut_entries = 2; - break; - case PIXFMT_2BPP: - clut_entries = 4; - break; - case PIXFMT_4BPP: - clut_entries = 16; - break; - default: - break; - } - /* - * The default palette map maps the pixel value to the clut - * index, i.e. pixel value 0 maps to clut entry 0, pixel value - * 1 maps to clut entry 1, etc. - */ - for (clut_index = 0; clut_index < 16; clut_index++) { - osdwin_state->palette_map[clut_index] = clut_index; - if (clut_index < clut_entries) { - _osd_set_palette_map(sd, osdwin, clut_index, - clut_index, - lconfig->pixfmt); - } - } - } - - *cfg = *lconfig; - /* DM6446: configure the RGB888 enable and window selection */ - if (osd->win[WIN_VID0].lconfig.pixfmt == PIXFMT_RGB888) - _osd_enable_vid_rgb888(sd, WIN_VID0); - else if (osd->win[WIN_VID1].lconfig.pixfmt == PIXFMT_RGB888) - _osd_enable_vid_rgb888(sd, WIN_VID1); - else - _osd_disable_vid_rgb888(sd); - - if (layer == WIN_VID0) { - osd->pingpong = - _osd_dm6446_vid0_pingpong(sd, osd->field_inversion, - win->fb_base_phys, - cfg); - } - - spin_unlock_irqrestore(&osd->lock, flags); - - return 0; -} - -static void osd_init_layer(struct osd_state *sd, enum osd_layer layer) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - enum osd_win_layer osdwin; - struct osd_osdwin_state *osdwin_state; - struct osd_layer_config *cfg = &win->lconfig; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - win->is_enabled = 0; - _osd_disable_layer(sd, layer); - - win->h_zoom = ZOOM_X1; - win->v_zoom = ZOOM_X1; - _osd_set_zoom(sd, layer, win->h_zoom, win->v_zoom); - - win->fb_base_phys = 0; - _osd_start_layer(sd, layer, win->fb_base_phys, 0); - - cfg->line_length = 0; - cfg->xsize = 0; - cfg->ysize = 0; - cfg->xpos = 0; - cfg->ypos = 0; - cfg->interlaced = 0; - switch (layer) { - case WIN_OSD0: - case WIN_OSD1: - osdwin = (layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1; - osdwin_state = &osd->osdwin[osdwin]; - /* - * Other code relies on the fact that OSD windows default to a - * bitmap pixel format when they are deallocated, so don't - * change this default pixel format. - */ - cfg->pixfmt = PIXFMT_8BPP; - _osd_set_layer_config(sd, layer, cfg); - osdwin_state->clut = RAM_CLUT; - _osd_set_osd_clut(sd, osdwin, osdwin_state->clut); - osdwin_state->colorkey_blending = 0; - _osd_disable_color_key(sd, osdwin); - osdwin_state->blend = OSD_8_VID_0; - _osd_set_blending_factor(sd, osdwin, osdwin_state->blend); - osdwin_state->rec601_attenuation = 0; - _osd_set_rec601_attenuation(sd, osdwin, - osdwin_state-> - rec601_attenuation); - if (osdwin == OSDWIN_OSD1) { - osd->is_blinking = 0; - osd->blink = BLINK_X1; - } - break; - case WIN_VID0: - case WIN_VID1: - cfg->pixfmt = osd->yc_pixfmt; - _osd_set_layer_config(sd, layer, cfg); - break; - } - - spin_unlock_irqrestore(&osd->lock, flags); -} - -static void osd_release_layer(struct osd_state *sd, enum osd_layer layer) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - if (!win->is_allocated) { - spin_unlock_irqrestore(&osd->lock, flags); - return; - } - - spin_unlock_irqrestore(&osd->lock, flags); - osd_init_layer(sd, layer); - spin_lock_irqsave(&osd->lock, flags); - - win->is_allocated = 0; - - spin_unlock_irqrestore(&osd->lock, flags); -} - -static int osd_request_layer(struct osd_state *sd, enum osd_layer layer) -{ - struct osd_state *osd = sd; - struct osd_window_state *win = &osd->win[layer]; - unsigned long flags; - - spin_lock_irqsave(&osd->lock, flags); - - if (win->is_allocated) { - spin_unlock_irqrestore(&osd->lock, flags); - return -1; - } - win->is_allocated = 1; - - spin_unlock_irqrestore(&osd->lock, flags); - - return 0; -} - -static void _osd_init(struct osd_state *sd) -{ - osd_write(sd, 0, OSD_MODE); - osd_write(sd, 0, OSD_VIDWINMD); - osd_write(sd, 0, OSD_OSDWIN0MD); - osd_write(sd, 0, OSD_OSDWIN1MD); - osd_write(sd, 0, OSD_RECTCUR); - osd_write(sd, 0, OSD_MISCCTL); - if (sd->vpbe_type == VPBE_VERSION_3) { - osd_write(sd, 0, OSD_VBNDRY); - osd_write(sd, 0, OSD_EXTMODE); - osd_write(sd, OSD_MISCCTL_DMANG, OSD_MISCCTL); - } -} - -static void osd_set_left_margin(struct osd_state *sd, u32 val) -{ - osd_write(sd, val, OSD_BASEPX); -} - -static void osd_set_top_margin(struct osd_state *sd, u32 val) -{ - osd_write(sd, val, OSD_BASEPY); -} - -static int osd_initialize(struct osd_state *osd) -{ - if (osd == NULL) - return -ENODEV; - _osd_init(osd); - - /* set default Cb/Cr order */ - osd->yc_pixfmt = PIXFMT_YCBCRI; - - if (osd->vpbe_type == VPBE_VERSION_3) { - /* - * ROM CLUT1 on the DM355 is similar (identical?) to ROM CLUT0 - * on the DM6446, so make ROM_CLUT1 the default on the DM355. - */ - osd->rom_clut = ROM_CLUT1; - } - - _osd_set_field_inversion(osd, osd->field_inversion); - _osd_set_rom_clut(osd, osd->rom_clut); - - osd_init_layer(osd, WIN_OSD0); - osd_init_layer(osd, WIN_VID0); - osd_init_layer(osd, WIN_OSD1); - osd_init_layer(osd, WIN_VID1); - - return 0; -} - -static const struct vpbe_osd_ops osd_ops = { - .initialize = osd_initialize, - .request_layer = osd_request_layer, - .release_layer = osd_release_layer, - .enable_layer = osd_enable_layer, - .disable_layer = osd_disable_layer, - .set_layer_config = osd_set_layer_config, - .get_layer_config = osd_get_layer_config, - .start_layer = osd_start_layer, - .set_left_margin = osd_set_left_margin, - .set_top_margin = osd_set_top_margin, -}; - -static int osd_probe(struct platform_device *pdev) -{ - const struct platform_device_id *pdev_id; - struct osd_state *osd; - struct resource *res; - - pdev_id = platform_get_device_id(pdev); - if (!pdev_id) - return -EINVAL; - - osd = devm_kzalloc(&pdev->dev, sizeof(struct osd_state), GFP_KERNEL); - if (osd == NULL) - return -ENOMEM; - - - osd->dev = &pdev->dev; - osd->vpbe_type = pdev_id->driver_data; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - osd->osd_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(osd->osd_base)) - return PTR_ERR(osd->osd_base); - - osd->osd_base_phys = res->start; - osd->osd_size = resource_size(res); - spin_lock_init(&osd->lock); - osd->ops = osd_ops; - platform_set_drvdata(pdev, osd); - dev_notice(osd->dev, "OSD sub device probe success\n"); - - return 0; -} - -static int osd_remove(struct platform_device *pdev) -{ - return 0; -} - -static struct platform_driver osd_driver = { - .probe = osd_probe, - .remove = osd_remove, - .driver = { - .name = MODULE_NAME, - }, - .id_table = vpbe_osd_devtype -}; - -module_platform_driver(osd_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("DaVinci OSD Manager Driver"); -MODULE_AUTHOR("Texas Instruments"); diff --git a/drivers/media/platform/ti/davinci/vpbe_osd_regs.h b/drivers/media/platform/ti/davinci/vpbe_osd_regs.h deleted file mode 100644 index cecd5991d4c5..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe_osd_regs.h +++ /dev/null @@ -1,352 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2006-2010 Texas Instruments Inc - */ -#ifndef _VPBE_OSD_REGS_H -#define _VPBE_OSD_REGS_H - -/* VPBE Global Registers */ -#define VPBE_PID 0x0 -#define VPBE_PCR 0x4 - -/* VPSS CLock Registers */ -#define VPSSCLK_PID 0x00 -#define VPSSCLK_CLKCTRL 0x04 - -/* VPSS Buffer Logic Registers */ -#define VPSSBL_PID 0x00 -#define VPSSBL_PCR 0x04 -#define VPSSBL_BCR 0x08 -#define VPSSBL_INTSTAT 0x0C -#define VPSSBL_INTSEL 0x10 -#define VPSSBL_EVTSEL 0x14 -#define VPSSBL_MEMCTRL 0x18 -#define VPSSBL_CCDCMUX 0x1C - -/* DM365 ISP5 system configuration */ -#define ISP5_PID 0x0 -#define ISP5_PCCR 0x4 -#define ISP5_BCR 0x8 -#define ISP5_INTSTAT 0xC -#define ISP5_INTSEL1 0x10 -#define ISP5_INTSEL2 0x14 -#define ISP5_INTSEL3 0x18 -#define ISP5_EVTSEL 0x1c -#define ISP5_CCDCMUX 0x20 - -/* VPBE On-Screen Display Subsystem Registers (OSD) */ -#define OSD_MODE 0x00 -#define OSD_VIDWINMD 0x04 -#define OSD_OSDWIN0MD 0x08 -#define OSD_OSDWIN1MD 0x0C -#define OSD_OSDATRMD 0x0C -#define OSD_RECTCUR 0x10 -#define OSD_VIDWIN0OFST 0x18 -#define OSD_VIDWIN1OFST 0x1C -#define OSD_OSDWIN0OFST 0x20 -#define OSD_OSDWIN1OFST 0x24 -#define OSD_VIDWINADH 0x28 -#define OSD_VIDWIN0ADL 0x2C -#define OSD_VIDWIN0ADR 0x2C -#define OSD_VIDWIN1ADL 0x30 -#define OSD_VIDWIN1ADR 0x30 -#define OSD_OSDWINADH 0x34 -#define OSD_OSDWIN0ADL 0x38 -#define OSD_OSDWIN0ADR 0x38 -#define OSD_OSDWIN1ADL 0x3C -#define OSD_OSDWIN1ADR 0x3C -#define OSD_BASEPX 0x40 -#define OSD_BASEPY 0x44 -#define OSD_VIDWIN0XP 0x48 -#define OSD_VIDWIN0YP 0x4C -#define OSD_VIDWIN0XL 0x50 -#define OSD_VIDWIN0YL 0x54 -#define OSD_VIDWIN1XP 0x58 -#define OSD_VIDWIN1YP 0x5C -#define OSD_VIDWIN1XL 0x60 -#define OSD_VIDWIN1YL 0x64 -#define OSD_OSDWIN0XP 0x68 -#define OSD_OSDWIN0YP 0x6C -#define OSD_OSDWIN0XL 0x70 -#define OSD_OSDWIN0YL 0x74 -#define OSD_OSDWIN1XP 0x78 -#define OSD_OSDWIN1YP 0x7C -#define OSD_OSDWIN1XL 0x80 -#define OSD_OSDWIN1YL 0x84 -#define OSD_CURXP 0x88 -#define OSD_CURYP 0x8C -#define OSD_CURXL 0x90 -#define OSD_CURYL 0x94 -#define OSD_W0BMP01 0xA0 -#define OSD_W0BMP23 0xA4 -#define OSD_W0BMP45 0xA8 -#define OSD_W0BMP67 0xAC -#define OSD_W0BMP89 0xB0 -#define OSD_W0BMPAB 0xB4 -#define OSD_W0BMPCD 0xB8 -#define OSD_W0BMPEF 0xBC -#define OSD_W1BMP01 0xC0 -#define OSD_W1BMP23 0xC4 -#define OSD_W1BMP45 0xC8 -#define OSD_W1BMP67 0xCC -#define OSD_W1BMP89 0xD0 -#define OSD_W1BMPAB 0xD4 -#define OSD_W1BMPCD 0xD8 -#define OSD_W1BMPEF 0xDC -#define OSD_VBNDRY 0xE0 -#define OSD_EXTMODE 0xE4 -#define OSD_MISCCTL 0xE8 -#define OSD_CLUTRAMYCB 0xEC -#define OSD_CLUTRAMCR 0xF0 -#define OSD_TRANSPVAL 0xF4 -#define OSD_TRANSPVALL 0xF4 -#define OSD_TRANSPVALU 0xF8 -#define OSD_TRANSPBMPIDX 0xFC -#define OSD_PPVWIN0ADR 0xFC - -/* bit definitions */ -#define VPBE_PCR_VENC_DIV (1 << 1) -#define VPBE_PCR_CLK_OFF (1 << 0) - -#define VPSSBL_INTSTAT_HSSIINT (1 << 14) -#define VPSSBL_INTSTAT_CFALDINT (1 << 13) -#define VPSSBL_INTSTAT_IPIPE_INT5 (1 << 12) -#define VPSSBL_INTSTAT_IPIPE_INT4 (1 << 11) -#define VPSSBL_INTSTAT_IPIPE_INT3 (1 << 10) -#define VPSSBL_INTSTAT_IPIPE_INT2 (1 << 9) -#define VPSSBL_INTSTAT_IPIPE_INT1 (1 << 8) -#define VPSSBL_INTSTAT_IPIPE_INT0 (1 << 7) -#define VPSSBL_INTSTAT_IPIPEIFINT (1 << 6) -#define VPSSBL_INTSTAT_OSDINT (1 << 5) -#define VPSSBL_INTSTAT_VENCINT (1 << 4) -#define VPSSBL_INTSTAT_H3AINT (1 << 3) -#define VPSSBL_INTSTAT_CCDC_VDINT2 (1 << 2) -#define VPSSBL_INTSTAT_CCDC_VDINT1 (1 << 1) -#define VPSSBL_INTSTAT_CCDC_VDINT0 (1 << 0) - -/* DM365 ISP5 bit definitions */ -#define ISP5_INTSTAT_VENCINT (1 << 21) -#define ISP5_INTSTAT_OSDINT (1 << 20) - -/* VMOD TVTYP options for HDMD=0 */ -#define SDTV_NTSC 0 -#define SDTV_PAL 1 -/* VMOD TVTYP options for HDMD=1 */ -#define HDTV_525P 0 -#define HDTV_625P 1 -#define HDTV_1080I 2 -#define HDTV_720P 3 - -#define OSD_MODE_CS (1 << 15) -#define OSD_MODE_OVRSZ (1 << 14) -#define OSD_MODE_OHRSZ (1 << 13) -#define OSD_MODE_EF (1 << 12) -#define OSD_MODE_VVRSZ (1 << 11) -#define OSD_MODE_VHRSZ (1 << 10) -#define OSD_MODE_FSINV (1 << 9) -#define OSD_MODE_BCLUT (1 << 8) -#define OSD_MODE_CABG_SHIFT 0 -#define OSD_MODE_CABG (0xff << 0) - -#define OSD_VIDWINMD_VFINV (1 << 15) -#define OSD_VIDWINMD_V1EFC (1 << 14) -#define OSD_VIDWINMD_VHZ1_SHIFT 12 -#define OSD_VIDWINMD_VHZ1 (3 << 12) -#define OSD_VIDWINMD_VVZ1_SHIFT 10 -#define OSD_VIDWINMD_VVZ1 (3 << 10) -#define OSD_VIDWINMD_VFF1 (1 << 9) -#define OSD_VIDWINMD_ACT1 (1 << 8) -#define OSD_VIDWINMD_V0EFC (1 << 6) -#define OSD_VIDWINMD_VHZ0_SHIFT 4 -#define OSD_VIDWINMD_VHZ0 (3 << 4) -#define OSD_VIDWINMD_VVZ0_SHIFT 2 -#define OSD_VIDWINMD_VVZ0 (3 << 2) -#define OSD_VIDWINMD_VFF0 (1 << 1) -#define OSD_VIDWINMD_ACT0 (1 << 0) - -#define OSD_OSDWIN0MD_ATN0E (1 << 14) -#define OSD_OSDWIN0MD_RGB0E (1 << 13) -#define OSD_OSDWIN0MD_BMP0MD_SHIFT 13 -#define OSD_OSDWIN0MD_BMP0MD (3 << 13) -#define OSD_OSDWIN0MD_CLUTS0 (1 << 12) -#define OSD_OSDWIN0MD_OHZ0_SHIFT 10 -#define OSD_OSDWIN0MD_OHZ0 (3 << 10) -#define OSD_OSDWIN0MD_OVZ0_SHIFT 8 -#define OSD_OSDWIN0MD_OVZ0 (3 << 8) -#define OSD_OSDWIN0MD_BMW0_SHIFT 6 -#define OSD_OSDWIN0MD_BMW0 (3 << 6) -#define OSD_OSDWIN0MD_BLND0_SHIFT 3 -#define OSD_OSDWIN0MD_BLND0 (7 << 3) -#define OSD_OSDWIN0MD_TE0 (1 << 2) -#define OSD_OSDWIN0MD_OFF0 (1 << 1) -#define OSD_OSDWIN0MD_OACT0 (1 << 0) - -#define OSD_OSDWIN1MD_OASW (1 << 15) -#define OSD_OSDWIN1MD_ATN1E (1 << 14) -#define OSD_OSDWIN1MD_RGB1E (1 << 13) -#define OSD_OSDWIN1MD_BMP1MD_SHIFT 13 -#define OSD_OSDWIN1MD_BMP1MD (3 << 13) -#define OSD_OSDWIN1MD_CLUTS1 (1 << 12) -#define OSD_OSDWIN1MD_OHZ1_SHIFT 10 -#define OSD_OSDWIN1MD_OHZ1 (3 << 10) -#define OSD_OSDWIN1MD_OVZ1_SHIFT 8 -#define OSD_OSDWIN1MD_OVZ1 (3 << 8) -#define OSD_OSDWIN1MD_BMW1_SHIFT 6 -#define OSD_OSDWIN1MD_BMW1 (3 << 6) -#define OSD_OSDWIN1MD_BLND1_SHIFT 3 -#define OSD_OSDWIN1MD_BLND1 (7 << 3) -#define OSD_OSDWIN1MD_TE1 (1 << 2) -#define OSD_OSDWIN1MD_OFF1 (1 << 1) -#define OSD_OSDWIN1MD_OACT1 (1 << 0) - -#define OSD_OSDATRMD_OASW (1 << 15) -#define OSD_OSDATRMD_OHZA_SHIFT 10 -#define OSD_OSDATRMD_OHZA (3 << 10) -#define OSD_OSDATRMD_OVZA_SHIFT 8 -#define OSD_OSDATRMD_OVZA (3 << 8) -#define OSD_OSDATRMD_BLNKINT_SHIFT 6 -#define OSD_OSDATRMD_BLNKINT (3 << 6) -#define OSD_OSDATRMD_OFFA (1 << 1) -#define OSD_OSDATRMD_BLNK (1 << 0) - -#define OSD_RECTCUR_RCAD_SHIFT 8 -#define OSD_RECTCUR_RCAD (0xff << 8) -#define OSD_RECTCUR_CLUTSR (1 << 7) -#define OSD_RECTCUR_RCHW_SHIFT 4 -#define OSD_RECTCUR_RCHW (7 << 4) -#define OSD_RECTCUR_RCVW_SHIFT 1 -#define OSD_RECTCUR_RCVW (7 << 1) -#define OSD_RECTCUR_RCACT (1 << 0) - -#define OSD_VIDWIN0OFST_V0LO (0x1ff << 0) - -#define OSD_VIDWIN1OFST_V1LO (0x1ff << 0) - -#define OSD_OSDWIN0OFST_O0LO (0x1ff << 0) - -#define OSD_OSDWIN1OFST_O1LO (0x1ff << 0) - -#define OSD_WINOFST_AH_SHIFT 9 - -#define OSD_VIDWIN0OFST_V0AH (0xf << 9) -#define OSD_VIDWIN1OFST_V1AH (0xf << 9) -#define OSD_OSDWIN0OFST_O0AH (0xf << 9) -#define OSD_OSDWIN1OFST_O1AH (0xf << 9) - -#define OSD_VIDWINADH_V1AH_SHIFT 8 -#define OSD_VIDWINADH_V1AH (0x7f << 8) -#define OSD_VIDWINADH_V0AH_SHIFT 0 -#define OSD_VIDWINADH_V0AH (0x7f << 0) - -#define OSD_VIDWIN0ADL_V0AL (0xffff << 0) - -#define OSD_VIDWIN1ADL_V1AL (0xffff << 0) - -#define OSD_OSDWINADH_O1AH_SHIFT 8 -#define OSD_OSDWINADH_O1AH (0x7f << 8) -#define OSD_OSDWINADH_O0AH_SHIFT 0 -#define OSD_OSDWINADH_O0AH (0x7f << 0) - -#define OSD_OSDWIN0ADL_O0AL (0xffff << 0) - -#define OSD_OSDWIN1ADL_O1AL (0xffff << 0) - -#define OSD_BASEPX_BPX (0x3ff << 0) - -#define OSD_BASEPY_BPY (0x1ff << 0) - -#define OSD_VIDWIN0XP_V0X (0x7ff << 0) - -#define OSD_VIDWIN0YP_V0Y (0x7ff << 0) - -#define OSD_VIDWIN0XL_V0W (0x7ff << 0) - -#define OSD_VIDWIN0YL_V0H (0x7ff << 0) - -#define OSD_VIDWIN1XP_V1X (0x7ff << 0) - -#define OSD_VIDWIN1YP_V1Y (0x7ff << 0) - -#define OSD_VIDWIN1XL_V1W (0x7ff << 0) - -#define OSD_VIDWIN1YL_V1H (0x7ff << 0) - -#define OSD_OSDWIN0XP_W0X (0x7ff << 0) - -#define OSD_OSDWIN0YP_W0Y (0x7ff << 0) - -#define OSD_OSDWIN0XL_W0W (0x7ff << 0) - -#define OSD_OSDWIN0YL_W0H (0x7ff << 0) - -#define OSD_OSDWIN1XP_W1X (0x7ff << 0) - -#define OSD_OSDWIN1YP_W1Y (0x7ff << 0) - -#define OSD_OSDWIN1XL_W1W (0x7ff << 0) - -#define OSD_OSDWIN1YL_W1H (0x7ff << 0) - -#define OSD_CURXP_RCSX (0x7ff << 0) - -#define OSD_CURYP_RCSY (0x7ff << 0) - -#define OSD_CURXL_RCSW (0x7ff << 0) - -#define OSD_CURYL_RCSH (0x7ff << 0) - -#define OSD_EXTMODE_EXPMDSEL (1 << 15) -#define OSD_EXTMODE_SCRNHEXP_SHIFT 13 -#define OSD_EXTMODE_SCRNHEXP (3 << 13) -#define OSD_EXTMODE_SCRNVEXP (1 << 12) -#define OSD_EXTMODE_OSD1BLDCHR (1 << 11) -#define OSD_EXTMODE_OSD0BLDCHR (1 << 10) -#define OSD_EXTMODE_ATNOSD1EN (1 << 9) -#define OSD_EXTMODE_ATNOSD0EN (1 << 8) -#define OSD_EXTMODE_OSDHRSZ15 (1 << 7) -#define OSD_EXTMODE_VIDHRSZ15 (1 << 6) -#define OSD_EXTMODE_ZMFILV1HEN (1 << 5) -#define OSD_EXTMODE_ZMFILV1VEN (1 << 4) -#define OSD_EXTMODE_ZMFILV0HEN (1 << 3) -#define OSD_EXTMODE_ZMFILV0VEN (1 << 2) -#define OSD_EXTMODE_EXPFILHEN (1 << 1) -#define OSD_EXTMODE_EXPFILVEN (1 << 0) - -#define OSD_MISCCTL_BLDSEL (1 << 15) -#define OSD_MISCCTL_S420D (1 << 14) -#define OSD_MISCCTL_BMAPT (1 << 13) -#define OSD_MISCCTL_DM365M (1 << 12) -#define OSD_MISCCTL_RGBEN (1 << 7) -#define OSD_MISCCTL_RGBWIN (1 << 6) -#define OSD_MISCCTL_DMANG (1 << 6) -#define OSD_MISCCTL_TMON (1 << 5) -#define OSD_MISCCTL_RSEL (1 << 4) -#define OSD_MISCCTL_CPBSY (1 << 3) -#define OSD_MISCCTL_PPSW (1 << 2) -#define OSD_MISCCTL_PPRV (1 << 1) - -#define OSD_CLUTRAMYCB_Y_SHIFT 8 -#define OSD_CLUTRAMYCB_Y (0xff << 8) -#define OSD_CLUTRAMYCB_CB_SHIFT 0 -#define OSD_CLUTRAMYCB_CB (0xff << 0) - -#define OSD_CLUTRAMCR_CR_SHIFT 8 -#define OSD_CLUTRAMCR_CR (0xff << 8) -#define OSD_CLUTRAMCR_CADDR_SHIFT 0 -#define OSD_CLUTRAMCR_CADDR (0xff << 0) - -#define OSD_TRANSPVAL_RGBTRANS (0xffff << 0) - -#define OSD_TRANSPVALL_RGBL (0xffff << 0) - -#define OSD_TRANSPVALU_Y_SHIFT 8 -#define OSD_TRANSPVALU_Y (0xff << 8) -#define OSD_TRANSPVALU_RGBU_SHIFT 0 -#define OSD_TRANSPVALU_RGBU (0xff << 0) - -#define OSD_TRANSPBMPIDX_BMP1_SHIFT 8 -#define OSD_TRANSPBMPIDX_BMP1 (0xff << 8) -#define OSD_TRANSPBMPIDX_BMP0_SHIFT 0 -#define OSD_TRANSPBMPIDX_BMP0 0xff - -#endif /* _DAVINCI_VPBE_H_ */ diff --git a/drivers/media/platform/ti/davinci/vpbe_venc.c b/drivers/media/platform/ti/davinci/vpbe_venc.c deleted file mode 100644 index 4c8e31de12b1..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe_venc.c +++ /dev/null @@ -1,676 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2010 Texas Instruments Inc - */ -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/ctype.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/videodev2.h> -#include <linux/slab.h> - -#include <linux/platform_data/i2c-davinci.h> - -#include <linux/io.h> - -#include <media/davinci/vpbe_types.h> -#include <media/davinci/vpbe_venc.h> -#include <media/davinci/vpss.h> -#include <media/v4l2-device.h> - -#include "vpbe_venc_regs.h" - -#define MODULE_NAME "davinci-vpbe-venc" - -static const struct platform_device_id vpbe_venc_devtype[] = { - { - .name = DM644X_VPBE_VENC_SUBDEV_NAME, - .driver_data = VPBE_VERSION_1, - }, { - .name = DM365_VPBE_VENC_SUBDEV_NAME, - .driver_data = VPBE_VERSION_2, - }, { - .name = DM355_VPBE_VENC_SUBDEV_NAME, - .driver_data = VPBE_VERSION_3, - }, - { - /* sentinel */ - } -}; - -MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype); - -static int debug = 2; -module_param(debug, int, 0644); -MODULE_PARM_DESC(debug, "Debug level 0-2"); - -struct venc_state { - struct v4l2_subdev sd; - struct venc_callback *callback; - struct venc_platform_data *pdata; - struct device *pdev; - u32 output; - v4l2_std_id std; - spinlock_t lock; - void __iomem *venc_base; - void __iomem *vdaccfg_reg; - enum vpbe_version venc_type; -}; - -static inline struct venc_state *to_state(struct v4l2_subdev *sd) -{ - return container_of(sd, struct venc_state, sd); -} - -static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset) -{ - struct venc_state *venc = to_state(sd); - - return readl(venc->venc_base + offset); -} - -static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val) -{ - struct venc_state *venc = to_state(sd); - - writel(val, (venc->venc_base + offset)); - - return val; -} - -static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset, - u32 val, u32 mask) -{ - u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask); - - venc_write(sd, offset, new_val); - - return new_val; -} - -static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val) -{ - struct venc_state *venc = to_state(sd); - - writel(val, venc->vdaccfg_reg); - - val = readl(venc->vdaccfg_reg); - - return val; -} - -#define VDAC_COMPONENT 0x543 -#define VDAC_S_VIDEO 0x210 -/* This function sets the dac of the VPBE for various outputs - */ -static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index) -{ - switch (out_index) { - case 0: - v4l2_dbg(debug, 1, sd, "Setting output to Composite\n"); - venc_write(sd, VENC_DACSEL, 0); - break; - case 1: - v4l2_dbg(debug, 1, sd, "Setting output to Component\n"); - venc_write(sd, VENC_DACSEL, VDAC_COMPONENT); - break; - case 2: - v4l2_dbg(debug, 1, sd, "Setting output to S-video\n"); - venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO); - break; - default: - return -EINVAL; - } - - return 0; -} - -static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable) -{ - struct venc_state *venc = to_state(sd); - - v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n"); - - if (benable) { - venc_write(sd, VENC_VMOD, 0); - venc_write(sd, VENC_CVBS, 0); - venc_write(sd, VENC_LCDOUT, 0); - venc_write(sd, VENC_HSPLS, 0); - venc_write(sd, VENC_HSTART, 0); - venc_write(sd, VENC_HVALID, 0); - venc_write(sd, VENC_HINT, 0); - venc_write(sd, VENC_VSPLS, 0); - venc_write(sd, VENC_VSTART, 0); - venc_write(sd, VENC_VVALID, 0); - venc_write(sd, VENC_VINT, 0); - venc_write(sd, VENC_YCCCTL, 0); - venc_write(sd, VENC_DACSEL, 0); - - } else { - venc_write(sd, VENC_VMOD, 0); - /* disable VCLK output pin enable */ - venc_write(sd, VENC_VIDCTL, 0x141); - - /* Disable output sync pins */ - venc_write(sd, VENC_SYNCCTL, 0); - - /* Disable DCLOCK */ - venc_write(sd, VENC_DCLKCTL, 0); - venc_write(sd, VENC_DRGBX1, 0x0000057C); - - /* Disable LCD output control (accepting default polarity) */ - venc_write(sd, VENC_LCDOUT, 0); - if (venc->venc_type != VPBE_VERSION_3) - venc_write(sd, VENC_CMPNT, 0x100); - venc_write(sd, VENC_HSPLS, 0); - venc_write(sd, VENC_HINT, 0); - venc_write(sd, VENC_HSTART, 0); - venc_write(sd, VENC_HVALID, 0); - - venc_write(sd, VENC_VSPLS, 0); - venc_write(sd, VENC_VINT, 0); - venc_write(sd, VENC_VSTART, 0); - venc_write(sd, VENC_VVALID, 0); - - venc_write(sd, VENC_HSDLY, 0); - venc_write(sd, VENC_VSDLY, 0); - - venc_write(sd, VENC_YCCCTL, 0); - venc_write(sd, VENC_VSTARTA, 0); - - /* Set OSD clock and OSD Sync Adavance registers */ - venc_write(sd, VENC_OSDCLK0, 1); - venc_write(sd, VENC_OSDCLK1, 2); - } -} - -static void -venc_enable_vpss_clock(int venc_type, - enum vpbe_enc_timings_type type, - unsigned int pclock) -{ - if (venc_type == VPBE_VERSION_1) - return; - - if (venc_type == VPBE_VERSION_2 && (type == VPBE_ENC_STD || (type == - VPBE_ENC_DV_TIMINGS && pclock <= 27000000))) { - vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); - vpss_enable_clock(VPSS_VPBE_CLOCK, 1); - return; - } - - if (venc_type == VPBE_VERSION_3 && type == VPBE_ENC_STD) - vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 0); -} - -#define VDAC_CONFIG_SD_V3 0x0E21A6B6 -#define VDAC_CONFIG_SD_V2 0x081141CF -/* - * setting NTSC mode - */ -static int venc_set_ntsc(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - struct venc_platform_data *pdata = venc->pdata; - - v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n"); - - /* Setup clock at VPSS & VENC for SD */ - vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); - if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_525_60); - venc_enabledigitaloutput(sd, 0); - - if (venc->venc_type == VPBE_VERSION_3) { - venc_write(sd, VENC_CLKCTL, 0x01); - venc_write(sd, VENC_VIDCTL, 0); - vdaccfg_write(sd, VDAC_CONFIG_SD_V3); - } else if (venc->venc_type == VPBE_VERSION_2) { - venc_write(sd, VENC_CLKCTL, 0x01); - venc_write(sd, VENC_VIDCTL, 0); - vdaccfg_write(sd, VDAC_CONFIG_SD_V2); - } else { - /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ - venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); - /* Set REC656 Mode */ - venc_write(sd, VENC_YCCCTL, 0x1); - venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ); - venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS); - } - - venc_write(sd, VENC_VMOD, 0); - venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD); - venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - venc_write(sd, VENC_DACTST, 0x0); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - - return 0; -} - -/* - * setting PAL mode - */ -static int venc_set_pal(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - - v4l2_dbg(debug, 2, sd, "venc_set_pal\n"); - - /* Setup clock at VPSS & VENC for SD */ - vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); - if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_625_50); - venc_enabledigitaloutput(sd, 0); - - if (venc->venc_type == VPBE_VERSION_3) { - venc_write(sd, VENC_CLKCTL, 0x1); - venc_write(sd, VENC_VIDCTL, 0); - vdaccfg_write(sd, VDAC_CONFIG_SD_V3); - } else if (venc->venc_type == VPBE_VERSION_2) { - venc_write(sd, VENC_CLKCTL, 0x1); - venc_write(sd, VENC_VIDCTL, 0); - vdaccfg_write(sd, VDAC_CONFIG_SD_V2); - } else { - /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ - venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); - /* Set REC656 Mode */ - venc_write(sd, VENC_YCCCTL, 0x1); - } - - venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT, - VENC_SYNCCTL_OVD); - venc_write(sd, VENC_VMOD, 0); - venc_modify(sd, VENC_VMOD, - (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, - (0 << VENC_VMOD_VMD), VENC_VMOD_VMD); - venc_modify(sd, VENC_VMOD, - (1 << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - venc_write(sd, VENC_DACTST, 0x0); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - - return 0; -} - -#define VDAC_CONFIG_HD_V2 0x081141EF -/* - * venc_set_480p59_94 - * - * This function configures the video encoder to EDTV(525p) component setting. - */ -static int venc_set_480p59_94(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - struct venc_platform_data *pdata = venc->pdata; - - v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n"); - if (venc->venc_type != VPBE_VERSION_1 && - venc->venc_type != VPBE_VERSION_2) - return -EINVAL; - - /* Setup clock at VPSS & VENC for SD */ - if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000); - venc_enabledigitaloutput(sd, 0); - - if (venc->venc_type == VPBE_VERSION_2) - vdaccfg_write(sd, VDAC_CONFIG_HD_V2); - venc_write(sd, VENC_OSDCLK0, 0); - venc_write(sd, VENC_OSDCLK1, 1); - - if (venc->venc_type == VPBE_VERSION_1) { - venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, - VENC_VDPRO_DAFRQ); - venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, - VENC_VDPRO_DAUPS); - } - - venc_write(sd, VENC_VMOD, 0); - venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); - venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 << - VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD); - - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - - return 0; -} - -/* - * venc_set_625p - * - * This function configures the video encoder to HDTV(625p) component setting - */ -static int venc_set_576p50(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - struct venc_platform_data *pdata = venc->pdata; - - v4l2_dbg(debug, 2, sd, "venc_set_576p50\n"); - - if (venc->venc_type != VPBE_VERSION_1 && - venc->venc_type != VPBE_VERSION_2) - return -EINVAL; - /* Setup clock at VPSS & VENC for SD */ - if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000); - venc_enabledigitaloutput(sd, 0); - - if (venc->venc_type == VPBE_VERSION_2) - vdaccfg_write(sd, VDAC_CONFIG_HD_V2); - - venc_write(sd, VENC_OSDCLK0, 0); - venc_write(sd, VENC_OSDCLK1, 1); - - if (venc->venc_type == VPBE_VERSION_1) { - venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, - VENC_VDPRO_DAFRQ); - venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, - VENC_VDPRO_DAUPS); - } - - venc_write(sd, VENC_VMOD, 0); - venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); - venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - - venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 << - VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - - return 0; -} - -/* - * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only - */ -static int venc_set_720p60_internal(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - struct venc_platform_data *pdata = venc->pdata; - - if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000); - venc_enabledigitaloutput(sd, 0); - - venc_write(sd, VENC_OSDCLK0, 0); - venc_write(sd, VENC_OSDCLK1, 1); - - venc_write(sd, VENC_VMOD, 0); - /* DM365 component HD mode */ - venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); - venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - venc_write(sd, VENC_XHINTVL, 0); - return 0; -} - -/* - * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only - */ -static int venc_set_1080i30_internal(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - struct venc_platform_data *pdata = venc->pdata; - - if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0) - return -EINVAL; - - venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000); - venc_enabledigitaloutput(sd, 0); - - venc_write(sd, VENC_OSDCLK0, 0); - venc_write(sd, VENC_OSDCLK1, 1); - - - venc_write(sd, VENC_VMOD, 0); - /* DM365 component HD mode */ - venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), - VENC_VMOD_VIE); - venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); - venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT), - VENC_VMOD_TVTYP); - venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); - venc_write(sd, VENC_XHINTVL, 0); - return 0; -} - -static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm) -{ - v4l2_dbg(debug, 1, sd, "venc_s_std_output\n"); - - if (norm & V4L2_STD_525_60) - return venc_set_ntsc(sd); - else if (norm & V4L2_STD_625_50) - return venc_set_pal(sd); - - return -EINVAL; -} - -static int venc_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *dv_timings) -{ - struct venc_state *venc = to_state(sd); - u32 height = dv_timings->bt.height; - int ret; - - v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n"); - - if (height == 576) - return venc_set_576p50(sd); - else if (height == 480) - return venc_set_480p59_94(sd); - else if ((height == 720) && - (venc->venc_type == VPBE_VERSION_2)) { - /* TBD setup internal 720p mode here */ - ret = venc_set_720p60_internal(sd); - /* for DM365 VPBE, there is DAC inside */ - vdaccfg_write(sd, VDAC_CONFIG_HD_V2); - return ret; - } else if ((height == 1080) && - (venc->venc_type == VPBE_VERSION_2)) { - /* TBD setup internal 1080i mode here */ - ret = venc_set_1080i30_internal(sd); - /* for DM365 VPBE, there is DAC inside */ - vdaccfg_write(sd, VDAC_CONFIG_HD_V2); - return ret; - } - return -EINVAL; -} - -static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, - u32 config) -{ - struct venc_state *venc = to_state(sd); - int ret; - - v4l2_dbg(debug, 1, sd, "venc_s_routing\n"); - - ret = venc_set_dac(sd, output); - if (!ret) - venc->output = output; - - return ret; -} - -static long venc_command(struct v4l2_subdev *sd, unsigned int cmd, void *arg) -{ - u32 val; - - switch (cmd) { - case VENC_GET_FLD: - val = venc_read(sd, VENC_VSTAT); - *((int *)arg) = ((val & VENC_VSTAT_FIDST) == - VENC_VSTAT_FIDST); - break; - default: - v4l2_err(sd, "Wrong IOCTL cmd\n"); - break; - } - - return 0; -} - -static const struct v4l2_subdev_core_ops venc_core_ops = { - .command = venc_command, -}; - -static const struct v4l2_subdev_video_ops venc_video_ops = { - .s_routing = venc_s_routing, - .s_std_output = venc_s_std_output, - .s_dv_timings = venc_s_dv_timings, -}; - -static const struct v4l2_subdev_ops venc_ops = { - .core = &venc_core_ops, - .video = &venc_video_ops, -}; - -static int venc_initialize(struct v4l2_subdev *sd) -{ - struct venc_state *venc = to_state(sd); - int ret; - - /* Set default to output to composite and std to NTSC */ - venc->output = 0; - venc->std = V4L2_STD_525_60; - - ret = venc_s_routing(sd, 0, venc->output, 0); - if (ret < 0) { - v4l2_err(sd, "Error setting output during init\n"); - return -EINVAL; - } - - ret = venc_s_std_output(sd, venc->std); - if (ret < 0) { - v4l2_err(sd, "Error setting std during init\n"); - return -EINVAL; - } - - return ret; -} - -static int venc_device_get(struct device *dev, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - struct venc_state **venc = data; - - if (strstr(pdev->name, "vpbe-venc") != NULL) - *venc = platform_get_drvdata(pdev); - - return 0; -} - -struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev, - const char *venc_name) -{ - struct venc_state *venc = NULL; - - bus_for_each_dev(&platform_bus_type, NULL, &venc, - venc_device_get); - if (venc == NULL) - return NULL; - - v4l2_subdev_init(&venc->sd, &venc_ops); - - strscpy(venc->sd.name, venc_name, sizeof(venc->sd.name)); - if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) { - v4l2_err(v4l2_dev, - "vpbe unable to register venc sub device\n"); - return NULL; - } - if (venc_initialize(&venc->sd)) { - v4l2_err(v4l2_dev, - "vpbe venc initialization failed\n"); - return NULL; - } - - return &venc->sd; -} -EXPORT_SYMBOL(venc_sub_dev_init); - -static int venc_probe(struct platform_device *pdev) -{ - const struct platform_device_id *pdev_id; - struct venc_state *venc; - - if (!pdev->dev.platform_data) { - dev_err(&pdev->dev, "No platform data for VENC sub device"); - return -EINVAL; - } - - pdev_id = platform_get_device_id(pdev); - if (!pdev_id) - return -EINVAL; - - venc = devm_kzalloc(&pdev->dev, sizeof(struct venc_state), GFP_KERNEL); - if (venc == NULL) - return -ENOMEM; - - venc->venc_type = pdev_id->driver_data; - venc->pdev = &pdev->dev; - venc->pdata = pdev->dev.platform_data; - - venc->venc_base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(venc->venc_base)) - return PTR_ERR(venc->venc_base); - - if (venc->venc_type != VPBE_VERSION_1) { - venc->vdaccfg_reg = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(venc->vdaccfg_reg)) - return PTR_ERR(venc->vdaccfg_reg); - } - spin_lock_init(&venc->lock); - platform_set_drvdata(pdev, venc); - dev_notice(venc->pdev, "VENC sub device probe success\n"); - - return 0; -} - -static int venc_remove(struct platform_device *pdev) -{ - return 0; -} - -static struct platform_driver venc_driver = { - .probe = venc_probe, - .remove = venc_remove, - .driver = { - .name = MODULE_NAME, - }, - .id_table = vpbe_venc_devtype -}; - -module_platform_driver(venc_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("VPBE VENC Driver"); -MODULE_AUTHOR("Texas Instruments"); diff --git a/drivers/media/platform/ti/davinci/vpbe_venc_regs.h b/drivers/media/platform/ti/davinci/vpbe_venc_regs.h deleted file mode 100644 index 29d8fc3af662..000000000000 --- a/drivers/media/platform/ti/davinci/vpbe_venc_regs.h +++ /dev/null @@ -1,165 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2006-2010 Texas Instruments Inc - */ -#ifndef _VPBE_VENC_REGS_H -#define _VPBE_VENC_REGS_H - -/* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */ -#define VENC_VMOD 0x00 -#define VENC_VIDCTL 0x04 -#define VENC_VDPRO 0x08 -#define VENC_SYNCCTL 0x0C -#define VENC_HSPLS 0x10 -#define VENC_VSPLS 0x14 -#define VENC_HINT 0x18 -#define VENC_HSTART 0x1C -#define VENC_HVALID 0x20 -#define VENC_VINT 0x24 -#define VENC_VSTART 0x28 -#define VENC_VVALID 0x2C -#define VENC_HSDLY 0x30 -#define VENC_VSDLY 0x34 -#define VENC_YCCCTL 0x38 -#define VENC_RGBCTL 0x3C -#define VENC_RGBCLP 0x40 -#define VENC_LINECTL 0x44 -#define VENC_CULLLINE 0x48 -#define VENC_LCDOUT 0x4C -#define VENC_BRTS 0x50 -#define VENC_BRTW 0x54 -#define VENC_ACCTL 0x58 -#define VENC_PWMP 0x5C -#define VENC_PWMW 0x60 -#define VENC_DCLKCTL 0x64 -#define VENC_DCLKPTN0 0x68 -#define VENC_DCLKPTN1 0x6C -#define VENC_DCLKPTN2 0x70 -#define VENC_DCLKPTN3 0x74 -#define VENC_DCLKPTN0A 0x78 -#define VENC_DCLKPTN1A 0x7C -#define VENC_DCLKPTN2A 0x80 -#define VENC_DCLKPTN3A 0x84 -#define VENC_DCLKHS 0x88 -#define VENC_DCLKHSA 0x8C -#define VENC_DCLKHR 0x90 -#define VENC_DCLKVS 0x94 -#define VENC_DCLKVR 0x98 -#define VENC_CAPCTL 0x9C -#define VENC_CAPDO 0xA0 -#define VENC_CAPDE 0xA4 -#define VENC_ATR0 0xA8 -#define VENC_ATR1 0xAC -#define VENC_ATR2 0xB0 -#define VENC_VSTAT 0xB8 -#define VENC_RAMADR 0xBC -#define VENC_RAMPORT 0xC0 -#define VENC_DACTST 0xC4 -#define VENC_YCOLVL 0xC8 -#define VENC_SCPROG 0xCC -#define VENC_CVBS 0xDC -#define VENC_CMPNT 0xE0 -#define VENC_ETMG0 0xE4 -#define VENC_ETMG1 0xE8 -#define VENC_ETMG2 0xEC -#define VENC_ETMG3 0xF0 -#define VENC_DACSEL 0xF4 -#define VENC_ARGBX0 0x100 -#define VENC_ARGBX1 0x104 -#define VENC_ARGBX2 0x108 -#define VENC_ARGBX3 0x10C -#define VENC_ARGBX4 0x110 -#define VENC_DRGBX0 0x114 -#define VENC_DRGBX1 0x118 -#define VENC_DRGBX2 0x11C -#define VENC_DRGBX3 0x120 -#define VENC_DRGBX4 0x124 -#define VENC_VSTARTA 0x128 -#define VENC_OSDCLK0 0x12C -#define VENC_OSDCLK1 0x130 -#define VENC_HVLDCL0 0x134 -#define VENC_HVLDCL1 0x138 -#define VENC_OSDHADV 0x13C -#define VENC_CLKCTL 0x140 -#define VENC_GAMCTL 0x144 -#define VENC_XHINTVL 0x174 - -/* bit definitions */ -#define VPBE_PCR_VENC_DIV (1 << 1) -#define VPBE_PCR_CLK_OFF (1 << 0) - -#define VENC_VMOD_VDMD_SHIFT 12 -#define VENC_VMOD_VDMD_YCBCR16 0 -#define VENC_VMOD_VDMD_YCBCR8 1 -#define VENC_VMOD_VDMD_RGB666 2 -#define VENC_VMOD_VDMD_RGB8 3 -#define VENC_VMOD_VDMD_EPSON 4 -#define VENC_VMOD_VDMD_CASIO 5 -#define VENC_VMOD_VDMD_UDISPQVGA 6 -#define VENC_VMOD_VDMD_STNLCD 7 -#define VENC_VMOD_VIE_SHIFT 1 -#define VENC_VMOD_VDMD (7 << 12) -#define VENC_VMOD_ITLCL (1 << 11) -#define VENC_VMOD_ITLC (1 << 10) -#define VENC_VMOD_NSIT (1 << 9) -#define VENC_VMOD_HDMD (1 << 8) -#define VENC_VMOD_TVTYP_SHIFT 6 -#define VENC_VMOD_TVTYP (3 << 6) -#define VENC_VMOD_SLAVE (1 << 5) -#define VENC_VMOD_VMD (1 << 4) -#define VENC_VMOD_BLNK (1 << 3) -#define VENC_VMOD_VIE (1 << 1) -#define VENC_VMOD_VENC (1 << 0) - -/* VMOD TVTYP options for HDMD=0 */ -#define SDTV_NTSC 0 -#define SDTV_PAL 1 -/* VMOD TVTYP options for HDMD=1 */ -#define HDTV_525P 0 -#define HDTV_625P 1 -#define HDTV_1080I 2 -#define HDTV_720P 3 - -#define VENC_VIDCTL_VCLKP (1 << 14) -#define VENC_VIDCTL_VCLKE_SHIFT 13 -#define VENC_VIDCTL_VCLKE (1 << 13) -#define VENC_VIDCTL_VCLKZ_SHIFT 12 -#define VENC_VIDCTL_VCLKZ (1 << 12) -#define VENC_VIDCTL_SYDIR_SHIFT 8 -#define VENC_VIDCTL_SYDIR (1 << 8) -#define VENC_VIDCTL_DOMD_SHIFT 4 -#define VENC_VIDCTL_DOMD (3 << 4) -#define VENC_VIDCTL_YCDIR_SHIFT 0 -#define VENC_VIDCTL_YCDIR (1 << 0) - -#define VENC_VDPRO_ATYCC_SHIFT 5 -#define VENC_VDPRO_ATYCC (1 << 5) -#define VENC_VDPRO_ATCOM_SHIFT 4 -#define VENC_VDPRO_ATCOM (1 << 4) -#define VENC_VDPRO_DAFRQ (1 << 3) -#define VENC_VDPRO_DAUPS (1 << 2) -#define VENC_VDPRO_CUPS (1 << 1) -#define VENC_VDPRO_YUPS (1 << 0) - -#define VENC_SYNCCTL_VPL_SHIFT 3 -#define VENC_SYNCCTL_VPL (1 << 3) -#define VENC_SYNCCTL_HPL_SHIFT 2 -#define VENC_SYNCCTL_HPL (1 << 2) -#define VENC_SYNCCTL_SYEV_SHIFT 1 -#define VENC_SYNCCTL_SYEV (1 << 1) -#define VENC_SYNCCTL_SYEH_SHIFT 0 -#define VENC_SYNCCTL_SYEH (1 << 0) -#define VENC_SYNCCTL_OVD_SHIFT 14 -#define VENC_SYNCCTL_OVD (1 << 14) - -#define VENC_DCLKCTL_DCKEC_SHIFT 11 -#define VENC_DCLKCTL_DCKEC (1 << 11) -#define VENC_DCLKCTL_DCKPW_SHIFT 0 -#define VENC_DCLKCTL_DCKPW (0x3f << 0) - -#define VENC_VSTAT_FIDST (1 << 4) - -#define VENC_CMPNT_MRGB_SHIFT 14 -#define VENC_CMPNT_MRGB (1 << 14) - -#endif /* _VPBE_VENC_REGS_H */ diff --git a/drivers/media/platform/ti/davinci/vpss.c b/drivers/media/platform/ti/davinci/vpss.c deleted file mode 100644 index d15b991ab17c..000000000000 --- a/drivers/media/platform/ti/davinci/vpss.c +++ /dev/null @@ -1,529 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2009 Texas Instruments. - * - * common vpss system module platform driver for all video drivers. - */ -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/pm_runtime.h> -#include <linux/err.h> - -#include <media/davinci/vpss.h> - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("VPSS Driver"); -MODULE_AUTHOR("Texas Instruments"); - -/* DM644x defines */ -#define DM644X_SBL_PCR_VPSS (4) - -#define DM355_VPSSBL_INTSEL 0x10 -#define DM355_VPSSBL_EVTSEL 0x14 -/* vpss BL register offsets */ -#define DM355_VPSSBL_CCDCMUX 0x1c -/* vpss CLK register offsets */ -#define DM355_VPSSCLK_CLKCTRL 0x04 -/* masks and shifts */ -#define VPSS_HSSISEL_SHIFT 4 -/* - * VDINT0 - vpss_int0, VDINT1 - vpss_int1, H3A - vpss_int4, - * IPIPE_INT1_SDR - vpss_int5 - */ -#define DM355_VPSSBL_INTSEL_DEFAULT 0xff83ff10 -/* VENCINT - vpss_int8 */ -#define DM355_VPSSBL_EVTSEL_DEFAULT 0x4 - -#define DM365_ISP5_PCCR 0x04 -#define DM365_ISP5_PCCR_BL_CLK_ENABLE BIT(0) -#define DM365_ISP5_PCCR_ISIF_CLK_ENABLE BIT(1) -#define DM365_ISP5_PCCR_H3A_CLK_ENABLE BIT(2) -#define DM365_ISP5_PCCR_RSZ_CLK_ENABLE BIT(3) -#define DM365_ISP5_PCCR_IPIPE_CLK_ENABLE BIT(4) -#define DM365_ISP5_PCCR_IPIPEIF_CLK_ENABLE BIT(5) -#define DM365_ISP5_PCCR_RSV BIT(6) - -#define DM365_ISP5_BCR 0x08 -#define DM365_ISP5_BCR_ISIF_OUT_ENABLE BIT(1) - -#define DM365_ISP5_INTSEL1 0x10 -#define DM365_ISP5_INTSEL2 0x14 -#define DM365_ISP5_INTSEL3 0x18 -#define DM365_ISP5_CCDCMUX 0x20 -#define DM365_ISP5_PG_FRAME_SIZE 0x28 -#define DM365_VPBE_CLK_CTRL 0x00 - -#define VPSS_CLK_CTRL 0x01c40044 -#define VPSS_CLK_CTRL_VENCCLKEN BIT(3) -#define VPSS_CLK_CTRL_DACCLKEN BIT(4) - -/* - * vpss interrupts. VDINT0 - vpss_int0, VDINT1 - vpss_int1, - * AF - vpss_int3 - */ -#define DM365_ISP5_INTSEL1_DEFAULT 0x0b1f0100 -/* AEW - vpss_int6, RSZ_INT_DMA - vpss_int5 */ -#define DM365_ISP5_INTSEL2_DEFAULT 0x1f0a0f1f -/* VENC - vpss_int8 */ -#define DM365_ISP5_INTSEL3_DEFAULT 0x00000015 - -/* masks and shifts for DM365*/ -#define DM365_CCDC_PG_VD_POL_SHIFT 0 -#define DM365_CCDC_PG_HD_POL_SHIFT 1 - -#define CCD_SRC_SEL_MASK (BIT_MASK(5) | BIT_MASK(4)) -#define CCD_SRC_SEL_SHIFT 4 - -/* Different SoC platforms supported by this driver */ -enum vpss_platform_type { - DM644X, - DM355, - DM365, -}; - -/* - * vpss operations. Depends on platform. Not all functions are available - * on all platforms. The api, first check if a function is available before - * invoking it. In the probe, the function ptrs are initialized based on - * vpss name. vpss name can be "dm355_vpss", "dm644x_vpss" etc. - */ -struct vpss_hw_ops { - /* enable clock */ - int (*enable_clock)(enum vpss_clock_sel clock_sel, int en); - /* select input to ccdc */ - void (*select_ccdc_source)(enum vpss_ccdc_source_sel src_sel); - /* clear wbl overflow bit */ - int (*clear_wbl_overflow)(enum vpss_wbl_sel wbl_sel); - /* set sync polarity */ - void (*set_sync_pol)(struct vpss_sync_pol); - /* set the PG_FRAME_SIZE register*/ - void (*set_pg_frame_size)(struct vpss_pg_frame_size); - /* check and clear interrupt if occurred */ - int (*dma_complete_interrupt)(void); -}; - -/* vpss configuration */ -struct vpss_oper_config { - __iomem void *vpss_regs_base0; - __iomem void *vpss_regs_base1; - __iomem void *vpss_regs_base2; - enum vpss_platform_type platform; - spinlock_t vpss_lock; - struct vpss_hw_ops hw_ops; -}; - -static struct vpss_oper_config oper_cfg; - -/* register access routines */ -static inline u32 bl_regr(u32 offset) -{ - return __raw_readl(oper_cfg.vpss_regs_base0 + offset); -} - -static inline void bl_regw(u32 val, u32 offset) -{ - __raw_writel(val, oper_cfg.vpss_regs_base0 + offset); -} - -static inline u32 vpss_regr(u32 offset) -{ - return __raw_readl(oper_cfg.vpss_regs_base1 + offset); -} - -static inline void vpss_regw(u32 val, u32 offset) -{ - __raw_writel(val, oper_cfg.vpss_regs_base1 + offset); -} - -/* For DM365 only */ -static inline u32 isp5_read(u32 offset) -{ - return __raw_readl(oper_cfg.vpss_regs_base0 + offset); -} - -/* For DM365 only */ -static inline void isp5_write(u32 val, u32 offset) -{ - __raw_writel(val, oper_cfg.vpss_regs_base0 + offset); -} - -static void dm365_select_ccdc_source(enum vpss_ccdc_source_sel src_sel) -{ - u32 temp = isp5_read(DM365_ISP5_CCDCMUX) & ~CCD_SRC_SEL_MASK; - - /* if we are using pattern generator, enable it */ - if (src_sel == VPSS_PGLPBK || src_sel == VPSS_CCDCPG) - temp |= 0x08; - - temp |= (src_sel << CCD_SRC_SEL_SHIFT); - isp5_write(temp, DM365_ISP5_CCDCMUX); -} - -static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel) -{ - bl_regw(src_sel << VPSS_HSSISEL_SHIFT, DM355_VPSSBL_CCDCMUX); -} - -int vpss_dma_complete_interrupt(void) -{ - if (!oper_cfg.hw_ops.dma_complete_interrupt) - return 2; - return oper_cfg.hw_ops.dma_complete_interrupt(); -} -EXPORT_SYMBOL(vpss_dma_complete_interrupt); - -int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel) -{ - if (!oper_cfg.hw_ops.select_ccdc_source) - return -EINVAL; - - oper_cfg.hw_ops.select_ccdc_source(src_sel); - return 0; -} -EXPORT_SYMBOL(vpss_select_ccdc_source); - -static int dm644x_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel) -{ - u32 mask = 1, val; - - if (wbl_sel < VPSS_PCR_AEW_WBL_0 || - wbl_sel > VPSS_PCR_CCDC_WBL_O) - return -EINVAL; - - /* writing a 0 clear the overflow */ - mask = ~(mask << wbl_sel); - val = bl_regr(DM644X_SBL_PCR_VPSS) & mask; - bl_regw(val, DM644X_SBL_PCR_VPSS); - return 0; -} - -void vpss_set_sync_pol(struct vpss_sync_pol sync) -{ - if (!oper_cfg.hw_ops.set_sync_pol) - return; - - oper_cfg.hw_ops.set_sync_pol(sync); -} -EXPORT_SYMBOL(vpss_set_sync_pol); - -int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel) -{ - if (!oper_cfg.hw_ops.clear_wbl_overflow) - return -EINVAL; - - return oper_cfg.hw_ops.clear_wbl_overflow(wbl_sel); -} -EXPORT_SYMBOL(vpss_clear_wbl_overflow); - -/* - * dm355_enable_clock - Enable VPSS Clock - * @clock_sel: Clock to be enabled/disabled - * @en: enable/disable flag - * - * This is called to enable or disable a vpss clock - */ -static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en) -{ - unsigned long flags; - u32 utemp, mask = 0x1, shift = 0; - - switch (clock_sel) { - case VPSS_VPBE_CLOCK: - /* nothing since lsb */ - break; - case VPSS_VENC_CLOCK_SEL: - shift = 2; - break; - case VPSS_CFALD_CLOCK: - shift = 3; - break; - case VPSS_H3A_CLOCK: - shift = 4; - break; - case VPSS_IPIPE_CLOCK: - shift = 5; - break; - case VPSS_CCDC_CLOCK: - shift = 6; - break; - default: - printk(KERN_ERR "dm355_enable_clock: Invalid selector: %d\n", - clock_sel); - return -EINVAL; - } - - spin_lock_irqsave(&oper_cfg.vpss_lock, flags); - utemp = vpss_regr(DM355_VPSSCLK_CLKCTRL); - if (!en) - utemp &= ~(mask << shift); - else - utemp |= (mask << shift); - - vpss_regw(utemp, DM355_VPSSCLK_CLKCTRL); - spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags); - return 0; -} - -static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en) -{ - unsigned long flags; - u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR; - u32 (*read)(u32 offset) = isp5_read; - void(*write)(u32 val, u32 offset) = isp5_write; - - switch (clock_sel) { - case VPSS_BL_CLOCK: - break; - case VPSS_CCDC_CLOCK: - shift = 1; - break; - case VPSS_H3A_CLOCK: - shift = 2; - break; - case VPSS_RSZ_CLOCK: - shift = 3; - break; - case VPSS_IPIPE_CLOCK: - shift = 4; - break; - case VPSS_IPIPEIF_CLOCK: - shift = 5; - break; - case VPSS_PCLK_INTERNAL: - shift = 6; - break; - case VPSS_PSYNC_CLOCK_SEL: - shift = 7; - break; - case VPSS_VPBE_CLOCK: - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - case VPSS_VENC_CLOCK_SEL: - shift = 2; - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - case VPSS_LDC_CLOCK: - shift = 3; - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - case VPSS_FDIF_CLOCK: - shift = 4; - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - case VPSS_OSD_CLOCK_SEL: - shift = 6; - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - case VPSS_LDC_CLOCK_SEL: - shift = 7; - read = vpss_regr; - write = vpss_regw; - offset = DM365_VPBE_CLK_CTRL; - break; - default: - printk(KERN_ERR "dm365_enable_clock: Invalid selector: %d\n", - clock_sel); - return -1; - } - - spin_lock_irqsave(&oper_cfg.vpss_lock, flags); - utemp = read(offset); - if (!en) { - mask = ~mask; - utemp &= (mask << shift); - } else - utemp |= (mask << shift); - - write(utemp, offset); - spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags); - - return 0; -} - -int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en) -{ - if (!oper_cfg.hw_ops.enable_clock) - return -EINVAL; - - return oper_cfg.hw_ops.enable_clock(clock_sel, en); -} -EXPORT_SYMBOL(vpss_enable_clock); - -void dm365_vpss_set_sync_pol(struct vpss_sync_pol sync) -{ - int val = 0; - val = isp5_read(DM365_ISP5_CCDCMUX); - - val |= (sync.ccdpg_hdpol << DM365_CCDC_PG_HD_POL_SHIFT); - val |= (sync.ccdpg_vdpol << DM365_CCDC_PG_VD_POL_SHIFT); - - isp5_write(val, DM365_ISP5_CCDCMUX); -} -EXPORT_SYMBOL(dm365_vpss_set_sync_pol); - -void vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size) -{ - if (!oper_cfg.hw_ops.set_pg_frame_size) - return; - - oper_cfg.hw_ops.set_pg_frame_size(frame_size); -} -EXPORT_SYMBOL(vpss_set_pg_frame_size); - -void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size) -{ - int current_reg = ((frame_size.hlpfr >> 1) - 1) << 16; - - current_reg |= (frame_size.pplen - 1); - isp5_write(current_reg, DM365_ISP5_PG_FRAME_SIZE); -} -EXPORT_SYMBOL(dm365_vpss_set_pg_frame_size); - -static int vpss_probe(struct platform_device *pdev) -{ - char *platform_name; - - if (!pdev->dev.platform_data) { - dev_err(&pdev->dev, "no platform data\n"); - return -ENOENT; - } - - platform_name = pdev->dev.platform_data; - if (!strcmp(platform_name, "dm355_vpss")) - oper_cfg.platform = DM355; - else if (!strcmp(platform_name, "dm365_vpss")) - oper_cfg.platform = DM365; - else if (!strcmp(platform_name, "dm644x_vpss")) - oper_cfg.platform = DM644X; - else { - dev_err(&pdev->dev, "vpss driver not supported on this platform\n"); - return -ENODEV; - } - - dev_info(&pdev->dev, "%s vpss probed\n", platform_name); - oper_cfg.vpss_regs_base0 = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(oper_cfg.vpss_regs_base0)) - return PTR_ERR(oper_cfg.vpss_regs_base0); - - if (oper_cfg.platform == DM355 || oper_cfg.platform == DM365) { - oper_cfg.vpss_regs_base1 = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(oper_cfg.vpss_regs_base1)) - return PTR_ERR(oper_cfg.vpss_regs_base1); - } - - if (oper_cfg.platform == DM355) { - oper_cfg.hw_ops.enable_clock = dm355_enable_clock; - oper_cfg.hw_ops.select_ccdc_source = dm355_select_ccdc_source; - /* Setup vpss interrupts */ - bl_regw(DM355_VPSSBL_INTSEL_DEFAULT, DM355_VPSSBL_INTSEL); - bl_regw(DM355_VPSSBL_EVTSEL_DEFAULT, DM355_VPSSBL_EVTSEL); - } else if (oper_cfg.platform == DM365) { - oper_cfg.hw_ops.enable_clock = dm365_enable_clock; - oper_cfg.hw_ops.select_ccdc_source = dm365_select_ccdc_source; - /* Setup vpss interrupts */ - isp5_write((isp5_read(DM365_ISP5_PCCR) | - DM365_ISP5_PCCR_BL_CLK_ENABLE | - DM365_ISP5_PCCR_ISIF_CLK_ENABLE | - DM365_ISP5_PCCR_H3A_CLK_ENABLE | - DM365_ISP5_PCCR_RSZ_CLK_ENABLE | - DM365_ISP5_PCCR_IPIPE_CLK_ENABLE | - DM365_ISP5_PCCR_IPIPEIF_CLK_ENABLE | - DM365_ISP5_PCCR_RSV), DM365_ISP5_PCCR); - isp5_write((isp5_read(DM365_ISP5_BCR) | - DM365_ISP5_BCR_ISIF_OUT_ENABLE), DM365_ISP5_BCR); - isp5_write(DM365_ISP5_INTSEL1_DEFAULT, DM365_ISP5_INTSEL1); - isp5_write(DM365_ISP5_INTSEL2_DEFAULT, DM365_ISP5_INTSEL2); - isp5_write(DM365_ISP5_INTSEL3_DEFAULT, DM365_ISP5_INTSEL3); - } else - oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow; - - pm_runtime_enable(&pdev->dev); - - pm_runtime_get(&pdev->dev); - - spin_lock_init(&oper_cfg.vpss_lock); - dev_info(&pdev->dev, "%s vpss probe success\n", platform_name); - - return 0; -} - -static int vpss_remove(struct platform_device *pdev) -{ - pm_runtime_disable(&pdev->dev); - return 0; -} - -static int vpss_suspend(struct device *dev) -{ - pm_runtime_put(dev); - return 0; -} - -static int vpss_resume(struct device *dev) -{ - pm_runtime_get(dev); - return 0; -} - -static const struct dev_pm_ops vpss_pm_ops = { - .suspend = vpss_suspend, - .resume = vpss_resume, -}; - -static struct platform_driver vpss_driver = { - .driver = { - .name = "vpss", - .pm = &vpss_pm_ops, - }, - .remove = vpss_remove, - .probe = vpss_probe, -}; - -static void vpss_exit(void) -{ - platform_driver_unregister(&vpss_driver); - iounmap(oper_cfg.vpss_regs_base2); - release_mem_region(VPSS_CLK_CTRL, 4); -} - -static int __init vpss_init(void) -{ - int ret; - - if (!request_mem_region(VPSS_CLK_CTRL, 4, "vpss_clock_control")) - return -EBUSY; - - oper_cfg.vpss_regs_base2 = ioremap(VPSS_CLK_CTRL, 4); - if (unlikely(!oper_cfg.vpss_regs_base2)) { - ret = -ENOMEM; - goto err_ioremap; - } - - writel(VPSS_CLK_CTRL_VENCCLKEN | - VPSS_CLK_CTRL_DACCLKEN, oper_cfg.vpss_regs_base2); - - ret = platform_driver_register(&vpss_driver); - if (ret) - goto err_pd_register; - - return 0; - -err_pd_register: - iounmap(oper_cfg.vpss_regs_base2); -err_ioremap: - release_mem_region(VPSS_CLK_CTRL, 4); - return ret; -} -subsys_initcall(vpss_init); -module_exit(vpss_exit); diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 30db49f31866..5c24841e5699 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -300,15 +300,6 @@ config MFD_CS47L92 help Support for Cirrus Logic CS42L92, CS47L92 and CS47L93 Smart Codecs -config MFD_ASIC3 - bool "Compaq ASIC3" - depends on GPIOLIB - depends on ARM || COMPILE_TEST - select MFD_CORE - help - This driver supports the ASIC3 multifunction chip found on many - PDAs (mainly iPAQ and HTC based ones) - config PMIC_DA903X bool "Dialog Semiconductor DA9030/DA9034 PMIC Support" depends on I2C=y @@ -550,15 +541,6 @@ config MFD_HI655X_PMIC help Select this option to enable Hisilicon hi655x series pmic driver. -config HTC_PASIC3 - tristate "HTC PASIC3 LED/DS1WM chip support" - select MFD_CORE - help - This core driver provides register access for the LED/DS1WM - chips labeled "AIC2" and "AIC3", found on HTC Blueangel and - HTC Magician devices, respectively. Actual functionality is - handled by the leds-pasic3 and ds1wm drivers. - config MFD_INTEL_QUARK_I2C_GPIO tristate "Intel Quark MFD I2C GPIO" depends on PCI @@ -702,7 +684,7 @@ config MFD_INTEL_PMC_BXT config MFD_IPAQ_MICRO bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support" - depends on SA1100_H3100 || SA1100_H3600 + depends on SA1100_H3600 select MFD_CORE help Select this to get support for the Microcontroller found in @@ -1080,17 +1062,6 @@ config PCF50633_GPIO Say yes here if you want to include support GPIO for pins on the PCF50633 chip. -config UCB1400_CORE - tristate "Philips UCB1400 Core driver" - depends on AC97_BUS - depends on GPIOLIB - help - This enables support for the Philips UCB1400 core functions. - The UCB1400 is an AC97 audio codec. - - To compile this driver as a module, choose M here: the - module will be called ucb1400_core. - config MFD_PM8XXX tristate "Qualcomm PM8xxx PMIC chips driver" depends on (ARM || HEXAGON || COMPILE_TEST) @@ -1514,7 +1485,7 @@ config TPS6105X config TPS65010 tristate "TI TPS6501x Power Management chips" depends on I2C && GPIOLIB - default y if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_OSK + default MACH_OMAP_OSK help If you say yes here you get support for the TPS6501x series of Power Management chips. These include voltage regulators, @@ -1795,35 +1766,6 @@ config MFD_TC3589X additional drivers must be enabled in order to use the functionality of the device. -config MFD_TMIO - bool - default n - -config MFD_T7L66XB - bool "Toshiba T7L66XB" - depends on ARM && HAVE_CLK - select MFD_CORE - select MFD_TMIO - help - Support for Toshiba Mobile IO Controller T7L66XB - -config MFD_TC6387XB - bool "Toshiba TC6387XB" - depends on ARM && HAVE_CLK - select MFD_CORE - select MFD_TMIO - help - Support for Toshiba Mobile IO Controller TC6387XB - -config MFD_TC6393XB - bool "Toshiba TC6393XB" - depends on ARM && HAVE_CLK - select GPIOLIB - select MFD_CORE - select MFD_TMIO - help - Support for Toshiba Mobile IO Controller TC6393XB - config MFD_TQMX86 tristate "TQ-Systems IO controller TQMX86" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 457471478a93..09712495f4f4 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -9,7 +9,6 @@ obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o obj-$(CONFIG_MFD_ACT8945A) += act8945a.o obj-$(CONFIG_MFD_SM501) += sm501.o -obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o @@ -18,8 +17,6 @@ obj-$(CONFIG_MFD_ENE_KB3930) += ene-kb3930.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o -obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o - obj-$(CONFIG_MFD_TI_LP873X) += lp873x.o obj-$(CONFIG_MFD_TI_LP87565) += lp87565.o obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o @@ -30,9 +27,6 @@ obj-$(CONFIG_STMPE_I2C) += stmpe-i2c.o obj-$(CONFIG_STMPE_SPI) += stmpe-spi.o obj-$(CONFIG_MFD_SUN6I_PRCM) += sun6i-prcm.o obj-$(CONFIG_MFD_TC3589X) += tc3589x.o -obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o tmio_core.o -obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o tmio_core.o -obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o tmio_core.o obj-$(CONFIG_MFD_TQMX86) += tqmx86.o obj-$(CONFIG_MFD_LOCHNAGAR) += lochnagar-i2c.o @@ -131,7 +125,6 @@ obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o ifeq ($(CONFIG_SA1100_ASSABET),y) obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o endif -obj-$(CONFIG_UCB1400_CORE) += ucb1400_core.o obj-$(CONFIG_PMIC_DA903X) += da903x.o diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c deleted file mode 100644 index 4fb7e35eb5ed..000000000000 --- a/drivers/mfd/asic3.c +++ /dev/null @@ -1,1071 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * driver/mfd/asic3.c - * - * Compaq ASIC3 support. - * - * Copyright 2001 Compaq Computer Corporation. - * Copyright 2004-2005 Phil Blundell - * Copyright 2007-2008 OpenedHand Ltd. - * - * Authors: Phil Blundell <pb@handhelds.org>, - * Samuel Ortiz <sameo@openedhand.com> - */ - -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/gpio/driver.h> -#include <linux/export.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/platform_device.h> - -#include <linux/mfd/asic3.h> -#include <linux/mfd/core.h> -#include <linux/mfd/ds1wm.h> -#include <linux/mfd/tmio.h> - -#include <linux/mmc/host.h> - -enum { - ASIC3_CLOCK_SPI, - ASIC3_CLOCK_OWM, - ASIC3_CLOCK_PWM0, - ASIC3_CLOCK_PWM1, - ASIC3_CLOCK_LED0, - ASIC3_CLOCK_LED1, - ASIC3_CLOCK_LED2, - ASIC3_CLOCK_SD_HOST, - ASIC3_CLOCK_SD_BUS, - ASIC3_CLOCK_SMBUS, - ASIC3_CLOCK_EX0, - ASIC3_CLOCK_EX1, -}; - -struct asic3_clk { - int enabled; - unsigned int cdex; - unsigned long rate; -}; - -#define INIT_CDEX(_name, _rate) \ - [ASIC3_CLOCK_##_name] = { \ - .cdex = CLOCK_CDEX_##_name, \ - .rate = _rate, \ - } - -static struct asic3_clk asic3_clk_init[] __initdata = { - INIT_CDEX(SPI, 0), - INIT_CDEX(OWM, 5000000), - INIT_CDEX(PWM0, 0), - INIT_CDEX(PWM1, 0), - INIT_CDEX(LED0, 0), - INIT_CDEX(LED1, 0), - INIT_CDEX(LED2, 0), - INIT_CDEX(SD_HOST, 24576000), - INIT_CDEX(SD_BUS, 12288000), - INIT_CDEX(SMBUS, 0), - INIT_CDEX(EX0, 32768), - INIT_CDEX(EX1, 24576000), -}; - -struct asic3 { - void __iomem *mapping; - unsigned int bus_shift; - unsigned int irq_nr; - unsigned int irq_base; - raw_spinlock_t lock; - u16 irq_bothedge[4]; - struct gpio_chip gpio; - struct device *dev; - void __iomem *tmio_cnf; - - struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)]; -}; - -static int asic3_gpio_get(struct gpio_chip *chip, unsigned offset); - -void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 value) -{ - iowrite16(value, asic->mapping + - (reg >> asic->bus_shift)); -} -EXPORT_SYMBOL_GPL(asic3_write_register); - -u32 asic3_read_register(struct asic3 *asic, unsigned int reg) -{ - return ioread16(asic->mapping + - (reg >> asic->bus_shift)); -} -EXPORT_SYMBOL_GPL(asic3_read_register); - -static void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set) -{ - unsigned long flags; - u32 val; - - raw_spin_lock_irqsave(&asic->lock, flags); - val = asic3_read_register(asic, reg); - if (set) - val |= bits; - else - val &= ~bits; - asic3_write_register(asic, reg, val); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -/* IRQs */ -#define MAX_ASIC_ISR_LOOPS 20 -#define ASIC3_GPIO_BASE_INCR \ - (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE) - -static void asic3_irq_flip_edge(struct asic3 *asic, - u32 base, int bit) -{ - u16 edge; - unsigned long flags; - - raw_spin_lock_irqsave(&asic->lock, flags); - edge = asic3_read_register(asic, - base + ASIC3_GPIO_EDGE_TRIGGER); - edge ^= bit; - asic3_write_register(asic, - base + ASIC3_GPIO_EDGE_TRIGGER, edge); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static void asic3_irq_demux(struct irq_desc *desc) -{ - struct asic3 *asic = irq_desc_get_handler_data(desc); - struct irq_data *data = irq_desc_get_irq_data(desc); - int iter, i; - unsigned long flags; - - data->chip->irq_ack(data); - - for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { - u32 status; - int bank; - - raw_spin_lock_irqsave(&asic->lock, flags); - status = asic3_read_register(asic, - ASIC3_OFFSET(INTR, P_INT_STAT)); - raw_spin_unlock_irqrestore(&asic->lock, flags); - - /* Check all ten register bits */ - if ((status & 0x3ff) == 0) - break; - - /* Handle GPIO IRQs */ - for (bank = 0; bank < ASIC3_NUM_GPIO_BANKS; bank++) { - if (status & (1 << bank)) { - unsigned long base, istat; - - base = ASIC3_GPIO_A_BASE - + bank * ASIC3_GPIO_BASE_INCR; - raw_spin_lock_irqsave(&asic->lock, flags); - istat = asic3_read_register(asic, - base + - ASIC3_GPIO_INT_STATUS); - /* Clearing IntStatus */ - asic3_write_register(asic, - base + - ASIC3_GPIO_INT_STATUS, 0); - raw_spin_unlock_irqrestore(&asic->lock, flags); - - for (i = 0; i < ASIC3_GPIOS_PER_BANK; i++) { - int bit = (1 << i); - unsigned int irqnr; - - if (!(istat & bit)) - continue; - - irqnr = asic->irq_base + - (ASIC3_GPIOS_PER_BANK * bank) - + i; - generic_handle_irq(irqnr); - if (asic->irq_bothedge[bank] & bit) - asic3_irq_flip_edge(asic, base, - bit); - } - } - } - - /* Handle remaining IRQs in the status register */ - for (i = ASIC3_NUM_GPIOS; i < ASIC3_NR_IRQS; i++) { - /* They start at bit 4 and go up */ - if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) - generic_handle_irq(asic->irq_base + i); - } - } - - if (iter >= MAX_ASIC_ISR_LOOPS) - dev_err(asic->dev, "interrupt processing overrun\n"); -} - -static inline int asic3_irq_to_bank(struct asic3 *asic, int irq) -{ - int n; - - n = (irq - asic->irq_base) >> 4; - - return (n * (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE)); -} - -static inline int asic3_irq_to_index(struct asic3 *asic, int irq) -{ - return (irq - asic->irq_base) & 0xf; -} - -static void asic3_mask_gpio_irq(struct irq_data *data) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - u32 val, bank, index; - unsigned long flags; - - bank = asic3_irq_to_bank(asic, data->irq); - index = asic3_irq_to_index(asic, data->irq); - - raw_spin_lock_irqsave(&asic->lock, flags); - val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); - val |= 1 << index; - asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static void asic3_mask_irq(struct irq_data *data) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - int regval; - unsigned long flags; - - raw_spin_lock_irqsave(&asic->lock, flags); - regval = asic3_read_register(asic, - ASIC3_INTR_BASE + - ASIC3_INTR_INT_MASK); - - regval &= ~(ASIC3_INTMASK_MASK0 << - (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); - - asic3_write_register(asic, - ASIC3_INTR_BASE + - ASIC3_INTR_INT_MASK, - regval); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static void asic3_unmask_gpio_irq(struct irq_data *data) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - u32 val, bank, index; - unsigned long flags; - - bank = asic3_irq_to_bank(asic, data->irq); - index = asic3_irq_to_index(asic, data->irq); - - raw_spin_lock_irqsave(&asic->lock, flags); - val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); - val &= ~(1 << index); - asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static void asic3_unmask_irq(struct irq_data *data) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - int regval; - unsigned long flags; - - raw_spin_lock_irqsave(&asic->lock, flags); - regval = asic3_read_register(asic, - ASIC3_INTR_BASE + - ASIC3_INTR_INT_MASK); - - regval |= (ASIC3_INTMASK_MASK0 << - (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); - - asic3_write_register(asic, - ASIC3_INTR_BASE + - ASIC3_INTR_INT_MASK, - regval); - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - u32 bank, index; - u16 trigger, level, edge, bit; - unsigned long flags; - - bank = asic3_irq_to_bank(asic, data->irq); - index = asic3_irq_to_index(asic, data->irq); - bit = 1<<index; - - raw_spin_lock_irqsave(&asic->lock, flags); - level = asic3_read_register(asic, - bank + ASIC3_GPIO_LEVEL_TRIGGER); - edge = asic3_read_register(asic, - bank + ASIC3_GPIO_EDGE_TRIGGER); - trigger = asic3_read_register(asic, - bank + ASIC3_GPIO_TRIGGER_TYPE); - asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; - - if (type == IRQ_TYPE_EDGE_RISING) { - trigger |= bit; - edge |= bit; - } else if (type == IRQ_TYPE_EDGE_FALLING) { - trigger |= bit; - edge &= ~bit; - } else if (type == IRQ_TYPE_EDGE_BOTH) { - trigger |= bit; - if (asic3_gpio_get(&asic->gpio, data->irq - asic->irq_base)) - edge &= ~bit; - else - edge |= bit; - asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] |= bit; - } else if (type == IRQ_TYPE_LEVEL_LOW) { - trigger &= ~bit; - level &= ~bit; - } else if (type == IRQ_TYPE_LEVEL_HIGH) { - trigger &= ~bit; - level |= bit; - } else { - /* - * if type == IRQ_TYPE_NONE, we should mask interrupts, but - * be careful to not unmask them if mask was also called. - * Probably need internal state for mask. - */ - dev_notice(asic->dev, "irq type not changed\n"); - } - asic3_write_register(asic, bank + ASIC3_GPIO_LEVEL_TRIGGER, - level); - asic3_write_register(asic, bank + ASIC3_GPIO_EDGE_TRIGGER, - edge); - asic3_write_register(asic, bank + ASIC3_GPIO_TRIGGER_TYPE, - trigger); - raw_spin_unlock_irqrestore(&asic->lock, flags); - return 0; -} - -static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on) -{ - struct asic3 *asic = irq_data_get_irq_chip_data(data); - u32 bank, index; - u16 bit; - - bank = asic3_irq_to_bank(asic, data->irq); - index = asic3_irq_to_index(asic, data->irq); - bit = 1<<index; - - asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on); - - return 0; -} - -static struct irq_chip asic3_gpio_irq_chip = { - .name = "ASIC3-GPIO", - .irq_ack = asic3_mask_gpio_irq, - .irq_mask = asic3_mask_gpio_irq, - .irq_unmask = asic3_unmask_gpio_irq, - .irq_set_type = asic3_gpio_irq_type, - .irq_set_wake = asic3_gpio_irq_set_wake, -}; - -static struct irq_chip asic3_irq_chip = { - .name = "ASIC3", - .irq_ack = asic3_mask_irq, - .irq_mask = asic3_mask_irq, - .irq_unmask = asic3_unmask_irq, -}; - -static int __init asic3_irq_probe(struct platform_device *pdev) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - unsigned long clksel = 0; - unsigned int irq, irq_base; - int ret; - - ret = platform_get_irq(pdev, 0); - if (ret < 0) - return ret; - asic->irq_nr = ret; - - /* turn on clock to IRQ controller */ - clksel |= CLOCK_SEL_CX; - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), - clksel); - - irq_base = asic->irq_base; - - for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { - if (irq < asic->irq_base + ASIC3_NUM_GPIOS) - irq_set_chip(irq, &asic3_gpio_irq_chip); - else - irq_set_chip(irq, &asic3_irq_chip); - - irq_set_chip_data(irq, asic); - irq_set_handler(irq, handle_level_irq); - irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), - ASIC3_INTMASK_GINTMASK); - - irq_set_chained_handler_and_data(asic->irq_nr, asic3_irq_demux, asic); - irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); - - return 0; -} - -static void asic3_irq_remove(struct platform_device *pdev) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - unsigned int irq, irq_base; - - irq_base = asic->irq_base; - - for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { - irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - irq_set_chip_and_handler(irq, NULL, NULL); - irq_set_chip_data(irq, NULL); - } - irq_set_chained_handler(asic->irq_nr, NULL); -} - -/* GPIOs */ -static int asic3_gpio_direction(struct gpio_chip *chip, - unsigned offset, int out) -{ - u32 mask = ASIC3_GPIO_TO_MASK(offset), out_reg; - unsigned int gpio_base; - unsigned long flags; - struct asic3 *asic; - - asic = gpiochip_get_data(chip); - gpio_base = ASIC3_GPIO_TO_BASE(offset); - - if (gpio_base > ASIC3_GPIO_D_BASE) { - dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", - gpio_base, offset); - return -EINVAL; - } - - raw_spin_lock_irqsave(&asic->lock, flags); - - out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_DIRECTION); - - /* Input is 0, Output is 1 */ - if (out) - out_reg |= mask; - else - out_reg &= ~mask; - - asic3_write_register(asic, gpio_base + ASIC3_GPIO_DIRECTION, out_reg); - - raw_spin_unlock_irqrestore(&asic->lock, flags); - - return 0; - -} - -static int asic3_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - return asic3_gpio_direction(chip, offset, 0); -} - -static int asic3_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - return asic3_gpio_direction(chip, offset, 1); -} - -static int asic3_gpio_get(struct gpio_chip *chip, - unsigned offset) -{ - unsigned int gpio_base; - u32 mask = ASIC3_GPIO_TO_MASK(offset); - struct asic3 *asic; - - asic = gpiochip_get_data(chip); - gpio_base = ASIC3_GPIO_TO_BASE(offset); - - if (gpio_base > ASIC3_GPIO_D_BASE) { - dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", - gpio_base, offset); - return -EINVAL; - } - - return !!(asic3_read_register(asic, - gpio_base + ASIC3_GPIO_STATUS) & mask); -} - -static void asic3_gpio_set(struct gpio_chip *chip, - unsigned offset, int value) -{ - u32 mask, out_reg; - unsigned int gpio_base; - unsigned long flags; - struct asic3 *asic; - - asic = gpiochip_get_data(chip); - gpio_base = ASIC3_GPIO_TO_BASE(offset); - - if (gpio_base > ASIC3_GPIO_D_BASE) { - dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", - gpio_base, offset); - return; - } - - mask = ASIC3_GPIO_TO_MASK(offset); - - raw_spin_lock_irqsave(&asic->lock, flags); - - out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_OUT); - - if (value) - out_reg |= mask; - else - out_reg &= ~mask; - - asic3_write_register(asic, gpio_base + ASIC3_GPIO_OUT, out_reg); - - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static int asic3_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct asic3 *asic = gpiochip_get_data(chip); - - return asic->irq_base + offset; -} - -static __init int asic3_gpio_probe(struct platform_device *pdev, - u16 *gpio_config, int num) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - u16 alt_reg[ASIC3_NUM_GPIO_BANKS]; - u16 out_reg[ASIC3_NUM_GPIO_BANKS]; - u16 dir_reg[ASIC3_NUM_GPIO_BANKS]; - int i; - - memset(alt_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); - memset(out_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); - memset(dir_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); - - /* Enable all GPIOs */ - asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); - asic3_write_register(asic, ASIC3_GPIO_OFFSET(B, MASK), 0xffff); - asic3_write_register(asic, ASIC3_GPIO_OFFSET(C, MASK), 0xffff); - asic3_write_register(asic, ASIC3_GPIO_OFFSET(D, MASK), 0xffff); - - for (i = 0; i < num; i++) { - u8 alt, pin, dir, init, bank_num, bit_num; - u16 config = gpio_config[i]; - - pin = ASIC3_CONFIG_GPIO_PIN(config); - alt = ASIC3_CONFIG_GPIO_ALT(config); - dir = ASIC3_CONFIG_GPIO_DIR(config); - init = ASIC3_CONFIG_GPIO_INIT(config); - - bank_num = ASIC3_GPIO_TO_BANK(pin); - bit_num = ASIC3_GPIO_TO_BIT(pin); - - alt_reg[bank_num] |= (alt << bit_num); - out_reg[bank_num] |= (init << bit_num); - dir_reg[bank_num] |= (dir << bit_num); - } - - for (i = 0; i < ASIC3_NUM_GPIO_BANKS; i++) { - asic3_write_register(asic, - ASIC3_BANK_TO_BASE(i) + - ASIC3_GPIO_DIRECTION, - dir_reg[i]); - asic3_write_register(asic, - ASIC3_BANK_TO_BASE(i) + ASIC3_GPIO_OUT, - out_reg[i]); - asic3_write_register(asic, - ASIC3_BANK_TO_BASE(i) + - ASIC3_GPIO_ALT_FUNCTION, - alt_reg[i]); - } - - return gpiochip_add_data(&asic->gpio, asic); -} - -static void asic3_gpio_remove(struct platform_device *pdev) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - - gpiochip_remove(&asic->gpio); -} - -static void asic3_clk_enable(struct asic3 *asic, struct asic3_clk *clk) -{ - unsigned long flags; - u32 cdex; - - raw_spin_lock_irqsave(&asic->lock, flags); - if (clk->enabled++ == 0) { - cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); - cdex |= clk->cdex; - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); - } - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk) -{ - unsigned long flags; - u32 cdex; - - WARN_ON(clk->enabled == 0); - - raw_spin_lock_irqsave(&asic->lock, flags); - if (--clk->enabled == 0) { - cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); - cdex &= ~clk->cdex; - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); - } - raw_spin_unlock_irqrestore(&asic->lock, flags); -} - -/* MFD cells (SPI, PWM, LED, DS1WM, MMC) */ -static struct ds1wm_driver_data ds1wm_pdata = { - .active_high = 1, - .reset_recover_delay = 1, -}; - -static struct resource ds1wm_resources[] = { - { - .start = ASIC3_OWM_BASE, - .end = ASIC3_OWM_BASE + 0x13, - .flags = IORESOURCE_MEM, - }, - { - .start = ASIC3_IRQ_OWM, - .end = ASIC3_IRQ_OWM, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -static int ds1wm_enable(struct platform_device *pdev) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - /* Turn on external clocks and the OWM clock */ - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); - usleep_range(1000, 5000); - - /* Reset and enable DS1WM */ - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), - ASIC3_EXTCF_OWM_RESET, 1); - usleep_range(1000, 5000); - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), - ASIC3_EXTCF_OWM_RESET, 0); - usleep_range(1000, 5000); - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - ASIC3_EXTCF_OWM_EN, 1); - usleep_range(1000, 5000); - - return 0; -} - -static int ds1wm_disable(struct platform_device *pdev) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - ASIC3_EXTCF_OWM_EN, 0); - - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); - - return 0; -} - -static const struct mfd_cell asic3_cell_ds1wm = { - .name = "ds1wm", - .enable = ds1wm_enable, - .disable = ds1wm_disable, - .platform_data = &ds1wm_pdata, - .pdata_size = sizeof(ds1wm_pdata), - .num_resources = ARRAY_SIZE(ds1wm_resources), - .resources = ds1wm_resources, -}; - -static void asic3_mmc_pwr(struct platform_device *pdev, int state) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - tmio_core_mmc_pwr(asic->tmio_cnf, 1 - asic->bus_shift, state); -} - -static void asic3_mmc_clk_div(struct platform_device *pdev, int state) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - tmio_core_mmc_clk_div(asic->tmio_cnf, 1 - asic->bus_shift, state); -} - -static struct tmio_mmc_data asic3_mmc_data = { - .hclk = 24576000, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .set_pwr = asic3_mmc_pwr, - .set_clk_div = asic3_mmc_clk_div, -}; - -static struct resource asic3_mmc_resources[] = { - DEFINE_RES_MEM(ASIC3_SD_CTRL_BASE, 0x400), - DEFINE_RES_IRQ(0) -}; - -static int asic3_mmc_enable(struct platform_device *pdev) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - /* Not sure if it must be done bit by bit, but leaving as-is */ - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_LEVCD, 1); - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_LEVWP, 1); - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_SUSPEND, 0); - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_PCLR, 0); - - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); - /* CLK32 used for card detection and for interruption detection - * when HCLK is stopped. - */ - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); - usleep_range(1000, 5000); - - /* HCLK 24.576 MHz, BCLK 12.288 MHz: */ - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), - CLOCK_SEL_CX | CLOCK_SEL_SD_HCLK_SEL); - - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); - asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); - usleep_range(1000, 5000); - - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - ASIC3_EXTCF_SD_MEM_ENABLE, 1); - - /* Enable SD card slot 3.3V power supply */ - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_SDPWR, 1); - - /* ASIC3_SD_CTRL_BASE assumes 32-bit addressing, TMIO is 16-bit */ - tmio_core_mmc_enable(asic->tmio_cnf, 1 - asic->bus_shift, - ASIC3_SD_CTRL_BASE >> 1); - - return 0; -} - -static int asic3_mmc_disable(struct platform_device *pdev) -{ - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - /* Put in suspend mode */ - asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), - ASIC3_SDHWCTRL_SUSPEND, 1); - - /* Disable clocks */ - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); - asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); - return 0; -} - -static const struct mfd_cell asic3_cell_mmc = { - .name = "tmio-mmc", - .enable = asic3_mmc_enable, - .disable = asic3_mmc_disable, - .suspend = asic3_mmc_disable, - .resume = asic3_mmc_enable, - .platform_data = &asic3_mmc_data, - .pdata_size = sizeof(asic3_mmc_data), - .num_resources = ARRAY_SIZE(asic3_mmc_resources), - .resources = asic3_mmc_resources, -}; - -static const int clock_ledn[ASIC3_NUM_LEDS] = { - [0] = ASIC3_CLOCK_LED0, - [1] = ASIC3_CLOCK_LED1, - [2] = ASIC3_CLOCK_LED2, -}; - -static int asic3_leds_enable(struct platform_device *pdev) -{ - const struct mfd_cell *cell = mfd_get_cell(pdev); - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - asic3_clk_enable(asic, &asic->clocks[clock_ledn[cell->id]]); - - return 0; -} - -static int asic3_leds_disable(struct platform_device *pdev) -{ - const struct mfd_cell *cell = mfd_get_cell(pdev); - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); - - return 0; -} - -static int asic3_leds_suspend(struct platform_device *pdev) -{ - const struct mfd_cell *cell = mfd_get_cell(pdev); - struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); - - while (asic3_gpio_get(&asic->gpio, ASIC3_GPIO(C, cell->id)) != 0) - usleep_range(1000, 5000); - - asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); - - return 0; -} - -static struct mfd_cell asic3_cell_leds[ASIC3_NUM_LEDS] = { - [0] = { - .name = "leds-asic3", - .id = 0, - .enable = asic3_leds_enable, - .disable = asic3_leds_disable, - .suspend = asic3_leds_suspend, - .resume = asic3_leds_enable, - }, - [1] = { - .name = "leds-asic3", - .id = 1, - .enable = asic3_leds_enable, - .disable = asic3_leds_disable, - .suspend = asic3_leds_suspend, - .resume = asic3_leds_enable, - }, - [2] = { - .name = "leds-asic3", - .id = 2, - .enable = asic3_leds_enable, - .disable = asic3_leds_disable, - .suspend = asic3_leds_suspend, - .resume = asic3_leds_enable, - }, -}; - -static int __init asic3_mfd_probe(struct platform_device *pdev, - struct asic3_platform_data *pdata, - struct resource *mem) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - struct resource *mem_sdio; - int irq, ret; - - mem_sdio = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (!mem_sdio) - dev_dbg(asic->dev, "no SDIO MEM resource\n"); - - irq = platform_get_irq(pdev, 1); - if (irq < 0) - dev_dbg(asic->dev, "no SDIO IRQ resource\n"); - - /* DS1WM */ - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - ASIC3_EXTCF_OWM_SMB, 0); - - ds1wm_resources[0].start >>= asic->bus_shift; - ds1wm_resources[0].end >>= asic->bus_shift; - - /* MMC */ - if (mem_sdio) { - asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> - asic->bus_shift) + mem_sdio->start, - ASIC3_SD_CONFIG_SIZE >> asic->bus_shift); - if (!asic->tmio_cnf) { - ret = -ENOMEM; - dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n"); - goto out; - } - } - asic3_mmc_resources[0].start >>= asic->bus_shift; - asic3_mmc_resources[0].end >>= asic->bus_shift; - - if (pdata->clock_rate) { - ds1wm_pdata.clock_rate = pdata->clock_rate; - ret = mfd_add_devices(&pdev->dev, pdev->id, - &asic3_cell_ds1wm, 1, mem, asic->irq_base, NULL); - if (ret < 0) - goto out_unmap; - } - - if (mem_sdio && (irq >= 0)) { - ret = mfd_add_devices(&pdev->dev, pdev->id, - &asic3_cell_mmc, 1, mem_sdio, irq, NULL); - if (ret < 0) - goto out_unmap; - } - - ret = 0; - if (pdata->leds) { - int i; - - for (i = 0; i < ASIC3_NUM_LEDS; ++i) { - asic3_cell_leds[i].platform_data = &pdata->leds[i]; - asic3_cell_leds[i].pdata_size = sizeof(pdata->leds[i]); - } - ret = mfd_add_devices(&pdev->dev, 0, - asic3_cell_leds, ASIC3_NUM_LEDS, NULL, 0, NULL); - } - return ret; - -out_unmap: - if (asic->tmio_cnf) - iounmap(asic->tmio_cnf); -out: - return ret; -} - -static void asic3_mfd_remove(struct platform_device *pdev) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - - mfd_remove_devices(&pdev->dev); - iounmap(asic->tmio_cnf); -} - -/* Core */ -static int __init asic3_probe(struct platform_device *pdev) -{ - struct asic3_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct asic3 *asic; - struct resource *mem; - unsigned long clksel; - int ret = 0; - - asic = devm_kzalloc(&pdev->dev, - sizeof(struct asic3), GFP_KERNEL); - if (!asic) - return -ENOMEM; - - raw_spin_lock_init(&asic->lock); - platform_set_drvdata(pdev, asic); - asic->dev = &pdev->dev; - - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!mem) { - dev_err(asic->dev, "no MEM resource\n"); - return -ENOMEM; - } - - asic->mapping = ioremap(mem->start, resource_size(mem)); - if (!asic->mapping) { - dev_err(asic->dev, "Couldn't ioremap\n"); - return -ENOMEM; - } - - asic->irq_base = pdata->irq_base; - - /* calculate bus shift from mem resource */ - asic->bus_shift = 2 - (resource_size(mem) >> 12); - - clksel = 0; - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); - - ret = asic3_irq_probe(pdev); - if (ret < 0) { - dev_err(asic->dev, "Couldn't probe IRQs\n"); - goto out_unmap; - } - - asic->gpio.label = "asic3"; - asic->gpio.base = pdata->gpio_base; - asic->gpio.ngpio = ASIC3_NUM_GPIOS; - asic->gpio.get = asic3_gpio_get; - asic->gpio.set = asic3_gpio_set; - asic->gpio.direction_input = asic3_gpio_direction_input; - asic->gpio.direction_output = asic3_gpio_direction_output; - asic->gpio.to_irq = asic3_gpio_to_irq; - - ret = asic3_gpio_probe(pdev, - pdata->gpio_config, - pdata->gpio_config_num); - if (ret < 0) { - dev_err(asic->dev, "GPIO probe failed\n"); - goto out_irq; - } - - /* Making a per-device copy is only needed for the - * theoretical case of multiple ASIC3s on one board: - */ - memcpy(asic->clocks, asic3_clk_init, sizeof(asic3_clk_init)); - - asic3_mfd_probe(pdev, pdata, mem); - - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 1); - - dev_info(asic->dev, "ASIC3 Core driver\n"); - - return 0; - - out_irq: - asic3_irq_remove(pdev); - - out_unmap: - iounmap(asic->mapping); - - return ret; -} - -static int asic3_remove(struct platform_device *pdev) -{ - struct asic3 *asic = platform_get_drvdata(pdev); - - asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), - (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 0); - - asic3_mfd_remove(pdev); - - asic3_gpio_remove(pdev); - - asic3_irq_remove(pdev); - - asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), 0); - - iounmap(asic->mapping); - - return 0; -} - -static void asic3_shutdown(struct platform_device *pdev) -{ -} - -static struct platform_driver asic3_device_driver = { - .driver = { - .name = "asic3", - }, - .remove = asic3_remove, - .shutdown = asic3_shutdown, -}; - -static int __init asic3_init(void) -{ - int retval = 0; - - retval = platform_driver_probe(&asic3_device_driver, asic3_probe); - - return retval; -} - -subsys_initcall(asic3_init); diff --git a/drivers/mfd/htc-pasic3.c b/drivers/mfd/htc-pasic3.c deleted file mode 100644 index 0c46b7e64b2d..000000000000 --- a/drivers/mfd/htc-pasic3.c +++ /dev/null @@ -1,210 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Core driver for HTC PASIC3 LED/DS1WM chip. - * - * Copyright (C) 2006 Philipp Zabel <philipp.zabel@gmail.com> - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/platform_device.h> - -#include <linux/gpio.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <linux/mfd/core.h> -#include <linux/mfd/ds1wm.h> -#include <linux/mfd/htc-pasic3.h> -#include <linux/slab.h> - -struct pasic3_data { - void __iomem *mapping; - unsigned int bus_shift; -}; - -#define REG_ADDR 5 -#define REG_DATA 6 - -#define READ_MODE 0x80 - -/* - * write to a secondary register on the PASIC3 - */ -void pasic3_write_register(struct device *dev, u32 reg, u8 val) -{ - struct pasic3_data *asic = dev_get_drvdata(dev); - int bus_shift = asic->bus_shift; - void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); - void __iomem *data = asic->mapping + (REG_DATA << bus_shift); - - __raw_writeb(~READ_MODE & reg, addr); - __raw_writeb(val, data); -} -EXPORT_SYMBOL(pasic3_write_register); /* for leds-pasic3 */ - -/* - * read from a secondary register on the PASIC3 - */ -u8 pasic3_read_register(struct device *dev, u32 reg) -{ - struct pasic3_data *asic = dev_get_drvdata(dev); - int bus_shift = asic->bus_shift; - void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); - void __iomem *data = asic->mapping + (REG_DATA << bus_shift); - - __raw_writeb(READ_MODE | reg, addr); - return __raw_readb(data); -} -EXPORT_SYMBOL(pasic3_read_register); /* for leds-pasic3 */ - -/* - * LEDs - */ - -static struct mfd_cell led_cell __initdata = { - .name = "leds-pasic3", -}; - -/* - * DS1WM - */ - -static int ds1wm_enable(struct platform_device *pdev) -{ - struct device *dev = pdev->dev.parent; - int c; - - c = pasic3_read_register(dev, 0x28); - pasic3_write_register(dev, 0x28, c & 0x7f); - - dev_dbg(dev, "DS1WM OWM_EN low (active) %02x\n", c & 0x7f); - return 0; -} - -static int ds1wm_disable(struct platform_device *pdev) -{ - struct device *dev = pdev->dev.parent; - int c; - - c = pasic3_read_register(dev, 0x28); - pasic3_write_register(dev, 0x28, c | 0x80); - - dev_dbg(dev, "DS1WM OWM_EN high (inactive) %02x\n", c | 0x80); - return 0; -} - -static struct ds1wm_driver_data ds1wm_pdata = { - .active_high = 0, - .reset_recover_delay = 1, -}; - -static struct resource ds1wm_resources[] __initdata = { - [0] = { - .start = 0, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0, - .end = 0, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct mfd_cell ds1wm_cell __initconst = { - .name = "ds1wm", - .enable = ds1wm_enable, - .disable = ds1wm_disable, - .platform_data = &ds1wm_pdata, - .pdata_size = sizeof(ds1wm_pdata), - .num_resources = 2, - .resources = ds1wm_resources, -}; - -static int __init pasic3_probe(struct platform_device *pdev) -{ - struct pasic3_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct device *dev = &pdev->dev; - struct pasic3_data *asic; - struct resource *r; - int ret; - int irq = 0; - - r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (r) { - ds1wm_resources[1].flags = IORESOURCE_IRQ | (r->flags & - (IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE)); - irq = r->start; - } - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) - return -ENXIO; - - if (!request_mem_region(r->start, resource_size(r), "pasic3")) - return -EBUSY; - - asic = devm_kzalloc(dev, sizeof(struct pasic3_data), GFP_KERNEL); - if (!asic) - return -ENOMEM; - - platform_set_drvdata(pdev, asic); - - asic->mapping = ioremap(r->start, resource_size(r)); - if (!asic->mapping) { - dev_err(dev, "couldn't ioremap PASIC3\n"); - return -ENOMEM; - } - - /* calculate bus shift from mem resource */ - asic->bus_shift = (resource_size(r) - 5) >> 3; - - if (pdata && pdata->clock_rate) { - ds1wm_pdata.clock_rate = pdata->clock_rate; - /* the first 5 PASIC3 registers control the DS1WM */ - ds1wm_resources[0].end = (5 << asic->bus_shift) - 1; - ret = mfd_add_devices(&pdev->dev, pdev->id, - &ds1wm_cell, 1, r, irq, NULL); - if (ret < 0) - dev_warn(dev, "failed to register DS1WM\n"); - } - - if (pdata && pdata->led_pdata) { - led_cell.platform_data = pdata->led_pdata; - led_cell.pdata_size = sizeof(struct pasic3_leds_machinfo); - ret = mfd_add_devices(&pdev->dev, pdev->id, &led_cell, 1, r, - 0, NULL); - if (ret < 0) - dev_warn(dev, "failed to register LED device\n"); - } - - return 0; -} - -static int pasic3_remove(struct platform_device *pdev) -{ - struct pasic3_data *asic = platform_get_drvdata(pdev); - struct resource *r; - - mfd_remove_devices(&pdev->dev); - - iounmap(asic->mapping); - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(r->start, resource_size(r)); - return 0; -} - -MODULE_ALIAS("platform:pasic3"); - -static struct platform_driver pasic3_driver = { - .driver = { - .name = "pasic3", - }, - .remove = pasic3_remove, -}; - -module_platform_driver_probe(pasic3_driver, pasic3_probe); - -MODULE_AUTHOR("Philipp Zabel <philipp.zabel@gmail.com>"); -MODULE_DESCRIPTION("Core driver for HTC PASIC3"); -MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c deleted file mode 100644 index 1d9d1d38d068..000000000000 --- a/drivers/mfd/t7l66xb.c +++ /dev/null @@ -1,427 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * - * Toshiba T7L66XB core mfd support - * - * Copyright (c) 2005, 2007, 2008 Ian Molton - * Copyright (c) 2008 Dmitry Baryshkov - * - * T7L66 features: - * - * Supported in this driver: - * SD/MMC - * SM/NAND flash controller - * - * As yet not supported - * GPIO interface (on NAND pins) - * Serial interface - * TFT 'interface converter' - * PCMCIA interface logic - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/irq.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/mfd/t7l66xb.h> - -enum { - T7L66XB_CELL_NAND, - T7L66XB_CELL_MMC, -}; - -static const struct resource t7l66xb_mmc_resources[] = { - DEFINE_RES_MEM(0x800, 0x200), - DEFINE_RES_IRQ(IRQ_T7L66XB_MMC) -}; - -#define SCR_REVID 0x08 /* b Revision ID */ -#define SCR_IMR 0x42 /* b Interrupt Mask */ -#define SCR_DEV_CTL 0xe0 /* b Device control */ -#define SCR_ISR 0xe1 /* b Interrupt Status */ -#define SCR_GPO_OC 0xf0 /* b GPO output control */ -#define SCR_GPO_OS 0xf1 /* b GPO output enable */ -#define SCR_GPI_S 0xf2 /* w GPI status */ -#define SCR_APDC 0xf8 /* b Active pullup down ctrl */ - -#define SCR_DEV_CTL_USB BIT(0) /* USB enable */ -#define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ - -/*--------------------------------------------------------------------------*/ - -struct t7l66xb { - void __iomem *scr; - /* Lock to protect registers requiring read/modify/write ops. */ - raw_spinlock_t lock; - - struct resource rscr; - struct clk *clk48m; - struct clk *clk32k; - int irq; - int irq_base; -}; - -/*--------------------------------------------------------------------------*/ - -static int t7l66xb_mmc_enable(struct platform_device *mmc) -{ - struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); - unsigned long flags; - u8 dev_ctl; - int ret; - - ret = clk_prepare_enable(t7l66xb->clk32k); - if (ret) - return ret; - - raw_spin_lock_irqsave(&t7l66xb->lock, flags); - - dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); - dev_ctl |= SCR_DEV_CTL_MMC; - tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); - - raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); - - tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, - t7l66xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -static int t7l66xb_mmc_disable(struct platform_device *mmc) -{ - struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); - unsigned long flags; - u8 dev_ctl; - - raw_spin_lock_irqsave(&t7l66xb->lock, flags); - - dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); - dev_ctl &= ~SCR_DEV_CTL_MMC; - tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); - - raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); - - clk_disable_unprepare(t7l66xb->clk32k); - - return 0; -} - -static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state) -{ - struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state); -} - -static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state) -{ - struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state); -} - -/*--------------------------------------------------------------------------*/ - -static struct tmio_mmc_data t7166xb_mmc_data = { - .hclk = 24000000, - .set_pwr = t7l66xb_mmc_pwr, - .set_clk_div = t7l66xb_mmc_clk_div, -}; - -static const struct resource t7l66xb_nand_resources[] = { - { - .start = 0xc00, - .end = 0xc07, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x0100, - .end = 0x01ff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_T7L66XB_NAND, - .end = IRQ_T7L66XB_NAND, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mfd_cell t7l66xb_cells[] = { - [T7L66XB_CELL_MMC] = { - .name = "tmio-mmc", - .enable = t7l66xb_mmc_enable, - .disable = t7l66xb_mmc_disable, - .platform_data = &t7166xb_mmc_data, - .pdata_size = sizeof(t7166xb_mmc_data), - .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), - .resources = t7l66xb_mmc_resources, - }, - [T7L66XB_CELL_NAND] = { - .name = "tmio-nand", - .num_resources = ARRAY_SIZE(t7l66xb_nand_resources), - .resources = t7l66xb_nand_resources, - }, -}; - -/*--------------------------------------------------------------------------*/ - -/* Handle the T7L66XB interrupt mux */ -static void t7l66xb_irq(struct irq_desc *desc) -{ - struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc); - unsigned int isr; - unsigned int i, irq_base; - - irq_base = t7l66xb->irq_base; - - while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & - ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) - for (i = 0; i < T7L66XB_NR_IRQS; i++) - if (isr & (1 << i)) - generic_handle_irq(irq_base + i); -} - -static void t7l66xb_irq_mask(struct irq_data *data) -{ - struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); - unsigned long flags; - u8 imr; - - raw_spin_lock_irqsave(&t7l66xb->lock, flags); - imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); - imr |= 1 << (data->irq - t7l66xb->irq_base); - tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); - raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); -} - -static void t7l66xb_irq_unmask(struct irq_data *data) -{ - struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); - unsigned long flags; - u8 imr; - - raw_spin_lock_irqsave(&t7l66xb->lock, flags); - imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); - imr &= ~(1 << (data->irq - t7l66xb->irq_base)); - tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); - raw_spin_unlock_irqrestore(&t7l66xb->lock, flags); -} - -static struct irq_chip t7l66xb_chip = { - .name = "t7l66xb", - .irq_ack = t7l66xb_irq_mask, - .irq_mask = t7l66xb_irq_mask, - .irq_unmask = t7l66xb_irq_unmask, -}; - -/*--------------------------------------------------------------------------*/ - -/* Install the IRQ handler */ -static void t7l66xb_attach_irq(struct platform_device *dev) -{ - struct t7l66xb *t7l66xb = platform_get_drvdata(dev); - unsigned int irq, irq_base; - - irq_base = t7l66xb->irq_base; - - for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { - irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq); - irq_set_chip_data(irq, t7l66xb); - } - - irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); - irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb); -} - -static void t7l66xb_detach_irq(struct platform_device *dev) -{ - struct t7l66xb *t7l66xb = platform_get_drvdata(dev); - unsigned int irq, irq_base; - - irq_base = t7l66xb->irq_base; - - irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL); - - for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { - irq_set_chip(irq, NULL); - irq_set_chip_data(irq, NULL); - } -} - -/*--------------------------------------------------------------------------*/ - -static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct t7l66xb *t7l66xb = platform_get_drvdata(dev); - struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); - - if (pdata && pdata->suspend) - pdata->suspend(dev); - clk_disable_unprepare(t7l66xb->clk48m); - - return 0; -} - -static int t7l66xb_resume(struct platform_device *dev) -{ - struct t7l66xb *t7l66xb = platform_get_drvdata(dev); - struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); - int ret; - - ret = clk_prepare_enable(t7l66xb->clk48m); - if (ret) - return ret; - - if (pdata && pdata->resume) - pdata->resume(dev); - - tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, - t7l66xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -/*--------------------------------------------------------------------------*/ - -static int t7l66xb_probe(struct platform_device *dev) -{ - struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); - struct t7l66xb *t7l66xb; - struct resource *iomem, *rscr; - int ret; - - if (!pdata) - return -EINVAL; - - iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!iomem) - return -EINVAL; - - t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); - if (!t7l66xb) - return -ENOMEM; - - raw_spin_lock_init(&t7l66xb->lock); - - platform_set_drvdata(dev, t7l66xb); - - ret = platform_get_irq(dev, 0); - if (ret >= 0) - t7l66xb->irq = ret; - else - goto err_noirq; - - t7l66xb->irq_base = pdata->irq_base; - - t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); - if (IS_ERR(t7l66xb->clk32k)) { - ret = PTR_ERR(t7l66xb->clk32k); - goto err_clk32k_get; - } - - t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); - if (IS_ERR(t7l66xb->clk48m)) { - ret = PTR_ERR(t7l66xb->clk48m); - goto err_clk48m_get; - } - - rscr = &t7l66xb->rscr; - rscr->name = "t7l66xb-core"; - rscr->start = iomem->start; - rscr->end = iomem->start + 0xff; - rscr->flags = IORESOURCE_MEM; - - ret = request_resource(iomem, rscr); - if (ret) - goto err_request_scr; - - t7l66xb->scr = ioremap(rscr->start, resource_size(rscr)); - if (!t7l66xb->scr) { - ret = -ENOMEM; - goto err_ioremap; - } - - ret = clk_prepare_enable(t7l66xb->clk48m); - if (ret) - goto err_clk_enable; - - if (pdata->enable) - pdata->enable(dev); - - /* Mask all interrupts */ - tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); - - printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", - dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), - (unsigned long)iomem->start, t7l66xb->irq); - - t7l66xb_attach_irq(dev); - - t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data; - t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data); - - ret = mfd_add_devices(&dev->dev, dev->id, - t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), - iomem, t7l66xb->irq_base, NULL); - - if (!ret) - return 0; - - t7l66xb_detach_irq(dev); - clk_disable_unprepare(t7l66xb->clk48m); -err_clk_enable: - iounmap(t7l66xb->scr); -err_ioremap: - release_resource(&t7l66xb->rscr); -err_request_scr: - clk_put(t7l66xb->clk48m); -err_clk48m_get: - clk_put(t7l66xb->clk32k); -err_clk32k_get: -err_noirq: - kfree(t7l66xb); - return ret; -} - -static int t7l66xb_remove(struct platform_device *dev) -{ - struct t7l66xb *t7l66xb = platform_get_drvdata(dev); - - clk_disable_unprepare(t7l66xb->clk48m); - clk_put(t7l66xb->clk48m); - clk_disable_unprepare(t7l66xb->clk32k); - clk_put(t7l66xb->clk32k); - t7l66xb_detach_irq(dev); - iounmap(t7l66xb->scr); - release_resource(&t7l66xb->rscr); - mfd_remove_devices(&dev->dev); - kfree(t7l66xb); - - return 0; -} - -static struct platform_driver t7l66xb_platform_driver = { - .driver = { - .name = "t7l66xb", - }, - .suspend = pm_sleep_ptr(t7l66xb_suspend), - .resume = pm_sleep_ptr(t7l66xb_resume), - .probe = t7l66xb_probe, - .remove = t7l66xb_remove, -}; - -/*--------------------------------------------------------------------------*/ - -module_platform_driver(t7l66xb_platform_driver); - -MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton"); -MODULE_ALIAS("platform:t7l66xb"); diff --git a/drivers/mfd/tc6387xb.c b/drivers/mfd/tc6387xb.c deleted file mode 100644 index 5392da6ba7b0..000000000000 --- a/drivers/mfd/tc6387xb.c +++ /dev/null @@ -1,228 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Toshiba TC6387XB support - * Copyright (c) 2005 Ian Molton - * - * This file contains TC6387XB base support. - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/mfd/tc6387xb.h> -#include <linux/slab.h> - -enum { - TC6387XB_CELL_MMC, -}; - -struct tc6387xb { - void __iomem *scr; - struct clk *clk32k; - struct resource rscr; -}; - -static const struct resource tc6387xb_mmc_resources[] = { - { - .start = 0x800, - .end = 0x9ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0, - .end = 0, - .flags = IORESOURCE_IRQ, - }, -}; - -/*--------------------------------------------------------------------------*/ - -static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct tc6387xb *tc6387xb = platform_get_drvdata(dev); - struct tc6387xb_platform_data *pdata = dev_get_platdata(&dev->dev); - - if (pdata && pdata->suspend) - pdata->suspend(dev); - clk_disable_unprepare(tc6387xb->clk32k); - - return 0; -} - -static int tc6387xb_resume(struct platform_device *dev) -{ - struct tc6387xb *tc6387xb = platform_get_drvdata(dev); - struct tc6387xb_platform_data *pdata = dev_get_platdata(&dev->dev); - - clk_prepare_enable(tc6387xb->clk32k); - if (pdata && pdata->resume) - pdata->resume(dev); - - tmio_core_mmc_resume(tc6387xb->scr + 0x200, 0, - tc6387xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -/*--------------------------------------------------------------------------*/ - -static void tc6387xb_mmc_pwr(struct platform_device *mmc, int state) -{ - struct tc6387xb *tc6387xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_pwr(tc6387xb->scr + 0x200, 0, state); -} - -static void tc6387xb_mmc_clk_div(struct platform_device *mmc, int state) -{ - struct tc6387xb *tc6387xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_clk_div(tc6387xb->scr + 0x200, 0, state); -} - - -static int tc6387xb_mmc_enable(struct platform_device *mmc) -{ - struct tc6387xb *tc6387xb = dev_get_drvdata(mmc->dev.parent); - - clk_prepare_enable(tc6387xb->clk32k); - - tmio_core_mmc_enable(tc6387xb->scr + 0x200, 0, - tc6387xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -static int tc6387xb_mmc_disable(struct platform_device *mmc) -{ - struct tc6387xb *tc6387xb = dev_get_drvdata(mmc->dev.parent); - - clk_disable_unprepare(tc6387xb->clk32k); - - return 0; -} - -static struct tmio_mmc_data tc6387xb_mmc_data = { - .hclk = 24000000, - .set_pwr = tc6387xb_mmc_pwr, - .set_clk_div = tc6387xb_mmc_clk_div, -}; - -/*--------------------------------------------------------------------------*/ - -static const struct mfd_cell tc6387xb_cells[] = { - [TC6387XB_CELL_MMC] = { - .name = "tmio-mmc", - .enable = tc6387xb_mmc_enable, - .disable = tc6387xb_mmc_disable, - .platform_data = &tc6387xb_mmc_data, - .pdata_size = sizeof(tc6387xb_mmc_data), - .num_resources = ARRAY_SIZE(tc6387xb_mmc_resources), - .resources = tc6387xb_mmc_resources, - }, -}; - -static int tc6387xb_probe(struct platform_device *dev) -{ - struct tc6387xb_platform_data *pdata = dev_get_platdata(&dev->dev); - struct resource *iomem, *rscr; - struct clk *clk32k; - struct tc6387xb *tc6387xb; - int irq, ret; - - iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!iomem) - return -EINVAL; - - tc6387xb = kzalloc(sizeof(*tc6387xb), GFP_KERNEL); - if (!tc6387xb) - return -ENOMEM; - - ret = platform_get_irq(dev, 0); - if (ret >= 0) - irq = ret; - else - goto err_no_irq; - - clk32k = clk_get(&dev->dev, "CLK_CK32K"); - if (IS_ERR(clk32k)) { - ret = PTR_ERR(clk32k); - goto err_no_clk; - } - - rscr = &tc6387xb->rscr; - rscr->name = "tc6387xb-core"; - rscr->start = iomem->start; - rscr->end = iomem->start + 0xff; - rscr->flags = IORESOURCE_MEM; - - ret = request_resource(iomem, rscr); - if (ret) - goto err_resource; - - tc6387xb->scr = ioremap(rscr->start, resource_size(rscr)); - if (!tc6387xb->scr) { - ret = -ENOMEM; - goto err_ioremap; - } - - tc6387xb->clk32k = clk32k; - platform_set_drvdata(dev, tc6387xb); - - if (pdata && pdata->enable) - pdata->enable(dev); - - dev_info(&dev->dev, "Toshiba tc6387xb initialised\n"); - - ret = mfd_add_devices(&dev->dev, dev->id, tc6387xb_cells, - ARRAY_SIZE(tc6387xb_cells), iomem, irq, NULL); - - if (!ret) - return 0; - - iounmap(tc6387xb->scr); -err_ioremap: - release_resource(&tc6387xb->rscr); -err_resource: - clk_put(clk32k); -err_no_clk: -err_no_irq: - kfree(tc6387xb); - return ret; -} - -static int tc6387xb_remove(struct platform_device *dev) -{ - struct tc6387xb *tc6387xb = platform_get_drvdata(dev); - - mfd_remove_devices(&dev->dev); - iounmap(tc6387xb->scr); - release_resource(&tc6387xb->rscr); - clk_disable_unprepare(tc6387xb->clk32k); - clk_put(tc6387xb->clk32k); - kfree(tc6387xb); - - return 0; -} - - -static struct platform_driver tc6387xb_platform_driver = { - .driver = { - .name = "tc6387xb", - }, - .probe = tc6387xb_probe, - .remove = tc6387xb_remove, - .suspend = pm_sleep_ptr(tc6387xb_suspend), - .resume = pm_sleep_ptr(tc6387xb_resume), -}; - -module_platform_driver(tc6387xb_platform_driver); - -MODULE_DESCRIPTION("Toshiba TC6387XB core driver"); -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton"); -MODULE_ALIAS("platform:tc6387xb"); - diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c deleted file mode 100644 index 997bb8b5881d..000000000000 --- a/drivers/mfd/tc6393xb.c +++ /dev/null @@ -1,907 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Toshiba TC6393XB SoC support - * - * Copyright(c) 2005-2006 Chris Humbert - * Copyright(c) 2005 Dirk Opfer - * Copyright(c) 2005 Ian Molton <spyro@f2s.com> - * Copyright(c) 2007 Dmitry Baryshkov - * - * Based on code written by Sharp/Lineo for 2.4 kernels - * Based on locomo.c - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/mfd/tc6393xb.h> -#include <linux/gpio/driver.h> -#include <linux/gpio/machine.h> -#include <linux/gpio/consumer.h> -#include <linux/slab.h> - -#define SCR_REVID 0x08 /* b Revision ID */ -#define SCR_ISR 0x50 /* b Interrupt Status */ -#define SCR_IMR 0x52 /* b Interrupt Mask */ -#define SCR_IRR 0x54 /* b Interrupt Routing */ -#define SCR_GPER 0x60 /* w GP Enable */ -#define SCR_GPI_SR(i) (0x64 + (i)) /* b3 GPI Status */ -#define SCR_GPI_IMR(i) (0x68 + (i)) /* b3 GPI INT Mask */ -#define SCR_GPI_EDER(i) (0x6c + (i)) /* b3 GPI Edge Detect Enable */ -#define SCR_GPI_LIR(i) (0x70 + (i)) /* b3 GPI Level Invert */ -#define SCR_GPO_DSR(i) (0x78 + (i)) /* b3 GPO Data Set */ -#define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */ -#define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */ -#define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */ -#define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */ -#define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */ -#define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */ -#define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */ -#define SCR_CCR 0x98 /* w Clock Control */ -#define SCR_PLL2CR 0x9a /* w PLL2 Control */ -#define SCR_PLL1CR 0x9c /* l PLL1 Control */ -#define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */ -#define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */ -#define SCR_FER 0xe0 /* b Function Enable */ -#define SCR_MCR 0xe4 /* w Mode Control */ -#define SCR_CONFIG 0xfc /* b Configuration Control */ -#define SCR_DEBUG 0xff /* b Debug */ - -#define SCR_CCR_CK32K BIT(0) -#define SCR_CCR_USBCK BIT(1) -#define SCR_CCR_UNK1 BIT(4) -#define SCR_CCR_MCLK_MASK (7 << 8) -#define SCR_CCR_MCLK_OFF (0 << 8) -#define SCR_CCR_MCLK_12 (1 << 8) -#define SCR_CCR_MCLK_24 (2 << 8) -#define SCR_CCR_MCLK_48 (3 << 8) -#define SCR_CCR_HCLK_MASK (3 << 12) -#define SCR_CCR_HCLK_24 (0 << 12) -#define SCR_CCR_HCLK_48 (1 << 12) - -#define SCR_FER_USBEN BIT(0) /* USB host enable */ -#define SCR_FER_LCDCVEN BIT(1) /* polysilicon TFT enable */ -#define SCR_FER_SLCDEN BIT(2) /* SLCD enable */ - -#define SCR_MCR_RDY_MASK (3 << 0) -#define SCR_MCR_RDY_OPENDRAIN (0 << 0) -#define SCR_MCR_RDY_TRISTATE (1 << 0) -#define SCR_MCR_RDY_PUSHPULL (2 << 0) -#define SCR_MCR_RDY_UNK BIT(2) -#define SCR_MCR_RDY_EN BIT(3) -#define SCR_MCR_INT_MASK (3 << 4) -#define SCR_MCR_INT_OPENDRAIN (0 << 4) -#define SCR_MCR_INT_TRISTATE (1 << 4) -#define SCR_MCR_INT_PUSHPULL (2 << 4) -#define SCR_MCR_INT_UNK BIT(6) -#define SCR_MCR_INT_EN BIT(7) -/* bits 8 - 16 are unknown */ - -#define TC_GPIO_BIT(i) (1 << (i & 0x7)) - -/*--------------------------------------------------------------------------*/ - -struct tc6393xb { - void __iomem *scr; - struct device *dev; - - struct gpio_chip gpio; - struct gpio_desc *vcc_on; - - struct clk *clk; /* 3,6 Mhz */ - - raw_spinlock_t lock; /* protects RMW cycles */ - - struct { - u8 fer; - u16 ccr; - u8 gpi_bcr[3]; - u8 gpo_dsr[3]; - u8 gpo_doecr[3]; - } suspend_state; - - struct resource rscr; - struct resource *iomem; - int irq; - int irq_base; -}; - -enum { - TC6393XB_CELL_NAND, - TC6393XB_CELL_MMC, - TC6393XB_CELL_OHCI, - TC6393XB_CELL_FB, -}; - -/*--------------------------------------------------------------------------*/ - -static int tc6393xb_nand_enable(struct platform_device *nand) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(nand->dev.parent); - unsigned long flags; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - /* SMD buffer on */ - dev_dbg(nand->dev.parent, "SMD buffer on\n"); - tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -static const struct resource tc6393xb_nand_resources[] = { - { - .start = 0x1000, - .end = 0x1007, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x0100, - .end = 0x01ff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_TC6393_NAND, - .end = IRQ_TC6393_NAND, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct resource tc6393xb_mmc_resources[] = { - { - .start = 0x800, - .end = 0x9ff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_TC6393_MMC, - .end = IRQ_TC6393_MMC, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct resource tc6393xb_ohci_resources[] = { - { - .start = 0x3000, - .end = 0x31ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x0300, - .end = 0x03ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x010000, - .end = 0x017fff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x018000, - .end = 0x01ffff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_TC6393_OHCI, - .end = IRQ_TC6393_OHCI, - .flags = IORESOURCE_IRQ, - }, -}; - -static const struct resource tc6393xb_fb_resources[] = { - { - .start = 0x5000, - .end = 0x51ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x0500, - .end = 0x05ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 0x100000, - .end = 0x1fffff, - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_TC6393_FB, - .end = IRQ_TC6393_FB, - .flags = IORESOURCE_IRQ, - }, -}; - -static int tc6393xb_ohci_enable(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); - unsigned long flags; - u16 ccr; - u8 fer; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); - ccr |= SCR_CCR_USBCK; - tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); - - fer = tmio_ioread8(tc6393xb->scr + SCR_FER); - fer |= SCR_FER_USBEN; - tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -static int tc6393xb_ohci_disable(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); - unsigned long flags; - u16 ccr; - u8 fer; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - fer = tmio_ioread8(tc6393xb->scr + SCR_FER); - fer &= ~SCR_FER_USBEN; - tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); - - ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); - ccr &= ~SCR_CCR_USBCK; - tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -static int tc6393xb_ohci_suspend(struct platform_device *dev) -{ - struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent); - - /* We can't properly store/restore OHCI state, so fail here */ - if (tcpd->resume_restore) - return -EBUSY; - - return tc6393xb_ohci_disable(dev); -} - -static int tc6393xb_fb_enable(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); - unsigned long flags; - u16 ccr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); - ccr &= ~SCR_CCR_MCLK_MASK; - ccr |= SCR_CCR_MCLK_48; - tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -static int tc6393xb_fb_disable(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); - unsigned long flags; - u16 ccr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); - ccr &= ~SCR_CCR_MCLK_MASK; - ccr |= SCR_CCR_MCLK_OFF; - tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -int tc6393xb_lcd_set_power(struct platform_device *fb, bool on) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); - u8 fer; - unsigned long flags; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - fer = ioread8(tc6393xb->scr + SCR_FER); - if (on) - fer |= SCR_FER_SLCDEN; - else - fer &= ~SCR_FER_SLCDEN; - iowrite8(fer, tc6393xb->scr + SCR_FER); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} -EXPORT_SYMBOL(tc6393xb_lcd_set_power); - -int tc6393xb_lcd_mode(struct platform_device *fb, - const struct fb_videomode *mode) { - struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); - unsigned long flags; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0); - iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} -EXPORT_SYMBOL(tc6393xb_lcd_mode); - -static int tc6393xb_mmc_enable(struct platform_device *mmc) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0, - tc6393xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -static int tc6393xb_mmc_resume(struct platform_device *mmc) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0, - tc6393xb_mmc_resources[0].start & 0xfffe); - - return 0; -} - -static void tc6393xb_mmc_pwr(struct platform_device *mmc, int state) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state); -} - -static void tc6393xb_mmc_clk_div(struct platform_device *mmc, int state) -{ - struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); - - tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state); -} - -static struct tmio_mmc_data tc6393xb_mmc_data = { - .hclk = 24000000, - .set_pwr = tc6393xb_mmc_pwr, - .set_clk_div = tc6393xb_mmc_clk_div, -}; - -static struct mfd_cell tc6393xb_cells[] = { - [TC6393XB_CELL_NAND] = { - .name = "tmio-nand", - .enable = tc6393xb_nand_enable, - .num_resources = ARRAY_SIZE(tc6393xb_nand_resources), - .resources = tc6393xb_nand_resources, - }, - [TC6393XB_CELL_MMC] = { - .name = "tmio-mmc", - .enable = tc6393xb_mmc_enable, - .resume = tc6393xb_mmc_resume, - .platform_data = &tc6393xb_mmc_data, - .pdata_size = sizeof(tc6393xb_mmc_data), - .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources), - .resources = tc6393xb_mmc_resources, - }, - [TC6393XB_CELL_OHCI] = { - .name = "tmio-ohci", - .num_resources = ARRAY_SIZE(tc6393xb_ohci_resources), - .resources = tc6393xb_ohci_resources, - .enable = tc6393xb_ohci_enable, - .suspend = tc6393xb_ohci_suspend, - .resume = tc6393xb_ohci_enable, - .disable = tc6393xb_ohci_disable, - }, - [TC6393XB_CELL_FB] = { - .name = "tmio-fb", - .num_resources = ARRAY_SIZE(tc6393xb_fb_resources), - .resources = tc6393xb_fb_resources, - .enable = tc6393xb_fb_enable, - .suspend = tc6393xb_fb_disable, - .resume = tc6393xb_fb_enable, - .disable = tc6393xb_fb_disable, - }, -}; - -/*--------------------------------------------------------------------------*/ - -static int tc6393xb_gpio_get(struct gpio_chip *chip, - unsigned offset) -{ - struct tc6393xb *tc6393xb = gpiochip_get_data(chip); - - /* XXX: does dsr also represent inputs? */ - return !!(tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)) - & TC_GPIO_BIT(offset)); -} - -static void __tc6393xb_gpio_set(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct tc6393xb *tc6393xb = gpiochip_get_data(chip); - u8 dsr; - - dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)); - if (value) - dsr |= TC_GPIO_BIT(offset); - else - dsr &= ~TC_GPIO_BIT(offset); - - tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8)); -} - -static void tc6393xb_gpio_set(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct tc6393xb *tc6393xb = gpiochip_get_data(chip); - unsigned long flags; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - __tc6393xb_gpio_set(chip, offset, value); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); -} - -static int tc6393xb_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - struct tc6393xb *tc6393xb = gpiochip_get_data(chip); - unsigned long flags; - u8 doecr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); - doecr &= ~TC_GPIO_BIT(offset); - tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -static int tc6393xb_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct tc6393xb *tc6393xb = gpiochip_get_data(chip); - unsigned long flags; - u8 doecr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - - __tc6393xb_gpio_set(chip, offset, value); - - doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); - doecr |= TC_GPIO_BIT(offset); - tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); - - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); - - return 0; -} - -/* - * TC6393XB GPIOs as used on TOSA, are the only user of this chip. - * GPIOs 2, 5, 8 and 13 are not connected. - */ -#define TOSA_GPIO_TG_ON 0 -#define TOSA_GPIO_L_MUTE 1 -#define TOSA_GPIO_BL_C20MA 3 -#define TOSA_GPIO_CARD_VCC_ON 4 -#define TOSA_GPIO_CHARGE_OFF 6 -#define TOSA_GPIO_CHARGE_OFF_JC 7 -#define TOSA_GPIO_BAT0_V_ON 9 -#define TOSA_GPIO_BAT1_V_ON 10 -#define TOSA_GPIO_BU_CHRG_ON 11 -#define TOSA_GPIO_BAT_SW_ON 12 -#define TOSA_GPIO_BAT0_TH_ON 14 -#define TOSA_GPIO_BAT1_TH_ON 15 - - -GPIO_LOOKUP_SINGLE(tosa_lcd_gpio_lookup, "spi2.0", "tc6393xb", - TOSA_GPIO_TG_ON, "tg #pwr", GPIO_ACTIVE_HIGH); - -GPIO_LOOKUP_SINGLE(tosa_lcd_bl_gpio_lookup, "i2c-tos-bl", "tc6393xb", - TOSA_GPIO_BL_C20MA, "backlight", GPIO_ACTIVE_HIGH); - -GPIO_LOOKUP_SINGLE(tosa_audio_gpio_lookup, "tosa-audio", "tc6393xb", - TOSA_GPIO_L_MUTE, NULL, GPIO_ACTIVE_HIGH); - -static struct gpiod_lookup_table tosa_battery_gpio_lookup = { - .dev_id = "wm97xx-battery", - .table = { - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_CHARGE_OFF, - "main charge off", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_CHARGE_OFF_JC, - "jacket charge off", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT0_V_ON, - "main battery", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT1_V_ON, - "jacket battery", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BU_CHRG_ON, - "backup battery", GPIO_ACTIVE_HIGH), - /* BAT1 and BAT0 thermistors appear to be swapped */ - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT1_TH_ON, - "main battery temp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT0_TH_ON, - "jacket battery temp", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT_SW_ON, - "battery switch", GPIO_ACTIVE_HIGH), - { }, - }, -}; - -static struct gpiod_lookup_table *tc6393xb_gpio_lookups[] = { - &tosa_lcd_gpio_lookup, - &tosa_lcd_bl_gpio_lookup, - &tosa_audio_gpio_lookup, - &tosa_battery_gpio_lookup, -}; - -static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb) -{ - struct gpio_chip *gc = &tc6393xb->gpio; - struct device *dev = tc6393xb->dev; - int ret; - - gc->label = "tc6393xb"; - gc->base = -1; /* Dynamic allocation */ - gc->ngpio = 16; - gc->set = tc6393xb_gpio_set; - gc->get = tc6393xb_gpio_get; - gc->direction_input = tc6393xb_gpio_direction_input; - gc->direction_output = tc6393xb_gpio_direction_output; - - ret = devm_gpiochip_add_data(dev, gc, tc6393xb); - if (ret) - return dev_err_probe(dev, ret, "failed to add GPIO chip\n"); - - /* Register descriptor look-ups for consumers */ - gpiod_add_lookup_tables(tc6393xb_gpio_lookups, ARRAY_SIZE(tc6393xb_gpio_lookups)); - - /* Request some of our own GPIOs */ - tc6393xb->vcc_on = gpiochip_request_own_desc(gc, TOSA_GPIO_CARD_VCC_ON, "VCC ON", - GPIO_ACTIVE_HIGH, GPIOD_OUT_HIGH); - if (IS_ERR(tc6393xb->vcc_on)) - return dev_err_probe(dev, PTR_ERR(tc6393xb->vcc_on), - "failed to request VCC ON GPIO\n"); - - return 0; -} - -/*--------------------------------------------------------------------------*/ - -static void tc6393xb_irq(struct irq_desc *desc) -{ - struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc); - unsigned int isr; - unsigned int i, irq_base; - - irq_base = tc6393xb->irq_base; - - while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) & - ~tmio_ioread8(tc6393xb->scr + SCR_IMR))) - for (i = 0; i < TC6393XB_NR_IRQS; i++) { - if (isr & (1 << i)) - generic_handle_irq(irq_base + i); - } -} - -static void tc6393xb_irq_ack(struct irq_data *data) -{ -} - -static void tc6393xb_irq_mask(struct irq_data *data) -{ - struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data); - unsigned long flags; - u8 imr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); - imr |= 1 << (data->irq - tc6393xb->irq_base); - tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); -} - -static void tc6393xb_irq_unmask(struct irq_data *data) -{ - struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data); - unsigned long flags; - u8 imr; - - raw_spin_lock_irqsave(&tc6393xb->lock, flags); - imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); - imr &= ~(1 << (data->irq - tc6393xb->irq_base)); - tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); - raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); -} - -static struct irq_chip tc6393xb_chip = { - .name = "tc6393xb", - .irq_ack = tc6393xb_irq_ack, - .irq_mask = tc6393xb_irq_mask, - .irq_unmask = tc6393xb_irq_unmask, -}; - -static void tc6393xb_attach_irq(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); - unsigned int irq, irq_base; - - irq_base = tc6393xb->irq_base; - - for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { - irq_set_chip_and_handler(irq, &tc6393xb_chip, handle_edge_irq); - irq_set_chip_data(irq, tc6393xb); - irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - } - - irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING); - irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq, - tc6393xb); -} - -static void tc6393xb_detach_irq(struct platform_device *dev) -{ - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); - unsigned int irq, irq_base; - - irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL); - - irq_base = tc6393xb->irq_base; - - for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { - irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); - irq_set_chip(irq, NULL); - irq_set_chip_data(irq, NULL); - } -} - -/*--------------------------------------------------------------------------*/ - -static int tc6393xb_probe(struct platform_device *dev) -{ - struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); - struct tc6393xb *tc6393xb; - struct resource *iomem, *rscr; - int ret; - - iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!iomem) - return -EINVAL; - - tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL); - if (!tc6393xb) { - ret = -ENOMEM; - goto err_kzalloc; - } - tc6393xb->dev = &dev->dev; - - raw_spin_lock_init(&tc6393xb->lock); - - platform_set_drvdata(dev, tc6393xb); - - ret = platform_get_irq(dev, 0); - if (ret >= 0) - tc6393xb->irq = ret; - else - goto err_noirq; - - tc6393xb->iomem = iomem; - tc6393xb->irq_base = tcpd->irq_base; - - tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI"); - if (IS_ERR(tc6393xb->clk)) { - ret = PTR_ERR(tc6393xb->clk); - goto err_clk_get; - } - - rscr = &tc6393xb->rscr; - rscr->name = "tc6393xb-core"; - rscr->start = iomem->start; - rscr->end = iomem->start + 0xff; - rscr->flags = IORESOURCE_MEM; - - ret = request_resource(iomem, rscr); - if (ret) - goto err_request_scr; - - tc6393xb->scr = ioremap(rscr->start, resource_size(rscr)); - if (!tc6393xb->scr) { - ret = -ENOMEM; - goto err_ioremap; - } - - ret = clk_prepare_enable(tc6393xb->clk); - if (ret) - goto err_clk_enable; - - ret = tcpd->enable(dev); - if (ret) - goto err_enable; - - iowrite8(0, tc6393xb->scr + SCR_FER); - iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); - iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48, - tc6393xb->scr + SCR_CCR); - iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | - SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | - BIT(15), tc6393xb->scr + SCR_MCR); - iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); - iowrite8(0, tc6393xb->scr + SCR_IRR); - iowrite8(0xbf, tc6393xb->scr + SCR_IMR); - - printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n", - tmio_ioread8(tc6393xb->scr + SCR_REVID), - (unsigned long) iomem->start, tc6393xb->irq); - - ret = tc6393xb_register_gpio(tc6393xb); - if (ret) - goto err_gpio_add; - - tc6393xb_attach_irq(dev); - - tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data; - tc6393xb_cells[TC6393XB_CELL_NAND].pdata_size = - sizeof(*tcpd->nand_data); - tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data; - tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data); - - ret = mfd_add_devices(&dev->dev, dev->id, - tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells), - iomem, tcpd->irq_base, NULL); - - if (!ret) - return 0; - - tc6393xb_detach_irq(dev); -err_gpio_add: - tcpd->disable(dev); -err_enable: - clk_disable_unprepare(tc6393xb->clk); -err_clk_enable: - iounmap(tc6393xb->scr); -err_ioremap: - release_resource(&tc6393xb->rscr); -err_request_scr: - clk_put(tc6393xb->clk); -err_noirq: -err_clk_get: - kfree(tc6393xb); -err_kzalloc: - return ret; -} - -static int tc6393xb_remove(struct platform_device *dev) -{ - struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); - - mfd_remove_devices(&dev->dev); - - tc6393xb_detach_irq(dev); - - tcpd->disable(dev); - clk_disable_unprepare(tc6393xb->clk); - iounmap(tc6393xb->scr); - release_resource(&tc6393xb->rscr); - clk_put(tc6393xb->clk); - kfree(tc6393xb); - - return 0; -} - -static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); - int i, ret; - - tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR); - tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER); - - for (i = 0; i < 3; i++) { - tc6393xb->suspend_state.gpo_dsr[i] = - ioread8(tc6393xb->scr + SCR_GPO_DSR(i)); - tc6393xb->suspend_state.gpo_doecr[i] = - ioread8(tc6393xb->scr + SCR_GPO_DOECR(i)); - tc6393xb->suspend_state.gpi_bcr[i] = - ioread8(tc6393xb->scr + SCR_GPI_BCR(i)); - } - ret = tcpd->suspend(dev); - clk_disable_unprepare(tc6393xb->clk); - - return ret; -} - -static int tc6393xb_resume(struct platform_device *dev) -{ - struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); - int ret; - int i; - - ret = clk_prepare_enable(tc6393xb->clk); - if (ret) - return ret; - - ret = tcpd->resume(dev); - if (ret) - return ret; - - if (!tcpd->resume_restore) - return 0; - - iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); - iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); - iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); - iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | - SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | - BIT(15), tc6393xb->scr + SCR_MCR); - iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); - iowrite8(0, tc6393xb->scr + SCR_IRR); - iowrite8(0xbf, tc6393xb->scr + SCR_IMR); - - for (i = 0; i < 3; i++) { - iowrite8(tc6393xb->suspend_state.gpo_dsr[i], - tc6393xb->scr + SCR_GPO_DSR(i)); - iowrite8(tc6393xb->suspend_state.gpo_doecr[i], - tc6393xb->scr + SCR_GPO_DOECR(i)); - iowrite8(tc6393xb->suspend_state.gpi_bcr[i], - tc6393xb->scr + SCR_GPI_BCR(i)); - } - - return 0; -} - -static struct platform_driver tc6393xb_driver = { - .probe = tc6393xb_probe, - .remove = tc6393xb_remove, - .suspend = pm_sleep_ptr(tc6393xb_suspend), - .resume = pm_sleep_ptr(tc6393xb_resume), - - .driver = { - .name = "tc6393xb", - }, -}; - -static int __init tc6393xb_init(void) -{ - return platform_driver_register(&tc6393xb_driver); -} - -static void __exit tc6393xb_exit(void) -{ - platform_driver_unregister(&tc6393xb_driver); -} - -subsys_initcall(tc6393xb_init); -module_exit(tc6393xb_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer"); -MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller"); -MODULE_ALIAS("platform:tc6393xb"); - diff --git a/drivers/mfd/tmio_core.c b/drivers/mfd/tmio_core.c deleted file mode 100644 index 7ee873551482..000000000000 --- a/drivers/mfd/tmio_core.c +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright(c) 2009 Ian Molton <spyro@f2s.com> - */ - -#include <linux/export.h> -#include <linux/mfd/tmio.h> - -#define CNF_CMD 0x04 -#define CNF_CTL_BASE 0x10 -#define CNF_INT_PIN 0x3d -#define CNF_STOP_CLK_CTL 0x40 -#define CNF_GCLK_CTL 0x41 -#define CNF_SD_CLK_MODE 0x42 -#define CNF_PIN_STATUS 0x44 -#define CNF_PWR_CTL_1 0x48 -#define CNF_PWR_CTL_2 0x49 -#define CNF_PWR_CTL_3 0x4a -#define CNF_CARD_DETECT_MODE 0x4c -#define CNF_SD_SLOT 0x50 -#define CNF_EXT_GCLK_CTL_1 0xf0 -#define CNF_EXT_GCLK_CTL_2 0xf1 -#define CNF_EXT_GCLK_CTL_3 0xf9 -#define CNF_SD_LED_EN_1 0xfa -#define CNF_SD_LED_EN_2 0xfe - -#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ - -int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base) -{ - /* Enable the MMC/SD Control registers */ - sd_config_write16(cnf, shift, CNF_CMD, SDCREN); - sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); - - /* Disable SD power during suspend */ - sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01); - - /* The below is required but why? FIXME */ - sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f); - - /* Power down SD bus */ - sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00); - - return 0; -} -EXPORT_SYMBOL(tmio_core_mmc_enable); - -int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base) -{ - - /* Enable the MMC/SD Control registers */ - sd_config_write16(cnf, shift, CNF_CMD, SDCREN); - sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); - - return 0; -} -EXPORT_SYMBOL(tmio_core_mmc_resume); - -void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state) -{ - sd_config_write8(cnf, shift, CNF_PWR_CTL_2, state ? 0x02 : 0x00); -} -EXPORT_SYMBOL(tmio_core_mmc_pwr); - -void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state) -{ - sd_config_write8(cnf, shift, CNF_SD_CLK_MODE, state ? 1 : 0); -} -EXPORT_SYMBOL(tmio_core_mmc_clk_div); - diff --git a/drivers/mfd/ucb1400_core.c b/drivers/mfd/ucb1400_core.c deleted file mode 100644 index ac1d18039568..000000000000 --- a/drivers/mfd/ucb1400_core.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Core functions for: - * Philips UCB1400 multifunction chip - * - * Based on ucb1400_ts.c: - * Author: Nicolas Pitre - * Created: September 25, 2006 - * Copyright: MontaVista Software, Inc. - * - * Spliting done by: Marek Vasut <marek.vasut@gmail.com> - * If something doesn't work and it worked before spliting, e-mail me, - * dont bother Nicolas please ;-) - * - * This code is heavily based on ucb1x00-*.c copyrighted by Russell King - * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has - * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. - */ - -#include <linux/module.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/ucb1400.h> - -unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel, - int adcsync) -{ - unsigned int val; - - if (adcsync) - adc_channel |= UCB_ADC_SYNC_ENA; - - ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel); - ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | - UCB_ADC_START); - - while (!((val = ucb1400_reg_read(ac97, UCB_ADC_DATA)) - & UCB_ADC_DAT_VALID)) - schedule_timeout_uninterruptible(1); - - return val & UCB_ADC_DAT_MASK; -} -EXPORT_SYMBOL_GPL(ucb1400_adc_read); - -static int ucb1400_core_probe(struct device *dev) -{ - int err; - struct ucb1400 *ucb; - struct ucb1400_ts ucb_ts; - struct ucb1400_gpio ucb_gpio; - struct snd_ac97 *ac97; - struct ucb1400_pdata *pdata = dev_get_platdata(dev); - - memset(&ucb_ts, 0, sizeof(ucb_ts)); - memset(&ucb_gpio, 0, sizeof(ucb_gpio)); - - ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); - if (!ucb) { - err = -ENOMEM; - goto err; - } - - dev_set_drvdata(dev, ucb); - - ac97 = to_ac97_t(dev); - - ucb_ts.id = ucb1400_reg_read(ac97, UCB_ID); - if (ucb_ts.id != UCB_ID_1400) { - err = -ENODEV; - goto err0; - } - - /* GPIO */ - ucb_gpio.ac97 = ac97; - if (pdata) - ucb_gpio.gpio_offset = pdata->gpio_offset; - - ucb->ucb1400_gpio = platform_device_alloc("ucb1400_gpio", -1); - if (!ucb->ucb1400_gpio) { - err = -ENOMEM; - goto err0; - } - err = platform_device_add_data(ucb->ucb1400_gpio, &ucb_gpio, - sizeof(ucb_gpio)); - if (err) - goto err1; - err = platform_device_add(ucb->ucb1400_gpio); - if (err) - goto err1; - - /* TOUCHSCREEN */ - ucb_ts.ac97 = ac97; - - if (pdata != NULL && pdata->irq >= 0) - ucb_ts.irq = pdata->irq; - else - ucb_ts.irq = -1; - - ucb->ucb1400_ts = platform_device_alloc("ucb1400_ts", -1); - if (!ucb->ucb1400_ts) { - err = -ENOMEM; - goto err2; - } - err = platform_device_add_data(ucb->ucb1400_ts, &ucb_ts, - sizeof(ucb_ts)); - if (err) - goto err3; - err = platform_device_add(ucb->ucb1400_ts); - if (err) - goto err3; - - return 0; - -err3: - platform_device_put(ucb->ucb1400_ts); -err2: - platform_device_del(ucb->ucb1400_gpio); -err1: - platform_device_put(ucb->ucb1400_gpio); -err0: - kfree(ucb); -err: - return err; -} - -static int ucb1400_core_remove(struct device *dev) -{ - struct ucb1400 *ucb = dev_get_drvdata(dev); - - platform_device_unregister(ucb->ucb1400_ts); - platform_device_unregister(ucb->ucb1400_gpio); - - kfree(ucb); - return 0; -} - -static struct device_driver ucb1400_core_driver = { - .name = "ucb1400_core", - .bus = &ac97_bus_type, - .probe = ucb1400_core_probe, - .remove = ucb1400_core_remove, -}; - -static int __init ucb1400_core_init(void) -{ - return driver_register(&ucb1400_core_driver); -} - -static void __exit ucb1400_core_exit(void) -{ - driver_unregister(&ucb1400_core_driver); -} - -module_init(ucb1400_core_init); -module_exit(ucb1400_core_exit); - -MODULE_DESCRIPTION("Philips UCB1400 driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 5e19a961c34d..e13b0b0b8ebb 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -262,17 +262,6 @@ config MMC_SDHCI_CADENCE If unsure, say N. -config MMC_SDHCI_CNS3XXX - tristate "SDHCI support on the Cavium Networks CNS3xxx SoC" - depends on ARCH_CNS3XXX || COMPILE_TEST - depends on MMC_SDHCI_PLTFM - help - This selects the SDHCI support for CNS3xxx System-on-Chip devices. - - If you have a controller with this interface, say Y or M here. - - If unsure, say N. - config MMC_SDHCI_ESDHC_MCF tristate "SDHCI support for the Freescale eSDHC ColdFire controller" depends on M5441x @@ -332,9 +321,8 @@ config MMC_SDHCI_S3C depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST help This selects the Secure Digital Host Controller Interface (SDHCI) - often referrered to as the HSMMC block in some of the Samsung S3C - (S3C2416, S3C2443, S3C6410), S5Pv210 and Exynos (Exynso4210, - Exynos4412) SoCs. + often referrered to as the HSMMC block in some of the Samsung + S3C6410, S5Pv210 and Exynos (Exynso4210, Exynos4412) SoCs. If you have a controller with this interface (thereforeyou build for such Samsung SoC), say Y or M here. @@ -500,7 +488,6 @@ config MMC_SDHCI_ST config MMC_OMAP tristate "TI OMAP Multimedia Card Interface support" depends on ARCH_OMAP - depends on TPS65010 || !MACH_OMAP_H2 help This selects the TI OMAP Multimedia card Interface. If you have an OMAP board with a Multimedia Card slot, @@ -640,49 +627,6 @@ config MMC_SPI If unsure, or if your system has no SPI master driver, say N. -config MMC_S3C - tristate "Samsung S3C SD/MMC Card Interface support" - depends on ARCH_S3C24XX || COMPILE_TEST - depends on S3C24XX_DMAC || COMPILE_TEST - help - This selects a driver for the MCI interface found in - Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs. - If you have a board based on one of those and a MMC/SD - slot, say Y or M here. - - If unsure, say N. - -config MMC_S3C_HW_SDIO_IRQ - bool "Hardware support for SDIO IRQ" - depends on MMC_S3C - help - Enable the hardware support for SDIO interrupts instead of using - the generic polling code. - -choice - prompt "Samsung S3C SD/MMC transfer code" - depends on MMC_S3C - -config MMC_S3C_PIO - bool "Use PIO transfers only" - help - Use PIO to transfer data between memory and the hardware. - - PIO is slower than DMA as it requires CPU instructions to - move the data. This has been the traditional default for - the S3C MCI driver. - -config MMC_S3C_DMA - bool "Use DMA transfers only" - help - Use DMA to transfer data between memory and the hardware. - - Currently, the DMA support in this driver seems to not be - working properly and needs to be debugged before this - option is useful. - -endchoice - config MMC_SDRICOH_CS tristate "MMC/SD driver for Ricoh Bay1Controllers" depends on PCI && PCMCIA @@ -710,14 +654,6 @@ config MMC_SDHCI_SPRD config MMC_TMIO_CORE tristate -config MMC_TMIO - tristate "Toshiba Mobile IO Controller (TMIO) MMC/SD function support" - depends on MFD_TMIO || MFD_ASIC3 || COMPILE_TEST - select MMC_TMIO_CORE - help - This provides support for the SD/MMC cell found in TC6393XB, - T7L66XB and also HTC ASIC3 - config MMC_SDHI tristate "Renesas SDHI SD/SDIO controller support" depends on SUPERH || ARCH_RENESAS || COMPILE_TEST diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index ba0c6d0cd85d..b498c17cd124 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -34,9 +34,7 @@ obj-$(CONFIG_MMC_MVSDIO) += mvsdio.o obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o obj-$(CONFIG_MMC_SPI) += mmc_spi.o obj-$(CONFIG_MMC_SPI) += of_mmc_spi.o -obj-$(CONFIG_MMC_S3C) += s3cmci.o obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o -obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o obj-$(CONFIG_MMC_TMIO_CORE) += tmio_mmc_core.o obj-$(CONFIG_MMC_SDHI) += renesas_sdhi_core.o obj-$(CONFIG_MMC_SDHI_SYS_DMAC) += renesas_sdhi_sys_dmac.o @@ -77,7 +75,6 @@ obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o -obj-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o obj-$(CONFIG_MMC_SDHCI_ESDHC_MCF) += sdhci-esdhc-mcf.o obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c deleted file mode 100644 index 8d5929a32d34..000000000000 --- a/drivers/mmc/host/s3cmci.c +++ /dev/null @@ -1,1777 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver - * - * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de> - * - * Current driver maintained by Ben Dooks and Simtec Electronics - * Copyright (C) 2008 Simtec Electronics <ben-linux@fluff.org> - */ - -#include <linux/module.h> -#include <linux/dmaengine.h> -#include <linux/dma-mapping.h> -#include <linux/clk.h> -#include <linux/mmc/host.h> -#include <linux/platform_device.h> -#include <linux/cpufreq.h> -#include <linux/debugfs.h> -#include <linux/seq_file.h> -#include <linux/gpio/consumer.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/of.h> -#include <linux/of_device.h> -#include <linux/mmc/slot-gpio.h> -#include <linux/platform_data/mmc-s3cmci.h> - -#include "s3cmci.h" - -#define DRIVER_NAME "s3c-mci" - -#define S3C2410_SDICON (0x00) -#define S3C2410_SDIPRE (0x04) -#define S3C2410_SDICMDARG (0x08) -#define S3C2410_SDICMDCON (0x0C) -#define S3C2410_SDICMDSTAT (0x10) -#define S3C2410_SDIRSP0 (0x14) -#define S3C2410_SDIRSP1 (0x18) -#define S3C2410_SDIRSP2 (0x1C) -#define S3C2410_SDIRSP3 (0x20) -#define S3C2410_SDITIMER (0x24) -#define S3C2410_SDIBSIZE (0x28) -#define S3C2410_SDIDCON (0x2C) -#define S3C2410_SDIDCNT (0x30) -#define S3C2410_SDIDSTA (0x34) -#define S3C2410_SDIFSTA (0x38) - -#define S3C2410_SDIDATA (0x3C) -#define S3C2410_SDIIMSK (0x40) - -#define S3C2440_SDIDATA (0x40) -#define S3C2440_SDIIMSK (0x3C) - -#define S3C2440_SDICON_SDRESET (1 << 8) -#define S3C2410_SDICON_SDIOIRQ (1 << 3) -#define S3C2410_SDICON_FIFORESET (1 << 1) -#define S3C2410_SDICON_CLOCKTYPE (1 << 0) - -#define S3C2410_SDICMDCON_LONGRSP (1 << 10) -#define S3C2410_SDICMDCON_WAITRSP (1 << 9) -#define S3C2410_SDICMDCON_CMDSTART (1 << 8) -#define S3C2410_SDICMDCON_SENDERHOST (1 << 6) -#define S3C2410_SDICMDCON_INDEX (0x3f) - -#define S3C2410_SDICMDSTAT_CRCFAIL (1 << 12) -#define S3C2410_SDICMDSTAT_CMDSENT (1 << 11) -#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1 << 10) -#define S3C2410_SDICMDSTAT_RSPFIN (1 << 9) - -#define S3C2440_SDIDCON_DS_WORD (2 << 22) -#define S3C2410_SDIDCON_TXAFTERRESP (1 << 20) -#define S3C2410_SDIDCON_RXAFTERCMD (1 << 19) -#define S3C2410_SDIDCON_BLOCKMODE (1 << 17) -#define S3C2410_SDIDCON_WIDEBUS (1 << 16) -#define S3C2410_SDIDCON_DMAEN (1 << 15) -#define S3C2410_SDIDCON_STOP (1 << 14) -#define S3C2440_SDIDCON_DATSTART (1 << 14) - -#define S3C2410_SDIDCON_XFER_RXSTART (2 << 12) -#define S3C2410_SDIDCON_XFER_TXSTART (3 << 12) - -#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF) - -#define S3C2410_SDIDSTA_SDIOIRQDETECT (1 << 9) -#define S3C2410_SDIDSTA_FIFOFAIL (1 << 8) -#define S3C2410_SDIDSTA_CRCFAIL (1 << 7) -#define S3C2410_SDIDSTA_RXCRCFAIL (1 << 6) -#define S3C2410_SDIDSTA_DATATIMEOUT (1 << 5) -#define S3C2410_SDIDSTA_XFERFINISH (1 << 4) -#define S3C2410_SDIDSTA_TXDATAON (1 << 1) -#define S3C2410_SDIDSTA_RXDATAON (1 << 0) - -#define S3C2440_SDIFSTA_FIFORESET (1 << 16) -#define S3C2440_SDIFSTA_FIFOFAIL (3 << 14) -#define S3C2410_SDIFSTA_TFDET (1 << 13) -#define S3C2410_SDIFSTA_RFDET (1 << 12) -#define S3C2410_SDIFSTA_COUNTMASK (0x7f) - -#define S3C2410_SDIIMSK_RESPONSECRC (1 << 17) -#define S3C2410_SDIIMSK_CMDSENT (1 << 16) -#define S3C2410_SDIIMSK_CMDTIMEOUT (1 << 15) -#define S3C2410_SDIIMSK_RESPONSEND (1 << 14) -#define S3C2410_SDIIMSK_SDIOIRQ (1 << 12) -#define S3C2410_SDIIMSK_FIFOFAIL (1 << 11) -#define S3C2410_SDIIMSK_CRCSTATUS (1 << 10) -#define S3C2410_SDIIMSK_DATACRC (1 << 9) -#define S3C2410_SDIIMSK_DATATIMEOUT (1 << 8) -#define S3C2410_SDIIMSK_DATAFINISH (1 << 7) -#define S3C2410_SDIIMSK_TXFIFOHALF (1 << 4) -#define S3C2410_SDIIMSK_RXFIFOLAST (1 << 2) -#define S3C2410_SDIIMSK_RXFIFOHALF (1 << 0) - -enum dbg_channels { - dbg_err = (1 << 0), - dbg_debug = (1 << 1), - dbg_info = (1 << 2), - dbg_irq = (1 << 3), - dbg_sg = (1 << 4), - dbg_dma = (1 << 5), - dbg_pio = (1 << 6), - dbg_fail = (1 << 7), - dbg_conf = (1 << 8), -}; - -static const int dbgmap_err = dbg_fail; -static const int dbgmap_info = dbg_info | dbg_conf; -static const int dbgmap_debug = dbg_err | dbg_debug; - -#define dbg(host, channels, args...) \ - do { \ - if (dbgmap_err & channels) \ - dev_err(&host->pdev->dev, args); \ - else if (dbgmap_info & channels) \ - dev_info(&host->pdev->dev, args); \ - else if (dbgmap_debug & channels) \ - dev_dbg(&host->pdev->dev, args); \ - } while (0) - -static void finalize_request(struct s3cmci_host *host); -static void s3cmci_send_request(struct mmc_host *mmc); -static void s3cmci_reset(struct s3cmci_host *host); - -#ifdef CONFIG_MMC_DEBUG - -static void dbg_dumpregs(struct s3cmci_host *host, char *prefix) -{ - u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer; - u32 datcon, datcnt, datsta, fsta; - - con = readl(host->base + S3C2410_SDICON); - pre = readl(host->base + S3C2410_SDIPRE); - cmdarg = readl(host->base + S3C2410_SDICMDARG); - cmdcon = readl(host->base + S3C2410_SDICMDCON); - cmdsta = readl(host->base + S3C2410_SDICMDSTAT); - r0 = readl(host->base + S3C2410_SDIRSP0); - r1 = readl(host->base + S3C2410_SDIRSP1); - r2 = readl(host->base + S3C2410_SDIRSP2); - r3 = readl(host->base + S3C2410_SDIRSP3); - timer = readl(host->base + S3C2410_SDITIMER); - datcon = readl(host->base + S3C2410_SDIDCON); - datcnt = readl(host->base + S3C2410_SDIDCNT); - datsta = readl(host->base + S3C2410_SDIDSTA); - fsta = readl(host->base + S3C2410_SDIFSTA); - - dbg(host, dbg_debug, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n", - prefix, con, pre, timer); - - dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n", - prefix, cmdcon, cmdarg, cmdsta); - - dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]" - " DSTA:[%08x] DCNT:[%08x]\n", - prefix, datcon, fsta, datsta, datcnt); - - dbg(host, dbg_debug, "%s R0:[%08x] R1:[%08x]" - " R2:[%08x] R3:[%08x]\n", - prefix, r0, r1, r2, r3); -} - -static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd, - int stop) -{ - snprintf(host->dbgmsg_cmd, 300, - "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u", - host->ccnt, (stop ? " (STOP)" : ""), - cmd->opcode, cmd->arg, cmd->flags, cmd->retries); - - if (cmd->data) { - snprintf(host->dbgmsg_dat, 300, - "#%u bsize:%u blocks:%u bytes:%u", - host->dcnt, cmd->data->blksz, - cmd->data->blocks, - cmd->data->blocks * cmd->data->blksz); - } else { - host->dbgmsg_dat[0] = '\0'; - } -} - -static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd, - int fail) -{ - unsigned int dbglvl = fail ? dbg_fail : dbg_debug; - - if (!cmd) - return; - - if (cmd->error == 0) { - dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n", - host->dbgmsg_cmd, cmd->resp[0]); - } else { - dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n", - cmd->error, host->dbgmsg_cmd, host->status); - } - - if (!cmd->data) - return; - - if (cmd->data->error == 0) { - dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat); - } else { - dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n", - cmd->data->error, host->dbgmsg_dat, - readl(host->base + S3C2410_SDIDCNT)); - } -} -#else -static void dbg_dumpcmd(struct s3cmci_host *host, - struct mmc_command *cmd, int fail) { } - -static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd, - int stop) { } - -static void dbg_dumpregs(struct s3cmci_host *host, char *prefix) { } - -#endif /* CONFIG_MMC_DEBUG */ - -/** - * s3cmci_host_usedma - return whether the host is using dma or pio - * @host: The host state - * - * Return true if the host is using DMA to transfer data, else false - * to use PIO mode. Will return static data depending on the driver - * configuration. - */ -static inline bool s3cmci_host_usedma(struct s3cmci_host *host) -{ -#ifdef CONFIG_MMC_S3C_PIO - return false; -#else /* CONFIG_MMC_S3C_DMA */ - return true; -#endif -} - -static inline u32 enable_imask(struct s3cmci_host *host, u32 imask) -{ - u32 newmask; - - newmask = readl(host->base + host->sdiimsk); - newmask |= imask; - - writel(newmask, host->base + host->sdiimsk); - - return newmask; -} - -static inline u32 disable_imask(struct s3cmci_host *host, u32 imask) -{ - u32 newmask; - - newmask = readl(host->base + host->sdiimsk); - newmask &= ~imask; - - writel(newmask, host->base + host->sdiimsk); - - return newmask; -} - -static inline void clear_imask(struct s3cmci_host *host) -{ - u32 mask = readl(host->base + host->sdiimsk); - - /* preserve the SDIO IRQ mask state */ - mask &= S3C2410_SDIIMSK_SDIOIRQ; - writel(mask, host->base + host->sdiimsk); -} - -/** - * s3cmci_check_sdio_irq - test whether the SDIO IRQ is being signalled - * @host: The host to check. - * - * Test to see if the SDIO interrupt is being signalled in case the - * controller has failed to re-detect a card interrupt. Read GPE8 and - * see if it is low and if so, signal a SDIO interrupt. - * - * This is currently called if a request is finished (we assume that the - * bus is now idle) and when the SDIO IRQ is enabled in case the IRQ is - * already being indicated. -*/ -static void s3cmci_check_sdio_irq(struct s3cmci_host *host) -{ - if (host->sdio_irqen) { - if (host->pdata->bus[3] && - gpiod_get_value(host->pdata->bus[3]) == 0) { - pr_debug("%s: signalling irq\n", __func__); - mmc_signal_sdio_irq(host->mmc); - } - } -} - -static inline int get_data_buffer(struct s3cmci_host *host, - u32 *bytes, u32 **pointer) -{ - struct scatterlist *sg; - - if (host->pio_active == XFER_NONE) - return -EINVAL; - - if ((!host->mrq) || (!host->mrq->data)) - return -EINVAL; - - if (host->pio_sgptr >= host->mrq->data->sg_len) { - dbg(host, dbg_debug, "no more buffers (%i/%i)\n", - host->pio_sgptr, host->mrq->data->sg_len); - return -EBUSY; - } - sg = &host->mrq->data->sg[host->pio_sgptr]; - - *bytes = sg->length; - *pointer = sg_virt(sg); - - host->pio_sgptr++; - - dbg(host, dbg_sg, "new buffer (%i/%i)\n", - host->pio_sgptr, host->mrq->data->sg_len); - - return 0; -} - -static inline u32 fifo_count(struct s3cmci_host *host) -{ - u32 fifostat = readl(host->base + S3C2410_SDIFSTA); - - fifostat &= S3C2410_SDIFSTA_COUNTMASK; - return fifostat; -} - -static inline u32 fifo_free(struct s3cmci_host *host) -{ - u32 fifostat = readl(host->base + S3C2410_SDIFSTA); - - fifostat &= S3C2410_SDIFSTA_COUNTMASK; - return 63 - fifostat; -} - -/** - * s3cmci_enable_irq - enable IRQ, after having disabled it. - * @host: The device state. - * @more: True if more IRQs are expected from transfer. - * - * Enable the main IRQ if needed after it has been disabled. - * - * The IRQ can be one of the following states: - * - disabled during IDLE - * - disabled whilst processing data - * - enabled during transfer - * - enabled whilst awaiting SDIO interrupt detection - */ -static void s3cmci_enable_irq(struct s3cmci_host *host, bool more) -{ - unsigned long flags; - bool enable = false; - - local_irq_save(flags); - - host->irq_enabled = more; - host->irq_disabled = false; - - enable = more | host->sdio_irqen; - - if (host->irq_state != enable) { - host->irq_state = enable; - - if (enable) - enable_irq(host->irq); - else - disable_irq(host->irq); - } - - local_irq_restore(flags); -} - -static void s3cmci_disable_irq(struct s3cmci_host *host, bool transfer) -{ - unsigned long flags; - - local_irq_save(flags); - - /* pr_debug("%s: transfer %d\n", __func__, transfer); */ - - host->irq_disabled = transfer; - - if (transfer && host->irq_state) { - host->irq_state = false; - disable_irq(host->irq); - } - - local_irq_restore(flags); -} - -static void do_pio_read(struct s3cmci_host *host) -{ - int res; - u32 fifo; - u32 *ptr; - u32 fifo_words; - void __iomem *from_ptr; - - /* write real prescaler to host, it might be set slow to fix */ - writel(host->prescaler, host->base + S3C2410_SDIPRE); - - from_ptr = host->base + host->sdidata; - - while ((fifo = fifo_count(host))) { - if (!host->pio_bytes) { - res = get_data_buffer(host, &host->pio_bytes, - &host->pio_ptr); - if (res) { - host->pio_active = XFER_NONE; - host->complete_what = COMPLETION_FINALIZE; - - dbg(host, dbg_pio, "pio_read(): " - "complete (no more data).\n"); - return; - } - - dbg(host, dbg_pio, - "pio_read(): new target: [%i]@[%p]\n", - host->pio_bytes, host->pio_ptr); - } - - dbg(host, dbg_pio, - "pio_read(): fifo:[%02i] buffer:[%03i] dcnt:[%08X]\n", - fifo, host->pio_bytes, - readl(host->base + S3C2410_SDIDCNT)); - - /* If we have reached the end of the block, we can - * read a word and get 1 to 3 bytes. If we in the - * middle of the block, we have to read full words, - * otherwise we will write garbage, so round down to - * an even multiple of 4. */ - if (fifo >= host->pio_bytes) - fifo = host->pio_bytes; - else - fifo -= fifo & 3; - - host->pio_bytes -= fifo; - host->pio_count += fifo; - - fifo_words = fifo >> 2; - ptr = host->pio_ptr; - while (fifo_words--) - *ptr++ = readl(from_ptr); - host->pio_ptr = ptr; - - if (fifo & 3) { - u32 n = fifo & 3; - u32 data = readl(from_ptr); - u8 *p = (u8 *)host->pio_ptr; - - while (n--) { - *p++ = data; - data >>= 8; - } - } - } - - if (!host->pio_bytes) { - res = get_data_buffer(host, &host->pio_bytes, &host->pio_ptr); - if (res) { - dbg(host, dbg_pio, - "pio_read(): complete (no more buffers).\n"); - host->pio_active = XFER_NONE; - host->complete_what = COMPLETION_FINALIZE; - - return; - } - } - - enable_imask(host, - S3C2410_SDIIMSK_RXFIFOHALF | S3C2410_SDIIMSK_RXFIFOLAST); -} - -static void do_pio_write(struct s3cmci_host *host) -{ - void __iomem *to_ptr; - int res; - u32 fifo; - u32 *ptr; - - to_ptr = host->base + host->sdidata; - - while ((fifo = fifo_free(host)) > 3) { - if (!host->pio_bytes) { - res = get_data_buffer(host, &host->pio_bytes, - &host->pio_ptr); - if (res) { - dbg(host, dbg_pio, - "pio_write(): complete (no more data).\n"); - host->pio_active = XFER_NONE; - - return; - } - - dbg(host, dbg_pio, - "pio_write(): new source: [%i]@[%p]\n", - host->pio_bytes, host->pio_ptr); - - } - - /* If we have reached the end of the block, we have to - * write exactly the remaining number of bytes. If we - * in the middle of the block, we have to write full - * words, so round down to an even multiple of 4. */ - if (fifo >= host->pio_bytes) - fifo = host->pio_bytes; - else - fifo -= fifo & 3; - - host->pio_bytes -= fifo; - host->pio_count += fifo; - - fifo = (fifo + 3) >> 2; - ptr = host->pio_ptr; - while (fifo--) - writel(*ptr++, to_ptr); - host->pio_ptr = ptr; - } - - enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); -} - -static void pio_tasklet(struct tasklet_struct *t) -{ - struct s3cmci_host *host = from_tasklet(host, t, pio_tasklet); - - s3cmci_disable_irq(host, true); - - if (host->pio_active == XFER_WRITE) - do_pio_write(host); - - if (host->pio_active == XFER_READ) - do_pio_read(host); - - if (host->complete_what == COMPLETION_FINALIZE) { - clear_imask(host); - if (host->pio_active != XFER_NONE) { - dbg(host, dbg_err, "unfinished %s " - "- pio_count:[%u] pio_bytes:[%u]\n", - (host->pio_active == XFER_READ) ? "read" : "write", - host->pio_count, host->pio_bytes); - - if (host->mrq->data) - host->mrq->data->error = -EINVAL; - } - - s3cmci_enable_irq(host, false); - finalize_request(host); - } else - s3cmci_enable_irq(host, true); -} - -/* - * ISR for SDI Interface IRQ - * Communication between driver and ISR works as follows: - * host->mrq points to current request - * host->complete_what Indicates when the request is considered done - * COMPLETION_CMDSENT when the command was sent - * COMPLETION_RSPFIN when a response was received - * COMPLETION_XFERFINISH when the data transfer is finished - * COMPLETION_XFERFINISH_RSPFIN both of the above. - * host->complete_request is the completion-object the driver waits for - * - * 1) Driver sets up host->mrq and host->complete_what - * 2) Driver prepares the transfer - * 3) Driver enables interrupts - * 4) Driver starts transfer - * 5) Driver waits for host->complete_rquest - * 6) ISR checks for request status (errors and success) - * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error - * 7) ISR completes host->complete_request - * 8) ISR disables interrupts - * 9) Driver wakes up and takes care of the request - * - * Note: "->error"-fields are expected to be set to 0 before the request - * was issued by mmc.c - therefore they are only set, when an error - * contition comes up - */ - -static irqreturn_t s3cmci_irq(int irq, void *dev_id) -{ - struct s3cmci_host *host = dev_id; - struct mmc_command *cmd; - u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk; - u32 mci_cclear = 0, mci_dclear; - unsigned long iflags; - - mci_dsta = readl(host->base + S3C2410_SDIDSTA); - mci_imsk = readl(host->base + host->sdiimsk); - - if (mci_dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) { - if (mci_imsk & S3C2410_SDIIMSK_SDIOIRQ) { - mci_dclear = S3C2410_SDIDSTA_SDIOIRQDETECT; - writel(mci_dclear, host->base + S3C2410_SDIDSTA); - - mmc_signal_sdio_irq(host->mmc); - return IRQ_HANDLED; - } - } - - spin_lock_irqsave(&host->complete_lock, iflags); - - mci_csta = readl(host->base + S3C2410_SDICMDSTAT); - mci_dcnt = readl(host->base + S3C2410_SDIDCNT); - mci_fsta = readl(host->base + S3C2410_SDIFSTA); - mci_dclear = 0; - - if ((host->complete_what == COMPLETION_NONE) || - (host->complete_what == COMPLETION_FINALIZE)) { - host->status = "nothing to complete"; - clear_imask(host); - goto irq_out; - } - - if (!host->mrq) { - host->status = "no active mrq"; - clear_imask(host); - goto irq_out; - } - - cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd; - - if (!cmd) { - host->status = "no active cmd"; - clear_imask(host); - goto irq_out; - } - - if (!s3cmci_host_usedma(host)) { - if ((host->pio_active == XFER_WRITE) && - (mci_fsta & S3C2410_SDIFSTA_TFDET)) { - - disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); - tasklet_schedule(&host->pio_tasklet); - host->status = "pio tx"; - } - - if ((host->pio_active == XFER_READ) && - (mci_fsta & S3C2410_SDIFSTA_RFDET)) { - - disable_imask(host, - S3C2410_SDIIMSK_RXFIFOHALF | - S3C2410_SDIIMSK_RXFIFOLAST); - - tasklet_schedule(&host->pio_tasklet); - host->status = "pio rx"; - } - } - - if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) { - dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n"); - cmd->error = -ETIMEDOUT; - host->status = "error: command timeout"; - goto fail_transfer; - } - - if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) { - if (host->complete_what == COMPLETION_CMDSENT) { - host->status = "ok: command sent"; - goto close_transfer; - } - - mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT; - } - - if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) { - if (cmd->flags & MMC_RSP_CRC) { - if (host->mrq->cmd->flags & MMC_RSP_136) { - dbg(host, dbg_irq, - "fixup: ignore CRC fail with long rsp\n"); - } else { - /* note, we used to fail the transfer - * here, but it seems that this is just - * the hardware getting it wrong. - * - * cmd->error = -EILSEQ; - * host->status = "error: bad command crc"; - * goto fail_transfer; - */ - } - } - - mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL; - } - - if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) { - if (host->complete_what == COMPLETION_RSPFIN) { - host->status = "ok: command response received"; - goto close_transfer; - } - - if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) - host->complete_what = COMPLETION_XFERFINISH; - - mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN; - } - - /* errors handled after this point are only relevant - when a data transfer is in progress */ - - if (!cmd->data) - goto clear_status_bits; - - /* Check for FIFO failure */ - if (host->is2440) { - if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) { - dbg(host, dbg_err, "FIFO failure\n"); - host->mrq->data->error = -EILSEQ; - host->status = "error: 2440 fifo failure"; - goto fail_transfer; - } - } else { - if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) { - dbg(host, dbg_err, "FIFO failure\n"); - cmd->data->error = -EILSEQ; - host->status = "error: fifo failure"; - goto fail_transfer; - } - } - - if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) { - dbg(host, dbg_err, "bad data crc (outgoing)\n"); - cmd->data->error = -EILSEQ; - host->status = "error: bad data crc (outgoing)"; - goto fail_transfer; - } - - if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) { - dbg(host, dbg_err, "bad data crc (incoming)\n"); - cmd->data->error = -EILSEQ; - host->status = "error: bad data crc (incoming)"; - goto fail_transfer; - } - - if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) { - dbg(host, dbg_err, "data timeout\n"); - cmd->data->error = -ETIMEDOUT; - host->status = "error: data timeout"; - goto fail_transfer; - } - - if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) { - if (host->complete_what == COMPLETION_XFERFINISH) { - host->status = "ok: data transfer completed"; - goto close_transfer; - } - - if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN) - host->complete_what = COMPLETION_RSPFIN; - - mci_dclear |= S3C2410_SDIDSTA_XFERFINISH; - } - -clear_status_bits: - writel(mci_cclear, host->base + S3C2410_SDICMDSTAT); - writel(mci_dclear, host->base + S3C2410_SDIDSTA); - - goto irq_out; - -fail_transfer: - host->pio_active = XFER_NONE; - -close_transfer: - host->complete_what = COMPLETION_FINALIZE; - - clear_imask(host); - tasklet_schedule(&host->pio_tasklet); - - goto irq_out; - -irq_out: - dbg(host, dbg_irq, - "csta:0x%08x dsta:0x%08x fsta:0x%08x dcnt:0x%08x status:%s.\n", - mci_csta, mci_dsta, mci_fsta, mci_dcnt, host->status); - - spin_unlock_irqrestore(&host->complete_lock, iflags); - return IRQ_HANDLED; - -} - -static void s3cmci_dma_done_callback(void *arg) -{ - struct s3cmci_host *host = arg; - unsigned long iflags; - - BUG_ON(!host->mrq); - BUG_ON(!host->mrq->data); - - spin_lock_irqsave(&host->complete_lock, iflags); - - dbg(host, dbg_dma, "DMA FINISHED\n"); - - host->dma_complete = 1; - host->complete_what = COMPLETION_FINALIZE; - - tasklet_schedule(&host->pio_tasklet); - spin_unlock_irqrestore(&host->complete_lock, iflags); - -} - -static void finalize_request(struct s3cmci_host *host) -{ - struct mmc_request *mrq = host->mrq; - struct mmc_command *cmd; - int debug_as_failure = 0; - - if (host->complete_what != COMPLETION_FINALIZE) - return; - - if (!mrq) - return; - cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd; - - if (cmd->data && (cmd->error == 0) && - (cmd->data->error == 0)) { - if (s3cmci_host_usedma(host) && (!host->dma_complete)) { - dbg(host, dbg_dma, "DMA Missing (%d)!\n", - host->dma_complete); - return; - } - } - - /* Read response from controller. */ - cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0); - cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1); - cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2); - cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3); - - writel(host->prescaler, host->base + S3C2410_SDIPRE); - - if (cmd->error) - debug_as_failure = 1; - - if (cmd->data && cmd->data->error) - debug_as_failure = 1; - - dbg_dumpcmd(host, cmd, debug_as_failure); - - /* Cleanup controller */ - writel(0, host->base + S3C2410_SDICMDARG); - writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON); - writel(0, host->base + S3C2410_SDICMDCON); - clear_imask(host); - - if (cmd->data && cmd->error) - cmd->data->error = cmd->error; - - if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) { - host->cmd_is_stop = 1; - s3cmci_send_request(host->mmc); - return; - } - - /* If we have no data transfer we are finished here */ - if (!mrq->data) - goto request_done; - - /* Calculate the amout of bytes transfer if there was no error */ - if (mrq->data->error == 0) { - mrq->data->bytes_xfered = - (mrq->data->blocks * mrq->data->blksz); - } else { - mrq->data->bytes_xfered = 0; - } - - /* If we had an error while transferring data we flush the - * DMA channel and the fifo to clear out any garbage. */ - if (mrq->data->error != 0) { - if (s3cmci_host_usedma(host)) - dmaengine_terminate_all(host->dma); - - if (host->is2440) { - /* Clear failure register and reset fifo. */ - writel(S3C2440_SDIFSTA_FIFORESET | - S3C2440_SDIFSTA_FIFOFAIL, - host->base + S3C2410_SDIFSTA); - } else { - u32 mci_con; - - /* reset fifo */ - mci_con = readl(host->base + S3C2410_SDICON); - mci_con |= S3C2410_SDICON_FIFORESET; - - writel(mci_con, host->base + S3C2410_SDICON); - } - } - -request_done: - host->complete_what = COMPLETION_NONE; - host->mrq = NULL; - - s3cmci_check_sdio_irq(host); - mmc_request_done(host->mmc, mrq); -} - -static void s3cmci_send_command(struct s3cmci_host *host, - struct mmc_command *cmd) -{ - u32 ccon, imsk; - - imsk = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT | - S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT | - S3C2410_SDIIMSK_RESPONSECRC; - - enable_imask(host, imsk); - - if (cmd->data) - host->complete_what = COMPLETION_XFERFINISH_RSPFIN; - else if (cmd->flags & MMC_RSP_PRESENT) - host->complete_what = COMPLETION_RSPFIN; - else - host->complete_what = COMPLETION_CMDSENT; - - writel(cmd->arg, host->base + S3C2410_SDICMDARG); - - ccon = cmd->opcode & S3C2410_SDICMDCON_INDEX; - ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART; - - if (cmd->flags & MMC_RSP_PRESENT) - ccon |= S3C2410_SDICMDCON_WAITRSP; - - if (cmd->flags & MMC_RSP_136) - ccon |= S3C2410_SDICMDCON_LONGRSP; - - writel(ccon, host->base + S3C2410_SDICMDCON); -} - -static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data) -{ - u32 dcon, imsk, stoptries = 3; - - if ((data->blksz & 3) != 0) { - /* We cannot deal with unaligned blocks with more than - * one block being transferred. */ - - if (data->blocks > 1) { - pr_warn("%s: can't do non-word sized block transfers (blksz %d)\n", - __func__, data->blksz); - return -EINVAL; - } - } - - while (readl(host->base + S3C2410_SDIDSTA) & - (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) { - - dbg(host, dbg_err, - "mci_setup_data() transfer stillin progress.\n"); - - writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON); - s3cmci_reset(host); - - if ((stoptries--) == 0) { - dbg_dumpregs(host, "DRF"); - return -EINVAL; - } - } - - dcon = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK; - - if (s3cmci_host_usedma(host)) - dcon |= S3C2410_SDIDCON_DMAEN; - - if (host->bus_width == MMC_BUS_WIDTH_4) - dcon |= S3C2410_SDIDCON_WIDEBUS; - - dcon |= S3C2410_SDIDCON_BLOCKMODE; - - if (data->flags & MMC_DATA_WRITE) { - dcon |= S3C2410_SDIDCON_TXAFTERRESP; - dcon |= S3C2410_SDIDCON_XFER_TXSTART; - } - - if (data->flags & MMC_DATA_READ) { - dcon |= S3C2410_SDIDCON_RXAFTERCMD; - dcon |= S3C2410_SDIDCON_XFER_RXSTART; - } - - if (host->is2440) { - dcon |= S3C2440_SDIDCON_DS_WORD; - dcon |= S3C2440_SDIDCON_DATSTART; - } - - writel(dcon, host->base + S3C2410_SDIDCON); - - /* write BSIZE register */ - - writel(data->blksz, host->base + S3C2410_SDIBSIZE); - - /* add to IMASK register */ - imsk = S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC | - S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH; - - enable_imask(host, imsk); - - /* write TIMER register */ - - if (host->is2440) { - writel(0x007FFFFF, host->base + S3C2410_SDITIMER); - } else { - writel(0x0000FFFF, host->base + S3C2410_SDITIMER); - - /* FIX: set slow clock to prevent timeouts on read */ - if (data->flags & MMC_DATA_READ) - writel(0xFF, host->base + S3C2410_SDIPRE); - } - - return 0; -} - -#define BOTH_DIR (MMC_DATA_WRITE | MMC_DATA_READ) - -static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data) -{ - int rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0; - - BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR); - - host->pio_sgptr = 0; - host->pio_bytes = 0; - host->pio_count = 0; - host->pio_active = rw ? XFER_WRITE : XFER_READ; - - if (rw) { - do_pio_write(host); - enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF); - } else { - enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF - | S3C2410_SDIIMSK_RXFIFOLAST); - } - - return 0; -} - -static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data) -{ - int rw = data->flags & MMC_DATA_WRITE; - struct dma_async_tx_descriptor *desc; - struct dma_slave_config conf = { - .src_addr = host->mem->start + host->sdidata, - .dst_addr = host->mem->start + host->sdidata, - .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, - .dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, - }; - - BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR); - - /* Restore prescaler value */ - writel(host->prescaler, host->base + S3C2410_SDIPRE); - - if (!rw) - conf.direction = DMA_DEV_TO_MEM; - else - conf.direction = DMA_MEM_TO_DEV; - - dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, - mmc_get_dma_dir(data)); - - dmaengine_slave_config(host->dma, &conf); - desc = dmaengine_prep_slave_sg(host->dma, data->sg, data->sg_len, - conf.direction, - DMA_CTRL_ACK | DMA_PREP_INTERRUPT); - if (!desc) - goto unmap_exit; - desc->callback = s3cmci_dma_done_callback; - desc->callback_param = host; - dmaengine_submit(desc); - dma_async_issue_pending(host->dma); - - return 0; - -unmap_exit: - dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, - mmc_get_dma_dir(data)); - return -ENOMEM; -} - -static void s3cmci_send_request(struct mmc_host *mmc) -{ - struct s3cmci_host *host = mmc_priv(mmc); - struct mmc_request *mrq = host->mrq; - struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd; - - host->ccnt++; - prepare_dbgmsg(host, cmd, host->cmd_is_stop); - - /* Clear command, data and fifo status registers - Fifo clear only necessary on 2440, but doesn't hurt on 2410 - */ - writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT); - writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA); - writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA); - - if (cmd->data) { - int res = s3cmci_setup_data(host, cmd->data); - - host->dcnt++; - - if (res) { - dbg(host, dbg_err, "setup data error %d\n", res); - cmd->error = res; - cmd->data->error = res; - - mmc_request_done(mmc, mrq); - return; - } - - if (s3cmci_host_usedma(host)) - res = s3cmci_prepare_dma(host, cmd->data); - else - res = s3cmci_prepare_pio(host, cmd->data); - - if (res) { - dbg(host, dbg_err, "data prepare error %d\n", res); - cmd->error = res; - cmd->data->error = res; - - mmc_request_done(mmc, mrq); - return; - } - } - - /* Send command */ - s3cmci_send_command(host, cmd); - - /* Enable Interrupt */ - s3cmci_enable_irq(host, true); -} - -static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq) -{ - struct s3cmci_host *host = mmc_priv(mmc); - - host->status = "mmc request"; - host->cmd_is_stop = 0; - host->mrq = mrq; - - if (mmc_gpio_get_cd(mmc) == 0) { - dbg(host, dbg_err, "%s: no medium present\n", __func__); - host->mrq->cmd->error = -ENOMEDIUM; - mmc_request_done(mmc, mrq); - } else - s3cmci_send_request(mmc); -} - -static void s3cmci_set_clk(struct s3cmci_host *host, struct mmc_ios *ios) -{ - u32 mci_psc; - - /* Set clock */ - for (mci_psc = 0; mci_psc < 255; mci_psc++) { - host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1)); - - if (host->real_rate <= ios->clock) - break; - } - - if (mci_psc > 255) - mci_psc = 255; - - host->prescaler = mci_psc; - writel(host->prescaler, host->base + S3C2410_SDIPRE); - - /* If requested clock is 0, real_rate will be 0, too */ - if (ios->clock == 0) - host->real_rate = 0; -} - -static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -{ - struct s3cmci_host *host = mmc_priv(mmc); - u32 mci_con; - - /* Set the power state */ - - mci_con = readl(host->base + S3C2410_SDICON); - - switch (ios->power_mode) { - case MMC_POWER_ON: - case MMC_POWER_UP: - if (!host->is2440) - mci_con |= S3C2410_SDICON_FIFORESET; - break; - - case MMC_POWER_OFF: - default: - if (host->is2440) - mci_con |= S3C2440_SDICON_SDRESET; - break; - } - - if (host->pdata->set_power) - host->pdata->set_power(ios->power_mode, ios->vdd); - - s3cmci_set_clk(host, ios); - - /* Set CLOCK_ENABLE */ - if (ios->clock) - mci_con |= S3C2410_SDICON_CLOCKTYPE; - else - mci_con &= ~S3C2410_SDICON_CLOCKTYPE; - - writel(mci_con, host->base + S3C2410_SDICON); - - if ((ios->power_mode == MMC_POWER_ON) || - (ios->power_mode == MMC_POWER_UP)) { - dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n", - host->real_rate/1000, ios->clock/1000); - } else { - dbg(host, dbg_conf, "powered down.\n"); - } - - host->bus_width = ios->bus_width; -} - -static void s3cmci_reset(struct s3cmci_host *host) -{ - u32 con = readl(host->base + S3C2410_SDICON); - - con |= S3C2440_SDICON_SDRESET; - writel(con, host->base + S3C2410_SDICON); -} - -static void s3cmci_enable_sdio_irq(struct mmc_host *mmc, int enable) -{ - struct s3cmci_host *host = mmc_priv(mmc); - unsigned long flags; - u32 con; - - local_irq_save(flags); - - con = readl(host->base + S3C2410_SDICON); - host->sdio_irqen = enable; - - if (enable == host->sdio_irqen) - goto same_state; - - if (enable) { - con |= S3C2410_SDICON_SDIOIRQ; - enable_imask(host, S3C2410_SDIIMSK_SDIOIRQ); - - if (!host->irq_state && !host->irq_disabled) { - host->irq_state = true; - enable_irq(host->irq); - } - } else { - disable_imask(host, S3C2410_SDIIMSK_SDIOIRQ); - con &= ~S3C2410_SDICON_SDIOIRQ; - - if (!host->irq_enabled && host->irq_state) { - disable_irq_nosync(host->irq); - host->irq_state = false; - } - } - - writel(con, host->base + S3C2410_SDICON); - - same_state: - local_irq_restore(flags); - - s3cmci_check_sdio_irq(host); -} - -static const struct mmc_host_ops s3cmci_ops = { - .request = s3cmci_request, - .set_ios = s3cmci_set_ios, - .get_ro = mmc_gpio_get_ro, - .get_cd = mmc_gpio_get_cd, - .enable_sdio_irq = s3cmci_enable_sdio_irq, -}; - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - -static int s3cmci_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct s3cmci_host *host; - struct mmc_host *mmc; - unsigned long newclk; - unsigned long flags; - - host = container_of(nb, struct s3cmci_host, freq_transition); - newclk = clk_get_rate(host->clk); - mmc = host->mmc; - - if ((val == CPUFREQ_PRECHANGE && newclk > host->clk_rate) || - (val == CPUFREQ_POSTCHANGE && newclk < host->clk_rate)) { - spin_lock_irqsave(&mmc->lock, flags); - - host->clk_rate = newclk; - - if (mmc->ios.power_mode != MMC_POWER_OFF && - mmc->ios.clock != 0) - s3cmci_set_clk(host, &mmc->ios); - - spin_unlock_irqrestore(&mmc->lock, flags); - } - - return 0; -} - -static inline int s3cmci_cpufreq_register(struct s3cmci_host *host) -{ - host->freq_transition.notifier_call = s3cmci_cpufreq_transition; - - return cpufreq_register_notifier(&host->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void s3cmci_cpufreq_deregister(struct s3cmci_host *host) -{ - cpufreq_unregister_notifier(&host->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -static inline int s3cmci_cpufreq_register(struct s3cmci_host *host) -{ - return 0; -} - -static inline void s3cmci_cpufreq_deregister(struct s3cmci_host *host) -{ -} -#endif - - -#ifdef CONFIG_DEBUG_FS - -static int s3cmci_state_show(struct seq_file *seq, void *v) -{ - struct s3cmci_host *host = seq->private; - - seq_printf(seq, "Register base = 0x%p\n", host->base); - seq_printf(seq, "Clock rate = %ld\n", host->clk_rate); - seq_printf(seq, "Prescale = %d\n", host->prescaler); - seq_printf(seq, "is2440 = %d\n", host->is2440); - seq_printf(seq, "IRQ = %d\n", host->irq); - seq_printf(seq, "IRQ enabled = %d\n", host->irq_enabled); - seq_printf(seq, "IRQ disabled = %d\n", host->irq_disabled); - seq_printf(seq, "IRQ state = %d\n", host->irq_state); - seq_printf(seq, "CD IRQ = %d\n", host->irq_cd); - seq_printf(seq, "Do DMA = %d\n", s3cmci_host_usedma(host)); - seq_printf(seq, "SDIIMSK at %d\n", host->sdiimsk); - seq_printf(seq, "SDIDATA at %d\n", host->sdidata); - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(s3cmci_state); - -#define DBG_REG(_r) { .addr = S3C2410_SDI##_r, .name = #_r } - -struct s3cmci_reg { - unsigned short addr; - unsigned char *name; -}; - -static const struct s3cmci_reg debug_regs[] = { - DBG_REG(CON), - DBG_REG(PRE), - DBG_REG(CMDARG), - DBG_REG(CMDCON), - DBG_REG(CMDSTAT), - DBG_REG(RSP0), - DBG_REG(RSP1), - DBG_REG(RSP2), - DBG_REG(RSP3), - DBG_REG(TIMER), - DBG_REG(BSIZE), - DBG_REG(DCON), - DBG_REG(DCNT), - DBG_REG(DSTA), - DBG_REG(FSTA), - {} -}; - -static int s3cmci_regs_show(struct seq_file *seq, void *v) -{ - struct s3cmci_host *host = seq->private; - const struct s3cmci_reg *rptr = debug_regs; - - for (; rptr->name; rptr++) - seq_printf(seq, "SDI%s\t=0x%08x\n", rptr->name, - readl(host->base + rptr->addr)); - - seq_printf(seq, "SDIIMSK\t=0x%08x\n", readl(host->base + host->sdiimsk)); - - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(s3cmci_regs); - -static void s3cmci_debugfs_attach(struct s3cmci_host *host) -{ - struct device *dev = &host->pdev->dev; - struct dentry *root; - - root = debugfs_create_dir(dev_name(dev), NULL); - host->debug_root = root; - - debugfs_create_file("state", 0444, root, host, &s3cmci_state_fops); - debugfs_create_file("regs", 0444, root, host, &s3cmci_regs_fops); -} - -static void s3cmci_debugfs_remove(struct s3cmci_host *host) -{ - debugfs_remove_recursive(host->debug_root); -} - -#else -static inline void s3cmci_debugfs_attach(struct s3cmci_host *host) { } -static inline void s3cmci_debugfs_remove(struct s3cmci_host *host) { } - -#endif /* CONFIG_DEBUG_FS */ - -static int s3cmci_probe_pdata(struct s3cmci_host *host) -{ - struct platform_device *pdev = host->pdev; - struct mmc_host *mmc = host->mmc; - struct s3c24xx_mci_pdata *pdata; - int i, ret; - - host->is2440 = platform_get_device_id(pdev)->driver_data; - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "need platform data"); - return -ENXIO; - } - - for (i = 0; i < 6; i++) { - pdata->bus[i] = devm_gpiod_get_index(&pdev->dev, "bus", i, - GPIOD_OUT_LOW); - if (IS_ERR(pdata->bus[i])) { - dev_err(&pdev->dev, "failed to get gpio %d\n", i); - return PTR_ERR(pdata->bus[i]); - } - } - - if (pdata->no_wprotect) - mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; - - if (pdata->no_detect) - mmc->caps |= MMC_CAP_NEEDS_POLL; - - if (pdata->wprotect_invert) - mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; - - /* If we get -ENOENT we have no card detect GPIO line */ - ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); - if (ret != -ENOENT) { - dev_err(&pdev->dev, "error requesting GPIO for CD %d\n", - ret); - return ret; - } - - ret = mmc_gpiod_request_ro(host->mmc, "wp", 0, 0); - if (ret != -ENOENT) { - dev_err(&pdev->dev, "error requesting GPIO for WP %d\n", - ret); - return ret; - } - - return 0; -} - -static int s3cmci_probe_dt(struct s3cmci_host *host) -{ - struct platform_device *pdev = host->pdev; - struct s3c24xx_mci_pdata *pdata; - struct mmc_host *mmc = host->mmc; - int ret; - - host->is2440 = (long) of_device_get_match_data(&pdev->dev); - - ret = mmc_of_parse(mmc); - if (ret) - return ret; - - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) - return -ENOMEM; - - pdev->dev.platform_data = pdata; - - return 0; -} - -static int s3cmci_probe(struct platform_device *pdev) -{ - struct s3cmci_host *host; - struct mmc_host *mmc; - int ret; - - mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev); - if (!mmc) { - ret = -ENOMEM; - goto probe_out; - } - - host = mmc_priv(mmc); - host->mmc = mmc; - host->pdev = pdev; - - if (pdev->dev.of_node) - ret = s3cmci_probe_dt(host); - else - ret = s3cmci_probe_pdata(host); - - if (ret) - goto probe_free_host; - - host->pdata = pdev->dev.platform_data; - - spin_lock_init(&host->complete_lock); - tasklet_setup(&host->pio_tasklet, pio_tasklet); - - if (host->is2440) { - host->sdiimsk = S3C2440_SDIIMSK; - host->sdidata = S3C2440_SDIDATA; - host->clk_div = 1; - } else { - host->sdiimsk = S3C2410_SDIIMSK; - host->sdidata = S3C2410_SDIDATA; - host->clk_div = 2; - } - - host->complete_what = COMPLETION_NONE; - host->pio_active = XFER_NONE; - - host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!host->mem) { - dev_err(&pdev->dev, - "failed to get io memory region resource.\n"); - - ret = -ENOENT; - goto probe_free_host; - } - - host->mem = request_mem_region(host->mem->start, - resource_size(host->mem), pdev->name); - - if (!host->mem) { - dev_err(&pdev->dev, "failed to request io memory region.\n"); - ret = -ENOENT; - goto probe_free_host; - } - - host->base = ioremap(host->mem->start, resource_size(host->mem)); - if (!host->base) { - dev_err(&pdev->dev, "failed to ioremap() io memory region.\n"); - ret = -EINVAL; - goto probe_free_mem_region; - } - - host->irq = platform_get_irq(pdev, 0); - if (host->irq <= 0) { - ret = -EINVAL; - goto probe_iounmap; - } - - if (request_irq(host->irq, s3cmci_irq, IRQF_NO_AUTOEN, DRIVER_NAME, host)) { - dev_err(&pdev->dev, "failed to request mci interrupt.\n"); - ret = -ENOENT; - goto probe_iounmap; - } - - host->irq_state = false; - - /* Depending on the dma state, get a DMA channel to use. */ - - if (s3cmci_host_usedma(host)) { - host->dma = dma_request_chan(&pdev->dev, "rx-tx"); - ret = PTR_ERR_OR_ZERO(host->dma); - if (ret) { - dev_err(&pdev->dev, "cannot get DMA channel.\n"); - goto probe_free_irq; - } - } - - host->clk = clk_get(&pdev->dev, "sdi"); - if (IS_ERR(host->clk)) { - dev_err(&pdev->dev, "failed to find clock source.\n"); - ret = PTR_ERR(host->clk); - host->clk = NULL; - goto probe_free_dma; - } - - ret = clk_prepare_enable(host->clk); - if (ret) { - dev_err(&pdev->dev, "failed to enable clock source.\n"); - goto clk_free; - } - - host->clk_rate = clk_get_rate(host->clk); - - mmc->ops = &s3cmci_ops; - mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -#ifdef CONFIG_MMC_S3C_HW_SDIO_IRQ - mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; -#else - mmc->caps = MMC_CAP_4_BIT_DATA; -#endif - mmc->f_min = host->clk_rate / (host->clk_div * 256); - mmc->f_max = host->clk_rate / host->clk_div; - - if (host->pdata->ocr_avail) - mmc->ocr_avail = host->pdata->ocr_avail; - - mmc->max_blk_count = 4095; - mmc->max_blk_size = 4095; - mmc->max_req_size = 4095 * 512; - mmc->max_seg_size = mmc->max_req_size; - - mmc->max_segs = 128; - - dbg(host, dbg_debug, - "probe: mode:%s mapped mci_base:%p irq:%u irq_cd:%u dma:%p.\n", - (host->is2440?"2440":""), - host->base, host->irq, host->irq_cd, host->dma); - - ret = s3cmci_cpufreq_register(host); - if (ret) { - dev_err(&pdev->dev, "failed to register cpufreq\n"); - goto free_dmabuf; - } - - ret = mmc_add_host(mmc); - if (ret) { - dev_err(&pdev->dev, "failed to add mmc host.\n"); - goto free_cpufreq; - } - - s3cmci_debugfs_attach(host); - - platform_set_drvdata(pdev, mmc); - dev_info(&pdev->dev, "%s - using %s, %s SDIO IRQ\n", mmc_hostname(mmc), - s3cmci_host_usedma(host) ? "dma" : "pio", - mmc->caps & MMC_CAP_SDIO_IRQ ? "hw" : "sw"); - - return 0; - - free_cpufreq: - s3cmci_cpufreq_deregister(host); - - free_dmabuf: - clk_disable_unprepare(host->clk); - - clk_free: - clk_put(host->clk); - - probe_free_dma: - if (s3cmci_host_usedma(host)) - dma_release_channel(host->dma); - - probe_free_irq: - free_irq(host->irq, host); - - probe_iounmap: - iounmap(host->base); - - probe_free_mem_region: - release_mem_region(host->mem->start, resource_size(host->mem)); - - probe_free_host: - mmc_free_host(mmc); - - probe_out: - return ret; -} - -static void s3cmci_shutdown(struct platform_device *pdev) -{ - struct mmc_host *mmc = platform_get_drvdata(pdev); - struct s3cmci_host *host = mmc_priv(mmc); - - if (host->irq_cd >= 0) - free_irq(host->irq_cd, host); - - s3cmci_debugfs_remove(host); - s3cmci_cpufreq_deregister(host); - mmc_remove_host(mmc); - clk_disable_unprepare(host->clk); -} - -static int s3cmci_remove(struct platform_device *pdev) -{ - struct mmc_host *mmc = platform_get_drvdata(pdev); - struct s3cmci_host *host = mmc_priv(mmc); - - s3cmci_shutdown(pdev); - - clk_put(host->clk); - - tasklet_disable(&host->pio_tasklet); - - if (s3cmci_host_usedma(host)) - dma_release_channel(host->dma); - - free_irq(host->irq, host); - - iounmap(host->base); - release_mem_region(host->mem->start, resource_size(host->mem)); - - mmc_free_host(mmc); - return 0; -} - -static const struct of_device_id s3cmci_dt_match[] = { - { - .compatible = "samsung,s3c2410-sdi", - .data = (void *)0, - }, - { - .compatible = "samsung,s3c2412-sdi", - .data = (void *)1, - }, - { - .compatible = "samsung,s3c2440-sdi", - .data = (void *)1, - }, - { /* sentinel */ }, -}; -MODULE_DEVICE_TABLE(of, s3cmci_dt_match); - -static const struct platform_device_id s3cmci_driver_ids[] = { - { - .name = "s3c2410-sdi", - .driver_data = 0, - }, { - .name = "s3c2412-sdi", - .driver_data = 1, - }, { - .name = "s3c2440-sdi", - .driver_data = 1, - }, - { } -}; - -MODULE_DEVICE_TABLE(platform, s3cmci_driver_ids); - -static struct platform_driver s3cmci_driver = { - .driver = { - .name = "s3c-sdi", - .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = s3cmci_dt_match, - }, - .id_table = s3cmci_driver_ids, - .probe = s3cmci_probe, - .remove = s3cmci_remove, - .shutdown = s3cmci_shutdown, -}; - -module_platform_driver(s3cmci_driver); - -MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver"); -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>, Ben Dooks <ben-linux@fluff.org>"); diff --git a/drivers/mmc/host/s3cmci.h b/drivers/mmc/host/s3cmci.h deleted file mode 100644 index 8b65d7ad9f97..000000000000 --- a/drivers/mmc/host/s3cmci.h +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver - * - * Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved. - */ - -enum s3cmci_waitfor { - COMPLETION_NONE, - COMPLETION_FINALIZE, - COMPLETION_CMDSENT, - COMPLETION_RSPFIN, - COMPLETION_XFERFINISH, - COMPLETION_XFERFINISH_RSPFIN, -}; - -struct s3cmci_host { - struct platform_device *pdev; - struct s3c24xx_mci_pdata *pdata; - struct mmc_host *mmc; - struct resource *mem; - struct clk *clk; - void __iomem *base; - int irq; - int irq_cd; - struct dma_chan *dma; - - unsigned long clk_rate; - unsigned long clk_div; - unsigned long real_rate; - u8 prescaler; - - int is2440; - unsigned sdiimsk; - unsigned sdidata; - - bool irq_disabled; - bool irq_enabled; - bool irq_state; - int sdio_irqen; - - struct mmc_request *mrq; - int cmd_is_stop; - - spinlock_t complete_lock; - enum s3cmci_waitfor complete_what; - - int dma_complete; - - u32 pio_sgptr; - u32 pio_bytes; - u32 pio_count; - u32 *pio_ptr; -#define XFER_NONE 0 -#define XFER_READ 1 -#define XFER_WRITE 2 - u32 pio_active; - - int bus_width; - - char dbgmsg_cmd[301]; - char dbgmsg_dat[301]; - char *status; - - unsigned int ccnt, dcnt; - struct tasklet_struct pio_tasklet; - -#ifdef CONFIG_DEBUG_FS - struct dentry *debug_root; -#endif - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - struct notifier_block freq_transition; -#endif -}; diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c deleted file mode 100644 index 2a29c7a4f308..000000000000 --- a/drivers/mmc/host/sdhci-cns3xxx.c +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * SDHCI support for CNS3xxx SoC - * - * Copyright 2008 Cavium Networks - * Copyright 2010 MontaVista Software, LLC. - * - * Authors: Scott Shu - * Anton Vorontsov <avorontsov@mvista.com> - */ - -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/mmc/host.h> -#include <linux/module.h> -#include "sdhci-pltfm.h" - -static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host) -{ - return 150000000; -} - -static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock) -{ - struct device *dev = mmc_dev(host->mmc); - int div = 1; - u16 clk; - unsigned long timeout; - - host->mmc->actual_clock = 0; - - sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); - - if (clock == 0) - return; - - while (host->max_clk / div > clock) { - /* - * On CNS3xxx divider grows linearly up to 4, and then - * exponentially up to 256. - */ - if (div < 4) - div += 1; - else if (div < 256) - div *= 2; - else - break; - } - - dev_dbg(dev, "desired SD clock: %d, actual: %d\n", - clock, host->max_clk / div); - - /* Divide by 3 is special. */ - if (div != 3) - div >>= 1; - - clk = div << SDHCI_DIVIDER_SHIFT; - clk |= SDHCI_CLOCK_INT_EN; - sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); - - timeout = 20; - while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) - & SDHCI_CLOCK_INT_STABLE)) { - if (timeout == 0) { - dev_warn(dev, "clock is unstable"); - break; - } - timeout--; - mdelay(1); - } - - clk |= SDHCI_CLOCK_CARD_EN; - sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); -} - -static const struct sdhci_ops sdhci_cns3xxx_ops = { - .get_max_clock = sdhci_cns3xxx_get_max_clk, - .set_clock = sdhci_cns3xxx_set_clock, - .set_bus_width = sdhci_set_bus_width, - .reset = sdhci_reset, - .set_uhs_signaling = sdhci_set_uhs_signaling, -}; - -static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = { - .ops = &sdhci_cns3xxx_ops, - .quirks = SDHCI_QUIRK_BROKEN_DMA | - SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | - SDHCI_QUIRK_INVERTED_WRITE_PROTECT | - SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | - SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, -}; - -static int sdhci_cns3xxx_probe(struct platform_device *pdev) -{ - return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata, 0); -} - -static struct platform_driver sdhci_cns3xxx_driver = { - .driver = { - .name = "sdhci-cns3xxx", - .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .pm = &sdhci_pltfm_pmops, - }, - .probe = sdhci_cns3xxx_probe, - .remove = sdhci_pltfm_unregister, -}; - -module_platform_driver(sdhci_cns3xxx_driver); - -MODULE_DESCRIPTION("SDHCI driver for CNS3xxx"); -MODULE_AUTHOR("Scott Shu, " - "Anton Vorontsov <avorontsov@mvista.com>"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c deleted file mode 100644 index 53a2ad9a24b8..000000000000 --- a/drivers/mmc/host/tmio_mmc.c +++ /dev/null @@ -1,227 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Driver for the MMC / SD / SDIO cell found in: - * - * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 - * - * Copyright (C) 2017 Renesas Electronics Corporation - * Copyright (C) 2017 Horms Solutions, Simon Horman - * Copyright (C) 2007 Ian Molton - * Copyright (C) 2004 Ian Molton - */ - -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/mmc/host.h> -#include <linux/module.h> -#include <linux/pagemap.h> -#include <linux/scatterlist.h> - -#include "tmio_mmc.h" - -/* Registers specific to this variant */ -#define CTL_SDIO_REGS 0x100 -#define CTL_CLK_AND_WAIT_CTL 0x138 -#define CTL_RESET_SDIO 0x1e0 - -static void tmio_mmc_clk_start(struct tmio_mmc_host *host) -{ - sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | - sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); - - usleep_range(10000, 11000); - sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); - usleep_range(10000, 11000); -} - -static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) -{ - sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); - usleep_range(10000, 11000); - - sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & - sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); - - usleep_range(10000, 11000); -} - -static void tmio_mmc_set_clock(struct tmio_mmc_host *host, - unsigned int new_clock) -{ - unsigned int divisor; - u32 clk = 0; - int clk_sel; - - if (new_clock == 0) { - tmio_mmc_clk_stop(host); - return; - } - - divisor = host->pdata->hclk / new_clock; - - /* bit7 set: 1/512, ... bit0 set: 1/4, all bits clear: 1/2 */ - clk_sel = (divisor <= 1); - clk = clk_sel ? 0 : (roundup_pow_of_two(divisor) >> 2); - - host->pdata->set_clk_div(host->pdev, clk_sel); - - sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & - sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); - sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK); - usleep_range(10000, 11000); - - tmio_mmc_clk_start(host); -} - -static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve) -{ - sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); - usleep_range(10000, 11000); - sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); - usleep_range(10000, 11000); -} - -#ifdef CONFIG_PM_SLEEP -static int tmio_mmc_suspend(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - const struct mfd_cell *cell = mfd_get_cell(pdev); - int ret; - - ret = pm_runtime_force_suspend(dev); - - /* Tell MFD core it can disable us now.*/ - if (!ret && cell->disable) - cell->disable(pdev); - - return ret; -} - -static int tmio_mmc_resume(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - const struct mfd_cell *cell = mfd_get_cell(pdev); - int ret = 0; - - /* Tell the MFD core we are ready to be enabled */ - if (cell->resume) - ret = cell->resume(pdev); - - if (!ret) - ret = pm_runtime_force_resume(dev); - - return ret; -} -#endif - -static int tmio_mmc_probe(struct platform_device *pdev) -{ - const struct mfd_cell *cell = mfd_get_cell(pdev); - struct tmio_mmc_data *pdata; - struct tmio_mmc_host *host; - struct resource *res; - int ret = -EINVAL, irq; - - if (pdev->num_resources != 2) - goto out; - - pdata = pdev->dev.platform_data; - if (!pdata || !pdata->hclk) - goto out; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - ret = irq; - goto out; - } - - /* Tell the MFD core we are ready to be enabled */ - if (cell->enable) { - ret = cell->enable(pdev); - if (ret) - goto out; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - ret = -EINVAL; - goto cell_disable; - } - - host = tmio_mmc_host_alloc(pdev, pdata); - if (IS_ERR(host)) { - ret = PTR_ERR(host); - goto cell_disable; - } - - /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ - host->bus_shift = resource_size(res) >> 10; - host->set_clock = tmio_mmc_set_clock; - host->reset = tmio_mmc_reset; - - host->mmc->f_max = pdata->hclk; - host->mmc->f_min = pdata->hclk / 512; - - ret = tmio_mmc_host_probe(host); - if (ret) - goto host_free; - - ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, - IRQF_TRIGGER_FALLING, - dev_name(&pdev->dev), host); - if (ret) - goto host_remove; - - pr_info("%s at 0x%p irq %d\n", mmc_hostname(host->mmc), host->ctl, irq); - - return 0; - -host_remove: - tmio_mmc_host_remove(host); -host_free: - tmio_mmc_host_free(host); -cell_disable: - if (cell->disable) - cell->disable(pdev); -out: - return ret; -} - -static int tmio_mmc_remove(struct platform_device *pdev) -{ - const struct mfd_cell *cell = mfd_get_cell(pdev); - struct tmio_mmc_host *host = platform_get_drvdata(pdev); - - tmio_mmc_host_remove(host); - if (cell->disable) - cell->disable(pdev); - - return 0; -} - -/* ------------------- device registration ----------------------- */ - -static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume) - SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, - tmio_mmc_host_runtime_resume, NULL) -}; - -static struct platform_driver tmio_mmc_driver = { - .driver = { - .name = "tmio-mmc", - .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .pm = &tmio_mmc_dev_pm_ops, - }, - .probe = tmio_mmc_probe, - .remove = tmio_mmc_remove, -}; - -module_platform_driver(tmio_mmc_driver); - -MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver"); -MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:tmio-mmc"); diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 98ea1c9e65c8..048b1c8f08ee 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -79,7 +79,7 @@ config MTD_NAND_NDFC config MTD_NAND_S3C2410 tristate "Samsung S3C NAND controller" - depends on ARCH_S3C24XX || ARCH_S3C64XX + depends on ARCH_S3C64XX help This enables the NAND flash controller on the S3C24xx and S3C64xx SoCs diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drivers/mtd/nand/raw/s3c2410.c index f0a4535c812a..80d96f94d6cb 100644 --- a/drivers/mtd/nand/raw/s3c2410.c +++ b/drivers/mtd/nand/raw/s3c2410.c @@ -166,10 +166,6 @@ struct s3c2410_nand_info { enum s3c_nand_clk_state clk_state; enum s3c_cpu_type cpu_type; - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - struct notifier_block freq_transition; -#endif }; struct s3c24XX_nand_devtype_data { @@ -711,54 +707,6 @@ static void s3c2440_nand_write_buf(struct nand_chip *this, const u_char *buf, } } -/* cpufreq driver support */ - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - -static int s3c2410_nand_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct s3c2410_nand_info *info; - unsigned long newclk; - - info = container_of(nb, struct s3c2410_nand_info, freq_transition); - newclk = clk_get_rate(info->clk); - - if ((val == CPUFREQ_POSTCHANGE && newclk < info->clk_rate) || - (val == CPUFREQ_PRECHANGE && newclk > info->clk_rate)) { - s3c2410_nand_setrate(info); - } - - return 0; -} - -static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info) -{ - info->freq_transition.notifier_call = s3c2410_nand_cpufreq_transition; - - return cpufreq_register_notifier(&info->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void -s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info) -{ - cpufreq_unregister_notifier(&info->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -static inline int s3c2410_nand_cpufreq_register(struct s3c2410_nand_info *info) -{ - return 0; -} - -static inline void -s3c2410_nand_cpufreq_deregister(struct s3c2410_nand_info *info) -{ -} -#endif - /* device management functions */ static int s3c24xx_nand_remove(struct platform_device *pdev) @@ -768,8 +716,6 @@ static int s3c24xx_nand_remove(struct platform_device *pdev) if (info == NULL) return 0; - s3c2410_nand_cpufreq_deregister(info); - /* Release all our mtds and their partitions, then go through * freeing the resources used */ @@ -1184,12 +1130,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev) if (err != 0) goto exit_error; - err = s3c2410_nand_cpufreq_register(info); - if (err < 0) { - dev_err(&pdev->dev, "failed to init cpufreq support\n"); - goto exit_error; - } - if (allow_clk_suspend(info)) { dev_info(&pdev->dev, "clock idle support enabled\n"); s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND); diff --git a/drivers/parport/Kconfig b/drivers/parport/Kconfig index 68a4fe4cd60b..5561362224e2 100644 --- a/drivers/parport/Kconfig +++ b/drivers/parport/Kconfig @@ -140,17 +140,6 @@ config PARPORT_SUNBPP found on many Sun machines. Note that many of the newer Ultras actually have pc style hardware instead. -config PARPORT_AX88796 - tristate "AX88796 Parallel Port" - select PARPORT_NOT_PC - help - Say Y here if you need support for the parallel port hardware on - the AX88796 network controller chip. This code is also available - as a module (say M), called parport_ax88796. - - The driver is not dependent on the AX88796 network driver, and - should not interfere with the networking functions of the chip. - config PARPORT_1284 bool "IEEE 1284 transfer modes" help diff --git a/drivers/parport/Makefile b/drivers/parport/Makefile index 022c566c0f32..d4a6b890852d 100644 --- a/drivers/parport/Makefile +++ b/drivers/parport/Makefile @@ -18,5 +18,4 @@ obj-$(CONFIG_PARPORT_MFC3) += parport_mfc3.o obj-$(CONFIG_PARPORT_ATARI) += parport_atari.o obj-$(CONFIG_PARPORT_SUNBPP) += parport_sunbpp.o obj-$(CONFIG_PARPORT_GSC) += parport_gsc.o -obj-$(CONFIG_PARPORT_AX88796) += parport_ax88796.o obj-$(CONFIG_PARPORT_IP32) += parport_ip32.o diff --git a/drivers/parport/parport_ax88796.c b/drivers/parport/parport_ax88796.c deleted file mode 100644 index 54b539809673..000000000000 --- a/drivers/parport/parport_ax88796.c +++ /dev/null @@ -1,418 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* linux/drivers/parport/parport_ax88796.c - * - * (c) 2005,2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> -*/ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/parport.h> -#include <linux/interrupt.h> -#include <linux/errno.h> -#include <linux/platform_device.h> -#include <linux/slab.h> - -#include <asm/io.h> -#include <asm/irq.h> - -#define AX_SPR_BUSY (1<<7) -#define AX_SPR_ACK (1<<6) -#define AX_SPR_PE (1<<5) -#define AX_SPR_SLCT (1<<4) -#define AX_SPR_ERR (1<<3) - -#define AX_CPR_nDOE (1<<5) -#define AX_CPR_SLCTIN (1<<3) -#define AX_CPR_nINIT (1<<2) -#define AX_CPR_ATFD (1<<1) -#define AX_CPR_STRB (1<<0) - -struct ax_drvdata { - struct parport *parport; - struct parport_state suspend; - - struct device *dev; - struct resource *io; - - unsigned char irq_enabled; - - void __iomem *base; - void __iomem *spp_data; - void __iomem *spp_spr; - void __iomem *spp_cpr; -}; - -static inline struct ax_drvdata *pp_to_drv(struct parport *p) -{ - return p->private_data; -} - -static unsigned char -parport_ax88796_read_data(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - - return readb(dd->spp_data); -} - -static void -parport_ax88796_write_data(struct parport *p, unsigned char data) -{ - struct ax_drvdata *dd = pp_to_drv(p); - - writeb(data, dd->spp_data); -} - -static unsigned char -parport_ax88796_read_control(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned int cpr = readb(dd->spp_cpr); - unsigned int ret = 0; - - if (!(cpr & AX_CPR_STRB)) - ret |= PARPORT_CONTROL_STROBE; - - if (!(cpr & AX_CPR_ATFD)) - ret |= PARPORT_CONTROL_AUTOFD; - - if (cpr & AX_CPR_nINIT) - ret |= PARPORT_CONTROL_INIT; - - if (!(cpr & AX_CPR_SLCTIN)) - ret |= PARPORT_CONTROL_SELECT; - - return ret; -} - -static void -parport_ax88796_write_control(struct parport *p, unsigned char control) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned int cpr = readb(dd->spp_cpr); - - cpr &= AX_CPR_nDOE; - - if (!(control & PARPORT_CONTROL_STROBE)) - cpr |= AX_CPR_STRB; - - if (!(control & PARPORT_CONTROL_AUTOFD)) - cpr |= AX_CPR_ATFD; - - if (control & PARPORT_CONTROL_INIT) - cpr |= AX_CPR_nINIT; - - if (!(control & PARPORT_CONTROL_SELECT)) - cpr |= AX_CPR_SLCTIN; - - dev_dbg(dd->dev, "write_control: ctrl=%02x, cpr=%02x\n", control, cpr); - writeb(cpr, dd->spp_cpr); - - if (parport_ax88796_read_control(p) != control) { - dev_err(dd->dev, "write_control: read != set (%02x, %02x)\n", - parport_ax88796_read_control(p), control); - } -} - -static unsigned char -parport_ax88796_read_status(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned int status = readb(dd->spp_spr); - unsigned int ret = 0; - - if (status & AX_SPR_BUSY) - ret |= PARPORT_STATUS_BUSY; - - if (status & AX_SPR_ACK) - ret |= PARPORT_STATUS_ACK; - - if (status & AX_SPR_ERR) - ret |= PARPORT_STATUS_ERROR; - - if (status & AX_SPR_SLCT) - ret |= PARPORT_STATUS_SELECT; - - if (status & AX_SPR_PE) - ret |= PARPORT_STATUS_PAPEROUT; - - return ret; -} - -static unsigned char -parport_ax88796_frob_control(struct parport *p, unsigned char mask, - unsigned char val) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned char old = parport_ax88796_read_control(p); - - dev_dbg(dd->dev, "frob: mask=%02x, val=%02x, old=%02x\n", - mask, val, old); - - parport_ax88796_write_control(p, (old & ~mask) | val); - return old; -} - -static void -parport_ax88796_enable_irq(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned long flags; - - local_irq_save(flags); - if (!dd->irq_enabled) { - enable_irq(p->irq); - dd->irq_enabled = 1; - } - local_irq_restore(flags); -} - -static void -parport_ax88796_disable_irq(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - unsigned long flags; - - local_irq_save(flags); - if (dd->irq_enabled) { - disable_irq(p->irq); - dd->irq_enabled = 0; - } - local_irq_restore(flags); -} - -static void -parport_ax88796_data_forward(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - void __iomem *cpr = dd->spp_cpr; - - writeb((readb(cpr) & ~AX_CPR_nDOE), cpr); -} - -static void -parport_ax88796_data_reverse(struct parport *p) -{ - struct ax_drvdata *dd = pp_to_drv(p); - void __iomem *cpr = dd->spp_cpr; - - writeb(readb(cpr) | AX_CPR_nDOE, cpr); -} - -static void -parport_ax88796_init_state(struct pardevice *d, struct parport_state *s) -{ - struct ax_drvdata *dd = pp_to_drv(d->port); - - memset(s, 0, sizeof(struct parport_state)); - - dev_dbg(dd->dev, "init_state: %p: state=%p\n", d, s); - s->u.ax88796.cpr = readb(dd->spp_cpr); -} - -static void -parport_ax88796_save_state(struct parport *p, struct parport_state *s) -{ - struct ax_drvdata *dd = pp_to_drv(p); - - dev_dbg(dd->dev, "save_state: %p: state=%p\n", p, s); - s->u.ax88796.cpr = readb(dd->spp_cpr); -} - -static void -parport_ax88796_restore_state(struct parport *p, struct parport_state *s) -{ - struct ax_drvdata *dd = pp_to_drv(p); - - dev_dbg(dd->dev, "restore_state: %p: state=%p\n", p, s); - writeb(s->u.ax88796.cpr, dd->spp_cpr); -} - -static struct parport_operations parport_ax88796_ops = { - .write_data = parport_ax88796_write_data, - .read_data = parport_ax88796_read_data, - - .write_control = parport_ax88796_write_control, - .read_control = parport_ax88796_read_control, - .frob_control = parport_ax88796_frob_control, - - .read_status = parport_ax88796_read_status, - - .enable_irq = parport_ax88796_enable_irq, - .disable_irq = parport_ax88796_disable_irq, - - .data_forward = parport_ax88796_data_forward, - .data_reverse = parport_ax88796_data_reverse, - - .init_state = parport_ax88796_init_state, - .save_state = parport_ax88796_save_state, - .restore_state = parport_ax88796_restore_state, - - .epp_write_data = parport_ieee1284_epp_write_data, - .epp_read_data = parport_ieee1284_epp_read_data, - .epp_write_addr = parport_ieee1284_epp_write_addr, - .epp_read_addr = parport_ieee1284_epp_read_addr, - - .ecp_write_data = parport_ieee1284_ecp_write_data, - .ecp_read_data = parport_ieee1284_ecp_read_data, - .ecp_write_addr = parport_ieee1284_ecp_write_addr, - - .compat_write_data = parport_ieee1284_write_compat, - .nibble_read_data = parport_ieee1284_read_nibble, - .byte_read_data = parport_ieee1284_read_byte, - - .owner = THIS_MODULE, -}; - -static int parport_ax88796_probe(struct platform_device *pdev) -{ - struct device *_dev = &pdev->dev; - struct ax_drvdata *dd; - struct parport *pp; - struct resource *res; - unsigned long size; - int spacing; - int irq; - int ret; - - dd = kzalloc(sizeof(*dd), GFP_KERNEL); - if (!dd) - return -ENOMEM; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res == NULL) { - dev_err(_dev, "no MEM specified\n"); - ret = -ENXIO; - goto exit_mem; - } - - size = resource_size(res); - spacing = size / 3; - - dd->io = request_mem_region(res->start, size, pdev->name); - if (dd->io == NULL) { - dev_err(_dev, "cannot reserve memory\n"); - ret = -ENXIO; - goto exit_mem; - } - - dd->base = ioremap(res->start, size); - if (dd->base == NULL) { - dev_err(_dev, "cannot ioremap region\n"); - ret = -ENXIO; - goto exit_res; - } - - irq = platform_get_irq(pdev, 0); - if (irq <= 0) - irq = PARPORT_IRQ_NONE; - - pp = parport_register_port((unsigned long)dd->base, irq, - PARPORT_DMA_NONE, - &parport_ax88796_ops); - - if (pp == NULL) { - dev_err(_dev, "failed to register parallel port\n"); - ret = -ENOMEM; - goto exit_unmap; - } - - pp->private_data = dd; - dd->parport = pp; - dd->dev = _dev; - - dd->spp_data = dd->base; - dd->spp_spr = dd->base + (spacing * 1); - dd->spp_cpr = dd->base + (spacing * 2); - - /* initialise the port controls */ - writeb(AX_CPR_STRB, dd->spp_cpr); - - if (irq >= 0) { - /* request irq */ - ret = request_irq(irq, parport_irq_handler, - IRQF_TRIGGER_FALLING, pdev->name, pp); - - if (ret < 0) - goto exit_port; - - dd->irq_enabled = 1; - } - - platform_set_drvdata(pdev, pp); - - dev_info(_dev, "attached parallel port driver\n"); - parport_announce_port(pp); - - return 0; - - exit_port: - parport_remove_port(pp); - exit_unmap: - iounmap(dd->base); - exit_res: - release_mem_region(dd->io->start, size); - exit_mem: - kfree(dd); - return ret; -} - -static int parport_ax88796_remove(struct platform_device *pdev) -{ - struct parport *p = platform_get_drvdata(pdev); - struct ax_drvdata *dd = pp_to_drv(p); - - free_irq(p->irq, p); - parport_remove_port(p); - iounmap(dd->base); - release_mem_region(dd->io->start, resource_size(dd->io)); - kfree(dd); - - return 0; -} - -#ifdef CONFIG_PM - -static int parport_ax88796_suspend(struct platform_device *dev, - pm_message_t state) -{ - struct parport *p = platform_get_drvdata(dev); - struct ax_drvdata *dd = pp_to_drv(p); - - parport_ax88796_save_state(p, &dd->suspend); - writeb(AX_CPR_nDOE | AX_CPR_STRB, dd->spp_cpr); - return 0; -} - -static int parport_ax88796_resume(struct platform_device *dev) -{ - struct parport *p = platform_get_drvdata(dev); - struct ax_drvdata *dd = pp_to_drv(p); - - parport_ax88796_restore_state(p, &dd->suspend); - return 0; -} - -#else -#define parport_ax88796_suspend NULL -#define parport_ax88796_resume NULL -#endif - -MODULE_ALIAS("platform:ax88796-pp"); - -static struct platform_driver axdrv = { - .driver = { - .name = "ax88796-pp", - }, - .probe = parport_ax88796_probe, - .remove = parport_ax88796_remove, - .suspend = parport_ax88796_suspend, - .resume = parport_ax88796_resume, -}; - -module_platform_driver(axdrv); - -MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); -MODULE_DESCRIPTION("AX88796 Parport parallel port driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index 1525023e49b6..44c16508ef14 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -194,10 +194,8 @@ config PCMCIA_SA1111 tristate "SA1111 support" depends on ARM && SA1111 && PCMCIA select PCMCIA_SOC_COMMON - select PCMCIA_SA11XX_BASE if ARCH_SA1100 - select PCMCIA_PXA2XX if ARCH_LUBBOCK && SA1111 + select PCMCIA_SA11XX_BASE select PCMCIA_MAX1600 if ASSABET_NEPONSET - select PCMCIA_MAX1600 if ARCH_LUBBOCK && SA1111 help Say Y here to include support for SA1111-based PCMCIA or CF sockets, found on the Jornada 720, Graphicsmaster and other @@ -207,14 +205,8 @@ config PCMCIA_SA1111 config PCMCIA_PXA2XX tristate "PXA2xx support" - depends on ARM && ARCH_PXA && PCMCIA - depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \ - || ARCH_PXA_PALM || TRIZEPS_PCMCIA \ - || ARCOM_PCMCIA || ARCH_PXA_ESERIES \ - || MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \ - || MACH_COLIBRI320 || MACH_H4700) + depends on ARM && ARCH_PXA && PCMCIA && PXA_SHARPSL select PCMCIA_SOC_COMMON - select PCMCIA_MAX1600 if MACH_MAINSTONE help Say Y here to include support for the PXA2xx PCMCIA controller diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index b3a2accf47af..c9d51b150682 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -36,17 +36,12 @@ obj-$(CONFIG_PCMCIA_MAX1600) += max1600.o sa1111_cs-y += sa1111_generic.o sa1111_cs-$(CONFIG_ASSABET_NEPONSET) += sa1111_neponset.o -sa1111_cs-$(CONFIG_SA1100_BADGE4) += sa1111_badge4.o sa1111_cs-$(CONFIG_SA1100_JORNADA720) += sa1111_jornada720.o -sa1111_cs-$(CONFIG_ARCH_LUBBOCK) += sa1111_lubbock.o sa1100_cs-y += sa1100_generic.o sa1100_cs-$(CONFIG_SA1100_COLLIE) += pxa2xx_sharpsl.o -sa1100_cs-$(CONFIG_SA1100_H3100) += sa1100_h3600.o sa1100_cs-$(CONFIG_SA1100_H3600) += sa1100_h3600.o -sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o -pxa2xx-obj-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o pxa2xx-obj-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y) obj-$(CONFIG_PCMCIA_XXS1500) += xxs1500_ss.o diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index 0ea41f1411e5..5254028354f4 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -206,13 +206,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops) { - int nr = 1; - - if ((ops->first + ops->nr) > 1 || - machine_is_viper() || machine_is_arcom_zeus()) - nr = 2; - - pxa_smemc_set_pcmcia_socket(nr); + pxa_smemc_set_pcmcia_socket(1); } EXPORT_SYMBOL(pxa2xx_configure_sockets); diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c deleted file mode 100644 index a076e4108452..000000000000 --- a/drivers/pcmcia/pxa2xx_mainstone.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_mainstone.c - * - * Mainstone PCMCIA specific routines. - * - * Created: May 12, 2004 - * Author: Nicolas Pitre - * Copyright: MontaVista Software Inc. - */ -#include <linux/gpio/consumer.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/platform_device.h> - -#include <pcmcia/ss.h> - -#include <asm/mach-types.h> - -#include "soc_common.h" -#include "max1600.h" - -static int mst_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - struct device *dev = skt->socket.dev.parent; - struct max1600 *m; - int ret; - - skt->stat[SOC_STAT_CD].name = skt->nr ? "bdetect" : "adetect"; - skt->stat[SOC_STAT_BVD1].name = skt->nr ? "bbvd1" : "abvd1"; - skt->stat[SOC_STAT_BVD2].name = skt->nr ? "bbvd2" : "abvd2"; - skt->stat[SOC_STAT_RDY].name = skt->nr ? "bready" : "aready"; - skt->stat[SOC_STAT_VS1].name = skt->nr ? "bvs1" : "avs1"; - skt->stat[SOC_STAT_VS2].name = skt->nr ? "bvs2" : "avs2"; - - skt->gpio_reset = devm_gpiod_get(dev, skt->nr ? "breset" : "areset", - GPIOD_OUT_HIGH); - if (IS_ERR(skt->gpio_reset)) - return PTR_ERR(skt->gpio_reset); - - ret = max1600_init(dev, &m, skt->nr ? MAX1600_CHAN_B : MAX1600_CHAN_A, - MAX1600_CODE_HIGH); - if (ret) - return ret; - - skt->driver_data = m; - - return soc_pcmcia_request_gpiods(skt); -} - -static unsigned int mst_pcmcia_bvd1_status[2]; - -static void mst_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - unsigned int flip = mst_pcmcia_bvd1_status[skt->nr] ^ state->bvd1; - - /* - * Workaround for STSCHG which can't be deasserted: - * We therefore disable/enable corresponding IRQs - * as needed to avoid IRQ locks. - */ - if (flip) { - mst_pcmcia_bvd1_status[skt->nr] = state->bvd1; - if (state->bvd1) - enable_irq(skt->stat[SOC_STAT_BVD1].irq); - else - disable_irq(skt->stat[SOC_STAT_BVD2].irq); - } -} - -static int mst_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - return max1600_configure(skt->driver_data, state->Vcc, state->Vpp); -} - -static struct pcmcia_low_level mst_pcmcia_ops __initdata = { - .owner = THIS_MODULE, - .hw_init = mst_pcmcia_hw_init, - .socket_state = mst_pcmcia_socket_state, - .configure_socket = mst_pcmcia_configure_socket, - .nr = 2, -}; - -static struct platform_device *mst_pcmcia_device; - -static int __init mst_pcmcia_init(void) -{ - int ret; - - if (!machine_is_mainstone()) - return -ENODEV; - - mst_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!mst_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(mst_pcmcia_device, &mst_pcmcia_ops, - sizeof(mst_pcmcia_ops)); - if (ret == 0) - ret = platform_device_add(mst_pcmcia_device); - - if (ret) - platform_device_put(mst_pcmcia_device); - - return ret; -} - -static void __exit mst_pcmcia_exit(void) -{ - platform_device_unregister(mst_pcmcia_device); -} - -fs_initcall(mst_pcmcia_init); -module_exit(mst_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c index c2b6e828c2c6..89d4ba58c891 100644 --- a/drivers/pcmcia/sa1100_generic.c +++ b/drivers/pcmcia/sa1100_generic.c @@ -98,12 +98,9 @@ static struct pcmcia_low_level sa11x0_cf_ops = { int __init pcmcia_collie_init(struct device *dev); static int (*sa11x0_pcmcia_legacy_hw_init[])(struct device *dev) = { -#if defined(CONFIG_SA1100_H3100) || defined(CONFIG_SA1100_H3600) +#ifdef CONFIG_SA1100_H3600 pcmcia_h3600_init, #endif -#ifdef CONFIG_SA1100_SIMPAD - pcmcia_simpad_init, -#endif #ifdef CONFIG_SA1100_COLLIE pcmcia_collie_init, #endif diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c index a91222bc3824..10cb99c20a7f 100644 --- a/drivers/pcmcia/sa1100_h3600.c +++ b/drivers/pcmcia/sa1100_h3600.c @@ -156,7 +156,7 @@ int pcmcia_h3600_init(struct device *dev) { int ret = -ENODEV; - if (machine_is_h3600() || machine_is_h3100()) + if (machine_is_h3600()) ret = sa11xx_drv_pcmcia_probe(dev, &h3600_pcmcia_ops, 0, 2); return ret; diff --git a/drivers/pcmcia/sa1100_simpad.c b/drivers/pcmcia/sa1100_simpad.c deleted file mode 100644 index 784ada5b8c4f..000000000000 --- a/drivers/pcmcia/sa1100_simpad.c +++ /dev/null @@ -1,115 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * drivers/pcmcia/sa1100_simpad.c - * - * PCMCIA implementation routines for simpad - * - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/init.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <mach/simpad.h> -#include "sa1100_generic.h" - -static int simpad_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - - simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); - - skt->stat[SOC_STAT_CD].name = "cf-detect"; - skt->stat[SOC_STAT_RDY].name = "cf-ready"; - - return soc_pcmcia_request_gpiods(skt); -} - -static void simpad_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - /* Disable CF bus: */ - /*simpad_set_cs3_bit(PCMCIA_BUFF_DIS);*/ - simpad_clear_cs3_bit(PCMCIA_RESET); -} - -static void -simpad_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - long cs3reg = simpad_get_cs3_ro(); - - /* bvd1 might be cs3reg & PCMCIA_BVD1 */ - /* bvd2 might be cs3reg & PCMCIA_BVD2 */ - - if ((cs3reg & (PCMCIA_VS1|PCMCIA_VS2)) == - (PCMCIA_VS1|PCMCIA_VS2)) { - state->vs_3v=0; - state->vs_Xv=0; - } else { - state->vs_3v=1; - state->vs_Xv=0; - } -} - -static int -simpad_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - unsigned long flags; - - local_irq_save(flags); - - /* Murphy: see table of MIC2562a-1 */ - switch (state->Vcc) { - case 0: - simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); - break; - - case 33: - simpad_clear_cs3_bit(VCC_3V_EN|EN1); - simpad_set_cs3_bit(VCC_5V_EN|EN0); - break; - - case 50: - simpad_clear_cs3_bit(VCC_5V_EN|EN1); - simpad_set_cs3_bit(VCC_3V_EN|EN0); - break; - - default: - printk(KERN_ERR "%s(): unrecognized Vcc %u\n", - __func__, state->Vcc); - simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); - local_irq_restore(flags); - return -1; - } - - - local_irq_restore(flags); - - return 0; -} - -static void simpad_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) -{ - simpad_set_cs3_bit(PCMCIA_RESET); -} - -static struct pcmcia_low_level simpad_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = simpad_pcmcia_hw_init, - .hw_shutdown = simpad_pcmcia_hw_shutdown, - .socket_state = simpad_pcmcia_socket_state, - .configure_socket = simpad_pcmcia_configure_socket, - .socket_suspend = simpad_pcmcia_socket_suspend, -}; - -int pcmcia_simpad_init(struct device *dev) -{ - int ret = -ENODEV; - - if (machine_is_simpad()) - ret = sa11xx_drv_pcmcia_probe(dev, &simpad_pcmcia_ops, 1, 1); - - return ret; -} diff --git a/drivers/pcmcia/sa1111_badge4.c b/drivers/pcmcia/sa1111_badge4.c deleted file mode 100644 index e76d5ba921dd..000000000000 --- a/drivers/pcmcia/sa1111_badge4.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/sa1100_badge4.c - * - * BadgePAD 4 PCMCIA specific routines - * - * Christopher Hoover <ch@hpl.hp.com> - * - * Copyright (C) 2002 Hewlett-Packard Company - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/errno.h> -#include <linux/init.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <mach/badge4.h> -#include <asm/hardware/sa1111.h> - -#include "sa1111_generic.h" - -/* - * BadgePAD 4 Details - * - * PCM Vcc: - * - * PCM Vcc on BadgePAD 4 can be jumpered for 3v3 (short pins 1 and 3 - * on JP6) or 5v0 (short pins 3 and 5 on JP6). - * - * PCM Vpp: - * - * PCM Vpp on BadgePAD 4 can be jumpered for 12v0 (short pins 4 and 6 - * on JP6) or tied to PCM Vcc (short pins 2 and 4 on JP6). N.B., - * 12v0 operation requires that the power supply actually supply 12v0 - * via pin 7 of JP7. - * - * CF Vcc: - * - * CF Vcc on BadgePAD 4 can be jumpered either for 3v3 (short pins 1 - * and 2 on JP10) or 5v0 (short pins 2 and 3 on JP10). - * - * Unfortunately there's no way programmatically to determine how a - * given board is jumpered. This code assumes a default jumpering - * as described below. - * - * If the defaults aren't correct, you may override them with a pcmv - * setup argument: pcmv=<pcm vcc>,<pcm vpp>,<cf vcc>. The units are - * tenths of volts; e.g. pcmv=33,120,50 indicates 3v3 PCM Vcc, 12v0 - * PCM Vpp, and 5v0 CF Vcc. - * - */ - -static int badge4_pcmvcc = 50; /* pins 3 and 5 jumpered on JP6 */ -static int badge4_pcmvpp = 50; /* pins 2 and 4 jumpered on JP6 */ -static int badge4_cfvcc = 33; /* pins 1 and 2 jumpered on JP10 */ - -static void complain_about_jumpering(const char *whom, - const char *supply, - int given, int wanted) -{ - printk(KERN_ERR - "%s: %s %d.%dV wanted but board is jumpered for %s %d.%dV operation" - "; re-jumper the board and/or use pcmv=xx,xx,xx\n", - whom, supply, - wanted / 10, wanted % 10, - supply, - given / 10, given % 10); -} - -static int -badge4_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state) -{ - int ret; - - switch (skt->nr) { - case 0: - if ((state->Vcc != 0) && - (state->Vcc != badge4_pcmvcc)) { - complain_about_jumpering(__func__, "pcmvcc", - badge4_pcmvcc, state->Vcc); - // Apply power regardless of the jumpering. - // return -1; - } - if ((state->Vpp != 0) && - (state->Vpp != badge4_pcmvpp)) { - complain_about_jumpering(__func__, "pcmvpp", - badge4_pcmvpp, state->Vpp); - return -1; - } - break; - - case 1: - if ((state->Vcc != 0) && - (state->Vcc != badge4_cfvcc)) { - complain_about_jumpering(__func__, "cfvcc", - badge4_cfvcc, state->Vcc); - return -1; - } - break; - - default: - return -1; - } - - ret = sa1111_pcmcia_configure_socket(skt, state); - if (ret == 0) { - unsigned long flags; - int need5V; - - local_irq_save(flags); - - need5V = ((state->Vcc == 50) || (state->Vpp == 50)); - - badge4_set_5V(BADGE4_5V_PCMCIA_SOCK(skt->nr), need5V); - - local_irq_restore(flags); - } - - return ret; -} - -static struct pcmcia_low_level badge4_pcmcia_ops = { - .owner = THIS_MODULE, - .configure_socket = badge4_pcmcia_configure_socket, - .first = 0, - .nr = 2, -}; - -int pcmcia_badge4_init(struct sa1111_dev *dev) -{ - printk(KERN_INFO - "%s: badge4_pcmvcc=%d, badge4_pcmvpp=%d, badge4_cfvcc=%d\n", - __func__, - badge4_pcmvcc, badge4_pcmvpp, badge4_cfvcc); - - sa11xx_drv_pcmcia_ops(&badge4_pcmcia_ops); - return sa1111_pcmcia_add(dev, &badge4_pcmcia_ops, - sa11xx_drv_pcmcia_add_one); -} - -#ifndef MODULE -static int __init pcmv_setup(char *s) -{ - int v[4]; - - s = get_options(s, ARRAY_SIZE(v), v); - - if (v[0] >= 1) badge4_pcmvcc = v[1]; - if (v[0] >= 2) badge4_pcmvpp = v[2]; - if (v[0] >= 3) badge4_cfvcc = v[3]; - - return 1; -} - -__setup("pcmv=", pcmv_setup); -#endif diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c index bce664bbdc98..2a67e33fb5f0 100644 --- a/drivers/pcmcia/sa1111_generic.c +++ b/drivers/pcmcia/sa1111_generic.c @@ -212,18 +212,10 @@ static int pcmcia_probe(struct sa1111_dev *dev) writel_relaxed(PCCR_S0_FLT | PCCR_S1_FLT, base + PCCR); ret = -ENODEV; -#ifdef CONFIG_SA1100_BADGE4 - if (machine_is_badge4()) - ret = pcmcia_badge4_init(dev); -#endif #ifdef CONFIG_SA1100_JORNADA720 if (machine_is_jornada720()) ret = pcmcia_jornada720_init(dev); #endif -#ifdef CONFIG_ARCH_LUBBOCK - if (machine_is_lubbock()) - ret = pcmcia_lubbock_init(dev); -#endif #ifdef CONFIG_ASSABET_NEPONSET if (machine_is_assabet()) ret = pcmcia_neponset_init(dev); diff --git a/drivers/pcmcia/sa1111_lubbock.c b/drivers/pcmcia/sa1111_lubbock.c deleted file mode 100644 index f1b5160cb8fa..000000000000 --- a/drivers/pcmcia/sa1111_lubbock.c +++ /dev/null @@ -1,155 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_lubbock.c - * - * Author: George Davis - * Created: Jan 10, 2002 - * Copyright: MontaVista Software Inc. - * - * Originally based upon linux/drivers/pcmcia/sa1100_neponset.c - * - * Lubbock PCMCIA specific routines. - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/delay.h> - -#include <asm/hardware/sa1111.h> -#include <asm/mach-types.h> - -#include "sa1111_generic.h" -#include "max1600.h" - -static int lubbock_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - struct max1600 *m; - int ret; - - ret = max1600_init(skt->socket.dev.parent, &m, - skt->nr ? MAX1600_CHAN_B : MAX1600_CHAN_A, - MAX1600_CODE_HIGH); - if (ret == 0) - skt->driver_data = m; - - return ret; -} - -static int -lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - struct max1600 *m = skt->driver_data; - int ret = 0; - - /* Lubbock uses the Maxim MAX1602, with the following connections: - * - * Socket 0 (PCMCIA): - * MAX1602 Lubbock Register - * Pin Signal - * ----- ------- ---------------------- - * A0VPP S0_PWR0 SA-1111 GPIO A<0> - * A1VPP S0_PWR1 SA-1111 GPIO A<1> - * A0VCC S0_PWR2 SA-1111 GPIO A<2> - * A1VCC S0_PWR3 SA-1111 GPIO A<3> - * VX VCC - * VY +3.3V - * 12IN +12V - * CODE +3.3V Cirrus Code, CODE = High (VY) - * - * Socket 1 (CF): - * MAX1602 Lubbock Register - * Pin Signal - * ----- ------- ---------------------- - * A0VPP GND VPP is not connected - * A1VPP GND VPP is not connected - * A0VCC S1_PWR0 MISC_WR<14> - * A1VCC S1_PWR1 MISC_WR<15> - * VX VCC - * VY +3.3V - * 12IN GND VPP is not connected - * CODE +3.3V Cirrus Code, CODE = High (VY) - * - */ - - again: - switch (skt->nr) { - case 0: - case 1: - break; - - default: - ret = -1; - } - - if (ret == 0) - ret = sa1111_pcmcia_configure_socket(skt, state); - if (ret == 0) - ret = max1600_configure(m, state->Vcc, state->Vpp); - -#if 1 - if (ret == 0 && state->Vcc == 33) { - struct pcmcia_state new_state; - - /* - * HACK ALERT: - * We can't sense the voltage properly on Lubbock before - * actually applying some power to the socket (catch 22). - * Resense the socket Voltage Sense pins after applying - * socket power. - * - * Note: It takes about 2.5ms for the MAX1602 VCC output - * to rise. - */ - mdelay(3); - - sa1111_pcmcia_socket_state(skt, &new_state); - - if (!new_state.vs_3v && !new_state.vs_Xv) { - /* - * Switch to 5V, Configure socket with 5V voltage - */ - max1600_configure(m, 0, 0); - - /* - * It takes about 100ms to turn off Vcc. - */ - mdelay(100); - - /* - * We need to hack around the const qualifier as - * well to keep this ugly workaround localized and - * not force it to the rest of the code. Barf bags - * available in the seat pocket in front of you! - */ - ((socket_state_t *)state)->Vcc = 50; - ((socket_state_t *)state)->Vpp = 50; - goto again; - } - } -#endif - - return ret; -} - -static struct pcmcia_low_level lubbock_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = lubbock_pcmcia_hw_init, - .configure_socket = lubbock_pcmcia_configure_socket, - .first = 0, - .nr = 2, -}; - -#include "pxa2xx_base.h" - -int pcmcia_lubbock_init(struct sa1111_dev *sadev) -{ - pxa2xx_drv_pcmcia_ops(&lubbock_pcmcia_ops); - pxa2xx_configure_sockets(&sadev->dev, &lubbock_pcmcia_ops); - return sa1111_pcmcia_add(sadev, &lubbock_pcmcia_ops, - pxa2xx_drv_pcmcia_add_one); -} - -MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/samsung/Kconfig b/drivers/pinctrl/samsung/Kconfig index 7b0576f71376..697ff7812d8e 100644 --- a/drivers/pinctrl/samsung/Kconfig +++ b/drivers/pinctrl/samsung/Kconfig @@ -23,11 +23,6 @@ config PINCTRL_EXYNOS_ARM64 bool "ARMv8-specific pinctrl driver for Samsung Exynos SoCs" if COMPILE_TEST depends on PINCTRL_EXYNOS -config PINCTRL_S3C24XX - bool "Samsung S3C24XX SoC pinctrl driver" - depends on ARCH_S3C24XX || (COMPILE_TEST && OF) - select PINCTRL_SAMSUNG - config PINCTRL_S3C64XX bool "Samsung S3C64XX SoC pinctrl driver" depends on ARCH_S3C64XX || (COMPILE_TEST && OF) diff --git a/drivers/pinctrl/samsung/Makefile b/drivers/pinctrl/samsung/Makefile index ed951df6a112..4dd4a92ab6cc 100644 --- a/drivers/pinctrl/samsung/Makefile +++ b/drivers/pinctrl/samsung/Makefile @@ -5,5 +5,4 @@ obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o obj-$(CONFIG_PINCTRL_EXYNOS) += pinctrl-exynos.o obj-$(CONFIG_PINCTRL_EXYNOS_ARM) += pinctrl-exynos-arm.o obj-$(CONFIG_PINCTRL_EXYNOS_ARM64) += pinctrl-exynos-arm64.o -obj-$(CONFIG_PINCTRL_S3C24XX) += pinctrl-s3c24xx.o obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o diff --git a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c deleted file mode 100644 index 625cb1065eaf..000000000000 --- a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c +++ /dev/null @@ -1,653 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// S3C24XX specific support for Samsung pinctrl/gpiolib driver. -// -// Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> -// -// This file contains the SamsungS3C24XX specific information required by the -// Samsung pinctrl/gpiolib driver. It also includes the implementation of -// external gpio and wakeup interrupt support. - -#include <linux/init.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/irqdomain.h> -#include <linux/irq.h> -#include <linux/of_irq.h> -#include <linux/irqchip/chained_irq.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/err.h> - -#include "pinctrl-samsung.h" - -#define NUM_EINT 24 -#define NUM_EINT_IRQ 6 -#define EINT_MAX_PER_GROUP 8 - -#define EINTPEND_REG 0xa8 -#define EINTMASK_REG 0xa4 - -#define EINT_GROUP(i) ((int)((i) / EINT_MAX_PER_GROUP)) -#define EINT_REG(i) ((EINT_GROUP(i) * 4) + 0x88) -#define EINT_OFFS(i) ((i) % EINT_MAX_PER_GROUP * 4) - -#define EINT_LEVEL_LOW 0 -#define EINT_LEVEL_HIGH 1 -#define EINT_EDGE_FALLING 2 -#define EINT_EDGE_RISING 4 -#define EINT_EDGE_BOTH 6 -#define EINT_MASK 0xf - -static const struct samsung_pin_bank_type bank_type_1bit = { - .fld_width = { 1, 1, }, - .reg_offset = { 0x00, 0x04, }, -}; - -static const struct samsung_pin_bank_type bank_type_2bit = { - .fld_width = { 2, 1, 2, }, - .reg_offset = { 0x00, 0x04, 0x08, }, -}; - -#define PIN_BANK_A(pins, reg, id) \ - { \ - .type = &bank_type_1bit, \ - .pctl_offset = reg, \ - .nr_pins = pins, \ - .eint_type = EINT_TYPE_NONE, \ - .name = id \ - } - -#define PIN_BANK_2BIT(pins, reg, id) \ - { \ - .type = &bank_type_2bit, \ - .pctl_offset = reg, \ - .nr_pins = pins, \ - .eint_type = EINT_TYPE_NONE, \ - .name = id \ - } - -#define PIN_BANK_2BIT_EINTW(pins, reg, id, eoffs, emask)\ - { \ - .type = &bank_type_2bit, \ - .pctl_offset = reg, \ - .nr_pins = pins, \ - .eint_type = EINT_TYPE_WKUP, \ - .eint_func = 2, \ - .eint_mask = emask, \ - .eint_offset = eoffs, \ - .name = id \ - } - -/** - * struct s3c24xx_eint_data - EINT common data - * @drvdata: pin controller driver data - * @domains: IRQ domains of particular EINT interrupts - * @parents: mapped parent irqs in the main interrupt controller - */ -struct s3c24xx_eint_data { - struct samsung_pinctrl_drv_data *drvdata; - struct irq_domain *domains[NUM_EINT]; - int parents[NUM_EINT_IRQ]; -}; - -/** - * struct s3c24xx_eint_domain_data - per irq-domain data - * @bank: pin bank related to the domain - * @eint_data: common data - * @eint0_3_parent_only: live eints 0-3 only in the main intc - */ -struct s3c24xx_eint_domain_data { - struct samsung_pin_bank *bank; - struct s3c24xx_eint_data *eint_data; - bool eint0_3_parent_only; -}; - -static int s3c24xx_eint_get_trigger(unsigned int type) -{ - switch (type) { - case IRQ_TYPE_EDGE_RISING: - return EINT_EDGE_RISING; - case IRQ_TYPE_EDGE_FALLING: - return EINT_EDGE_FALLING; - case IRQ_TYPE_EDGE_BOTH: - return EINT_EDGE_BOTH; - case IRQ_TYPE_LEVEL_HIGH: - return EINT_LEVEL_HIGH; - case IRQ_TYPE_LEVEL_LOW: - return EINT_LEVEL_LOW; - default: - return -EINVAL; - } -} - -static void s3c24xx_eint_set_handler(struct irq_data *d, unsigned int type) -{ - /* Edge- and level-triggered interrupts need different handlers */ - if (type & IRQ_TYPE_EDGE_BOTH) - irq_set_handler_locked(d, handle_edge_irq); - else - irq_set_handler_locked(d, handle_level_irq); -} - -static void s3c24xx_eint_set_function(struct samsung_pinctrl_drv_data *d, - struct samsung_pin_bank *bank, int pin) -{ - const struct samsung_pin_bank_type *bank_type = bank->type; - unsigned long flags; - void __iomem *reg; - u8 shift; - u32 mask; - u32 val; - - /* Make sure that pin is configured as interrupt */ - reg = d->virt_base + bank->pctl_offset; - shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; - mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; - - raw_spin_lock_irqsave(&bank->slock, flags); - - val = readl(reg); - val &= ~(mask << shift); - val |= bank->eint_func << shift; - writel(val, reg); - - raw_spin_unlock_irqrestore(&bank->slock, flags); -} - -static int s3c24xx_eint_type(struct irq_data *data, unsigned int type) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - int index = bank->eint_offset + data->hwirq; - void __iomem *reg; - int trigger; - u8 shift; - u32 val; - - trigger = s3c24xx_eint_get_trigger(type); - if (trigger < 0) { - dev_err(d->dev, "unsupported external interrupt type\n"); - return -EINVAL; - } - - s3c24xx_eint_set_handler(data, type); - - /* Set up interrupt trigger */ - reg = d->virt_base + EINT_REG(index); - shift = EINT_OFFS(index); - - val = readl(reg); - val &= ~(EINT_MASK << shift); - val |= trigger << shift; - writel(val, reg); - - s3c24xx_eint_set_function(d, bank, data->hwirq); - - return 0; -} - -/* Handling of EINTs 0-3 on all except S3C2412 and S3C2413 */ - -static void s3c2410_eint0_3_ack(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct s3c24xx_eint_domain_data *ddata = bank->irq_domain->host_data; - struct s3c24xx_eint_data *eint_data = ddata->eint_data; - int parent_irq = eint_data->parents[data->hwirq]; - struct irq_chip *parent_chip = irq_get_chip(parent_irq); - - parent_chip->irq_ack(irq_get_irq_data(parent_irq)); -} - -static void s3c2410_eint0_3_mask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct s3c24xx_eint_domain_data *ddata = bank->irq_domain->host_data; - struct s3c24xx_eint_data *eint_data = ddata->eint_data; - int parent_irq = eint_data->parents[data->hwirq]; - struct irq_chip *parent_chip = irq_get_chip(parent_irq); - - parent_chip->irq_mask(irq_get_irq_data(parent_irq)); -} - -static void s3c2410_eint0_3_unmask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct s3c24xx_eint_domain_data *ddata = bank->irq_domain->host_data; - struct s3c24xx_eint_data *eint_data = ddata->eint_data; - int parent_irq = eint_data->parents[data->hwirq]; - struct irq_chip *parent_chip = irq_get_chip(parent_irq); - - parent_chip->irq_unmask(irq_get_irq_data(parent_irq)); -} - -static struct irq_chip s3c2410_eint0_3_chip = { - .name = "s3c2410-eint0_3", - .irq_ack = s3c2410_eint0_3_ack, - .irq_mask = s3c2410_eint0_3_mask, - .irq_unmask = s3c2410_eint0_3_unmask, - .irq_set_type = s3c24xx_eint_type, -}; - -static void s3c2410_demux_eint0_3(struct irq_desc *desc) -{ - struct irq_data *data = irq_desc_get_irq_data(desc); - struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc); - int ret; - - /* the first 4 eints have a simple 1 to 1 mapping */ - ret = generic_handle_domain_irq(eint_data->domains[data->hwirq], data->hwirq); - /* Something must be really wrong if an unmapped EINT is unmasked */ - BUG_ON(ret); -} - -/* Handling of EINTs 0-3 on S3C2412 and S3C2413 */ - -static void s3c2412_eint0_3_ack(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - - unsigned long bitval = 1UL << data->hwirq; - writel(bitval, d->virt_base + EINTPEND_REG); -} - -static void s3c2412_eint0_3_mask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - unsigned long mask; - - mask = readl(d->virt_base + EINTMASK_REG); - mask |= (1UL << data->hwirq); - writel(mask, d->virt_base + EINTMASK_REG); -} - -static void s3c2412_eint0_3_unmask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - unsigned long mask; - - mask = readl(d->virt_base + EINTMASK_REG); - mask &= ~(1UL << data->hwirq); - writel(mask, d->virt_base + EINTMASK_REG); -} - -static struct irq_chip s3c2412_eint0_3_chip = { - .name = "s3c2412-eint0_3", - .irq_ack = s3c2412_eint0_3_ack, - .irq_mask = s3c2412_eint0_3_mask, - .irq_unmask = s3c2412_eint0_3_unmask, - .irq_set_type = s3c24xx_eint_type, -}; - -static void s3c2412_demux_eint0_3(struct irq_desc *desc) -{ - struct s3c24xx_eint_data *eint_data = irq_desc_get_handler_data(desc); - struct irq_data *data = irq_desc_get_irq_data(desc); - struct irq_chip *chip = irq_data_get_irq_chip(data); - int ret; - - chained_irq_enter(chip, desc); - - /* the first 4 eints have a simple 1 to 1 mapping */ - ret = generic_handle_domain_irq(eint_data->domains[data->hwirq], data->hwirq); - /* Something must be really wrong if an unmapped EINT is unmasked */ - BUG_ON(ret); - - chained_irq_exit(chip, desc); -} - -/* Handling of all other eints */ - -static void s3c24xx_eint_ack(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - unsigned char index = bank->eint_offset + data->hwirq; - - writel(1UL << index, d->virt_base + EINTPEND_REG); -} - -static void s3c24xx_eint_mask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - unsigned char index = bank->eint_offset + data->hwirq; - unsigned long mask; - - mask = readl(d->virt_base + EINTMASK_REG); - mask |= (1UL << index); - writel(mask, d->virt_base + EINTMASK_REG); -} - -static void s3c24xx_eint_unmask(struct irq_data *data) -{ - struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); - struct samsung_pinctrl_drv_data *d = bank->drvdata; - unsigned char index = bank->eint_offset + data->hwirq; - unsigned long mask; - - mask = readl(d->virt_base + EINTMASK_REG); - mask &= ~(1UL << index); - writel(mask, d->virt_base + EINTMASK_REG); -} - -static struct irq_chip s3c24xx_eint_chip = { - .name = "s3c-eint", - .irq_ack = s3c24xx_eint_ack, - .irq_mask = s3c24xx_eint_mask, - .irq_unmask = s3c24xx_eint_unmask, - .irq_set_type = s3c24xx_eint_type, -}; - -static inline void s3c24xx_demux_eint(struct irq_desc *desc, - u32 offset, u32 range) -{ - struct s3c24xx_eint_data *data = irq_desc_get_handler_data(desc); - struct irq_chip *chip = irq_desc_get_chip(desc); - struct samsung_pinctrl_drv_data *d = data->drvdata; - unsigned int pend, mask; - - chained_irq_enter(chip, desc); - - pend = readl(d->virt_base + EINTPEND_REG); - mask = readl(d->virt_base + EINTMASK_REG); - - pend &= ~mask; - pend &= range; - - while (pend) { - unsigned int irq; - int ret; - - irq = __ffs(pend); - pend &= ~(1 << irq); - ret = generic_handle_domain_irq(data->domains[irq], irq - offset); - /* Something is really wrong if an unmapped EINT is unmasked */ - BUG_ON(ret); - } - - chained_irq_exit(chip, desc); -} - -static void s3c24xx_demux_eint4_7(struct irq_desc *desc) -{ - s3c24xx_demux_eint(desc, 0, 0xf0); -} - -static void s3c24xx_demux_eint8_23(struct irq_desc *desc) -{ - s3c24xx_demux_eint(desc, 8, 0xffff00); -} - -static irq_flow_handler_t s3c2410_eint_handlers[NUM_EINT_IRQ] = { - s3c2410_demux_eint0_3, - s3c2410_demux_eint0_3, - s3c2410_demux_eint0_3, - s3c2410_demux_eint0_3, - s3c24xx_demux_eint4_7, - s3c24xx_demux_eint8_23, -}; - -static irq_flow_handler_t s3c2412_eint_handlers[NUM_EINT_IRQ] = { - s3c2412_demux_eint0_3, - s3c2412_demux_eint0_3, - s3c2412_demux_eint0_3, - s3c2412_demux_eint0_3, - s3c24xx_demux_eint4_7, - s3c24xx_demux_eint8_23, -}; - -static int s3c24xx_gpf_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - struct s3c24xx_eint_domain_data *ddata = h->host_data; - struct samsung_pin_bank *bank = ddata->bank; - - if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) - return -EINVAL; - - if (hw <= 3) { - if (ddata->eint0_3_parent_only) - irq_set_chip_and_handler(virq, &s3c2410_eint0_3_chip, - handle_edge_irq); - else - irq_set_chip_and_handler(virq, &s3c2412_eint0_3_chip, - handle_edge_irq); - } else { - irq_set_chip_and_handler(virq, &s3c24xx_eint_chip, - handle_edge_irq); - } - irq_set_chip_data(virq, bank); - return 0; -} - -static const struct irq_domain_ops s3c24xx_gpf_irq_ops = { - .map = s3c24xx_gpf_irq_map, - .xlate = irq_domain_xlate_twocell, -}; - -static int s3c24xx_gpg_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - struct s3c24xx_eint_domain_data *ddata = h->host_data; - struct samsung_pin_bank *bank = ddata->bank; - - if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) - return -EINVAL; - - irq_set_chip_and_handler(virq, &s3c24xx_eint_chip, handle_edge_irq); - irq_set_chip_data(virq, bank); - return 0; -} - -static const struct irq_domain_ops s3c24xx_gpg_irq_ops = { - .map = s3c24xx_gpg_irq_map, - .xlate = irq_domain_xlate_twocell, -}; - -static const struct of_device_id s3c24xx_eint_irq_ids[] = { - { .compatible = "samsung,s3c2410-wakeup-eint", .data = (void *)1 }, - { .compatible = "samsung,s3c2412-wakeup-eint", .data = (void *)0 }, - { } -}; - -static int s3c24xx_eint_init(struct samsung_pinctrl_drv_data *d) -{ - struct device *dev = d->dev; - const struct of_device_id *match; - struct device_node *eint_np = NULL; - struct device_node *np; - struct samsung_pin_bank *bank; - struct s3c24xx_eint_data *eint_data; - const struct irq_domain_ops *ops; - unsigned int i; - bool eint0_3_parent_only; - irq_flow_handler_t *handlers; - - for_each_child_of_node(dev->of_node, np) { - match = of_match_node(s3c24xx_eint_irq_ids, np); - if (match) { - eint_np = np; - eint0_3_parent_only = (bool)match->data; - break; - } - } - if (!eint_np) - return -ENODEV; - - eint_data = devm_kzalloc(dev, sizeof(*eint_data), GFP_KERNEL); - if (!eint_data) { - of_node_put(eint_np); - return -ENOMEM; - } - - eint_data->drvdata = d; - - handlers = eint0_3_parent_only ? s3c2410_eint_handlers - : s3c2412_eint_handlers; - for (i = 0; i < NUM_EINT_IRQ; ++i) { - unsigned int irq; - - irq = irq_of_parse_and_map(eint_np, i); - if (!irq) { - dev_err(dev, "failed to get wakeup EINT IRQ %d\n", i); - of_node_put(eint_np); - return -ENXIO; - } - - eint_data->parents[i] = irq; - irq_set_chained_handler_and_data(irq, handlers[i], eint_data); - } - of_node_put(eint_np); - - bank = d->pin_banks; - for (i = 0; i < d->nr_banks; ++i, ++bank) { - struct s3c24xx_eint_domain_data *ddata; - unsigned int mask; - unsigned int irq; - unsigned int pin; - - if (bank->eint_type != EINT_TYPE_WKUP) - continue; - - ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); - if (!ddata) - return -ENOMEM; - - ddata->bank = bank; - ddata->eint_data = eint_data; - ddata->eint0_3_parent_only = eint0_3_parent_only; - - ops = (bank->eint_offset == 0) ? &s3c24xx_gpf_irq_ops - : &s3c24xx_gpg_irq_ops; - - bank->irq_domain = irq_domain_create_linear(bank->fwnode, - bank->nr_pins, ops, ddata); - if (!bank->irq_domain) { - dev_err(dev, "wkup irq domain add failed\n"); - return -ENXIO; - } - - irq = bank->eint_offset; - mask = bank->eint_mask; - for (pin = 0; mask; ++pin, mask >>= 1) { - if (irq >= NUM_EINT) - break; - if (!(mask & 1)) - continue; - eint_data->domains[irq] = bank->irq_domain; - ++irq; - } - } - - return 0; -} - -static const struct samsung_pin_bank_data s3c2412_pin_banks[] __initconst = { - PIN_BANK_A(23, 0x000, "gpa"), - PIN_BANK_2BIT(11, 0x010, "gpb"), - PIN_BANK_2BIT(16, 0x020, "gpc"), - PIN_BANK_2BIT(16, 0x030, "gpd"), - PIN_BANK_2BIT(16, 0x040, "gpe"), - PIN_BANK_2BIT_EINTW(8, 0x050, "gpf", 0, 0xff), - PIN_BANK_2BIT_EINTW(16, 0x060, "gpg", 8, 0xffff00), - PIN_BANK_2BIT(11, 0x070, "gph"), - PIN_BANK_2BIT(13, 0x080, "gpj"), -}; - -static const struct samsung_pin_ctrl s3c2412_pin_ctrl[] __initconst = { - { - .pin_banks = s3c2412_pin_banks, - .nr_banks = ARRAY_SIZE(s3c2412_pin_banks), - .eint_wkup_init = s3c24xx_eint_init, - }, -}; - -const struct samsung_pinctrl_of_match_data s3c2412_of_data __initconst = { - .ctrl = s3c2412_pin_ctrl, - .num_ctrl = ARRAY_SIZE(s3c2412_pin_ctrl), -}; - -static const struct samsung_pin_bank_data s3c2416_pin_banks[] __initconst = { - PIN_BANK_A(27, 0x000, "gpa"), - PIN_BANK_2BIT(11, 0x010, "gpb"), - PIN_BANK_2BIT(16, 0x020, "gpc"), - PIN_BANK_2BIT(16, 0x030, "gpd"), - PIN_BANK_2BIT(16, 0x040, "gpe"), - PIN_BANK_2BIT_EINTW(8, 0x050, "gpf", 0, 0xff), - PIN_BANK_2BIT_EINTW(8, 0x060, "gpg", 8, 0xff00), - PIN_BANK_2BIT(15, 0x070, "gph"), - PIN_BANK_2BIT(16, 0x0e0, "gpk"), - PIN_BANK_2BIT(14, 0x0f0, "gpl"), - PIN_BANK_2BIT(2, 0x100, "gpm"), -}; - -static const struct samsung_pin_ctrl s3c2416_pin_ctrl[] __initconst = { - { - .pin_banks = s3c2416_pin_banks, - .nr_banks = ARRAY_SIZE(s3c2416_pin_banks), - .eint_wkup_init = s3c24xx_eint_init, - }, -}; - -const struct samsung_pinctrl_of_match_data s3c2416_of_data __initconst = { - .ctrl = s3c2416_pin_ctrl, - .num_ctrl = ARRAY_SIZE(s3c2416_pin_ctrl), -}; - -static const struct samsung_pin_bank_data s3c2440_pin_banks[] __initconst = { - PIN_BANK_A(25, 0x000, "gpa"), - PIN_BANK_2BIT(11, 0x010, "gpb"), - PIN_BANK_2BIT(16, 0x020, "gpc"), - PIN_BANK_2BIT(16, 0x030, "gpd"), - PIN_BANK_2BIT(16, 0x040, "gpe"), - PIN_BANK_2BIT_EINTW(8, 0x050, "gpf", 0, 0xff), - PIN_BANK_2BIT_EINTW(16, 0x060, "gpg", 8, 0xffff00), - PIN_BANK_2BIT(11, 0x070, "gph"), - PIN_BANK_2BIT(13, 0x0d0, "gpj"), -}; - -static const struct samsung_pin_ctrl s3c2440_pin_ctrl[] __initconst = { - { - .pin_banks = s3c2440_pin_banks, - .nr_banks = ARRAY_SIZE(s3c2440_pin_banks), - .eint_wkup_init = s3c24xx_eint_init, - }, -}; - -const struct samsung_pinctrl_of_match_data s3c2440_of_data __initconst = { - .ctrl = s3c2440_pin_ctrl, - .num_ctrl = ARRAY_SIZE(s3c2440_pin_ctrl), -}; - -static const struct samsung_pin_bank_data s3c2450_pin_banks[] __initconst = { - PIN_BANK_A(28, 0x000, "gpa"), - PIN_BANK_2BIT(11, 0x010, "gpb"), - PIN_BANK_2BIT(16, 0x020, "gpc"), - PIN_BANK_2BIT(16, 0x030, "gpd"), - PIN_BANK_2BIT(16, 0x040, "gpe"), - PIN_BANK_2BIT_EINTW(8, 0x050, "gpf", 0, 0xff), - PIN_BANK_2BIT_EINTW(16, 0x060, "gpg", 8, 0xffff00), - PIN_BANK_2BIT(15, 0x070, "gph"), - PIN_BANK_2BIT(16, 0x0d0, "gpj"), - PIN_BANK_2BIT(16, 0x0e0, "gpk"), - PIN_BANK_2BIT(15, 0x0f0, "gpl"), - PIN_BANK_2BIT(2, 0x100, "gpm"), -}; - -static const struct samsung_pin_ctrl s3c2450_pin_ctrl[] __initconst = { - { - .pin_banks = s3c2450_pin_banks, - .nr_banks = ARRAY_SIZE(s3c2450_pin_banks), - .eint_wkup_init = s3c24xx_eint_init, - }, -}; - -const struct samsung_pinctrl_of_match_data s3c2450_of_data __initconst = { - .ctrl = s3c2450_pin_ctrl, - .num_ctrl = ARRAY_SIZE(s3c2450_pin_ctrl), -}; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 5736761927cb..514001e448b9 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1324,16 +1324,6 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { { .compatible = "samsung,s3c64xx-pinctrl", .data = &s3c64xx_of_data }, #endif -#ifdef CONFIG_PINCTRL_S3C24XX - { .compatible = "samsung,s3c2412-pinctrl", - .data = &s3c2412_of_data }, - { .compatible = "samsung,s3c2416-pinctrl", - .data = &s3c2416_of_data }, - { .compatible = "samsung,s3c2440-pinctrl", - .data = &s3c2440_of_data }, - { .compatible = "samsung,s3c2450-pinctrl", - .data = &s3c2450_of_data }, -#endif {}, }; diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 0bbfe6a7ce4d..e2f8dfcdd2a9 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -28,15 +28,6 @@ config POWER_SUPPLY_HWMON Say 'Y' here if you want power supplies to have hwmon sysfs interface too. - -config PDA_POWER - tristate "Generic PDA/phone power driver" - depends on !S390 - help - Say Y here to enable generic power driver for PDAs and phones with - one or two external power supplies (AC/USB) connected to main and - backup batteries, and optional builtin charger. - config APM_POWER tristate "APM emulation for class batteries" depends on APM_EMULATION @@ -195,13 +186,6 @@ config BATTERY_SAMSUNG_SDI Say Y to enable support for Samsung SDI battery data. These batteries are used in Samsung mobile phones. -config BATTERY_TOSA - tristate "Sharp SL-6000 (tosa) battery" - depends on MACH_TOSA && MFD_TC6393XB && TOUCHSCREEN_WM97XX - help - Say Y to enable support for the battery on the Sharp Zaurus - SL-6000 (tosa) models. - config BATTERY_COLLIE tristate "Sharp SL-5500 (collie) battery" depends on SA1100_COLLIE && MCP_UCB1200 @@ -422,18 +406,6 @@ config BATTERY_MAX1721X Say Y here to enable support for the MAX17211/MAX17215 standalone battery gas-gauge. -config BATTERY_Z2 - tristate "Z2 battery driver" - depends on I2C && MACH_ZIPIT2 - help - Say Y to include support for the battery on the Zipit Z2. - -config BATTERY_S3C_ADC - tristate "Battery driver for Samsung ADC based monitoring" - depends on S3C_ADC - help - Say Y here to enable support for iPAQ h1930/h1940/rx1950 battery - config BATTERY_TWL4030_MADC tristate "TWL4030 MADC battery driver" depends on TWL4030_MADC diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index 0ee8653e882e..8cb3c7f5c111 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -9,7 +9,6 @@ obj-$(CONFIG_POWER_SUPPLY) += power_supply.o obj-$(CONFIG_POWER_SUPPLY_HWMON) += power_supply_hwmon.o obj-$(CONFIG_GENERIC_ADC_BATTERY) += generic-adc-battery.o -obj-$(CONFIG_PDA_POWER) += pda_power.o obj-$(CONFIG_APM_POWER) += apm_power.o obj-$(CONFIG_AXP20X_POWER) += axp20x_usb_power.o obj-$(CONFIG_IP5XXX_POWER) += ip5xxx_power.o @@ -36,7 +35,6 @@ obj-$(CONFIG_BATTERY_LEGO_EV3) += lego_ev3_battery.o obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o obj-$(CONFIG_BATTERY_SAMSUNG_SDI) += samsung-sdi-battery.o -obj-$(CONFIG_BATTERY_TOSA) += tosa_battery.o obj-$(CONFIG_BATTERY_COLLIE) += collie_battery.o obj-$(CONFIG_BATTERY_INGENIC) += ingenic-battery.o obj-$(CONFIG_BATTERY_IPAQ_MICRO) += ipaq_micro_battery.o @@ -54,10 +52,8 @@ obj-$(CONFIG_BATTERY_DA9150) += da9150-fg.o obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o obj-$(CONFIG_BATTERY_MAX17042) += max17042_battery.o obj-$(CONFIG_BATTERY_MAX1721X) += max1721x_battery.o -obj-$(CONFIG_BATTERY_Z2) += z2_battery.o obj-$(CONFIG_BATTERY_RT5033) += rt5033_battery.o obj-$(CONFIG_CHARGER_RT9455) += rt9455_charger.o -obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o obj-$(CONFIG_BATTERY_TWL4030_MADC) += twl4030_madc_battery.o obj-$(CONFIG_CHARGER_88PM860X) += 88pm860x_charger.o obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o diff --git a/drivers/power/supply/ds2760_battery.c b/drivers/power/supply/ds2760_battery.c index 5f50da524f41..40fba31be174 100644 --- a/drivers/power/supply/ds2760_battery.c +++ b/drivers/power/supply/ds2760_battery.c @@ -227,20 +227,12 @@ static int rated_capacities[] = { 920, /* NEC */ 1440, /* Samsung */ 1440, /* BYD */ -#ifdef CONFIG_MACH_H4700 - 1800, /* HP iPAQ hx4700 3.7V 1800mAh (359113-001) */ -#else 1440, /* Lishen */ -#endif 1440, /* NEC */ 2880, /* Samsung */ 2880, /* BYD */ 2880, /* Lishen */ 2880, /* NEC */ -#ifdef CONFIG_MACH_H4700 - 0, - 3600, /* HP iPAQ hx4700 3.7V 3600mAh (359114-001) */ -#endif }; /* array is level at temps 0°C, 10°C, 20°C, 30°C, 40°C diff --git a/drivers/power/supply/pda_power.c b/drivers/power/supply/pda_power.c deleted file mode 100644 index 03a37fd6be27..000000000000 --- a/drivers/power/supply/pda_power.c +++ /dev/null @@ -1,520 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Common power driver for PDAs and phones with one or two external - * power supplies (AC/USB) connected to main and backup batteries, - * and optional builtin charger. - * - * Copyright © 2007 Anton Vorontsov <cbou@mail.ru> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/err.h> -#include <linux/interrupt.h> -#include <linux/notifier.h> -#include <linux/power_supply.h> -#include <linux/pda_power.h> -#include <linux/regulator/consumer.h> -#include <linux/timer.h> -#include <linux/jiffies.h> -#include <linux/usb/otg.h> - -static inline unsigned int get_irq_flags(struct resource *res) -{ - return IRQF_SHARED | (res->flags & IRQF_TRIGGER_MASK); -} - -static struct device *dev; -static struct pda_power_pdata *pdata; -static struct resource *ac_irq, *usb_irq; -static struct delayed_work charger_work; -static struct delayed_work polling_work; -static struct delayed_work supply_work; -static int polling; -static struct power_supply *pda_psy_ac, *pda_psy_usb; - -#if IS_ENABLED(CONFIG_USB_PHY) -static struct usb_phy *transceiver; -static struct notifier_block otg_nb; -#endif - -static struct regulator *ac_draw; - -enum { - PDA_PSY_OFFLINE = 0, - PDA_PSY_ONLINE = 1, - PDA_PSY_TO_CHANGE, -}; -static int new_ac_status = -1; -static int new_usb_status = -1; -static int ac_status = -1; -static int usb_status = -1; - -static int pda_power_get_property(struct power_supply *psy, - enum power_supply_property psp, - union power_supply_propval *val) -{ - switch (psp) { - case POWER_SUPPLY_PROP_ONLINE: - if (psy->desc->type == POWER_SUPPLY_TYPE_MAINS) - val->intval = pdata->is_ac_online ? - pdata->is_ac_online() : 0; - else - val->intval = pdata->is_usb_online ? - pdata->is_usb_online() : 0; - break; - default: - return -EINVAL; - } - return 0; -} - -static enum power_supply_property pda_power_props[] = { - POWER_SUPPLY_PROP_ONLINE, -}; - -static char *pda_power_supplied_to[] = { - "main-battery", - "backup-battery", -}; - -static const struct power_supply_desc pda_psy_ac_desc = { - .name = "ac", - .type = POWER_SUPPLY_TYPE_MAINS, - .properties = pda_power_props, - .num_properties = ARRAY_SIZE(pda_power_props), - .get_property = pda_power_get_property, -}; - -static const struct power_supply_desc pda_psy_usb_desc = { - .name = "usb", - .type = POWER_SUPPLY_TYPE_USB, - .properties = pda_power_props, - .num_properties = ARRAY_SIZE(pda_power_props), - .get_property = pda_power_get_property, -}; - -static void update_status(void) -{ - if (pdata->is_ac_online) - new_ac_status = !!pdata->is_ac_online(); - - if (pdata->is_usb_online) - new_usb_status = !!pdata->is_usb_online(); -} - -static void update_charger(void) -{ - static int regulator_enabled; - int max_uA = pdata->ac_max_uA; - - if (pdata->set_charge) { - if (new_ac_status > 0) { - dev_dbg(dev, "charger on (AC)\n"); - pdata->set_charge(PDA_POWER_CHARGE_AC); - } else if (new_usb_status > 0) { - dev_dbg(dev, "charger on (USB)\n"); - pdata->set_charge(PDA_POWER_CHARGE_USB); - } else { - dev_dbg(dev, "charger off\n"); - pdata->set_charge(0); - } - } else if (ac_draw) { - if (new_ac_status > 0) { - regulator_set_current_limit(ac_draw, max_uA, max_uA); - if (!regulator_enabled) { - dev_dbg(dev, "charger on (AC)\n"); - WARN_ON(regulator_enable(ac_draw)); - regulator_enabled = 1; - } - } else { - if (regulator_enabled) { - dev_dbg(dev, "charger off\n"); - WARN_ON(regulator_disable(ac_draw)); - regulator_enabled = 0; - } - } - } -} - -static void supply_work_func(struct work_struct *work) -{ - if (ac_status == PDA_PSY_TO_CHANGE) { - ac_status = new_ac_status; - power_supply_changed(pda_psy_ac); - } - - if (usb_status == PDA_PSY_TO_CHANGE) { - usb_status = new_usb_status; - power_supply_changed(pda_psy_usb); - } -} - -static void psy_changed(void) -{ - update_charger(); - - /* - * Okay, charger set. Now wait a bit before notifying supplicants, - * charge power should stabilize. - */ - cancel_delayed_work(&supply_work); - schedule_delayed_work(&supply_work, - msecs_to_jiffies(pdata->wait_for_charger)); -} - -static void charger_work_func(struct work_struct *work) -{ - update_status(); - psy_changed(); -} - -static irqreturn_t power_changed_isr(int irq, void *power_supply) -{ - if (power_supply == pda_psy_ac) - ac_status = PDA_PSY_TO_CHANGE; - else if (power_supply == pda_psy_usb) - usb_status = PDA_PSY_TO_CHANGE; - else - return IRQ_NONE; - - /* - * Wait a bit before reading ac/usb line status and setting charger, - * because ac/usb status readings may lag from irq. - */ - cancel_delayed_work(&charger_work); - schedule_delayed_work(&charger_work, - msecs_to_jiffies(pdata->wait_for_status)); - - return IRQ_HANDLED; -} - -static void polling_work_func(struct work_struct *work) -{ - int changed = 0; - - dev_dbg(dev, "polling...\n"); - - update_status(); - - if (!ac_irq && new_ac_status != ac_status) { - ac_status = PDA_PSY_TO_CHANGE; - changed = 1; - } - - if (!usb_irq && new_usb_status != usb_status) { - usb_status = PDA_PSY_TO_CHANGE; - changed = 1; - } - - if (changed) - psy_changed(); - - cancel_delayed_work(&polling_work); - schedule_delayed_work(&polling_work, - msecs_to_jiffies(pdata->polling_interval)); -} - -#if IS_ENABLED(CONFIG_USB_PHY) -static int otg_is_usb_online(void) -{ - return (transceiver->last_event == USB_EVENT_VBUS || - transceiver->last_event == USB_EVENT_ENUMERATED); -} - -static int otg_is_ac_online(void) -{ - return (transceiver->last_event == USB_EVENT_CHARGER); -} - -static int otg_handle_notification(struct notifier_block *nb, - unsigned long event, void *unused) -{ - switch (event) { - case USB_EVENT_CHARGER: - ac_status = PDA_PSY_TO_CHANGE; - break; - case USB_EVENT_VBUS: - case USB_EVENT_ENUMERATED: - usb_status = PDA_PSY_TO_CHANGE; - break; - case USB_EVENT_NONE: - ac_status = PDA_PSY_TO_CHANGE; - usb_status = PDA_PSY_TO_CHANGE; - break; - default: - return NOTIFY_OK; - } - - /* - * Wait a bit before reading ac/usb line status and setting charger, - * because ac/usb status readings may lag from irq. - */ - cancel_delayed_work(&charger_work); - schedule_delayed_work(&charger_work, - msecs_to_jiffies(pdata->wait_for_status)); - - return NOTIFY_OK; -} -#endif - -static int pda_power_probe(struct platform_device *pdev) -{ - struct power_supply_config psy_cfg = {}; - int ret = 0; - - dev = &pdev->dev; - - if (pdev->id != -1) { - dev_err(dev, "it's meaningless to register several " - "pda_powers; use id = -1\n"); - ret = -EINVAL; - goto wrongid; - } - - pdata = pdev->dev.platform_data; - - if (pdata->init) { - ret = pdata->init(dev); - if (ret < 0) - goto init_failed; - } - - ac_draw = regulator_get(dev, "ac_draw"); - if (IS_ERR(ac_draw)) { - dev_dbg(dev, "couldn't get ac_draw regulator\n"); - ac_draw = NULL; - } - - update_status(); - update_charger(); - - if (!pdata->wait_for_status) - pdata->wait_for_status = 500; - - if (!pdata->wait_for_charger) - pdata->wait_for_charger = 500; - - if (!pdata->polling_interval) - pdata->polling_interval = 2000; - - if (!pdata->ac_max_uA) - pdata->ac_max_uA = 500000; - - INIT_DELAYED_WORK(&charger_work, charger_work_func); - INIT_DELAYED_WORK(&supply_work, supply_work_func); - - ac_irq = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ac"); - usb_irq = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "usb"); - - if (pdata->supplied_to) { - psy_cfg.supplied_to = pdata->supplied_to; - psy_cfg.num_supplicants = pdata->num_supplicants; - } else { - psy_cfg.supplied_to = pda_power_supplied_to; - psy_cfg.num_supplicants = ARRAY_SIZE(pda_power_supplied_to); - } - -#if IS_ENABLED(CONFIG_USB_PHY) - transceiver = usb_get_phy(USB_PHY_TYPE_USB2); - if (!IS_ERR_OR_NULL(transceiver)) { - if (!pdata->is_usb_online) - pdata->is_usb_online = otg_is_usb_online; - if (!pdata->is_ac_online) - pdata->is_ac_online = otg_is_ac_online; - } -#endif - - if (pdata->is_ac_online) { - pda_psy_ac = power_supply_register(&pdev->dev, - &pda_psy_ac_desc, &psy_cfg); - if (IS_ERR(pda_psy_ac)) { - dev_err(dev, "failed to register %s power supply\n", - pda_psy_ac_desc.name); - ret = PTR_ERR(pda_psy_ac); - goto ac_supply_failed; - } - - if (ac_irq) { - ret = request_irq(ac_irq->start, power_changed_isr, - get_irq_flags(ac_irq), ac_irq->name, - pda_psy_ac); - if (ret) { - dev_err(dev, "request ac irq failed\n"); - goto ac_irq_failed; - } - } else { - polling = 1; - } - } - - if (pdata->is_usb_online) { - pda_psy_usb = power_supply_register(&pdev->dev, - &pda_psy_usb_desc, - &psy_cfg); - if (IS_ERR(pda_psy_usb)) { - dev_err(dev, "failed to register %s power supply\n", - pda_psy_usb_desc.name); - ret = PTR_ERR(pda_psy_usb); - goto usb_supply_failed; - } - - if (usb_irq) { - ret = request_irq(usb_irq->start, power_changed_isr, - get_irq_flags(usb_irq), - usb_irq->name, pda_psy_usb); - if (ret) { - dev_err(dev, "request usb irq failed\n"); - goto usb_irq_failed; - } - } else { - polling = 1; - } - } - -#if IS_ENABLED(CONFIG_USB_PHY) - if (!IS_ERR_OR_NULL(transceiver) && pdata->use_otg_notifier) { - otg_nb.notifier_call = otg_handle_notification; - ret = usb_register_notifier(transceiver, &otg_nb); - if (ret) { - dev_err(dev, "failure to register otg notifier\n"); - goto otg_reg_notifier_failed; - } - polling = 0; - } -#endif - - if (polling) { - dev_dbg(dev, "will poll for status\n"); - INIT_DELAYED_WORK(&polling_work, polling_work_func); - cancel_delayed_work(&polling_work); - schedule_delayed_work(&polling_work, - msecs_to_jiffies(pdata->polling_interval)); - } - - if (ac_irq || usb_irq) - device_init_wakeup(&pdev->dev, 1); - - return 0; - -#if IS_ENABLED(CONFIG_USB_PHY) -otg_reg_notifier_failed: - if (pdata->is_usb_online && usb_irq) - free_irq(usb_irq->start, pda_psy_usb); -#endif -usb_irq_failed: - if (pdata->is_usb_online) - power_supply_unregister(pda_psy_usb); -usb_supply_failed: - if (pdata->is_ac_online && ac_irq) - free_irq(ac_irq->start, pda_psy_ac); -#if IS_ENABLED(CONFIG_USB_PHY) - if (!IS_ERR_OR_NULL(transceiver)) - usb_put_phy(transceiver); -#endif -ac_irq_failed: - if (pdata->is_ac_online) - power_supply_unregister(pda_psy_ac); -ac_supply_failed: - if (ac_draw) { - regulator_put(ac_draw); - ac_draw = NULL; - } - if (pdata->exit) - pdata->exit(dev); -init_failed: -wrongid: - return ret; -} - -static int pda_power_remove(struct platform_device *pdev) -{ -#if IS_ENABLED(CONFIG_USB_PHY) - if (!IS_ERR_OR_NULL(transceiver) && pdata->use_otg_notifier) - usb_unregister_notifier(transceiver, &otg_nb); -#endif - if (pdata->is_usb_online && usb_irq) - free_irq(usb_irq->start, pda_psy_usb); - if (pdata->is_ac_online && ac_irq) - free_irq(ac_irq->start, pda_psy_ac); - - if (polling) - cancel_delayed_work_sync(&polling_work); - cancel_delayed_work_sync(&charger_work); - cancel_delayed_work_sync(&supply_work); - - if (pdata->is_usb_online) - power_supply_unregister(pda_psy_usb); - if (pdata->is_ac_online) - power_supply_unregister(pda_psy_ac); -#if IS_ENABLED(CONFIG_USB_PHY) - if (!IS_ERR_OR_NULL(transceiver)) - usb_put_phy(transceiver); -#endif - if (ac_draw) { - regulator_put(ac_draw); - ac_draw = NULL; - } - if (pdata->exit) - pdata->exit(dev); - - return 0; -} - -#ifdef CONFIG_PM -static int ac_wakeup_enabled; -static int usb_wakeup_enabled; - -static int pda_power_suspend(struct platform_device *pdev, pm_message_t state) -{ - if (pdata->suspend) { - int ret = pdata->suspend(state); - - if (ret) - return ret; - } - - if (device_may_wakeup(&pdev->dev)) { - if (ac_irq) - ac_wakeup_enabled = !enable_irq_wake(ac_irq->start); - if (usb_irq) - usb_wakeup_enabled = !enable_irq_wake(usb_irq->start); - } - - return 0; -} - -static int pda_power_resume(struct platform_device *pdev) -{ - if (device_may_wakeup(&pdev->dev)) { - if (usb_irq && usb_wakeup_enabled) - disable_irq_wake(usb_irq->start); - if (ac_irq && ac_wakeup_enabled) - disable_irq_wake(ac_irq->start); - } - - if (pdata->resume) - return pdata->resume(); - - return 0; -} -#else -#define pda_power_suspend NULL -#define pda_power_resume NULL -#endif /* CONFIG_PM */ - -static struct platform_driver pda_power_pdrv = { - .driver = { - .name = "pda-power", - }, - .probe = pda_power_probe, - .remove = pda_power_remove, - .suspend = pda_power_suspend, - .resume = pda_power_resume, -}; - -module_platform_driver(pda_power_pdrv); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Anton Vorontsov <cbou@mail.ru>"); -MODULE_ALIAS("platform:pda-power"); diff --git a/drivers/power/supply/s3c_adc_battery.c b/drivers/power/supply/s3c_adc_battery.c deleted file mode 100644 index 68d31a3bee48..000000000000 --- a/drivers/power/supply/s3c_adc_battery.c +++ /dev/null @@ -1,453 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// iPAQ h1930/h1940/rx1950 battery controller driver -// Copyright (c) Vasily Khoruzhick -// Based on h1940_battery.c by Arnaud Patard - -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/power_supply.h> -#include <linux/leds.h> -#include <linux/gpio/consumer.h> -#include <linux/err.h> -#include <linux/timer.h> -#include <linux/jiffies.h> -#include <linux/s3c_adc_battery.h> -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/module.h> - -#include <linux/soc/samsung/s3c-adc.h> - -#define BAT_POLL_INTERVAL 10000 /* ms */ -#define JITTER_DELAY 500 /* ms */ - -struct s3c_adc_bat { - struct power_supply *psy; - struct s3c_adc_client *client; - struct s3c_adc_bat_pdata *pdata; - struct gpio_desc *charge_finished; - int volt_value; - int cur_value; - unsigned int timestamp; - int level; - int status; - int cable_plugged:1; -}; - -static struct delayed_work bat_work; - -static void s3c_adc_bat_ext_power_changed(struct power_supply *psy) -{ - schedule_delayed_work(&bat_work, - msecs_to_jiffies(JITTER_DELAY)); -} - -static int gather_samples(struct s3c_adc_client *client, int num, int channel) -{ - int value, i; - - /* default to 1 if nothing is set */ - if (num < 1) - num = 1; - - value = 0; - for (i = 0; i < num; i++) - value += s3c_adc_read(client, channel); - value /= num; - - return value; -} - -static enum power_supply_property s3c_adc_backup_bat_props[] = { - POWER_SUPPLY_PROP_VOLTAGE_NOW, - POWER_SUPPLY_PROP_VOLTAGE_MIN, - POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, -}; - -static int s3c_adc_backup_bat_get_property(struct power_supply *psy, - enum power_supply_property psp, - union power_supply_propval *val) -{ - struct s3c_adc_bat *bat = power_supply_get_drvdata(psy); - - if (!bat) { - dev_err(&psy->dev, "%s: no battery infos ?!\n", __func__); - return -EINVAL; - } - - if (bat->volt_value < 0 || - jiffies_to_msecs(jiffies - bat->timestamp) > - BAT_POLL_INTERVAL) { - bat->volt_value = gather_samples(bat->client, - bat->pdata->backup_volt_samples, - bat->pdata->backup_volt_channel); - bat->volt_value *= bat->pdata->backup_volt_mult; - bat->timestamp = jiffies; - } - - switch (psp) { - case POWER_SUPPLY_PROP_VOLTAGE_NOW: - val->intval = bat->volt_value; - return 0; - case POWER_SUPPLY_PROP_VOLTAGE_MIN: - val->intval = bat->pdata->backup_volt_min; - return 0; - case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: - val->intval = bat->pdata->backup_volt_max; - return 0; - default: - return -EINVAL; - } -} - -static const struct power_supply_desc backup_bat_desc = { - .name = "backup-battery", - .type = POWER_SUPPLY_TYPE_BATTERY, - .properties = s3c_adc_backup_bat_props, - .num_properties = ARRAY_SIZE(s3c_adc_backup_bat_props), - .get_property = s3c_adc_backup_bat_get_property, - .use_for_apm = 1, -}; - -static struct s3c_adc_bat backup_bat; - -static enum power_supply_property s3c_adc_main_bat_props[] = { - POWER_SUPPLY_PROP_STATUS, - POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, - POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN, - POWER_SUPPLY_PROP_CHARGE_NOW, - POWER_SUPPLY_PROP_VOLTAGE_NOW, - POWER_SUPPLY_PROP_CURRENT_NOW, -}; - -static int calc_full_volt(int volt_val, int cur_val, int impedance) -{ - return volt_val + cur_val * impedance / 1000; -} - -static int charge_finished(struct s3c_adc_bat *bat) -{ - return gpiod_get_value(bat->charge_finished); -} - -static int s3c_adc_bat_get_property(struct power_supply *psy, - enum power_supply_property psp, - union power_supply_propval *val) -{ - struct s3c_adc_bat *bat = power_supply_get_drvdata(psy); - - int new_level; - int full_volt; - const struct s3c_adc_bat_thresh *lut; - unsigned int lut_size; - - if (!bat) { - dev_err(&psy->dev, "no battery infos ?!\n"); - return -EINVAL; - } - - lut = bat->pdata->lut_noac; - lut_size = bat->pdata->lut_noac_cnt; - - if (bat->volt_value < 0 || bat->cur_value < 0 || - jiffies_to_msecs(jiffies - bat->timestamp) > - BAT_POLL_INTERVAL) { - bat->volt_value = gather_samples(bat->client, - bat->pdata->volt_samples, - bat->pdata->volt_channel) * bat->pdata->volt_mult; - bat->cur_value = gather_samples(bat->client, - bat->pdata->current_samples, - bat->pdata->current_channel) * bat->pdata->current_mult; - bat->timestamp = jiffies; - } - - if (bat->cable_plugged && - (!bat->charge_finished || - !charge_finished(bat))) { - lut = bat->pdata->lut_acin; - lut_size = bat->pdata->lut_acin_cnt; - } - - new_level = 100000; - full_volt = calc_full_volt((bat->volt_value / 1000), - (bat->cur_value / 1000), bat->pdata->internal_impedance); - - if (full_volt < calc_full_volt(lut->volt, lut->cur, - bat->pdata->internal_impedance)) { - lut_size--; - while (lut_size--) { - int lut_volt1; - int lut_volt2; - - lut_volt1 = calc_full_volt(lut[0].volt, lut[0].cur, - bat->pdata->internal_impedance); - lut_volt2 = calc_full_volt(lut[1].volt, lut[1].cur, - bat->pdata->internal_impedance); - if (full_volt < lut_volt1 && full_volt >= lut_volt2) { - new_level = (lut[1].level + - (lut[0].level - lut[1].level) * - (full_volt - lut_volt2) / - (lut_volt1 - lut_volt2)) * 1000; - break; - } - new_level = lut[1].level * 1000; - lut++; - } - } - - bat->level = new_level; - - switch (psp) { - case POWER_SUPPLY_PROP_STATUS: - if (!bat->charge_finished) - val->intval = bat->level == 100000 ? - POWER_SUPPLY_STATUS_FULL : bat->status; - else - val->intval = bat->status; - return 0; - case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: - val->intval = 100000; - return 0; - case POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN: - val->intval = 0; - return 0; - case POWER_SUPPLY_PROP_CHARGE_NOW: - val->intval = bat->level; - return 0; - case POWER_SUPPLY_PROP_VOLTAGE_NOW: - val->intval = bat->volt_value; - return 0; - case POWER_SUPPLY_PROP_CURRENT_NOW: - val->intval = bat->cur_value; - return 0; - default: - return -EINVAL; - } -} - -static const struct power_supply_desc main_bat_desc = { - .name = "main-battery", - .type = POWER_SUPPLY_TYPE_BATTERY, - .properties = s3c_adc_main_bat_props, - .num_properties = ARRAY_SIZE(s3c_adc_main_bat_props), - .get_property = s3c_adc_bat_get_property, - .external_power_changed = s3c_adc_bat_ext_power_changed, - .use_for_apm = 1, -}; - -static struct s3c_adc_bat main_bat; - -static void s3c_adc_bat_work(struct work_struct *work) -{ - struct s3c_adc_bat *bat = &main_bat; - int is_charged; - int is_plugged; - static int was_plugged; - - is_plugged = power_supply_am_i_supplied(bat->psy); - bat->cable_plugged = is_plugged; - if (is_plugged != was_plugged) { - was_plugged = is_plugged; - if (is_plugged) { - if (bat->pdata->enable_charger) - bat->pdata->enable_charger(); - bat->status = POWER_SUPPLY_STATUS_CHARGING; - } else { - if (bat->pdata->disable_charger) - bat->pdata->disable_charger(); - bat->status = POWER_SUPPLY_STATUS_DISCHARGING; - } - } else { - if (bat->charge_finished && is_plugged) { - is_charged = charge_finished(&main_bat); - if (is_charged) { - if (bat->pdata->disable_charger) - bat->pdata->disable_charger(); - bat->status = POWER_SUPPLY_STATUS_FULL; - } else { - if (bat->pdata->enable_charger) - bat->pdata->enable_charger(); - bat->status = POWER_SUPPLY_STATUS_CHARGING; - } - } - } - - power_supply_changed(bat->psy); -} - -static irqreturn_t s3c_adc_bat_charged(int irq, void *dev_id) -{ - schedule_delayed_work(&bat_work, - msecs_to_jiffies(JITTER_DELAY)); - return IRQ_HANDLED; -} - -static int s3c_adc_bat_probe(struct platform_device *pdev) -{ - struct s3c_adc_client *client; - struct s3c_adc_bat_pdata *pdata = pdev->dev.platform_data; - struct power_supply_config psy_cfg = {}; - struct gpio_desc *gpiod; - int ret; - - client = s3c_adc_register(pdev, NULL, NULL, 0); - if (IS_ERR(client)) { - dev_err(&pdev->dev, "cannot register adc\n"); - return PTR_ERR(client); - } - - platform_set_drvdata(pdev, client); - - gpiod = devm_gpiod_get_optional(&pdev->dev, "charge-status", GPIOD_IN); - if (IS_ERR(gpiod)) { - /* Could be probe deferral etc */ - ret = PTR_ERR(gpiod); - dev_err(&pdev->dev, "no GPIO %d\n", ret); - return ret; - } - - main_bat.client = client; - main_bat.pdata = pdata; - main_bat.charge_finished = gpiod; - main_bat.volt_value = -1; - main_bat.cur_value = -1; - main_bat.cable_plugged = 0; - main_bat.status = POWER_SUPPLY_STATUS_DISCHARGING; - psy_cfg.drv_data = &main_bat; - - main_bat.psy = power_supply_register(&pdev->dev, &main_bat_desc, &psy_cfg); - if (IS_ERR(main_bat.psy)) { - ret = PTR_ERR(main_bat.psy); - goto err_reg_main; - } - if (pdata->backup_volt_mult) { - const struct power_supply_config backup_psy_cfg - = { .drv_data = &backup_bat, }; - - backup_bat.client = client; - backup_bat.pdata = pdev->dev.platform_data; - backup_bat.charge_finished = gpiod; - backup_bat.volt_value = -1; - backup_bat.psy = power_supply_register(&pdev->dev, - &backup_bat_desc, - &backup_psy_cfg); - if (IS_ERR(backup_bat.psy)) { - ret = PTR_ERR(backup_bat.psy); - goto err_reg_backup; - } - } - - INIT_DELAYED_WORK(&bat_work, s3c_adc_bat_work); - - if (gpiod) { - ret = request_irq(gpiod_to_irq(gpiod), - s3c_adc_bat_charged, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "battery charged", NULL); - if (ret) - goto err_irq; - } - - if (pdata->init) { - ret = pdata->init(); - if (ret) - goto err_platform; - } - - dev_info(&pdev->dev, "successfully loaded\n"); - device_init_wakeup(&pdev->dev, 1); - - /* Schedule timer to check current status */ - schedule_delayed_work(&bat_work, - msecs_to_jiffies(JITTER_DELAY)); - - return 0; - -err_platform: - if (gpiod) - free_irq(gpiod_to_irq(gpiod), NULL); -err_irq: - if (pdata->backup_volt_mult) - power_supply_unregister(backup_bat.psy); -err_reg_backup: - power_supply_unregister(main_bat.psy); -err_reg_main: - return ret; -} - -static int s3c_adc_bat_remove(struct platform_device *pdev) -{ - struct s3c_adc_client *client = platform_get_drvdata(pdev); - struct s3c_adc_bat_pdata *pdata = pdev->dev.platform_data; - - power_supply_unregister(main_bat.psy); - if (pdata->backup_volt_mult) - power_supply_unregister(backup_bat.psy); - - s3c_adc_release(client); - - if (main_bat.charge_finished) - free_irq(gpiod_to_irq(main_bat.charge_finished), NULL); - - cancel_delayed_work_sync(&bat_work); - - if (pdata->exit) - pdata->exit(); - - return 0; -} - -#ifdef CONFIG_PM -static int s3c_adc_bat_suspend(struct platform_device *pdev, - pm_message_t state) -{ - if (main_bat.charge_finished) { - if (device_may_wakeup(&pdev->dev)) - enable_irq_wake( - gpiod_to_irq(main_bat.charge_finished)); - else { - disable_irq(gpiod_to_irq(main_bat.charge_finished)); - main_bat.pdata->disable_charger(); - } - } - - return 0; -} - -static int s3c_adc_bat_resume(struct platform_device *pdev) -{ - if (main_bat.charge_finished) { - if (device_may_wakeup(&pdev->dev)) - disable_irq_wake( - gpiod_to_irq(main_bat.charge_finished)); - else - enable_irq(gpiod_to_irq(main_bat.charge_finished)); - } - - /* Schedule timer to check current status */ - schedule_delayed_work(&bat_work, - msecs_to_jiffies(JITTER_DELAY)); - - return 0; -} -#else -#define s3c_adc_bat_suspend NULL -#define s3c_adc_bat_resume NULL -#endif - -static struct platform_driver s3c_adc_bat_driver = { - .driver = { - .name = "s3c-adc-battery", - }, - .probe = s3c_adc_bat_probe, - .remove = s3c_adc_bat_remove, - .suspend = s3c_adc_bat_suspend, - .resume = s3c_adc_bat_resume, -}; - -module_platform_driver(s3c_adc_bat_driver); - -MODULE_AUTHOR("Vasily Khoruzhick <anarsoul@gmail.com>"); -MODULE_DESCRIPTION("iPAQ H1930/H1940/RX1950 battery controller driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/power/supply/tosa_battery.c b/drivers/power/supply/tosa_battery.c deleted file mode 100644 index 73d4aca4c386..000000000000 --- a/drivers/power/supply/tosa_battery.c +++ /dev/null @@ -1,512 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Battery and Power Management code for the Sharp SL-6000x - * - * Copyright (c) 2005 Dirk Opfer - * Copyright (c) 2008 Dmitry Baryshkov - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/power_supply.h> -#include <linux/wm97xx.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/gpio/consumer.h> - -#include <asm/mach-types.h> - -static DEFINE_MUTEX(bat_lock); /* protects gpio pins */ -static struct work_struct bat_work; - -struct tosa_bat { - int status; - struct power_supply *psy; - int full_chrg; - - struct mutex work_lock; /* protects data */ - - bool (*is_present)(struct tosa_bat *bat); - struct gpio_desc *gpiod_full; - struct gpio_desc *gpiod_charge_off; - - int technology; - - struct gpio_desc *gpiod_bat; - int adc_bat; - int adc_bat_divider; - int bat_max; - int bat_min; - - struct gpio_desc *gpiod_temp; - int adc_temp; - int adc_temp_divider; -}; - -static struct gpio_desc *jacket_detect; -static struct tosa_bat tosa_bat_main; -static struct tosa_bat tosa_bat_jacket; - -static unsigned long tosa_read_bat(struct tosa_bat *bat) -{ - unsigned long value = 0; - - if (!bat->gpiod_bat || bat->adc_bat < 0) - return 0; - - mutex_lock(&bat_lock); - gpiod_set_value(bat->gpiod_bat, 1); - msleep(5); - value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy->dev.parent), - bat->adc_bat); - gpiod_set_value(bat->gpiod_bat, 0); - mutex_unlock(&bat_lock); - - value = value * 1000000 / bat->adc_bat_divider; - - return value; -} - -static unsigned long tosa_read_temp(struct tosa_bat *bat) -{ - unsigned long value = 0; - - if (!bat->gpiod_temp || bat->adc_temp < 0) - return 0; - - mutex_lock(&bat_lock); - gpiod_set_value(bat->gpiod_temp, 1); - msleep(5); - value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy->dev.parent), - bat->adc_temp); - gpiod_set_value(bat->gpiod_temp, 0); - mutex_unlock(&bat_lock); - - value = value * 10000 / bat->adc_temp_divider; - - return value; -} - -static int tosa_bat_get_property(struct power_supply *psy, - enum power_supply_property psp, - union power_supply_propval *val) -{ - int ret = 0; - struct tosa_bat *bat = power_supply_get_drvdata(psy); - - if (bat->is_present && !bat->is_present(bat) - && psp != POWER_SUPPLY_PROP_PRESENT) { - return -ENODEV; - } - - switch (psp) { - case POWER_SUPPLY_PROP_STATUS: - val->intval = bat->status; - break; - case POWER_SUPPLY_PROP_TECHNOLOGY: - val->intval = bat->technology; - break; - case POWER_SUPPLY_PROP_VOLTAGE_NOW: - val->intval = tosa_read_bat(bat); - break; - case POWER_SUPPLY_PROP_VOLTAGE_MAX: - if (bat->full_chrg == -1) - val->intval = bat->bat_max; - else - val->intval = bat->full_chrg; - break; - case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: - val->intval = bat->bat_max; - break; - case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: - val->intval = bat->bat_min; - break; - case POWER_SUPPLY_PROP_TEMP: - val->intval = tosa_read_temp(bat); - break; - case POWER_SUPPLY_PROP_PRESENT: - val->intval = bat->is_present ? bat->is_present(bat) : 1; - break; - default: - ret = -EINVAL; - break; - } - return ret; -} - -static bool tosa_jacket_bat_is_present(struct tosa_bat *bat) -{ - return gpiod_get_value(jacket_detect) == 0; -} - -static void tosa_bat_external_power_changed(struct power_supply *psy) -{ - schedule_work(&bat_work); -} - -static irqreturn_t tosa_bat_gpio_isr(int irq, void *data) -{ - pr_info("tosa_bat_gpio irq\n"); - schedule_work(&bat_work); - return IRQ_HANDLED; -} - -static void tosa_bat_update(struct tosa_bat *bat) -{ - int old; - struct power_supply *psy = bat->psy; - - mutex_lock(&bat->work_lock); - - old = bat->status; - - if (bat->is_present && !bat->is_present(bat)) { - printk(KERN_NOTICE "%s not present\n", psy->desc->name); - bat->status = POWER_SUPPLY_STATUS_UNKNOWN; - bat->full_chrg = -1; - } else if (power_supply_am_i_supplied(psy)) { - if (bat->status == POWER_SUPPLY_STATUS_DISCHARGING) { - gpiod_set_value(bat->gpiod_charge_off, 0); - mdelay(15); - } - - if (gpiod_get_value(bat->gpiod_full)) { - if (old == POWER_SUPPLY_STATUS_CHARGING || - bat->full_chrg == -1) - bat->full_chrg = tosa_read_bat(bat); - - gpiod_set_value(bat->gpiod_charge_off, 1); - bat->status = POWER_SUPPLY_STATUS_FULL; - } else { - gpiod_set_value(bat->gpiod_charge_off, 0); - bat->status = POWER_SUPPLY_STATUS_CHARGING; - } - } else { - gpiod_set_value(bat->gpiod_charge_off, 1); - bat->status = POWER_SUPPLY_STATUS_DISCHARGING; - } - - if (old != bat->status) - power_supply_changed(psy); - - mutex_unlock(&bat->work_lock); -} - -static void tosa_bat_work(struct work_struct *work) -{ - tosa_bat_update(&tosa_bat_main); - tosa_bat_update(&tosa_bat_jacket); -} - - -static enum power_supply_property tosa_bat_main_props[] = { - POWER_SUPPLY_PROP_STATUS, - POWER_SUPPLY_PROP_TECHNOLOGY, - POWER_SUPPLY_PROP_VOLTAGE_NOW, - POWER_SUPPLY_PROP_VOLTAGE_MAX, - POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, - POWER_SUPPLY_PROP_TEMP, - POWER_SUPPLY_PROP_PRESENT, -}; - -static enum power_supply_property tosa_bat_bu_props[] = { - POWER_SUPPLY_PROP_STATUS, - POWER_SUPPLY_PROP_TECHNOLOGY, - POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, - POWER_SUPPLY_PROP_VOLTAGE_NOW, - POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, - POWER_SUPPLY_PROP_PRESENT, -}; - -static const struct power_supply_desc tosa_bat_main_desc = { - .name = "main-battery", - .type = POWER_SUPPLY_TYPE_BATTERY, - .properties = tosa_bat_main_props, - .num_properties = ARRAY_SIZE(tosa_bat_main_props), - .get_property = tosa_bat_get_property, - .external_power_changed = tosa_bat_external_power_changed, - .use_for_apm = 1, -}; - -static const struct power_supply_desc tosa_bat_jacket_desc = { - .name = "jacket-battery", - .type = POWER_SUPPLY_TYPE_BATTERY, - .properties = tosa_bat_main_props, - .num_properties = ARRAY_SIZE(tosa_bat_main_props), - .get_property = tosa_bat_get_property, - .external_power_changed = tosa_bat_external_power_changed, -}; - -static const struct power_supply_desc tosa_bat_bu_desc = { - .name = "backup-battery", - .type = POWER_SUPPLY_TYPE_BATTERY, - .properties = tosa_bat_bu_props, - .num_properties = ARRAY_SIZE(tosa_bat_bu_props), - .get_property = tosa_bat_get_property, - .external_power_changed = tosa_bat_external_power_changed, -}; - -static struct tosa_bat tosa_bat_main = { - .status = POWER_SUPPLY_STATUS_DISCHARGING, - .full_chrg = -1, - .psy = NULL, - - .gpiod_full = NULL, - .gpiod_charge_off = NULL, - - .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, - - .gpiod_bat = NULL, - .adc_bat = WM97XX_AUX_ID3, - .adc_bat_divider = 414, - .bat_max = 4310000, - .bat_min = 1551 * 1000000 / 414, - - .gpiod_temp = NULL, - .adc_temp = WM97XX_AUX_ID2, - .adc_temp_divider = 10000, -}; - -static struct tosa_bat tosa_bat_jacket = { - .status = POWER_SUPPLY_STATUS_DISCHARGING, - .full_chrg = -1, - .psy = NULL, - - .is_present = tosa_jacket_bat_is_present, - .gpiod_full = NULL, - .gpiod_charge_off = NULL, - - .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, - - .gpiod_bat = NULL, - .adc_bat = WM97XX_AUX_ID3, - .adc_bat_divider = 414, - .bat_max = 4310000, - .bat_min = 1551 * 1000000 / 414, - - .gpiod_temp = NULL, - .adc_temp = WM97XX_AUX_ID2, - .adc_temp_divider = 10000, -}; - -static struct tosa_bat tosa_bat_bu = { - .status = POWER_SUPPLY_STATUS_UNKNOWN, - .full_chrg = -1, - .psy = NULL, - - .gpiod_full = NULL, - .gpiod_charge_off = NULL, - - .technology = POWER_SUPPLY_TECHNOLOGY_LiMn, - - .gpiod_bat = NULL, - .adc_bat = WM97XX_AUX_ID4, - .adc_bat_divider = 1266, - - .gpiod_temp = NULL, - .adc_temp = -1, - .adc_temp_divider = -1, -}; - -#ifdef CONFIG_PM -static int tosa_bat_suspend(struct platform_device *dev, pm_message_t state) -{ - /* flush all pending status updates */ - flush_work(&bat_work); - return 0; -} - -static int tosa_bat_resume(struct platform_device *dev) -{ - /* things may have changed while we were away */ - schedule_work(&bat_work); - return 0; -} -#else -#define tosa_bat_suspend NULL -#define tosa_bat_resume NULL -#endif - -static int tosa_bat_probe(struct platform_device *pdev) -{ - int ret; - struct power_supply_config main_psy_cfg = {}, - jacket_psy_cfg = {}, - bu_psy_cfg = {}; - struct device *dev = &pdev->dev; - struct gpio_desc *dummy; - - if (!machine_is_tosa()) - return -ENODEV; - - /* Main charging control GPIOs */ - tosa_bat_main.gpiod_charge_off = devm_gpiod_get(dev, "main charge off", GPIOD_OUT_HIGH); - if (IS_ERR(tosa_bat_main.gpiod_charge_off)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_main.gpiod_charge_off), - "no main charger GPIO\n"); - tosa_bat_jacket.gpiod_charge_off = devm_gpiod_get(dev, "jacket charge off", GPIOD_OUT_HIGH); - if (IS_ERR(tosa_bat_jacket.gpiod_charge_off)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_jacket.gpiod_charge_off), - "no jacket charger GPIO\n"); - - /* Per-battery output check (routes battery voltage to ADC) */ - tosa_bat_main.gpiod_bat = devm_gpiod_get(dev, "main battery", GPIOD_OUT_LOW); - if (IS_ERR(tosa_bat_main.gpiod_bat)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_main.gpiod_bat), - "no main battery GPIO\n"); - tosa_bat_jacket.gpiod_bat = devm_gpiod_get(dev, "jacket battery", GPIOD_OUT_LOW); - if (IS_ERR(tosa_bat_jacket.gpiod_bat)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_jacket.gpiod_bat), - "no jacket battery GPIO\n"); - tosa_bat_bu.gpiod_bat = devm_gpiod_get(dev, "backup battery", GPIOD_OUT_LOW); - if (IS_ERR(tosa_bat_bu.gpiod_bat)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_bu.gpiod_bat), - "no backup battery GPIO\n"); - - /* Battery full detect GPIOs (using PXA SoC GPIOs) */ - tosa_bat_main.gpiod_full = devm_gpiod_get(dev, "main battery full", GPIOD_IN); - if (IS_ERR(tosa_bat_main.gpiod_full)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_main.gpiod_full), - "no main battery full GPIO\n"); - tosa_bat_jacket.gpiod_full = devm_gpiod_get(dev, "jacket battery full", GPIOD_IN); - if (IS_ERR(tosa_bat_jacket.gpiod_full)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_jacket.gpiod_full), - "no jacket battery full GPIO\n"); - - /* Battery temperature GPIOs (routes thermistor voltage to ADC) */ - tosa_bat_main.gpiod_temp = devm_gpiod_get(dev, "main battery temp", GPIOD_OUT_LOW); - if (IS_ERR(tosa_bat_main.gpiod_temp)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_main.gpiod_temp), - "no main battery temp GPIO\n"); - tosa_bat_jacket.gpiod_temp = devm_gpiod_get(dev, "jacket battery temp", GPIOD_OUT_LOW); - if (IS_ERR(tosa_bat_jacket.gpiod_temp)) - return dev_err_probe(dev, PTR_ERR(tosa_bat_jacket.gpiod_temp), - "no jacket battery temp GPIO\n"); - - /* Jacket detect GPIO */ - jacket_detect = devm_gpiod_get(dev, "jacket detect", GPIOD_IN); - if (IS_ERR(jacket_detect)) - return dev_err_probe(dev, PTR_ERR(jacket_detect), - "no jacket detect GPIO\n"); - - /* Battery low indication GPIOs (not used, we just request them) */ - dummy = devm_gpiod_get(dev, "main battery low", GPIOD_IN); - if (IS_ERR(dummy)) - return dev_err_probe(dev, PTR_ERR(dummy), - "no main battery low GPIO\n"); - dummy = devm_gpiod_get(dev, "jacket battery low", GPIOD_IN); - if (IS_ERR(dummy)) - return dev_err_probe(dev, PTR_ERR(dummy), - "no jacket battery low GPIO\n"); - - /* Battery switch GPIO (not used just requested) */ - dummy = devm_gpiod_get(dev, "battery switch", GPIOD_OUT_LOW); - if (IS_ERR(dummy)) - return dev_err_probe(dev, PTR_ERR(dummy), - "no battery switch GPIO\n"); - - mutex_init(&tosa_bat_main.work_lock); - mutex_init(&tosa_bat_jacket.work_lock); - - INIT_WORK(&bat_work, tosa_bat_work); - - main_psy_cfg.drv_data = &tosa_bat_main; - tosa_bat_main.psy = power_supply_register(dev, - &tosa_bat_main_desc, - &main_psy_cfg); - if (IS_ERR(tosa_bat_main.psy)) { - ret = PTR_ERR(tosa_bat_main.psy); - goto err_psy_reg_main; - } - - jacket_psy_cfg.drv_data = &tosa_bat_jacket; - tosa_bat_jacket.psy = power_supply_register(dev, - &tosa_bat_jacket_desc, - &jacket_psy_cfg); - if (IS_ERR(tosa_bat_jacket.psy)) { - ret = PTR_ERR(tosa_bat_jacket.psy); - goto err_psy_reg_jacket; - } - - bu_psy_cfg.drv_data = &tosa_bat_bu; - tosa_bat_bu.psy = power_supply_register(dev, &tosa_bat_bu_desc, - &bu_psy_cfg); - if (IS_ERR(tosa_bat_bu.psy)) { - ret = PTR_ERR(tosa_bat_bu.psy); - goto err_psy_reg_bu; - } - - ret = request_irq(gpiod_to_irq(tosa_bat_main.gpiod_full), - tosa_bat_gpio_isr, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "main full", &tosa_bat_main); - if (ret) - goto err_req_main; - - ret = request_irq(gpiod_to_irq(tosa_bat_jacket.gpiod_full), - tosa_bat_gpio_isr, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "jacket full", &tosa_bat_jacket); - if (ret) - goto err_req_jacket; - - ret = request_irq(gpiod_to_irq(jacket_detect), - tosa_bat_gpio_isr, - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, - "jacket detect", &tosa_bat_jacket); - if (!ret) { - schedule_work(&bat_work); - return 0; - } - - free_irq(gpiod_to_irq(tosa_bat_jacket.gpiod_full), &tosa_bat_jacket); -err_req_jacket: - free_irq(gpiod_to_irq(tosa_bat_main.gpiod_full), &tosa_bat_main); -err_req_main: - power_supply_unregister(tosa_bat_bu.psy); -err_psy_reg_bu: - power_supply_unregister(tosa_bat_jacket.psy); -err_psy_reg_jacket: - power_supply_unregister(tosa_bat_main.psy); -err_psy_reg_main: - - /* see comment in tosa_bat_remove */ - cancel_work_sync(&bat_work); - - return ret; -} - -static int tosa_bat_remove(struct platform_device *dev) -{ - free_irq(gpiod_to_irq(jacket_detect), &tosa_bat_jacket); - free_irq(gpiod_to_irq(tosa_bat_jacket.gpiod_full), &tosa_bat_jacket); - free_irq(gpiod_to_irq(tosa_bat_main.gpiod_full), &tosa_bat_main); - - power_supply_unregister(tosa_bat_bu.psy); - power_supply_unregister(tosa_bat_jacket.psy); - power_supply_unregister(tosa_bat_main.psy); - - /* - * Now cancel the bat_work. We won't get any more schedules, - * since all sources (isr and external_power_changed) are - * unregistered now. - */ - cancel_work_sync(&bat_work); - return 0; -} - -static struct platform_driver tosa_bat_driver = { - .driver.name = "wm97xx-battery", - .driver.owner = THIS_MODULE, - .probe = tosa_bat_probe, - .remove = tosa_bat_remove, - .suspend = tosa_bat_suspend, - .resume = tosa_bat_resume, -}; - -module_platform_driver(tosa_bat_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Dmitry Baryshkov"); -MODULE_DESCRIPTION("Tosa battery driver"); -MODULE_ALIAS("platform:wm97xx-battery"); diff --git a/drivers/power/supply/z2_battery.c b/drivers/power/supply/z2_battery.c deleted file mode 100644 index 0ba4a590a0a5..000000000000 --- a/drivers/power/supply/z2_battery.c +++ /dev/null @@ -1,318 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Battery measurement code for Zipit Z2 - * - * Copyright (C) 2009 Peter Edwards <sweetlilmre@gmail.com> - */ - -#include <linux/module.h> -#include <linux/gpio/consumer.h> -#include <linux/i2c.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/power_supply.h> -#include <linux/slab.h> -#include <linux/z2_battery.h> - -#define Z2_DEFAULT_NAME "Z2" - -struct z2_charger { - struct z2_battery_info *info; - struct gpio_desc *charge_gpiod; - int bat_status; - struct i2c_client *client; - struct power_supply *batt_ps; - struct power_supply_desc batt_ps_desc; - struct mutex work_lock; - struct work_struct bat_work; -}; - -static unsigned long z2_read_bat(struct z2_charger *charger) -{ - int data; - data = i2c_smbus_read_byte_data(charger->client, - charger->info->batt_I2C_reg); - if (data < 0) - return 0; - - return data * charger->info->batt_mult / charger->info->batt_div; -} - -static int z2_batt_get_property(struct power_supply *batt_ps, - enum power_supply_property psp, - union power_supply_propval *val) -{ - struct z2_charger *charger = power_supply_get_drvdata(batt_ps); - struct z2_battery_info *info = charger->info; - - switch (psp) { - case POWER_SUPPLY_PROP_STATUS: - val->intval = charger->bat_status; - break; - case POWER_SUPPLY_PROP_TECHNOLOGY: - val->intval = info->batt_tech; - break; - case POWER_SUPPLY_PROP_VOLTAGE_NOW: - if (info->batt_I2C_reg >= 0) - val->intval = z2_read_bat(charger); - else - return -EINVAL; - break; - case POWER_SUPPLY_PROP_VOLTAGE_MAX: - if (info->max_voltage >= 0) - val->intval = info->max_voltage; - else - return -EINVAL; - break; - case POWER_SUPPLY_PROP_VOLTAGE_MIN: - if (info->min_voltage >= 0) - val->intval = info->min_voltage; - else - return -EINVAL; - break; - case POWER_SUPPLY_PROP_PRESENT: - val->intval = 1; - break; - default: - return -EINVAL; - } - - return 0; -} - -static void z2_batt_ext_power_changed(struct power_supply *batt_ps) -{ - struct z2_charger *charger = power_supply_get_drvdata(batt_ps); - - schedule_work(&charger->bat_work); -} - -static void z2_batt_update(struct z2_charger *charger) -{ - int old_status = charger->bat_status; - - mutex_lock(&charger->work_lock); - - charger->bat_status = charger->charge_gpiod ? - (gpiod_get_value(charger->charge_gpiod) ? - POWER_SUPPLY_STATUS_CHARGING : - POWER_SUPPLY_STATUS_DISCHARGING) : - POWER_SUPPLY_STATUS_UNKNOWN; - - if (old_status != charger->bat_status) { - pr_debug("%s: %i -> %i\n", charger->batt_ps->desc->name, - old_status, - charger->bat_status); - power_supply_changed(charger->batt_ps); - } - - mutex_unlock(&charger->work_lock); -} - -static void z2_batt_work(struct work_struct *work) -{ - struct z2_charger *charger; - charger = container_of(work, struct z2_charger, bat_work); - z2_batt_update(charger); -} - -static irqreturn_t z2_charge_switch_irq(int irq, void *devid) -{ - struct z2_charger *charger = devid; - schedule_work(&charger->bat_work); - return IRQ_HANDLED; -} - -static int z2_batt_ps_init(struct z2_charger *charger, int props) -{ - int i = 0; - enum power_supply_property *prop; - struct z2_battery_info *info = charger->info; - - if (charger->charge_gpiod) - props++; /* POWER_SUPPLY_PROP_STATUS */ - if (info->batt_tech >= 0) - props++; /* POWER_SUPPLY_PROP_TECHNOLOGY */ - if (info->batt_I2C_reg >= 0) - props++; /* POWER_SUPPLY_PROP_VOLTAGE_NOW */ - if (info->max_voltage >= 0) - props++; /* POWER_SUPPLY_PROP_VOLTAGE_MAX */ - if (info->min_voltage >= 0) - props++; /* POWER_SUPPLY_PROP_VOLTAGE_MIN */ - - prop = kcalloc(props, sizeof(*prop), GFP_KERNEL); - if (!prop) - return -ENOMEM; - - prop[i++] = POWER_SUPPLY_PROP_PRESENT; - if (charger->charge_gpiod) - prop[i++] = POWER_SUPPLY_PROP_STATUS; - if (info->batt_tech >= 0) - prop[i++] = POWER_SUPPLY_PROP_TECHNOLOGY; - if (info->batt_I2C_reg >= 0) - prop[i++] = POWER_SUPPLY_PROP_VOLTAGE_NOW; - if (info->max_voltage >= 0) - prop[i++] = POWER_SUPPLY_PROP_VOLTAGE_MAX; - if (info->min_voltage >= 0) - prop[i++] = POWER_SUPPLY_PROP_VOLTAGE_MIN; - - if (!info->batt_name) { - dev_info(&charger->client->dev, - "Please consider setting proper battery " - "name in platform definition file, falling " - "back to name \" Z2_DEFAULT_NAME \"\n"); - charger->batt_ps_desc.name = Z2_DEFAULT_NAME; - } else - charger->batt_ps_desc.name = info->batt_name; - - charger->batt_ps_desc.properties = prop; - charger->batt_ps_desc.num_properties = props; - charger->batt_ps_desc.type = POWER_SUPPLY_TYPE_BATTERY; - charger->batt_ps_desc.get_property = z2_batt_get_property; - charger->batt_ps_desc.external_power_changed = - z2_batt_ext_power_changed; - charger->batt_ps_desc.use_for_apm = 1; - - return 0; -} - -static int z2_batt_probe(struct i2c_client *client) -{ - int ret = 0; - int props = 1; /* POWER_SUPPLY_PROP_PRESENT */ - struct z2_charger *charger; - struct z2_battery_info *info = client->dev.platform_data; - struct power_supply_config psy_cfg = {}; - - if (info == NULL) { - dev_err(&client->dev, - "Please set platform device platform_data" - " to a valid z2_battery_info pointer!\n"); - return -EINVAL; - } - - charger = kzalloc(sizeof(*charger), GFP_KERNEL); - if (charger == NULL) - return -ENOMEM; - - charger->bat_status = POWER_SUPPLY_STATUS_UNKNOWN; - charger->info = info; - charger->client = client; - i2c_set_clientdata(client, charger); - psy_cfg.drv_data = charger; - - mutex_init(&charger->work_lock); - - charger->charge_gpiod = devm_gpiod_get_optional(&client->dev, - NULL, GPIOD_IN); - if (IS_ERR(charger->charge_gpiod)) { - ret = dev_err_probe(&client->dev, - PTR_ERR(charger->charge_gpiod), - "failed to get charge GPIO\n"); - goto err; - } - - if (charger->charge_gpiod) { - gpiod_set_consumer_name(charger->charge_gpiod, "BATT CHRG"); - - irq_set_irq_type(gpiod_to_irq(charger->charge_gpiod), - IRQ_TYPE_EDGE_BOTH); - ret = request_irq(gpiod_to_irq(charger->charge_gpiod), - z2_charge_switch_irq, 0, - "AC Detect", charger); - if (ret) - goto err; - } - - ret = z2_batt_ps_init(charger, props); - if (ret) - goto err3; - - INIT_WORK(&charger->bat_work, z2_batt_work); - - charger->batt_ps = power_supply_register(&client->dev, - &charger->batt_ps_desc, - &psy_cfg); - if (IS_ERR(charger->batt_ps)) { - ret = PTR_ERR(charger->batt_ps); - goto err4; - } - - schedule_work(&charger->bat_work); - - return 0; - -err4: - kfree(charger->batt_ps_desc.properties); -err3: - if (charger->charge_gpiod) - free_irq(gpiod_to_irq(charger->charge_gpiod), charger); -err: - kfree(charger); - return ret; -} - -static void z2_batt_remove(struct i2c_client *client) -{ - struct z2_charger *charger = i2c_get_clientdata(client); - - cancel_work_sync(&charger->bat_work); - power_supply_unregister(charger->batt_ps); - - kfree(charger->batt_ps_desc.properties); - if (charger->charge_gpiod) - free_irq(gpiod_to_irq(charger->charge_gpiod), charger); - - kfree(charger); -} - -#ifdef CONFIG_PM -static int z2_batt_suspend(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct z2_charger *charger = i2c_get_clientdata(client); - - flush_work(&charger->bat_work); - return 0; -} - -static int z2_batt_resume(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct z2_charger *charger = i2c_get_clientdata(client); - - schedule_work(&charger->bat_work); - return 0; -} - -static const struct dev_pm_ops z2_battery_pm_ops = { - .suspend = z2_batt_suspend, - .resume = z2_batt_resume, -}; - -#define Z2_BATTERY_PM_OPS (&z2_battery_pm_ops) - -#else -#define Z2_BATTERY_PM_OPS (NULL) -#endif - -static const struct i2c_device_id z2_batt_id[] = { - { "aer915", 0 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, z2_batt_id); - -static struct i2c_driver z2_batt_driver = { - .driver = { - .name = "z2-battery", - .pm = Z2_BATTERY_PM_OPS - }, - .probe_new = z2_batt_probe, - .remove = z2_batt_remove, - .id_table = z2_batt_id, -}; -module_i2c_driver(z2_batt_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Peter Edwards <sweetlilmre@gmail.com>"); -MODULE_DESCRIPTION("Zipit Z2 battery driver"); diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 677d2601d305..2ba72de0fa47 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1212,15 +1212,6 @@ config RTC_DRV_RP5C01 This driver can also be built as a module. If so, the module will be called rtc-rp5c01. -config RTC_DRV_V3020 - tristate "EM Microelectronic V3020" - help - If you say yes here you will get support for the - EM Microelectronic v3020 RTC chip. - - This driver can also be built as a module. If so, the module - will be called rtc-v3020. - config RTC_DRV_GAMECUBE tristate "Nintendo GameCube, Wii and Wii U RTC" depends on GAMECUBE || WII || COMPILE_TEST @@ -1415,18 +1406,14 @@ config RTC_DRV_OMAP config RTC_DRV_S3C tristate "Samsung S3C series SoC RTC" - depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S3C24XX || ARCH_S5PV210 || \ + depends on ARCH_EXYNOS || ARCH_S3C64XX || ARCH_S5PV210 || \ COMPILE_TEST help RTC (Realtime Clock) driver for the clock inbuilt into the - Samsung S3C24XX series of SoCs. This can provide periodic + Samsung S3C64XX series of SoCs. This can provide periodic interrupt rates from 1Hz to 64Hz for user programs, and wakeup from Alarm. - The driver currently supports the common features on all the - S3C24XX range, such as the S3C2410, S3C2412, S3C2413, S3C2440 - and S3C2442. - This driver can also be build as a module. If so, the module will be called rtc-s3c. diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index d3c042dcbc73..59eb30289335 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -176,7 +176,6 @@ obj-$(CONFIG_RTC_DRV_TI_K3) += rtc-ti-k3.o obj-$(CONFIG_RTC_DRV_TPS6586X) += rtc-tps6586x.o obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o -obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o obj-$(CONFIG_RTC_DRV_WILCO_EC) += rtc-wilco-ec.o obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c deleted file mode 100644 index 4e8341c49f51..000000000000 --- a/drivers/rtc/rtc-v3020.c +++ /dev/null @@ -1,369 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* drivers/rtc/rtc-v3020.c - * - * Copyright (C) 2006 8D Technologies inc. - * Copyright (C) 2004 Compulab Ltd. - * - * Driver for the V3020 RTC - * - * Changelog: - * - * 10-May-2006: Raphael Assenat <raph@8d.com> - * - Converted to platform driver - * - Use the generic rtc class - * - * ??-???-2004: Someone at Compulab - * - Initial driver creation. - */ -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/rtc.h> -#include <linux/types.h> -#include <linux/bcd.h> -#include <linux/platform_data/rtc-v3020.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/slab.h> - -#include <linux/io.h> - -#undef DEBUG - -struct v3020; - -struct v3020_chip_ops { - int (*map_io)(struct v3020 *chip, struct platform_device *pdev, - struct v3020_platform_data *pdata); - void (*unmap_io)(struct v3020 *chip); - unsigned char (*read_bit)(struct v3020 *chip); - void (*write_bit)(struct v3020 *chip, unsigned char bit); -}; - -#define V3020_CS 0 -#define V3020_WR 1 -#define V3020_RD 2 -#define V3020_IO 3 - -struct v3020 { - /* MMIO access */ - void __iomem *ioaddress; - int leftshift; - - /* GPIO access */ - struct gpio *gpio; - - const struct v3020_chip_ops *ops; - - struct rtc_device *rtc; -}; - - -static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev, - struct v3020_platform_data *pdata) -{ - if (pdev->num_resources != 1) - return -EBUSY; - - if (pdev->resource[0].flags != IORESOURCE_MEM) - return -EBUSY; - - chip->leftshift = pdata->leftshift; - chip->ioaddress = ioremap(pdev->resource[0].start, 1); - if (chip->ioaddress == NULL) - return -EBUSY; - - return 0; -} - -static void v3020_mmio_unmap(struct v3020 *chip) -{ - iounmap(chip->ioaddress); -} - -static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit) -{ - writel(bit << chip->leftshift, chip->ioaddress); -} - -static unsigned char v3020_mmio_read_bit(struct v3020 *chip) -{ - return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); -} - -static const struct v3020_chip_ops v3020_mmio_ops = { - .map_io = v3020_mmio_map, - .unmap_io = v3020_mmio_unmap, - .read_bit = v3020_mmio_read_bit, - .write_bit = v3020_mmio_write_bit, -}; - -static struct gpio v3020_gpio[] = { - { 0, GPIOF_OUT_INIT_HIGH, "RTC CS"}, - { 0, GPIOF_OUT_INIT_HIGH, "RTC WR"}, - { 0, GPIOF_OUT_INIT_HIGH, "RTC RD"}, - { 0, GPIOF_OUT_INIT_HIGH, "RTC IO"}, -}; - -static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev, - struct v3020_platform_data *pdata) -{ - int err; - - v3020_gpio[V3020_CS].gpio = pdata->gpio_cs; - v3020_gpio[V3020_WR].gpio = pdata->gpio_wr; - v3020_gpio[V3020_RD].gpio = pdata->gpio_rd; - v3020_gpio[V3020_IO].gpio = pdata->gpio_io; - - err = gpio_request_array(v3020_gpio, ARRAY_SIZE(v3020_gpio)); - - if (!err) - chip->gpio = v3020_gpio; - - return err; -} - -static void v3020_gpio_unmap(struct v3020 *chip) -{ - gpio_free_array(v3020_gpio, ARRAY_SIZE(v3020_gpio)); -} - -static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit) -{ - gpio_direction_output(chip->gpio[V3020_IO].gpio, bit); - gpio_set_value(chip->gpio[V3020_CS].gpio, 0); - gpio_set_value(chip->gpio[V3020_WR].gpio, 0); - udelay(1); - gpio_set_value(chip->gpio[V3020_WR].gpio, 1); - gpio_set_value(chip->gpio[V3020_CS].gpio, 1); -} - -static unsigned char v3020_gpio_read_bit(struct v3020 *chip) -{ - int bit; - - gpio_direction_input(chip->gpio[V3020_IO].gpio); - gpio_set_value(chip->gpio[V3020_CS].gpio, 0); - gpio_set_value(chip->gpio[V3020_RD].gpio, 0); - udelay(1); - bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio); - udelay(1); - gpio_set_value(chip->gpio[V3020_RD].gpio, 1); - gpio_set_value(chip->gpio[V3020_CS].gpio, 1); - - return bit; -} - -static const struct v3020_chip_ops v3020_gpio_ops = { - .map_io = v3020_gpio_map, - .unmap_io = v3020_gpio_unmap, - .read_bit = v3020_gpio_read_bit, - .write_bit = v3020_gpio_write_bit, -}; - -static void v3020_set_reg(struct v3020 *chip, unsigned char address, - unsigned char data) -{ - int i; - unsigned char tmp; - - tmp = address; - for (i = 0; i < 4; i++) { - chip->ops->write_bit(chip, (tmp & 1)); - tmp >>= 1; - udelay(1); - } - - /* Commands dont have data */ - if (!V3020_IS_COMMAND(address)) { - for (i = 0; i < 8; i++) { - chip->ops->write_bit(chip, (data & 1)); - data >>= 1; - udelay(1); - } - } -} - -static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address) -{ - unsigned int data = 0; - int i; - - for (i = 0; i < 4; i++) { - chip->ops->write_bit(chip, (address & 1)); - address >>= 1; - udelay(1); - } - - for (i = 0; i < 8; i++) { - data >>= 1; - if (chip->ops->read_bit(chip)) - data |= 0x80; - udelay(1); - } - - return data; -} - -static int v3020_read_time(struct device *dev, struct rtc_time *dt) -{ - struct v3020 *chip = dev_get_drvdata(dev); - int tmp; - - /* Copy the current time to ram... */ - v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0); - - /* ...and then read constant values. */ - tmp = v3020_get_reg(chip, V3020_SECONDS); - dt->tm_sec = bcd2bin(tmp); - tmp = v3020_get_reg(chip, V3020_MINUTES); - dt->tm_min = bcd2bin(tmp); - tmp = v3020_get_reg(chip, V3020_HOURS); - dt->tm_hour = bcd2bin(tmp); - tmp = v3020_get_reg(chip, V3020_MONTH_DAY); - dt->tm_mday = bcd2bin(tmp); - tmp = v3020_get_reg(chip, V3020_MONTH); - dt->tm_mon = bcd2bin(tmp) - 1; - tmp = v3020_get_reg(chip, V3020_WEEK_DAY); - dt->tm_wday = bcd2bin(tmp); - tmp = v3020_get_reg(chip, V3020_YEAR); - dt->tm_year = bcd2bin(tmp)+100; - - dev_dbg(dev, "\n%s : Read RTC values\n", __func__); - dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour); - dev_dbg(dev, "tm_min : %i\n", dt->tm_min); - dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec); - dev_dbg(dev, "tm_year: %i\n", dt->tm_year); - dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon); - dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday); - dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday); - - return 0; -} - - -static int v3020_set_time(struct device *dev, struct rtc_time *dt) -{ - struct v3020 *chip = dev_get_drvdata(dev); - - dev_dbg(dev, "\n%s : Setting RTC values\n", __func__); - dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec); - dev_dbg(dev, "tm_min : %i\n", dt->tm_min); - dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour); - dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday); - dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday); - dev_dbg(dev, "tm_year: %i\n", dt->tm_year); - - /* Write all the values to ram... */ - v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec)); - v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min)); - v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour)); - v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday)); - v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1)); - v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday)); - v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100)); - - /* ...and set the clock. */ - v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0); - - /* Compulab used this delay here. I dont know why, - * the datasheet does not specify a delay. */ - /*mdelay(5);*/ - - return 0; -} - -static const struct rtc_class_ops v3020_rtc_ops = { - .read_time = v3020_read_time, - .set_time = v3020_set_time, -}; - -static int rtc_probe(struct platform_device *pdev) -{ - struct v3020_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct v3020 *chip; - int retval; - int i; - - chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); - if (!chip) - return -ENOMEM; - - if (pdata->use_gpio) - chip->ops = &v3020_gpio_ops; - else - chip->ops = &v3020_mmio_ops; - - retval = chip->ops->map_io(chip, pdev, pdata); - if (retval) - return retval; - - /* Make sure the v3020 expects a communication cycle - * by reading 8 times */ - for (i = 0; i < 8; i++) - chip->ops->read_bit(chip); - - /* Test chip by doing a write/read sequence - * to the chip ram */ - v3020_set_reg(chip, V3020_SECONDS, 0x33); - if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) { - retval = -ENODEV; - goto err_io; - } - - /* Make sure frequency measurement mode, test modes, and lock - * are all disabled */ - v3020_set_reg(chip, V3020_STATUS_0, 0x0); - - if (pdata->use_gpio) - dev_info(&pdev->dev, "Chip available at GPIOs " - "%d, %d, %d, %d\n", - chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio, - chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio); - else - dev_info(&pdev->dev, "Chip available at " - "physical address 0x%llx," - "data connected to D%d\n", - (unsigned long long)pdev->resource[0].start, - chip->leftshift); - - platform_set_drvdata(pdev, chip); - - chip->rtc = devm_rtc_device_register(&pdev->dev, "v3020", - &v3020_rtc_ops, THIS_MODULE); - if (IS_ERR(chip->rtc)) { - retval = PTR_ERR(chip->rtc); - goto err_io; - } - - return 0; - -err_io: - chip->ops->unmap_io(chip); - - return retval; -} - -static int rtc_remove(struct platform_device *dev) -{ - struct v3020 *chip = platform_get_drvdata(dev); - - chip->ops->unmap_io(chip); - - return 0; -} - -static struct platform_driver rtc_device_driver = { - .probe = rtc_probe, - .remove = rtc_remove, - .driver = { - .name = "v3020", - }, -}; - -module_platform_driver(rtc_device_driver); - -MODULE_DESCRIPTION("V3020 RTC"); -MODULE_AUTHOR("Raphael Assenat"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:v3020"); diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig index 02e319508cc6..7a8f291e7704 100644 --- a/drivers/soc/samsung/Kconfig +++ b/drivers/soc/samsung/Kconfig @@ -52,29 +52,9 @@ config EXYNOS_PM_DOMAINS bool "Exynos PM domains" if COMPILE_TEST depends on (ARCH_EXYNOS && PM_GENERIC_DOMAINS) || COMPILE_TEST -config SAMSUNG_PM_DEBUG - bool "Samsung PM Suspend debug" - depends on PM && DEBUG_KERNEL - depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 - depends on DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART - depends on DEBUG_LL && MMU - help - Say Y here if you want verbose debugging from the PM Suspend and - Resume code. See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - for more information. - -config S3C_PM_DEBUG_LED_SMDK - bool "SMDK LED suspend/resume debugging" - depends on PM && (MACH_SMDK6410) - help - Say Y here to enable the use of the SMDK LEDs on the baseboard - for debugging of the state of the suspend and resume process. - - Note, this currently only works for S3C64XX based SMDK boards. - config SAMSUNG_PM_CHECK bool "S3C2410 PM Suspend Memory CRC" - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210) + depends on PM && (ARCH_S3C64XX || ARCH_S5PV210) select CRC32 help Enable the PM code's memory area checksum over sleep. This option @@ -85,8 +65,6 @@ config SAMSUNG_PM_CHECK Note, this can take several seconds depending on memory size and CPU speed. - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - config SAMSUNG_PM_CHECK_CHUNKSIZE int "S3C2410 PM Suspend CRC Chunksize (KiB)" depends on PM && SAMSUNG_PM_CHECK @@ -97,8 +75,6 @@ config SAMSUNG_PM_CHECK_CHUNKSIZE the CRC data block will take more memory, but will identify any faults with better precision. - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - config EXYNOS_REGULATOR_COUPLER bool "Exynos SoC Regulator Coupler" if COMPILE_TEST depends on ARCH_EXYNOS || COMPILE_TEST diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile index 9f59d1905ab0..d35270fc6b2b 100644 --- a/drivers/soc/samsung/Makefile +++ b/drivers/soc/samsung/Makefile @@ -14,4 +14,3 @@ obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o obj-$(CONFIG_EXYNOS_REGULATOR_COUPLER) += exynos-regulator-coupler.o obj-$(CONFIG_SAMSUNG_PM_CHECK) += s3c-pm-check.o -obj-$(CONFIG_SAMSUNG_PM_DEBUG) += s3c-pm-debug.o diff --git a/drivers/soc/samsung/s3c-pm-debug.c b/drivers/soc/samsung/s3c-pm-debug.c deleted file mode 100644 index b5ce0e9a41e5..000000000000 --- a/drivers/soc/samsung/s3c-pm-debug.c +++ /dev/null @@ -1,79 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2013 Samsung Electronics Co., Ltd. -// Tomasz Figa <t.figa@samsung.com> -// Copyright (C) 2008 Openmoko, Inc. -// Copyright (C) 2004-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// Samsung common power management (suspend to RAM) debug support - -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/map.h> - -#include <linux/soc/samsung/s3c-pm.h> - -static struct pm_uart_save uart_save; - -extern void printascii(const char *); - -void s3c_pm_dbg(const char *fmt, ...) -{ - va_list va; - char buff[256]; - - va_start(va, fmt); - vsnprintf(buff, sizeof(buff), fmt, va); - va_end(va); - - printascii(buff); -} - -static inline void __iomem *s3c_pm_uart_base(void) -{ - unsigned long paddr; - unsigned long vaddr; - - debug_ll_addr(&paddr, &vaddr); - - return (void __iomem *)vaddr; -} - -void s3c_pm_save_uarts(bool is_s3c2410) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - save->ulcon = __raw_readl(regs + S3C2410_ULCON); - save->ucon = __raw_readl(regs + S3C2410_UCON); - save->ufcon = __raw_readl(regs + S3C2410_UFCON); - save->umcon = __raw_readl(regs + S3C2410_UMCON); - save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); - - if (!is_s3c2410) - save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); - - S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n", - regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); -} - -void s3c_pm_restore_uarts(bool is_s3c2410) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - s3c_pm_arch_update_uart(regs, save); - - __raw_writel(save->ulcon, regs + S3C2410_ULCON); - __raw_writel(save->ucon, regs + S3C2410_UCON); - __raw_writel(save->ufcon, regs + S3C2410_UFCON); - __raw_writel(save->umcon, regs + S3C2410_UMCON); - __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV); - - if (!is_s3c2410) - __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); -} diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3b1c0878bb85..2aba88a57a77 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -708,12 +708,6 @@ config SPI_TI_QSPI This device supports single, dual and quad read support, while it only supports single write mode. -config SPI_OMAP_100K - tristate "OMAP SPI 100K" - depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST - help - OMAP SPI 100K master controller for omap7xx boards. - config SPI_ORION tristate "Orion SPI master" depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST @@ -844,24 +838,6 @@ config SPI_QCOM_GENI This driver can also be built as a module. If so, the module will be called spi-geni-qcom. -config SPI_S3C24XX - tristate "Samsung S3C24XX series SPI" - depends on ARCH_S3C24XX - select SPI_BITBANG - help - SPI driver for Samsung S3C24XX series ARM SoCs - -config SPI_S3C24XX_FIQ - bool "S3C24XX driver with FIQ pseudo-DMA" - depends on SPI_S3C24XX - select FIQ - help - Enable FIQ support for the S3C24XX SPI driver to provide pseudo - DMA by using the fast-interrupt request framework, This allows - the driver to get DMA-like performance when there are either - no free DMA channels, or when doing transfers that required both - TX and RX data paths. - config SPI_S3C64XX tristate "Samsung S3C64XX/Exynos SoC series type SPI" depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index be9ba40ef8d0..12648f75a919 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -91,7 +91,6 @@ obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o spi-octeon-objs := spi-cavium.o spi-cavium-octeon.o obj-$(CONFIG_SPI_OCTEON) += spi-octeon.o obj-$(CONFIG_SPI_OMAP_UWIRE) += spi-omap-uwire.o -obj-$(CONFIG_SPI_OMAP_100K) += spi-omap-100k.o obj-$(CONFIG_SPI_OMAP24XX) += spi-omap2-mcspi.o obj-$(CONFIG_SPI_TI_QSPI) += spi-ti-qspi.o obj-$(CONFIG_SPI_ORION) += spi-orion.o @@ -112,8 +111,6 @@ obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o obj-$(CONFIG_MACH_REALTEK_RTL) += spi-realtek-rtl.o obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o -obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o -spi-s3c24xx-hw-y := spi-s3c24xx.o obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o obj-$(CONFIG_SPI_SH) += spi-sh.o diff --git a/drivers/spi/spi-omap-100k.c b/drivers/spi/spi-omap-100k.c deleted file mode 100644 index 061f7394e5b9..000000000000 --- a/drivers/spi/spi-omap-100k.c +++ /dev/null @@ -1,490 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * OMAP7xx SPI 100k controller driver - * Author: Fabrice Crohas <fcrohas@gmail.com> - * from original omap1_mcspi driver - * - * Copyright (C) 2005, 2006 Nokia Corporation - * Author: Samuel Ortiz <samuel.ortiz@nokia.com> and - * Juha Yrjola <juha.yrjola@nokia.com> - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/module.h> -#include <linux/device.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include <linux/spi/spi.h> - -#define OMAP1_SPI100K_MAX_FREQ 48000000 - -#define ICR_SPITAS (OMAP7XX_ICR_BASE + 0x12) - -#define SPI_SETUP1 0x00 -#define SPI_SETUP2 0x02 -#define SPI_CTRL 0x04 -#define SPI_STATUS 0x06 -#define SPI_TX_LSB 0x08 -#define SPI_TX_MSB 0x0a -#define SPI_RX_LSB 0x0c -#define SPI_RX_MSB 0x0e - -#define SPI_SETUP1_INT_READ_ENABLE (1UL << 5) -#define SPI_SETUP1_INT_WRITE_ENABLE (1UL << 4) -#define SPI_SETUP1_CLOCK_DIVISOR(x) ((x) << 1) -#define SPI_SETUP1_CLOCK_ENABLE (1UL << 0) - -#define SPI_SETUP2_ACTIVE_EDGE_FALLING (0UL << 0) -#define SPI_SETUP2_ACTIVE_EDGE_RISING (1UL << 0) -#define SPI_SETUP2_NEGATIVE_LEVEL (0UL << 5) -#define SPI_SETUP2_POSITIVE_LEVEL (1UL << 5) -#define SPI_SETUP2_LEVEL_TRIGGER (0UL << 10) -#define SPI_SETUP2_EDGE_TRIGGER (1UL << 10) - -#define SPI_CTRL_SEN(x) ((x) << 7) -#define SPI_CTRL_WORD_SIZE(x) (((x) - 1) << 2) -#define SPI_CTRL_WR (1UL << 1) -#define SPI_CTRL_RD (1UL << 0) - -#define SPI_STATUS_WE (1UL << 1) -#define SPI_STATUS_RD (1UL << 0) - -/* use PIO for small transfers, avoiding DMA setup/teardown overhead and - * cache operations; better heuristics consider wordsize and bitrate. - */ -#define DMA_MIN_BYTES 8 - -#define SPI_RUNNING 0 -#define SPI_SHUTDOWN 1 - -struct omap1_spi100k { - struct clk *ick; - struct clk *fck; - - /* Virtual base address of the controller */ - void __iomem *base; -}; - -struct omap1_spi100k_cs { - void __iomem *base; - int word_len; -}; - -static void spi100k_enable_clock(struct spi_master *master) -{ - unsigned int val; - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - /* enable SPI */ - val = readw(spi100k->base + SPI_SETUP1); - val |= SPI_SETUP1_CLOCK_ENABLE; - writew(val, spi100k->base + SPI_SETUP1); -} - -static void spi100k_disable_clock(struct spi_master *master) -{ - unsigned int val; - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - /* disable SPI */ - val = readw(spi100k->base + SPI_SETUP1); - val &= ~SPI_SETUP1_CLOCK_ENABLE; - writew(val, spi100k->base + SPI_SETUP1); -} - -static void spi100k_write_data(struct spi_master *master, int len, int data) -{ - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - /* write 16-bit word, shifting 8-bit data if necessary */ - if (len <= 8) { - data <<= 8; - len = 16; - } - - spi100k_enable_clock(master); - writew(data, spi100k->base + SPI_TX_MSB); - - writew(SPI_CTRL_SEN(0) | - SPI_CTRL_WORD_SIZE(len) | - SPI_CTRL_WR, - spi100k->base + SPI_CTRL); - - /* Wait for bit ack send change */ - while ((readw(spi100k->base + SPI_STATUS) & SPI_STATUS_WE) != SPI_STATUS_WE) - ; - udelay(1000); - - spi100k_disable_clock(master); -} - -static int spi100k_read_data(struct spi_master *master, int len) -{ - int dataL; - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - /* Always do at least 16 bits */ - if (len <= 8) - len = 16; - - spi100k_enable_clock(master); - writew(SPI_CTRL_SEN(0) | - SPI_CTRL_WORD_SIZE(len) | - SPI_CTRL_RD, - spi100k->base + SPI_CTRL); - - while ((readw(spi100k->base + SPI_STATUS) & SPI_STATUS_RD) != SPI_STATUS_RD) - ; - udelay(1000); - - dataL = readw(spi100k->base + SPI_RX_LSB); - readw(spi100k->base + SPI_RX_MSB); - spi100k_disable_clock(master); - - return dataL; -} - -static void spi100k_open(struct spi_master *master) -{ - /* get control of SPI */ - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - writew(SPI_SETUP1_INT_READ_ENABLE | - SPI_SETUP1_INT_WRITE_ENABLE | - SPI_SETUP1_CLOCK_DIVISOR(0), spi100k->base + SPI_SETUP1); - - /* configure clock and interrupts */ - writew(SPI_SETUP2_ACTIVE_EDGE_FALLING | - SPI_SETUP2_NEGATIVE_LEVEL | - SPI_SETUP2_LEVEL_TRIGGER, spi100k->base + SPI_SETUP2); -} - -static void omap1_spi100k_force_cs(struct omap1_spi100k *spi100k, int enable) -{ - if (enable) - writew(0x05fc, spi100k->base + SPI_CTRL); - else - writew(0x05fd, spi100k->base + SPI_CTRL); -} - -static unsigned -omap1_spi100k_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer) -{ - struct omap1_spi100k_cs *cs = spi->controller_state; - unsigned int count, c; - int word_len; - - count = xfer->len; - c = count; - word_len = cs->word_len; - - if (word_len <= 8) { - u8 *rx; - const u8 *tx; - - rx = xfer->rx_buf; - tx = xfer->tx_buf; - do { - c -= 1; - if (xfer->tx_buf != NULL) - spi100k_write_data(spi->master, word_len, *tx++); - if (xfer->rx_buf != NULL) - *rx++ = spi100k_read_data(spi->master, word_len); - } while (c); - } else if (word_len <= 16) { - u16 *rx; - const u16 *tx; - - rx = xfer->rx_buf; - tx = xfer->tx_buf; - do { - c -= 2; - if (xfer->tx_buf != NULL) - spi100k_write_data(spi->master, word_len, *tx++); - if (xfer->rx_buf != NULL) - *rx++ = spi100k_read_data(spi->master, word_len); - } while (c); - } else if (word_len <= 32) { - u32 *rx; - const u32 *tx; - - rx = xfer->rx_buf; - tx = xfer->tx_buf; - do { - c -= 4; - if (xfer->tx_buf != NULL) - spi100k_write_data(spi->master, word_len, *tx); - if (xfer->rx_buf != NULL) - *rx = spi100k_read_data(spi->master, word_len); - } while (c); - } - return count - c; -} - -/* called only when no transfer is active to this device */ -static int omap1_spi100k_setup_transfer(struct spi_device *spi, - struct spi_transfer *t) -{ - struct omap1_spi100k *spi100k = spi_master_get_devdata(spi->master); - struct omap1_spi100k_cs *cs = spi->controller_state; - u8 word_len; - - if (t != NULL) - word_len = t->bits_per_word; - else - word_len = spi->bits_per_word; - - if (word_len > 32) - return -EINVAL; - cs->word_len = word_len; - - /* SPI init before transfer */ - writew(0x3e, spi100k->base + SPI_SETUP1); - writew(0x00, spi100k->base + SPI_STATUS); - writew(0x3e, spi100k->base + SPI_CTRL); - - return 0; -} - -/* the spi->mode bits understood by this driver: */ -#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH) - -static int omap1_spi100k_setup(struct spi_device *spi) -{ - int ret; - struct omap1_spi100k *spi100k; - struct omap1_spi100k_cs *cs = spi->controller_state; - - spi100k = spi_master_get_devdata(spi->master); - - if (!cs) { - cs = devm_kzalloc(&spi->dev, sizeof(*cs), GFP_KERNEL); - if (!cs) - return -ENOMEM; - cs->base = spi100k->base + spi->chip_select * 0x14; - spi->controller_state = cs; - } - - spi100k_open(spi->master); - - clk_prepare_enable(spi100k->ick); - clk_prepare_enable(spi100k->fck); - - ret = omap1_spi100k_setup_transfer(spi, NULL); - - clk_disable_unprepare(spi100k->ick); - clk_disable_unprepare(spi100k->fck); - - return ret; -} - -static int omap1_spi100k_transfer_one_message(struct spi_master *master, - struct spi_message *m) -{ - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - struct spi_device *spi = m->spi; - struct spi_transfer *t = NULL; - int cs_active = 0; - int status = 0; - - list_for_each_entry(t, &m->transfers, transfer_list) { - if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { - break; - } - status = omap1_spi100k_setup_transfer(spi, t); - if (status < 0) - break; - - if (!cs_active) { - omap1_spi100k_force_cs(spi100k, 1); - cs_active = 1; - } - - if (t->len) { - unsigned count; - - count = omap1_spi100k_txrx_pio(spi, t); - m->actual_length += count; - - if (count != t->len) { - break; - } - } - - spi_transfer_delay_exec(t); - - /* ignore the "leave it on after last xfer" hint */ - - if (t->cs_change) { - omap1_spi100k_force_cs(spi100k, 0); - cs_active = 0; - } - } - - status = omap1_spi100k_setup_transfer(spi, NULL); - - if (cs_active) - omap1_spi100k_force_cs(spi100k, 0); - - m->status = status; - - spi_finalize_current_message(master); - - return status; -} - -static int omap1_spi100k_probe(struct platform_device *pdev) -{ - struct spi_master *master; - struct omap1_spi100k *spi100k; - int status = 0; - - if (!pdev->id) - return -EINVAL; - - master = spi_alloc_master(&pdev->dev, sizeof(*spi100k)); - if (master == NULL) { - dev_dbg(&pdev->dev, "master allocation failed\n"); - return -ENOMEM; - } - - if (pdev->id != -1) - master->bus_num = pdev->id; - - master->setup = omap1_spi100k_setup; - master->transfer_one_message = omap1_spi100k_transfer_one_message; - master->num_chipselect = 2; - master->mode_bits = MODEBITS; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); - master->min_speed_hz = OMAP1_SPI100K_MAX_FREQ/(1<<16); - master->max_speed_hz = OMAP1_SPI100K_MAX_FREQ; - master->auto_runtime_pm = true; - - spi100k = spi_master_get_devdata(master); - - /* - * The memory region base address is taken as the platform_data. - * You should allocate this with ioremap() before initializing - * the SPI. - */ - spi100k->base = (void __iomem *)dev_get_platdata(&pdev->dev); - - spi100k->ick = devm_clk_get(&pdev->dev, "ick"); - if (IS_ERR(spi100k->ick)) { - dev_dbg(&pdev->dev, "can't get spi100k_ick\n"); - status = PTR_ERR(spi100k->ick); - goto err; - } - - spi100k->fck = devm_clk_get(&pdev->dev, "fck"); - if (IS_ERR(spi100k->fck)) { - dev_dbg(&pdev->dev, "can't get spi100k_fck\n"); - status = PTR_ERR(spi100k->fck); - goto err; - } - - status = clk_prepare_enable(spi100k->ick); - if (status != 0) { - dev_err(&pdev->dev, "failed to enable ick: %d\n", status); - goto err; - } - - status = clk_prepare_enable(spi100k->fck); - if (status != 0) { - dev_err(&pdev->dev, "failed to enable fck: %d\n", status); - goto err_ick; - } - - pm_runtime_enable(&pdev->dev); - pm_runtime_set_active(&pdev->dev); - - status = devm_spi_register_master(&pdev->dev, master); - if (status < 0) - goto err_fck; - - return status; - -err_fck: - pm_runtime_disable(&pdev->dev); - clk_disable_unprepare(spi100k->fck); -err_ick: - clk_disable_unprepare(spi100k->ick); -err: - spi_master_put(master); - return status; -} - -static int omap1_spi100k_remove(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - pm_runtime_disable(&pdev->dev); - - clk_disable_unprepare(spi100k->fck); - clk_disable_unprepare(spi100k->ick); - - return 0; -} - -#ifdef CONFIG_PM -static int omap1_spi100k_runtime_suspend(struct device *dev) -{ - struct spi_master *master = dev_get_drvdata(dev); - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - - clk_disable_unprepare(spi100k->ick); - clk_disable_unprepare(spi100k->fck); - - return 0; -} - -static int omap1_spi100k_runtime_resume(struct device *dev) -{ - struct spi_master *master = dev_get_drvdata(dev); - struct omap1_spi100k *spi100k = spi_master_get_devdata(master); - int ret; - - ret = clk_prepare_enable(spi100k->ick); - if (ret != 0) { - dev_err(dev, "Failed to enable ick: %d\n", ret); - return ret; - } - - ret = clk_prepare_enable(spi100k->fck); - if (ret != 0) { - dev_err(dev, "Failed to enable fck: %d\n", ret); - clk_disable_unprepare(spi100k->ick); - return ret; - } - - return 0; -} -#endif - -static const struct dev_pm_ops omap1_spi100k_pm = { - SET_RUNTIME_PM_OPS(omap1_spi100k_runtime_suspend, - omap1_spi100k_runtime_resume, NULL) -}; - -static struct platform_driver omap1_spi100k_driver = { - .driver = { - .name = "omap1_spi100k", - .pm = &omap1_spi100k_pm, - }, - .probe = omap1_spi100k_probe, - .remove = omap1_spi100k_remove, -}; - -module_platform_driver(omap1_spi100k_driver); - -MODULE_DESCRIPTION("OMAP7xx SPI 100k controller driver"); -MODULE_AUTHOR("Fabrice Crohas <fcrohas@gmail.com>"); -MODULE_LICENSE("GPL"); diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 29198e6815b2..20c87163d612 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -99,7 +99,7 @@ struct uwire_state { * Or, put it in a structure which is used throughout the driver; * that avoids having to issue two loads for each bit of static data. */ -static unsigned int uwire_idx_shift; +static unsigned int uwire_idx_shift = 2; static void __iomem *uwire_base; static inline void uwire_write_reg(int idx, u16 val) @@ -481,11 +481,6 @@ static int uwire_probe(struct platform_device *pdev) } clk_prepare_enable(uwire->ck); - if (cpu_is_omap7xx()) - uwire_idx_shift = 1; - else - uwire_idx_shift = 2; - uwire_write_reg(UWIRE_SR3, 1); /* the spi->mode bits understood by this driver: */ @@ -536,15 +531,6 @@ static struct platform_driver uwire_driver = { static int __init omap_uwire_init(void) { - /* FIXME move these into the relevant board init code. also, include - * H3 support; it uses tsc2101 like H2 (on a different chipselect). - */ - - if (machine_is_omap_h2()) { - /* defaults: W21 SDO, U18 SDI, V19 SCL */ - omap_cfg_reg(N14_1610_UWIRE_CS0); - omap_cfg_reg(N15_1610_UWIRE_CS1); - } return platform_driver_register(&uwire_driver); } diff --git a/drivers/spi/spi-s3c24xx-regs.h b/drivers/spi/spi-s3c24xx-regs.h deleted file mode 100644 index f51464ab5677..000000000000 --- a/drivers/spi/spi-s3c24xx-regs.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Fetron GmbH - * - * S3C2410 SPI register definition - */ - -#ifndef __SPI_S3C2410_H -#define __SPI_S3C2410_H - -#define S3C2410_SPCON (0x00) - -#define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ -#define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */ -#define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */ -#define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */ -#define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */ -#define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */ -#define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */ - -#define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */ -#define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */ - -#define S3C2410_SPSTA (0x04) - -#define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */ -#define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */ -#define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */ -#define S3C2412_SPSTA_READY_ORG (1 << 3) - -#define S3C2410_SPPIN (0x08) - -#define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */ -#define S3C2410_SPPIN_RESERVED (1 << 1) -#define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */ - -#define S3C2410_SPPRE (0x0C) -#define S3C2410_SPTDAT (0x10) -#define S3C2410_SPRDAT (0x14) - -#endif /* __SPI_S3C2410_H */ diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c deleted file mode 100644 index ef25b5e93900..000000000000 --- a/drivers/spi/spi-s3c24xx.c +++ /dev/null @@ -1,596 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2006 Ben Dooks - * Copyright 2006-2009 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> -*/ - -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include <linux/spi/spi.h> -#include <linux/spi/spi_bitbang.h> -#include <linux/spi/s3c24xx.h> -#include <linux/spi/s3c24xx-fiq.h> -#include <linux/module.h> - -#include <asm/fiq.h> - -#include "spi-s3c24xx-regs.h" - -/** - * struct s3c24xx_spi_devstate - per device data - * @hz: Last frequency calculated for @sppre field. - * @mode: Last mode setting for the @spcon field. - * @spcon: Value to write to the SPCON register. - * @sppre: Value to write to the SPPRE register. - */ -struct s3c24xx_spi_devstate { - unsigned int hz; - unsigned int mode; - u8 spcon; - u8 sppre; -}; - -enum spi_fiq_mode { - FIQ_MODE_NONE = 0, - FIQ_MODE_TX = 1, - FIQ_MODE_RX = 2, - FIQ_MODE_TXRX = 3, -}; - -struct s3c24xx_spi { - /* bitbang has to be first */ - struct spi_bitbang bitbang; - struct completion done; - - void __iomem *regs; - int irq; - int len; - int count; - - struct fiq_handler fiq_handler; - enum spi_fiq_mode fiq_mode; - unsigned char fiq_inuse; - unsigned char fiq_claimed; - - /* data buffers */ - const unsigned char *tx; - unsigned char *rx; - - struct clk *clk; - struct spi_master *master; - struct spi_device *curdev; - struct device *dev; - struct s3c2410_spi_info *pdata; -}; - -#define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) -#define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) - -static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev) -{ - return spi_master_get_devdata(sdev->master); -} - -static void s3c24xx_spi_chipsel(struct spi_device *spi, int value) -{ - struct s3c24xx_spi_devstate *cs = spi->controller_state; - struct s3c24xx_spi *hw = to_hw(spi); - - /* change the chipselect state and the state of the spi engine clock */ - - switch (value) { - case BITBANG_CS_INACTIVE: - writeb(cs->spcon, hw->regs + S3C2410_SPCON); - break; - - case BITBANG_CS_ACTIVE: - writeb(cs->spcon | S3C2410_SPCON_ENSCK, - hw->regs + S3C2410_SPCON); - break; - } -} - -static int s3c24xx_spi_update_state(struct spi_device *spi, - struct spi_transfer *t) -{ - struct s3c24xx_spi *hw = to_hw(spi); - struct s3c24xx_spi_devstate *cs = spi->controller_state; - unsigned int hz; - unsigned int div; - unsigned long clk; - - hz = t ? t->speed_hz : spi->max_speed_hz; - - if (!hz) - hz = spi->max_speed_hz; - - if (spi->mode != cs->mode) { - u8 spcon = SPCON_DEFAULT | S3C2410_SPCON_ENSCK; - - if (spi->mode & SPI_CPHA) - spcon |= S3C2410_SPCON_CPHA_FMTB; - - if (spi->mode & SPI_CPOL) - spcon |= S3C2410_SPCON_CPOL_HIGH; - - cs->mode = spi->mode; - cs->spcon = spcon; - } - - if (cs->hz != hz) { - clk = clk_get_rate(hw->clk); - div = DIV_ROUND_UP(clk, hz * 2) - 1; - - if (div > 255) - div = 255; - - dev_dbg(&spi->dev, "pre-scaler=%d (wanted %d, got %ld)\n", - div, hz, clk / (2 * (div + 1))); - - cs->hz = hz; - cs->sppre = div; - } - - return 0; -} - -static int s3c24xx_spi_setupxfer(struct spi_device *spi, - struct spi_transfer *t) -{ - struct s3c24xx_spi_devstate *cs = spi->controller_state; - struct s3c24xx_spi *hw = to_hw(spi); - int ret; - - ret = s3c24xx_spi_update_state(spi, t); - if (!ret) - writeb(cs->sppre, hw->regs + S3C2410_SPPRE); - - return ret; -} - -static int s3c24xx_spi_setup(struct spi_device *spi) -{ - struct s3c24xx_spi_devstate *cs = spi->controller_state; - struct s3c24xx_spi *hw = to_hw(spi); - int ret; - - /* allocate settings on the first call */ - if (!cs) { - cs = devm_kzalloc(&spi->dev, - sizeof(struct s3c24xx_spi_devstate), - GFP_KERNEL); - if (!cs) - return -ENOMEM; - - cs->spcon = SPCON_DEFAULT; - cs->hz = -1; - spi->controller_state = cs; - } - - /* initialise the state from the device */ - ret = s3c24xx_spi_update_state(spi, NULL); - if (ret) - return ret; - - mutex_lock(&hw->bitbang.lock); - if (!hw->bitbang.busy) { - hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE); - /* need to ndelay for 0.5 clocktick ? */ - } - mutex_unlock(&hw->bitbang.lock); - - return 0; -} - -static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count) -{ - return hw->tx ? hw->tx[count] : 0; -} - -#ifdef CONFIG_SPI_S3C24XX_FIQ -/* Support for FIQ based pseudo-DMA to improve the transfer speed. - * - * This code uses the assembly helper in spi_s3c24xx_spi.S which is - * used by the FIQ core to move data between main memory and the peripheral - * block. Since this is code running on the processor, there is no problem - * with cache coherency of the buffers, so we can use any buffer we like. - */ - -/** - * struct spi_fiq_code - FIQ code and header - * @length: The length of the code fragment, excluding this header. - * @ack_offset: The offset from @data to the word to place the IRQ ACK bit at. - * @data: The code itself to install as a FIQ handler. - */ -struct spi_fiq_code { - u32 length; - u32 ack_offset; - u8 data[]; -}; - -/** - * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer - * @hw: The hardware state. - * - * Claim the FIQ handler (only one can be active at any one time) and - * then setup the correct transfer code for this transfer. - * - * This call updates all the necessary state information if successful, - * so the caller does not need to do anything more than start the transfer - * as normal, since the IRQ will have been re-routed to the FIQ handler. -*/ -static void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) -{ - struct pt_regs regs; - enum spi_fiq_mode mode; - struct spi_fiq_code *code; - u32 *ack_ptr = NULL; - int ret; - - if (!hw->fiq_claimed) { - /* try and claim fiq if we haven't got it, and if not - * then return and simply use another transfer method */ - - ret = claim_fiq(&hw->fiq_handler); - if (ret) - return; - } - - if (hw->tx && !hw->rx) - mode = FIQ_MODE_TX; - else if (hw->rx && !hw->tx) - mode = FIQ_MODE_RX; - else - mode = FIQ_MODE_TXRX; - - regs.uregs[fiq_rspi] = (long)hw->regs; - regs.uregs[fiq_rrx] = (long)hw->rx; - regs.uregs[fiq_rtx] = (long)hw->tx + 1; - regs.uregs[fiq_rcount] = hw->len - 1; - - set_fiq_regs(®s); - - if (hw->fiq_mode != mode) { - hw->fiq_mode = mode; - - switch (mode) { - case FIQ_MODE_TX: - code = &s3c24xx_spi_fiq_tx; - break; - case FIQ_MODE_RX: - code = &s3c24xx_spi_fiq_rx; - break; - case FIQ_MODE_TXRX: - code = &s3c24xx_spi_fiq_txrx; - break; - default: - code = NULL; - } - - BUG_ON(!code); - - ack_ptr = (u32 *)&code->data[code->ack_offset]; - set_fiq_handler(&code->data, code->length); - } - - s3c24xx_set_fiq(hw->irq, ack_ptr, true); - - hw->fiq_mode = mode; - hw->fiq_inuse = 1; -} - -/** - * s3c24xx_spi_fiqop - FIQ core code callback - * @pw: Data registered with the handler - * @release: Whether this is a release or a return. - * - * Called by the FIQ code when another module wants to use the FIQ, so - * return whether we are currently using this or not and then update our - * internal state. - */ -static int s3c24xx_spi_fiqop(void *pw, int release) -{ - struct s3c24xx_spi *hw = pw; - int ret = 0; - - if (release) { - if (hw->fiq_inuse) - ret = -EBUSY; - - /* note, we do not need to unroute the FIQ, as the FIQ - * vector code de-routes it to signal the end of transfer */ - - hw->fiq_mode = FIQ_MODE_NONE; - hw->fiq_claimed = 0; - } else { - hw->fiq_claimed = 1; - } - - return ret; -} - -/** - * s3c24xx_spi_initfiq - setup the information for the FIQ core - * @hw: The hardware state. - * - * Setup the fiq_handler block to pass to the FIQ core. - */ -static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *hw) -{ - hw->fiq_handler.dev_id = hw; - hw->fiq_handler.name = dev_name(hw->dev); - hw->fiq_handler.fiq_op = s3c24xx_spi_fiqop; -} - -/** - * s3c24xx_spi_usefiq - return if we should be using FIQ. - * @hw: The hardware state. - * - * Return true if the platform data specifies whether this channel is - * allowed to use the FIQ. - */ -static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *hw) -{ - return hw->pdata->use_fiq; -} - -/** - * s3c24xx_spi_usingfiq - return if channel is using FIQ - * @spi: The hardware state. - * - * Return whether the channel is currently using the FIQ (separate from - * whether the FIQ is claimed). - */ -static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *spi) -{ - return spi->fiq_inuse; -} -#else - -static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *s) { } -static inline void s3c24xx_spi_tryfiq(struct s3c24xx_spi *s) { } -static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *s) { return false; } -static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *s) { return false; } - -#endif /* CONFIG_SPI_S3C24XX_FIQ */ - -static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) -{ - struct s3c24xx_spi *hw = to_hw(spi); - - hw->tx = t->tx_buf; - hw->rx = t->rx_buf; - hw->len = t->len; - hw->count = 0; - - init_completion(&hw->done); - - hw->fiq_inuse = 0; - if (s3c24xx_spi_usefiq(hw) && t->len >= 3) - s3c24xx_spi_tryfiq(hw); - - /* send the first byte */ - writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); - - wait_for_completion(&hw->done); - return hw->count; -} - -static irqreturn_t s3c24xx_spi_irq(int irq, void *dev) -{ - struct s3c24xx_spi *hw = dev; - unsigned int spsta = readb(hw->regs + S3C2410_SPSTA); - unsigned int count = hw->count; - - if (spsta & S3C2410_SPSTA_DCOL) { - dev_dbg(hw->dev, "data-collision\n"); - complete(&hw->done); - goto irq_done; - } - - if (!(spsta & S3C2410_SPSTA_READY)) { - dev_dbg(hw->dev, "spi not ready for tx?\n"); - complete(&hw->done); - goto irq_done; - } - - if (!s3c24xx_spi_usingfiq(hw)) { - hw->count++; - - if (hw->rx) - hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); - - count++; - - if (count < hw->len) - writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT); - else - complete(&hw->done); - } else { - hw->count = hw->len; - hw->fiq_inuse = 0; - - if (hw->rx) - hw->rx[hw->len-1] = readb(hw->regs + S3C2410_SPRDAT); - - complete(&hw->done); - } - - irq_done: - return IRQ_HANDLED; -} - -static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw) -{ - /* for the moment, permanently enable the clock */ - - clk_enable(hw->clk); - - /* program defaults into the registers */ - - writeb(0xff, hw->regs + S3C2410_SPPRE); - writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN); - writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON); -} - -static int s3c24xx_spi_probe(struct platform_device *pdev) -{ - struct s3c2410_spi_info *pdata; - struct s3c24xx_spi *hw; - struct spi_master *master; - int err = 0; - - master = devm_spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi)); - if (master == NULL) { - dev_err(&pdev->dev, "No memory for spi_master\n"); - return -ENOMEM; - } - - hw = spi_master_get_devdata(master); - - hw->master = master; - hw->pdata = pdata = dev_get_platdata(&pdev->dev); - hw->dev = &pdev->dev; - - if (pdata == NULL) { - dev_err(&pdev->dev, "No platform data supplied\n"); - return -ENOENT; - } - - platform_set_drvdata(pdev, hw); - init_completion(&hw->done); - - /* initialise fiq handler */ - - s3c24xx_spi_initfiq(hw); - - /* setup the master state. */ - - /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - - master->num_chipselect = hw->pdata->num_cs; - master->bus_num = pdata->bus_num; - master->bits_per_word_mask = SPI_BPW_MASK(8); - /* we need to call the local chipselect callback */ - master->flags = SPI_MASTER_GPIO_SS; - master->use_gpio_descriptors = true; - - /* setup the state for the bitbang driver */ - - hw->bitbang.master = hw->master; - hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer; - hw->bitbang.chipselect = s3c24xx_spi_chipsel; - hw->bitbang.txrx_bufs = s3c24xx_spi_txrx; - - hw->master->setup = s3c24xx_spi_setup; - - dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang); - - /* find and map our resources */ - hw->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(hw->regs)) - return PTR_ERR(hw->regs); - - hw->irq = platform_get_irq(pdev, 0); - if (hw->irq < 0) - return -ENOENT; - - err = devm_request_irq(&pdev->dev, hw->irq, s3c24xx_spi_irq, 0, - pdev->name, hw); - if (err) { - dev_err(&pdev->dev, "Cannot claim IRQ\n"); - return err; - } - - hw->clk = devm_clk_get(&pdev->dev, "spi"); - if (IS_ERR(hw->clk)) { - dev_err(&pdev->dev, "No clock for device\n"); - return PTR_ERR(hw->clk); - } - - s3c24xx_spi_initialsetup(hw); - - /* register our spi controller */ - - err = spi_bitbang_start(&hw->bitbang); - if (err) { - dev_err(&pdev->dev, "Failed to register SPI master\n"); - goto err_register; - } - - return 0; - - err_register: - clk_disable(hw->clk); - - return err; -} - -static int s3c24xx_spi_remove(struct platform_device *dev) -{ - struct s3c24xx_spi *hw = platform_get_drvdata(dev); - - spi_bitbang_stop(&hw->bitbang); - clk_disable(hw->clk); - spi_master_put(hw->master); - return 0; -} - - -#ifdef CONFIG_PM - -static int s3c24xx_spi_suspend(struct device *dev) -{ - struct s3c24xx_spi *hw = dev_get_drvdata(dev); - int ret; - - ret = spi_master_suspend(hw->master); - if (ret) - return ret; - - clk_disable(hw->clk); - return 0; -} - -static int s3c24xx_spi_resume(struct device *dev) -{ - struct s3c24xx_spi *hw = dev_get_drvdata(dev); - - s3c24xx_spi_initialsetup(hw); - return spi_master_resume(hw->master); -} - -static const struct dev_pm_ops s3c24xx_spi_pmops = { - .suspend = s3c24xx_spi_suspend, - .resume = s3c24xx_spi_resume, -}; - -#define S3C24XX_SPI_PMOPS &s3c24xx_spi_pmops -#else -#define S3C24XX_SPI_PMOPS NULL -#endif /* CONFIG_PM */ - -MODULE_ALIAS("platform:s3c2410-spi"); -static struct platform_driver s3c24xx_spi_driver = { - .probe = s3c24xx_spi_probe, - .remove = s3c24xx_spi_remove, - .driver = { - .name = "s3c2410-spi", - .pm = S3C24XX_SPI_PMOPS, - }, -}; -module_platform_driver(s3c24xx_spi_driver); - -MODULE_DESCRIPTION("S3C24XX SPI Driver"); -MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index b79f93684c4f..617012e09a37 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -58,7 +58,6 @@ source "drivers/staging/media/deprecated/meye/Kconfig" source "drivers/staging/media/deprecated/saa7146/Kconfig" source "drivers/staging/media/deprecated/stkwebcam/Kconfig" source "drivers/staging/media/deprecated/tm6000/Kconfig" -source "drivers/staging/media/deprecated/vpfe_capture/Kconfig" source "drivers/staging/media/deprecated/zr364xx/Kconfig" endif diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 54bbdd4b0d08..1e14edc2d44c 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -15,5 +15,4 @@ obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/ obj-$(CONFIG_VIDEO_TM6000) += deprecated/tm6000/ obj-$(CONFIG_VIDEO_VIU) += deprecated/fsl-viu/ obj-$(CONFIG_USB_ZR364XX) += deprecated/zr364xx/ -obj-y += deprecated/vpfe_capture/ obj-y += deprecated/saa7146/ diff --git a/drivers/staging/media/deprecated/vpfe_capture/Kconfig b/drivers/staging/media/deprecated/vpfe_capture/Kconfig deleted file mode 100644 index 10250e7e566b..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/Kconfig +++ /dev/null @@ -1,58 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -config VIDEO_DM6446_CCDC - tristate "TI DM6446 CCDC video capture driver" - depends on V4L_PLATFORM_DRIVERS - depends on VIDEO_DEV - depends on ARCH_DAVINCI || COMPILE_TEST - depends on I2C - select VIDEOBUF_DMA_CONTIG - help - Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces - with decoder modules such as TVP5146 over BT656 or - sensor module such as MT9T001 over a raw interface. This - module configures the interface and CCDC/ISIF to do - video frame capture from slave decoders. - - This driver is deprecated and is scheduled for removal by - the beginning of 2023. See the TODO file for more information. - - To compile this driver as a module, choose M here. There will - be two modules called vpfe_capture.ko and dm644x_ccdc.ko - -config VIDEO_DM355_CCDC - tristate "TI DM355 CCDC video capture driver" - depends on V4L_PLATFORM_DRIVERS - depends on VIDEO_DEV - depends on ARCH_DAVINCI || COMPILE_TEST - depends on I2C - select VIDEOBUF_DMA_CONTIG - help - Enables DM355 CCD hw module. DM355 CCDC hw interfaces - with decoder modules such as TVP5146 over BT656 or - sensor module such as MT9T001 over a raw interface. This - module configures the interface and CCDC/ISIF to do - video frame capture from a slave decoders - - This driver is deprecated and is scheduled for removal by - the beginning of 2023. See the TODO file for more information. - - To compile this driver as a module, choose M here. There will - be two modules called vpfe_capture.ko and dm355_ccdc.ko - -config VIDEO_DM365_ISIF - tristate "TI DM365 ISIF video capture driver" - depends on V4L_PLATFORM_DRIVERS - depends on VIDEO_DEV - depends on ARCH_DAVINCI || COMPILE_TEST - depends on I2C - select VIDEOBUF_DMA_CONTIG - help - Enables ISIF hw module. This is the hardware module for - configuring ISIF in VPFE to capture Raw Bayer RGB data from - a image sensor or YUV data from a YUV source. - - This driver is deprecated and is scheduled for removal by - the beginning of 2023. See the TODO file for more information. - - To compile this driver as a module, choose M here. There will - be two modules called vpfe_capture.ko and isif.ko diff --git a/drivers/staging/media/deprecated/vpfe_capture/Makefile b/drivers/staging/media/deprecated/vpfe_capture/Makefile deleted file mode 100644 index 609e8dc09ce7..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_VIDEO_DM6446_CCDC) += vpfe_capture.o dm644x_ccdc.o -obj-$(CONFIG_VIDEO_DM355_CCDC) += vpfe_capture.o dm355_ccdc.o -obj-$(CONFIG_VIDEO_DM365_ISIF) += vpfe_capture.o isif.o diff --git a/drivers/staging/media/deprecated/vpfe_capture/TODO b/drivers/staging/media/deprecated/vpfe_capture/TODO deleted file mode 100644 index ce654d7337af..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/TODO +++ /dev/null @@ -1,7 +0,0 @@ -These are one of the few drivers still not using the vb2 -framework, so these drivers are now deprecated with the intent of -removing them altogether by the beginning of 2023. - -In order to keep these drivers they have to be converted to vb2. -If someone is interested in doing this work, then contact the -linux-media mailinglist (https://linuxtv.org/lists.php). diff --git a/drivers/staging/media/deprecated/vpfe_capture/ccdc_hw_device.h b/drivers/staging/media/deprecated/vpfe_capture/ccdc_hw_device.h deleted file mode 100644 index a545052a95a9..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/ccdc_hw_device.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * ccdc device API - */ -#ifndef _CCDC_HW_DEVICE_H -#define _CCDC_HW_DEVICE_H - -#ifdef __KERNEL__ -#include <linux/videodev2.h> -#include <linux/device.h> -#include <media/davinci/vpfe_types.h> -#include <media/davinci/ccdc_types.h> - -/* - * ccdc hw operations - */ -struct ccdc_hw_ops { - /* Pointer to initialize function to initialize ccdc device */ - int (*open) (struct device *dev); - /* Pointer to deinitialize function */ - int (*close) (struct device *dev); - /* set ccdc base address */ - void (*set_ccdc_base)(void *base, int size); - /* Pointer to function to enable or disable ccdc */ - void (*enable) (int en); - /* reset sbl. only for 6446 */ - void (*reset) (void); - /* enable output to sdram */ - void (*enable_out_to_sdram) (int en); - /* Pointer to function to set hw parameters */ - int (*set_hw_if_params) (struct vpfe_hw_if_param *param); - /* get interface parameters */ - int (*get_hw_if_params) (struct vpfe_hw_if_param *param); - /* Pointer to function to configure ccdc */ - int (*configure) (void); - - /* Pointer to function to set buffer type */ - int (*set_buftype) (enum ccdc_buftype buf_type); - /* Pointer to function to get buffer type */ - enum ccdc_buftype (*get_buftype) (void); - /* Pointer to function to set frame format */ - int (*set_frame_format) (enum ccdc_frmfmt frm_fmt); - /* Pointer to function to get frame format */ - enum ccdc_frmfmt (*get_frame_format) (void); - /* enumerate hw pix formats */ - int (*enum_pix)(u32 *hw_pix, int i); - /* Pointer to function to set buffer type */ - u32 (*get_pixel_format) (void); - /* Pointer to function to get pixel format. */ - int (*set_pixel_format) (u32 pixfmt); - /* Pointer to function to set image window */ - int (*set_image_window) (struct v4l2_rect *win); - /* Pointer to function to set image window */ - void (*get_image_window) (struct v4l2_rect *win); - /* Pointer to function to get line length */ - unsigned int (*get_line_length) (void); - - /* Pointer to function to set frame buffer address */ - void (*setfbaddr) (unsigned long addr); - /* Pointer to function to get field id */ - int (*getfid) (void); -}; - -struct ccdc_hw_device { - /* ccdc device name */ - char name[32]; - /* module owner */ - struct module *owner; - /* hw ops */ - struct ccdc_hw_ops hw_ops; -}; - -/* Used by CCDC module to register & unregister with vpfe capture driver */ -int vpfe_register_ccdc_device(const struct ccdc_hw_device *dev); -void vpfe_unregister_ccdc_device(const struct ccdc_hw_device *dev); - -#endif -#endif diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.c b/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.c deleted file mode 100644 index da8db53e9498..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.c +++ /dev/null @@ -1,934 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2005-2009 Texas Instruments Inc - * - * CCDC hardware module for DM355 - * ------------------------------ - * - * This module is for configuring DM355 CCD controller of VPFE to capture - * Raw yuv or Bayer RGB data from a decoder. CCDC has several modules - * such as Defect Pixel Correction, Color Space Conversion etc to - * pre-process the Bayer RGB data, before writing it to SDRAM. - * - * TODO: 1) Raw bayer parameter settings and bayer capture - * 2) Split module parameter structure to module specific ioctl structs - * 3) add support for lense shading correction - * 4) investigate if enum used for user space type definition - * to be replaced by #defines or integer - */ -#include <linux/platform_device.h> -#include <linux/uaccess.h> -#include <linux/videodev2.h> -#include <linux/err.h> -#include <linux/module.h> - -#include "dm355_ccdc.h" -#include <media/davinci/vpss.h> - -#include "dm355_ccdc_regs.h" -#include "ccdc_hw_device.h" - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("CCDC Driver for DM355"); -MODULE_AUTHOR("Texas Instruments"); - -static struct ccdc_oper_config { - struct device *dev; - /* CCDC interface type */ - enum vpfe_hw_if_type if_type; - /* Raw Bayer configuration */ - struct ccdc_params_raw bayer; - /* YCbCr configuration */ - struct ccdc_params_ycbcr ycbcr; - /* ccdc base address */ - void __iomem *base_addr; -} ccdc_cfg = { - /* Raw configurations */ - .bayer = { - .pix_fmt = CCDC_PIXFMT_RAW, - .frm_fmt = CCDC_FRMFMT_PROGRESSIVE, - .win = CCDC_WIN_VGA, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .gain = { - .r_ye = 256, - .gb_g = 256, - .gr_cy = 256, - .b_mg = 256 - }, - .config_params = { - .datasft = 2, - .mfilt1 = CCDC_NO_MEDIAN_FILTER1, - .mfilt2 = CCDC_NO_MEDIAN_FILTER2, - .alaw = { - .gamma_wd = 2, - }, - .blk_clamp = { - .sample_pixel = 1, - .dc_sub = 25 - }, - .col_pat_field0 = { - .olop = CCDC_GREEN_BLUE, - .olep = CCDC_BLUE, - .elop = CCDC_RED, - .elep = CCDC_GREEN_RED - }, - .col_pat_field1 = { - .olop = CCDC_GREEN_BLUE, - .olep = CCDC_BLUE, - .elop = CCDC_RED, - .elep = CCDC_GREEN_RED - }, - }, - }, - /* YCbCr configuration */ - .ycbcr = { - .win = CCDC_WIN_PAL, - .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT, - .frm_fmt = CCDC_FRMFMT_INTERLACED, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .bt656_enable = 1, - .pix_order = CCDC_PIXORDER_CBYCRY, - .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED - }, -}; - - -/* Raw Bayer formats */ -static u32 ccdc_raw_bayer_pix_formats[] = - {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16}; - -/* Raw YUV formats */ -static u32 ccdc_raw_yuv_pix_formats[] = - {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV}; - -/* register access routines */ -static inline u32 regr(u32 offset) -{ - return __raw_readl(ccdc_cfg.base_addr + offset); -} - -static inline void regw(u32 val, u32 offset) -{ - __raw_writel(val, ccdc_cfg.base_addr + offset); -} - -static void ccdc_enable(int en) -{ - unsigned int temp; - temp = regr(SYNCEN); - temp &= (~CCDC_SYNCEN_VDHDEN_MASK); - temp |= (en & CCDC_SYNCEN_VDHDEN_MASK); - regw(temp, SYNCEN); -} - -static void ccdc_enable_output_to_sdram(int en) -{ - unsigned int temp; - temp = regr(SYNCEN); - temp &= (~(CCDC_SYNCEN_WEN_MASK)); - temp |= ((en << CCDC_SYNCEN_WEN_SHIFT) & CCDC_SYNCEN_WEN_MASK); - regw(temp, SYNCEN); -} - -static void ccdc_config_gain_offset(void) -{ - /* configure gain */ - regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN); - regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN); - regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN); - regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN); - /* configure offset */ - regw(ccdc_cfg.bayer.ccdc_offset, OFFSET); -} - -/* - * ccdc_restore_defaults() - * This function restore power on defaults in the ccdc registers - */ -static int ccdc_restore_defaults(void) -{ - int i; - - dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults..."); - /* set all registers to zero */ - for (i = 0; i <= CCDC_REG_LAST; i += 4) - regw(0, i); - - /* now override the values with power on defaults in registers */ - regw(MODESET_DEFAULT, MODESET); - /* no culling support */ - regw(CULH_DEFAULT, CULH); - regw(CULV_DEFAULT, CULV); - /* Set default Gain and Offset */ - ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT; - ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT; - ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT; - ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT; - ccdc_config_gain_offset(); - regw(OUTCLIP_DEFAULT, OUTCLIP); - regw(LSCCFG2_DEFAULT, LSCCFG2); - /* select ccdc input */ - if (vpss_select_ccdc_source(VPSS_CCDCIN)) { - dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source"); - return -EFAULT; - } - /* select ccdc clock */ - if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) { - dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock"); - return -EFAULT; - } - dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults..."); - return 0; -} - -static int ccdc_open(struct device *device) -{ - return ccdc_restore_defaults(); -} - -static int ccdc_close(struct device *device) -{ - /* disable clock */ - vpss_enable_clock(VPSS_CCDC_CLOCK, 0); - /* do nothing for now */ - return 0; -} -/* - * ccdc_setwin() - * This function will configure the window size to - * be capture in CCDC reg. - */ -static void ccdc_setwin(struct v4l2_rect *image_win, - enum ccdc_frmfmt frm_fmt, int ppc) -{ - int horz_start, horz_nr_pixels; - int vert_start, vert_nr_lines; - int mid_img = 0; - - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin..."); - - /* - * ppc - per pixel count. indicates how many pixels per cell - * output to SDRAM. example, for ycbcr, it is one y and one c, so 2. - * raw capture this is 1 - */ - horz_start = image_win->left << (ppc - 1); - horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; - - /* Writing the horizontal info into the registers */ - regw(horz_start, SPH); - regw(horz_nr_pixels, NPH); - vert_start = image_win->top; - - if (frm_fmt == CCDC_FRMFMT_INTERLACED) { - vert_nr_lines = (image_win->height >> 1) - 1; - vert_start >>= 1; - /* Since first line doesn't have any data */ - vert_start += 1; - /* configure VDINT0 and VDINT1 */ - regw(vert_start, VDINT0); - } else { - /* Since first line doesn't have any data */ - vert_start += 1; - vert_nr_lines = image_win->height - 1; - /* configure VDINT0 and VDINT1 */ - mid_img = vert_start + (image_win->height / 2); - regw(vert_start, VDINT0); - regw(mid_img, VDINT1); - } - regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0); - regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1); - regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV); - dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin..."); -} - -/* This function will configure CCDC for YCbCr video capture */ -static void ccdc_config_ycbcr(void) -{ - struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr; - u32 temp; - - /* first set the CCDC power on defaults values in all registers */ - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr..."); - ccdc_restore_defaults(); - - /* configure pixel format & video frame format */ - temp = (((params->pix_fmt & CCDC_INPUT_MODE_MASK) << - CCDC_INPUT_MODE_SHIFT) | - ((params->frm_fmt & CCDC_FRM_FMT_MASK) << - CCDC_FRM_FMT_SHIFT)); - - /* setup BT.656 sync mode */ - if (params->bt656_enable) { - regw(CCDC_REC656IF_BT656_EN, REC656IF); - /* - * configure the FID, VD, HD pin polarity fld,hd pol positive, - * vd negative, 8-bit pack mode - */ - temp |= CCDC_VD_POL_NEGATIVE; - } else { /* y/c external sync mode */ - temp |= (((params->fid_pol & CCDC_FID_POL_MASK) << - CCDC_FID_POL_SHIFT) | - ((params->hd_pol & CCDC_HD_POL_MASK) << - CCDC_HD_POL_SHIFT) | - ((params->vd_pol & CCDC_VD_POL_MASK) << - CCDC_VD_POL_SHIFT)); - } - - /* pack the data to 8-bit */ - temp |= CCDC_DATA_PACK_ENABLE; - - regw(temp, MODESET); - - /* configure video window */ - ccdc_setwin(¶ms->win, params->frm_fmt, 2); - - /* configure the order of y cb cr in SD-RAM */ - temp = (params->pix_order << CCDC_Y8POS_SHIFT); - temp |= CCDC_LATCH_ON_VSYNC_DISABLE | CCDC_CCDCFG_FIDMD_NO_LATCH_VSYNC; - regw(temp, CCDCFG); - - /* - * configure the horizontal line offset. This is done by rounding up - * width to a multiple of 16 pixels and multiply by two to account for - * y:cb:cr 4:2:2 data - */ - regw(((params->win.width * 2 + 31) >> 5), HSIZE); - - /* configure the memory line offset */ - if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) { - /* two fields are interleaved in memory */ - regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST); - } - - dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n"); -} - -/* - * ccdc_config_black_clamp() - * configure parameters for Optical Black Clamp - */ -static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp) -{ - u32 val; - - if (!bclamp->b_clamp_enable) { - /* configure DCSub */ - regw(bclamp->dc_sub & CCDC_BLK_DC_SUB_MASK, DCSUB); - regw(0x0000, CLAMP); - return; - } - /* Enable the Black clamping, set sample lines and pixels */ - val = (bclamp->start_pixel & CCDC_BLK_ST_PXL_MASK) | - ((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) << - CCDC_BLK_SAMPLE_LN_SHIFT) | CCDC_BLK_CLAMP_ENABLE; - regw(val, CLAMP); - - /* If Black clamping is enable then make dcsub 0 */ - val = (bclamp->sample_ln & CCDC_NUM_LINE_CALC_MASK) - << CCDC_NUM_LINE_CALC_SHIFT; - regw(val, DCSUB); -} - -/* - * ccdc_config_black_compense() - * configure parameters for Black Compensation - */ -static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp) -{ - u32 val; - - val = (bcomp->b & CCDC_BLK_COMP_MASK) | - ((bcomp->gb & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_GB_COMP_SHIFT); - regw(val, BLKCMP1); - - val = ((bcomp->gr & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_GR_COMP_SHIFT) | - ((bcomp->r & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_R_COMP_SHIFT); - regw(val, BLKCMP0); -} - -/* - * ccdc_write_dfc_entry() - * write an entry in the dfc table. - */ -static int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc) -{ -/* TODO This is to be re-visited and adjusted */ -#define DFC_WRITE_WAIT_COUNT 1000 - u32 val, count = DFC_WRITE_WAIT_COUNT; - - regw(dfc->dft_corr_vert[index], DFCMEM0); - regw(dfc->dft_corr_horz[index], DFCMEM1); - regw(dfc->dft_corr_sub1[index], DFCMEM2); - regw(dfc->dft_corr_sub2[index], DFCMEM3); - regw(dfc->dft_corr_sub3[index], DFCMEM4); - /* set WR bit to write */ - val = regr(DFCMEMCTL) | CCDC_DFCMEMCTL_DFCMWR_MASK; - regw(val, DFCMEMCTL); - - /* - * Assume, it is very short. If we get an error, we need to - * adjust this value - */ - while (regr(DFCMEMCTL) & CCDC_DFCMEMCTL_DFCMWR_MASK) - count--; - /* - * TODO We expect the count to be non-zero to be successful. Adjust - * the count if write requires more time - */ - - if (count) { - dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n"); - return -1; - } - return 0; -} - -/* - * ccdc_config_vdfc() - * configure parameters for Vertical Defect Correction - */ -static int ccdc_config_vdfc(struct ccdc_vertical_dft *dfc) -{ - u32 val; - int i; - - /* Configure General Defect Correction. The table used is from IPIPE */ - val = dfc->gen_dft_en & CCDC_DFCCTL_GDFCEN_MASK; - - /* Configure Vertical Defect Correction if needed */ - if (!dfc->ver_dft_en) { - /* Enable only General Defect Correction */ - regw(val, DFCCTL); - return 0; - } - - if (dfc->table_size > CCDC_DFT_TABLE_SIZE) - return -EINVAL; - - val |= CCDC_DFCCTL_VDFC_DISABLE; - val |= (dfc->dft_corr_ctl.vdfcsl & CCDC_DFCCTL_VDFCSL_MASK) << - CCDC_DFCCTL_VDFCSL_SHIFT; - val |= (dfc->dft_corr_ctl.vdfcuda & CCDC_DFCCTL_VDFCUDA_MASK) << - CCDC_DFCCTL_VDFCUDA_SHIFT; - val |= (dfc->dft_corr_ctl.vdflsft & CCDC_DFCCTL_VDFLSFT_MASK) << - CCDC_DFCCTL_VDFLSFT_SHIFT; - regw(val , DFCCTL); - - /* clear address ptr to offset 0 */ - val = CCDC_DFCMEMCTL_DFCMARST_MASK << CCDC_DFCMEMCTL_DFCMARST_SHIFT; - - /* write defect table entries */ - for (i = 0; i < dfc->table_size; i++) { - /* increment address for non zero index */ - if (i != 0) - val = CCDC_DFCMEMCTL_INC_ADDR; - regw(val, DFCMEMCTL); - if (ccdc_write_dfc_entry(i, dfc) < 0) - return -EFAULT; - } - - /* update saturation level and enable dfc */ - regw(dfc->saturation_ctl & CCDC_VDC_DFCVSAT_MASK, DFCVSAT); - val = regr(DFCCTL) | (CCDC_DFCCTL_VDFCEN_MASK << - CCDC_DFCCTL_VDFCEN_SHIFT); - regw(val, DFCCTL); - return 0; -} - -/* - * ccdc_config_csc() - * configure parameters for color space conversion - * Each register CSCM0-7 has two values in S8Q5 format. - */ -static void ccdc_config_csc(struct ccdc_csc *csc) -{ - u32 val1 = 0, val2; - int i; - - if (!csc->enable) - return; - - /* Enable the CSC sub-module */ - regw(CCDC_CSC_ENABLE, CSCCTL); - - /* Converting the co-eff as per the format of the register */ - for (i = 0; i < CCDC_CSC_COEFF_TABLE_SIZE; i++) { - if ((i % 2) == 0) { - /* CSCM - LSB */ - val1 = (csc->coeff[i].integer & - CCDC_CSC_COEF_INTEG_MASK) - << CCDC_CSC_COEF_INTEG_SHIFT; - /* - * convert decimal part to binary. Use 2 decimal - * precision, user values range from .00 - 0.99 - */ - val1 |= (((csc->coeff[i].decimal & - CCDC_CSC_COEF_DECIMAL_MASK) * - CCDC_CSC_DEC_MAX) / 100); - } else { - - /* CSCM - MSB */ - val2 = (csc->coeff[i].integer & - CCDC_CSC_COEF_INTEG_MASK) - << CCDC_CSC_COEF_INTEG_SHIFT; - val2 |= (((csc->coeff[i].decimal & - CCDC_CSC_COEF_DECIMAL_MASK) * - CCDC_CSC_DEC_MAX) / 100); - val2 <<= CCDC_CSCM_MSB_SHIFT; - val2 |= val1; - regw(val2, (CSCM0 + ((i - 1) << 1))); - } - } -} - -/* - * ccdc_config_color_patterns() - * configure parameters for color patterns - */ -static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0, - struct ccdc_col_pat *pat1) -{ - u32 val; - - val = (pat0->olop | (pat0->olep << 2) | (pat0->elop << 4) | - (pat0->elep << 6) | (pat1->olop << 8) | (pat1->olep << 10) | - (pat1->elop << 12) | (pat1->elep << 14)); - regw(val, COLPTN); -} - -/* This function will configure CCDC for Raw mode image capture */ -static int ccdc_config_raw(void) -{ - struct ccdc_params_raw *params = &ccdc_cfg.bayer; - struct ccdc_config_params_raw *config_params = - &ccdc_cfg.bayer.config_params; - unsigned int val; - - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw..."); - - /* restore power on defaults to register */ - ccdc_restore_defaults(); - - /* CCDCFG register: - * set CCD Not to swap input since input is RAW data - * set FID detection function to Latch at V-Sync - * set WENLOG - ccdc valid area to AND - * set TRGSEL to WENBIT - * set EXTRG to DISABLE - * disable latching function on VSYNC - shadowed registers - */ - regw(CCDC_YCINSWP_RAW | CCDC_CCDCFG_FIDMD_LATCH_VSYNC | - CCDC_CCDCFG_WENLOG_AND | CCDC_CCDCFG_TRGSEL_WEN | - CCDC_CCDCFG_EXTRG_DISABLE | CCDC_LATCH_ON_VSYNC_DISABLE, CCDCFG); - - /* - * Set VDHD direction to input, input type to raw input - * normal data polarity, do not use external WEN - */ - val = (CCDC_VDHDOUT_INPUT | CCDC_RAW_IP_MODE | CCDC_DATAPOL_NORMAL | - CCDC_EXWEN_DISABLE); - - /* - * Configure the vertical sync polarity (MODESET.VDPOL), horizontal - * sync polarity (MODESET.HDPOL), field id polarity (MODESET.FLDPOL), - * frame format(progressive or interlace), & pixel format (Input mode) - */ - val |= (((params->vd_pol & CCDC_VD_POL_MASK) << CCDC_VD_POL_SHIFT) | - ((params->hd_pol & CCDC_HD_POL_MASK) << CCDC_HD_POL_SHIFT) | - ((params->fid_pol & CCDC_FID_POL_MASK) << CCDC_FID_POL_SHIFT) | - ((params->frm_fmt & CCDC_FRM_FMT_MASK) << CCDC_FRM_FMT_SHIFT) | - ((params->pix_fmt & CCDC_PIX_FMT_MASK) << CCDC_PIX_FMT_SHIFT)); - - /* set pack for alaw compression */ - if ((config_params->data_sz == CCDC_DATA_8BITS) || - config_params->alaw.enable) - val |= CCDC_DATA_PACK_ENABLE; - - /* Configure for LPF */ - if (config_params->lpf_enable) - val |= (config_params->lpf_enable & CCDC_LPF_MASK) << - CCDC_LPF_SHIFT; - - /* Configure the data shift */ - val |= (config_params->datasft & CCDC_DATASFT_MASK) << - CCDC_DATASFT_SHIFT; - regw(val , MODESET); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val); - - /* Configure the Median Filter threshold */ - regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT); - - /* Configure GAMMAWD register. defaur 11-2, and Mosaic cfa pattern */ - val = CCDC_GAMMA_BITS_11_2 << CCDC_GAMMAWD_INPUT_SHIFT | - CCDC_CFA_MOSAIC; - - /* Enable and configure aLaw register if needed */ - if (config_params->alaw.enable) { - val |= (CCDC_ALAW_ENABLE | - ((config_params->alaw.gamma_wd & - CCDC_ALAW_GAMMA_WD_MASK) << - CCDC_GAMMAWD_INPUT_SHIFT)); - } - - /* Configure Median filter1 & filter2 */ - val |= ((config_params->mfilt1 << CCDC_MFILT1_SHIFT) | - (config_params->mfilt2 << CCDC_MFILT2_SHIFT)); - - regw(val, GAMMAWD); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val); - - /* configure video window */ - ccdc_setwin(¶ms->win, params->frm_fmt, 1); - - /* Optical Clamp Averaging */ - ccdc_config_black_clamp(&config_params->blk_clamp); - - /* Black level compensation */ - ccdc_config_black_compense(&config_params->blk_comp); - - /* Vertical Defect Correction if needed */ - if (ccdc_config_vdfc(&config_params->vertical_dft) < 0) - return -EFAULT; - - /* color space conversion */ - ccdc_config_csc(&config_params->csc); - - /* color pattern */ - ccdc_config_color_patterns(&config_params->col_pat_field0, - &config_params->col_pat_field1); - - /* Configure the Gain & offset control */ - ccdc_config_gain_offset(); - - dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val); - - /* Configure DATAOFST register */ - val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) << - CCDC_DATAOFST_H_SHIFT; - val |= (config_params->data_offset.vert_offset & CCDC_DATAOFST_MASK) << - CCDC_DATAOFST_V_SHIFT; - regw(val, DATAOFST); - - /* configuring HSIZE register */ - val = (params->horz_flip_enable & CCDC_HSIZE_FLIP_MASK) << - CCDC_HSIZE_FLIP_SHIFT; - - /* If pack 8 is enable then 1 pixel will take 1 byte */ - if ((config_params->data_sz == CCDC_DATA_8BITS) || - config_params->alaw.enable) { - val |= (((params->win.width) + 31) >> 5) & - CCDC_HSIZE_VAL_MASK; - - /* adjust to multiple of 32 */ - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n", - (((params->win.width) + 31) >> 5) & - CCDC_HSIZE_VAL_MASK); - } else { - /* else one pixel will take 2 byte */ - val |= (((params->win.width * 2) + 31) >> 5) & - CCDC_HSIZE_VAL_MASK; - - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n", - (((params->win.width * 2) + 31) >> 5) & - CCDC_HSIZE_VAL_MASK); - } - regw(val, HSIZE); - - /* Configure SDOFST register */ - if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) { - if (params->image_invert_enable) { - /* For interlace inverse mode */ - regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n", - CCDC_SDOFST_INTERLACE_INVERSE); - } else { - /* For interlace non inverse mode */ - regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n", - CCDC_SDOFST_INTERLACE_NORMAL); - } - } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { - if (params->image_invert_enable) { - /* For progessive inverse mode */ - regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n", - CCDC_SDOFST_PROGRESSIVE_INVERSE); - } else { - /* For progessive non inverse mode */ - regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n", - CCDC_SDOFST_PROGRESSIVE_NORMAL); - } - } - dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw..."); - return 0; -} - -static int ccdc_configure(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - return ccdc_config_raw(); - else - ccdc_config_ycbcr(); - return 0; -} - -static int ccdc_set_buftype(enum ccdc_buftype buf_type) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.buf_type = buf_type; - else - ccdc_cfg.ycbcr.buf_type = buf_type; - return 0; -} -static enum ccdc_buftype ccdc_get_buftype(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - return ccdc_cfg.bayer.buf_type; - return ccdc_cfg.ycbcr.buf_type; -} - -static int ccdc_enum_pix(u32 *pix, int i) -{ - int ret = -EINVAL; - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) { - *pix = ccdc_raw_bayer_pix_formats[i]; - ret = 0; - } - } else { - if (i < ARRAY_SIZE(ccdc_raw_yuv_pix_formats)) { - *pix = ccdc_raw_yuv_pix_formats[i]; - ret = 0; - } - } - return ret; -} - -static int ccdc_set_pixel_format(u32 pixfmt) -{ - struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw; - - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; - if (pixfmt == V4L2_PIX_FMT_SBGGR8) - alaw->enable = 1; - else if (pixfmt != V4L2_PIX_FMT_SBGGR16) - return -EINVAL; - } else { - if (pixfmt == V4L2_PIX_FMT_YUYV) - ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; - else if (pixfmt == V4L2_PIX_FMT_UYVY) - ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; - else - return -EINVAL; - } - return 0; -} -static u32 ccdc_get_pixel_format(void) -{ - struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw; - u32 pixfmt; - - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - if (alaw->enable) - pixfmt = V4L2_PIX_FMT_SBGGR8; - else - pixfmt = V4L2_PIX_FMT_SBGGR16; - else { - if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) - pixfmt = V4L2_PIX_FMT_YUYV; - else - pixfmt = V4L2_PIX_FMT_UYVY; - } - return pixfmt; -} -static int ccdc_set_image_window(struct v4l2_rect *win) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.win = *win; - else - ccdc_cfg.ycbcr.win = *win; - return 0; -} - -static void ccdc_get_image_window(struct v4l2_rect *win) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - *win = ccdc_cfg.bayer.win; - else - *win = ccdc_cfg.ycbcr.win; -} - -static unsigned int ccdc_get_line_length(void) -{ - struct ccdc_config_params_raw *config_params = - &ccdc_cfg.bayer.config_params; - unsigned int len; - - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - if ((config_params->alaw.enable) || - (config_params->data_sz == CCDC_DATA_8BITS)) - len = ccdc_cfg.bayer.win.width; - else - len = ccdc_cfg.bayer.win.width * 2; - } else - len = ccdc_cfg.ycbcr.win.width * 2; - return ALIGN(len, 32); -} - -static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.frm_fmt = frm_fmt; - else - ccdc_cfg.ycbcr.frm_fmt = frm_fmt; - return 0; -} - -static enum ccdc_frmfmt ccdc_get_frame_format(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - return ccdc_cfg.bayer.frm_fmt; - else - return ccdc_cfg.ycbcr.frm_fmt; -} - -static int ccdc_getfid(void) -{ - return (regr(MODESET) >> 15) & 1; -} - -/* misc operations */ -static inline void ccdc_setfbaddr(unsigned long addr) -{ - regw((addr >> 21) & 0x007f, STADRH); - regw((addr >> 5) & 0x0ffff, STADRL); -} - -static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params) -{ - ccdc_cfg.if_type = params->if_type; - - switch (params->if_type) { - case VPFE_BT656: - case VPFE_YCBCR_SYNC_16: - case VPFE_YCBCR_SYNC_8: - ccdc_cfg.ycbcr.vd_pol = params->vdpol; - ccdc_cfg.ycbcr.hd_pol = params->hdpol; - break; - default: - /* TODO add support for raw bayer here */ - return -EINVAL; - } - return 0; -} - -static const struct ccdc_hw_device ccdc_hw_dev = { - .name = "DM355 CCDC", - .owner = THIS_MODULE, - .hw_ops = { - .open = ccdc_open, - .close = ccdc_close, - .enable = ccdc_enable, - .enable_out_to_sdram = ccdc_enable_output_to_sdram, - .set_hw_if_params = ccdc_set_hw_if_params, - .configure = ccdc_configure, - .set_buftype = ccdc_set_buftype, - .get_buftype = ccdc_get_buftype, - .enum_pix = ccdc_enum_pix, - .set_pixel_format = ccdc_set_pixel_format, - .get_pixel_format = ccdc_get_pixel_format, - .set_frame_format = ccdc_set_frame_format, - .get_frame_format = ccdc_get_frame_format, - .set_image_window = ccdc_set_image_window, - .get_image_window = ccdc_get_image_window, - .get_line_length = ccdc_get_line_length, - .setfbaddr = ccdc_setfbaddr, - .getfid = ccdc_getfid, - }, -}; - -static int dm355_ccdc_probe(struct platform_device *pdev) -{ - void (*setup_pinmux)(void); - struct resource *res; - int status = 0; - - /* - * first try to register with vpfe. If not correct platform, then we - * don't have to iomap - */ - status = vpfe_register_ccdc_device(&ccdc_hw_dev); - if (status < 0) - return status; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - status = -ENODEV; - goto fail_nores; - } - - res = request_mem_region(res->start, resource_size(res), res->name); - if (!res) { - status = -EBUSY; - goto fail_nores; - } - - ccdc_cfg.base_addr = ioremap(res->start, resource_size(res)); - if (!ccdc_cfg.base_addr) { - status = -ENOMEM; - goto fail_nomem; - } - - /* Platform data holds setup_pinmux function ptr */ - if (NULL == pdev->dev.platform_data) { - status = -ENODEV; - goto fail_nomap; - } - setup_pinmux = pdev->dev.platform_data; - /* - * setup Mux configuration for ccdc which may be different for - * different SoCs using this CCDC - */ - setup_pinmux(); - ccdc_cfg.dev = &pdev->dev; - printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name); - return 0; -fail_nomap: - iounmap(ccdc_cfg.base_addr); -fail_nomem: - release_mem_region(res->start, resource_size(res)); -fail_nores: - vpfe_unregister_ccdc_device(&ccdc_hw_dev); - return status; -} - -static int dm355_ccdc_remove(struct platform_device *pdev) -{ - struct resource *res; - - iounmap(ccdc_cfg.base_addr); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, resource_size(res)); - vpfe_unregister_ccdc_device(&ccdc_hw_dev); - return 0; -} - -static struct platform_driver dm355_ccdc_driver = { - .driver = { - .name = "dm355_ccdc", - }, - .remove = dm355_ccdc_remove, - .probe = dm355_ccdc_probe, -}; - -module_platform_driver(dm355_ccdc_driver); diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.h b/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.h deleted file mode 100644 index 1f3d00aa46d1..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc.h +++ /dev/null @@ -1,308 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2005-2009 Texas Instruments Inc - */ -#ifndef _DM355_CCDC_H -#define _DM355_CCDC_H -#include <media/davinci/ccdc_types.h> -#include <media/davinci/vpfe_types.h> - -/* enum for No of pixel per line to be avg. in Black Clamping */ -enum ccdc_sample_length { - CCDC_SAMPLE_1PIXELS, - CCDC_SAMPLE_2PIXELS, - CCDC_SAMPLE_4PIXELS, - CCDC_SAMPLE_8PIXELS, - CCDC_SAMPLE_16PIXELS -}; - -/* enum for No of lines in Black Clamping */ -enum ccdc_sample_line { - CCDC_SAMPLE_1LINES, - CCDC_SAMPLE_2LINES, - CCDC_SAMPLE_4LINES, - CCDC_SAMPLE_8LINES, - CCDC_SAMPLE_16LINES -}; - -/* enum for Alaw gamma width */ -enum ccdc_gamma_width { - CCDC_GAMMA_BITS_13_4, - CCDC_GAMMA_BITS_12_3, - CCDC_GAMMA_BITS_11_2, - CCDC_GAMMA_BITS_10_1, - CCDC_GAMMA_BITS_09_0 -}; - -enum ccdc_colpats { - CCDC_RED, - CCDC_GREEN_RED, - CCDC_GREEN_BLUE, - CCDC_BLUE -}; - -struct ccdc_col_pat { - enum ccdc_colpats olop; - enum ccdc_colpats olep; - enum ccdc_colpats elop; - enum ccdc_colpats elep; -}; - -enum ccdc_datasft { - CCDC_DATA_NO_SHIFT, - CCDC_DATA_SHIFT_1BIT, - CCDC_DATA_SHIFT_2BIT, - CCDC_DATA_SHIFT_3BIT, - CCDC_DATA_SHIFT_4BIT, - CCDC_DATA_SHIFT_5BIT, - CCDC_DATA_SHIFT_6BIT -}; - -enum ccdc_data_size { - CCDC_DATA_16BITS, - CCDC_DATA_15BITS, - CCDC_DATA_14BITS, - CCDC_DATA_13BITS, - CCDC_DATA_12BITS, - CCDC_DATA_11BITS, - CCDC_DATA_10BITS, - CCDC_DATA_8BITS -}; -enum ccdc_mfilt1 { - CCDC_NO_MEDIAN_FILTER1, - CCDC_AVERAGE_FILTER1, - CCDC_MEDIAN_FILTER1 -}; - -enum ccdc_mfilt2 { - CCDC_NO_MEDIAN_FILTER2, - CCDC_AVERAGE_FILTER2, - CCDC_MEDIAN_FILTER2 -}; - -/* structure for ALaw */ -struct ccdc_a_law { - /* Enable/disable A-Law */ - unsigned char enable; - /* Gamma Width Input */ - enum ccdc_gamma_width gamma_wd; -}; - -/* structure for Black Clamping */ -struct ccdc_black_clamp { - /* only if bClampEnable is TRUE */ - unsigned char b_clamp_enable; - /* only if bClampEnable is TRUE */ - enum ccdc_sample_length sample_pixel; - /* only if bClampEnable is TRUE */ - enum ccdc_sample_line sample_ln; - /* only if bClampEnable is TRUE */ - unsigned short start_pixel; - /* only if bClampEnable is FALSE */ - unsigned short sgain; - unsigned short dc_sub; -}; - -/* structure for Black Level Compensation */ -struct ccdc_black_compensation { - /* Constant value to subtract from Red component */ - unsigned char r; - /* Constant value to subtract from Gr component */ - unsigned char gr; - /* Constant value to subtract from Blue component */ - unsigned char b; - /* Constant value to subtract from Gb component */ - unsigned char gb; -}; - -struct ccdc_float { - int integer; - unsigned int decimal; -}; - -#define CCDC_CSC_COEFF_TABLE_SIZE 16 -/* structure for color space converter */ -struct ccdc_csc { - unsigned char enable; - /* - * S8Q5. Use 2 decimal precision, user values range from -3.00 to 3.99. - * example - to use 1.03, set integer part as 1, and decimal part as 3 - * to use -1.03, set integer part as -1 and decimal part as 3 - */ - struct ccdc_float coeff[CCDC_CSC_COEFF_TABLE_SIZE]; -}; - -/* Structures for Vertical Defect Correction*/ -enum ccdc_vdf_csl { - CCDC_VDF_NORMAL, - CCDC_VDF_HORZ_INTERPOL_SAT, - CCDC_VDF_HORZ_INTERPOL -}; - -enum ccdc_vdf_cuda { - CCDC_VDF_WHOLE_LINE_CORRECT, - CCDC_VDF_UPPER_DISABLE -}; - -enum ccdc_dfc_mwr { - CCDC_DFC_MWR_WRITE_COMPLETE, - CCDC_DFC_WRITE_REG -}; - -enum ccdc_dfc_mrd { - CCDC_DFC_READ_COMPLETE, - CCDC_DFC_READ_REG -}; - -enum ccdc_dfc_ma_rst { - CCDC_DFC_INCR_ADDR, - CCDC_DFC_CLR_ADDR -}; - -enum ccdc_dfc_mclr { - CCDC_DFC_CLEAR_COMPLETE, - CCDC_DFC_CLEAR -}; - -struct ccdc_dft_corr_ctl { - enum ccdc_vdf_csl vdfcsl; - enum ccdc_vdf_cuda vdfcuda; - unsigned int vdflsft; -}; - -struct ccdc_dft_corr_mem_ctl { - enum ccdc_dfc_mwr dfcmwr; - enum ccdc_dfc_mrd dfcmrd; - enum ccdc_dfc_ma_rst dfcmarst; - enum ccdc_dfc_mclr dfcmclr; -}; - -#define CCDC_DFT_TABLE_SIZE 16 -/* - * Main Structure for vertical defect correction. Vertical defect - * correction can correct up to 16 defects if defects less than 16 - * then pad the rest with 0 - */ -struct ccdc_vertical_dft { - unsigned char ver_dft_en; - unsigned char gen_dft_en; - unsigned int saturation_ctl; - struct ccdc_dft_corr_ctl dft_corr_ctl; - struct ccdc_dft_corr_mem_ctl dft_corr_mem_ctl; - int table_size; - unsigned int dft_corr_horz[CCDC_DFT_TABLE_SIZE]; - unsigned int dft_corr_vert[CCDC_DFT_TABLE_SIZE]; - unsigned int dft_corr_sub1[CCDC_DFT_TABLE_SIZE]; - unsigned int dft_corr_sub2[CCDC_DFT_TABLE_SIZE]; - unsigned int dft_corr_sub3[CCDC_DFT_TABLE_SIZE]; -}; - -struct ccdc_data_offset { - unsigned char horz_offset; - unsigned char vert_offset; -}; - -/* - * Structure for CCDC configuration parameters for raw capture mode passed - * by application - */ -struct ccdc_config_params_raw { - /* data shift to be applied before storing */ - enum ccdc_datasft datasft; - /* data size value from 8 to 16 bits */ - enum ccdc_data_size data_sz; - /* median filter for sdram */ - enum ccdc_mfilt1 mfilt1; - enum ccdc_mfilt2 mfilt2; - /* low pass filter enable/disable */ - unsigned char lpf_enable; - /* Threshold of median filter */ - int med_filt_thres; - /* - * horz and vertical data offset. Applicable for defect correction - * and lsc - */ - struct ccdc_data_offset data_offset; - /* Structure for Optional A-Law */ - struct ccdc_a_law alaw; - /* Structure for Optical Black Clamp */ - struct ccdc_black_clamp blk_clamp; - /* Structure for Black Compensation */ - struct ccdc_black_compensation blk_comp; - /* structure for vertical Defect Correction Module Configuration */ - struct ccdc_vertical_dft vertical_dft; - /* structure for color space converter Module Configuration */ - struct ccdc_csc csc; - /* color patters for bayer capture */ - struct ccdc_col_pat col_pat_field0; - struct ccdc_col_pat col_pat_field1; -}; - -#ifdef __KERNEL__ -#include <linux/io.h> - -#define CCDC_WIN_PAL {0, 0, 720, 576} -#define CCDC_WIN_VGA {0, 0, 640, 480} - -struct ccdc_params_ycbcr { - /* pixel format */ - enum ccdc_pixfmt pix_fmt; - /* progressive or interlaced frame */ - enum ccdc_frmfmt frm_fmt; - /* video window */ - struct v4l2_rect win; - /* field id polarity */ - enum vpfe_pin_pol fid_pol; - /* vertical sync polarity */ - enum vpfe_pin_pol vd_pol; - /* horizontal sync polarity */ - enum vpfe_pin_pol hd_pol; - /* enable BT.656 embedded sync mode */ - int bt656_enable; - /* cb:y:cr:y or y:cb:y:cr in memory */ - enum ccdc_pixorder pix_order; - /* interleaved or separated fields */ - enum ccdc_buftype buf_type; -}; - -/* Gain applied to Raw Bayer data */ -struct ccdc_gain { - unsigned short r_ye; - unsigned short gr_cy; - unsigned short gb_g; - unsigned short b_mg; -}; - -/* Structure for CCDC configuration parameters for raw capture mode */ -struct ccdc_params_raw { - /* pixel format */ - enum ccdc_pixfmt pix_fmt; - /* progressive or interlaced frame */ - enum ccdc_frmfmt frm_fmt; - /* video window */ - struct v4l2_rect win; - /* field id polarity */ - enum vpfe_pin_pol fid_pol; - /* vertical sync polarity */ - enum vpfe_pin_pol vd_pol; - /* horizontal sync polarity */ - enum vpfe_pin_pol hd_pol; - /* interleaved or separated fields */ - enum ccdc_buftype buf_type; - /* Gain values */ - struct ccdc_gain gain; - /* offset */ - unsigned int ccdc_offset; - /* horizontal flip enable */ - unsigned char horz_flip_enable; - /* - * enable to store the image in inverse order in memory - * (bottom to top) - */ - unsigned char image_invert_enable; - /* Configurable part of raw data */ - struct ccdc_config_params_raw config_params; -}; - -#endif -#endif /* DM355_CCDC_H */ diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc_regs.h b/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc_regs.h deleted file mode 100644 index eb381f075245..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm355_ccdc_regs.h +++ /dev/null @@ -1,297 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2005-2009 Texas Instruments Inc - */ -#ifndef _DM355_CCDC_REGS_H -#define _DM355_CCDC_REGS_H - -/**************************************************************************\ -* Register OFFSET Definitions -\**************************************************************************/ -#define SYNCEN 0x00 -#define MODESET 0x04 -#define HDWIDTH 0x08 -#define VDWIDTH 0x0c -#define PPLN 0x10 -#define LPFR 0x14 -#define SPH 0x18 -#define NPH 0x1c -#define SLV0 0x20 -#define SLV1 0x24 -#define NLV 0x28 -#define CULH 0x2c -#define CULV 0x30 -#define HSIZE 0x34 -#define SDOFST 0x38 -#define STADRH 0x3c -#define STADRL 0x40 -#define CLAMP 0x44 -#define DCSUB 0x48 -#define COLPTN 0x4c -#define BLKCMP0 0x50 -#define BLKCMP1 0x54 -#define MEDFILT 0x58 -#define RYEGAIN 0x5c -#define GRCYGAIN 0x60 -#define GBGGAIN 0x64 -#define BMGGAIN 0x68 -#define OFFSET 0x6c -#define OUTCLIP 0x70 -#define VDINT0 0x74 -#define VDINT1 0x78 -#define RSV0 0x7c -#define GAMMAWD 0x80 -#define REC656IF 0x84 -#define CCDCFG 0x88 -#define FMTCFG 0x8c -#define FMTPLEN 0x90 -#define FMTSPH 0x94 -#define FMTLNH 0x98 -#define FMTSLV 0x9c -#define FMTLNV 0xa0 -#define FMTRLEN 0xa4 -#define FMTHCNT 0xa8 -#define FMT_ADDR_PTR_B 0xac -#define FMT_ADDR_PTR(i) (FMT_ADDR_PTR_B + (i * 4)) -#define FMTPGM_VF0 0xcc -#define FMTPGM_VF1 0xd0 -#define FMTPGM_AP0 0xd4 -#define FMTPGM_AP1 0xd8 -#define FMTPGM_AP2 0xdc -#define FMTPGM_AP3 0xe0 -#define FMTPGM_AP4 0xe4 -#define FMTPGM_AP5 0xe8 -#define FMTPGM_AP6 0xec -#define FMTPGM_AP7 0xf0 -#define LSCCFG1 0xf4 -#define LSCCFG2 0xf8 -#define LSCH0 0xfc -#define LSCV0 0x100 -#define LSCKH 0x104 -#define LSCKV 0x108 -#define LSCMEMCTL 0x10c -#define LSCMEMD 0x110 -#define LSCMEMQ 0x114 -#define DFCCTL 0x118 -#define DFCVSAT 0x11c -#define DFCMEMCTL 0x120 -#define DFCMEM0 0x124 -#define DFCMEM1 0x128 -#define DFCMEM2 0x12c -#define DFCMEM3 0x130 -#define DFCMEM4 0x134 -#define CSCCTL 0x138 -#define CSCM0 0x13c -#define CSCM1 0x140 -#define CSCM2 0x144 -#define CSCM3 0x148 -#define CSCM4 0x14c -#define CSCM5 0x150 -#define CSCM6 0x154 -#define CSCM7 0x158 -#define DATAOFST 0x15c -#define CCDC_REG_LAST DATAOFST -/************************************************************** -* Define for various register bit mask and shifts for CCDC -* -**************************************************************/ -#define CCDC_RAW_IP_MODE 0 -#define CCDC_VDHDOUT_INPUT 0 -#define CCDC_YCINSWP_RAW (0 << 4) -#define CCDC_EXWEN_DISABLE 0 -#define CCDC_DATAPOL_NORMAL 0 -#define CCDC_CCDCFG_FIDMD_LATCH_VSYNC 0 -#define CCDC_CCDCFG_FIDMD_NO_LATCH_VSYNC (1 << 6) -#define CCDC_CCDCFG_WENLOG_AND 0 -#define CCDC_CCDCFG_TRGSEL_WEN 0 -#define CCDC_CCDCFG_EXTRG_DISABLE 0 -#define CCDC_CFA_MOSAIC 0 -#define CCDC_Y8POS_SHIFT 11 - -#define CCDC_VDC_DFCVSAT_MASK 0x3fff -#define CCDC_DATAOFST_MASK 0x0ff -#define CCDC_DATAOFST_H_SHIFT 0 -#define CCDC_DATAOFST_V_SHIFT 8 -#define CCDC_GAMMAWD_CFA_MASK 1 -#define CCDC_GAMMAWD_CFA_SHIFT 5 -#define CCDC_GAMMAWD_INPUT_SHIFT 2 -#define CCDC_FID_POL_MASK 1 -#define CCDC_FID_POL_SHIFT 4 -#define CCDC_HD_POL_MASK 1 -#define CCDC_HD_POL_SHIFT 3 -#define CCDC_VD_POL_MASK 1 -#define CCDC_VD_POL_SHIFT 2 -#define CCDC_VD_POL_NEGATIVE (1 << 2) -#define CCDC_FRM_FMT_MASK 1 -#define CCDC_FRM_FMT_SHIFT 7 -#define CCDC_DATA_SZ_MASK 7 -#define CCDC_DATA_SZ_SHIFT 8 -#define CCDC_VDHDOUT_MASK 1 -#define CCDC_VDHDOUT_SHIFT 0 -#define CCDC_EXWEN_MASK 1 -#define CCDC_EXWEN_SHIFT 5 -#define CCDC_INPUT_MODE_MASK 3 -#define CCDC_INPUT_MODE_SHIFT 12 -#define CCDC_PIX_FMT_MASK 3 -#define CCDC_PIX_FMT_SHIFT 12 -#define CCDC_DATAPOL_MASK 1 -#define CCDC_DATAPOL_SHIFT 6 -#define CCDC_WEN_ENABLE (1 << 1) -#define CCDC_VDHDEN_ENABLE (1 << 16) -#define CCDC_LPF_ENABLE (1 << 14) -#define CCDC_ALAW_ENABLE 1 -#define CCDC_ALAW_GAMMA_WD_MASK 7 -#define CCDC_REC656IF_BT656_EN 3 - -#define CCDC_FMTCFG_FMTMODE_MASK 3 -#define CCDC_FMTCFG_FMTMODE_SHIFT 1 -#define CCDC_FMTCFG_LNUM_MASK 3 -#define CCDC_FMTCFG_LNUM_SHIFT 4 -#define CCDC_FMTCFG_ADDRINC_MASK 7 -#define CCDC_FMTCFG_ADDRINC_SHIFT 8 - -#define CCDC_CCDCFG_FIDMD_SHIFT 6 -#define CCDC_CCDCFG_WENLOG_SHIFT 8 -#define CCDC_CCDCFG_TRGSEL_SHIFT 9 -#define CCDC_CCDCFG_EXTRG_SHIFT 10 -#define CCDC_CCDCFG_MSBINVI_SHIFT 13 - -#define CCDC_HSIZE_FLIP_SHIFT 12 -#define CCDC_HSIZE_FLIP_MASK 1 -#define CCDC_HSIZE_VAL_MASK 0xFFF -#define CCDC_SDOFST_FIELD_INTERLEAVED 0x249 -#define CCDC_SDOFST_INTERLACE_INVERSE 0x4B6D -#define CCDC_SDOFST_INTERLACE_NORMAL 0x0B6D -#define CCDC_SDOFST_PROGRESSIVE_INVERSE 0x4000 -#define CCDC_SDOFST_PROGRESSIVE_NORMAL 0 -#define CCDC_START_PX_HOR_MASK 0x7FFF -#define CCDC_NUM_PX_HOR_MASK 0x7FFF -#define CCDC_START_VER_ONE_MASK 0x7FFF -#define CCDC_START_VER_TWO_MASK 0x7FFF -#define CCDC_NUM_LINES_VER 0x7FFF - -#define CCDC_BLK_CLAMP_ENABLE (1 << 15) -#define CCDC_BLK_SGAIN_MASK 0x1F -#define CCDC_BLK_ST_PXL_MASK 0x1FFF -#define CCDC_BLK_SAMPLE_LN_MASK 3 -#define CCDC_BLK_SAMPLE_LN_SHIFT 13 - -#define CCDC_NUM_LINE_CALC_MASK 3 -#define CCDC_NUM_LINE_CALC_SHIFT 14 - -#define CCDC_BLK_DC_SUB_MASK 0x3FFF -#define CCDC_BLK_COMP_MASK 0xFF -#define CCDC_BLK_COMP_GB_COMP_SHIFT 8 -#define CCDC_BLK_COMP_GR_COMP_SHIFT 0 -#define CCDC_BLK_COMP_R_COMP_SHIFT 8 -#define CCDC_LATCH_ON_VSYNC_DISABLE (1 << 15) -#define CCDC_LATCH_ON_VSYNC_ENABLE (0 << 15) -#define CCDC_FPC_ENABLE (1 << 15) -#define CCDC_FPC_FPC_NUM_MASK 0x7FFF -#define CCDC_DATA_PACK_ENABLE (1 << 11) -#define CCDC_FMT_HORZ_FMTLNH_MASK 0x1FFF -#define CCDC_FMT_HORZ_FMTSPH_MASK 0x1FFF -#define CCDC_FMT_HORZ_FMTSPH_SHIFT 16 -#define CCDC_FMT_VERT_FMTLNV_MASK 0x1FFF -#define CCDC_FMT_VERT_FMTSLV_MASK 0x1FFF -#define CCDC_FMT_VERT_FMTSLV_SHIFT 16 -#define CCDC_VP_OUT_VERT_NUM_MASK 0x3FFF -#define CCDC_VP_OUT_VERT_NUM_SHIFT 17 -#define CCDC_VP_OUT_HORZ_NUM_MASK 0x1FFF -#define CCDC_VP_OUT_HORZ_NUM_SHIFT 4 -#define CCDC_VP_OUT_HORZ_ST_MASK 0xF - -#define CCDC_CSC_COEF_INTEG_MASK 7 -#define CCDC_CSC_COEF_DECIMAL_MASK 0x1f -#define CCDC_CSC_COEF_INTEG_SHIFT 5 -#define CCDC_CSCM_MSB_SHIFT 8 -#define CCDC_CSC_ENABLE 1 -#define CCDC_CSC_DEC_MAX 32 - -#define CCDC_MFILT1_SHIFT 10 -#define CCDC_MFILT2_SHIFT 8 -#define CCDC_MED_FILT_THRESH 0x3FFF -#define CCDC_LPF_MASK 1 -#define CCDC_LPF_SHIFT 14 -#define CCDC_OFFSET_MASK 0x3FF -#define CCDC_DATASFT_MASK 7 -#define CCDC_DATASFT_SHIFT 8 - -#define CCDC_DF_ENABLE 1 - -#define CCDC_FMTPLEN_P0_MASK 0xF -#define CCDC_FMTPLEN_P1_MASK 0xF -#define CCDC_FMTPLEN_P2_MASK 7 -#define CCDC_FMTPLEN_P3_MASK 7 -#define CCDC_FMTPLEN_P0_SHIFT 0 -#define CCDC_FMTPLEN_P1_SHIFT 4 -#define CCDC_FMTPLEN_P2_SHIFT 8 -#define CCDC_FMTPLEN_P3_SHIFT 12 - -#define CCDC_FMTSPH_MASK 0x1FFF -#define CCDC_FMTLNH_MASK 0x1FFF -#define CCDC_FMTSLV_MASK 0x1FFF -#define CCDC_FMTLNV_MASK 0x7FFF -#define CCDC_FMTRLEN_MASK 0x1FFF -#define CCDC_FMTHCNT_MASK 0x1FFF - -#define CCDC_ADP_INIT_MASK 0x1FFF -#define CCDC_ADP_LINE_SHIFT 13 -#define CCDC_ADP_LINE_MASK 3 -#define CCDC_FMTPGN_APTR_MASK 7 - -#define CCDC_DFCCTL_GDFCEN_MASK 1 -#define CCDC_DFCCTL_VDFCEN_MASK 1 -#define CCDC_DFCCTL_VDFC_DISABLE (0 << 4) -#define CCDC_DFCCTL_VDFCEN_SHIFT 4 -#define CCDC_DFCCTL_VDFCSL_MASK 3 -#define CCDC_DFCCTL_VDFCSL_SHIFT 5 -#define CCDC_DFCCTL_VDFCUDA_MASK 1 -#define CCDC_DFCCTL_VDFCUDA_SHIFT 7 -#define CCDC_DFCCTL_VDFLSFT_MASK 3 -#define CCDC_DFCCTL_VDFLSFT_SHIFT 8 -#define CCDC_DFCMEMCTL_DFCMARST_MASK 1 -#define CCDC_DFCMEMCTL_DFCMARST_SHIFT 2 -#define CCDC_DFCMEMCTL_DFCMWR_MASK 1 -#define CCDC_DFCMEMCTL_DFCMWR_SHIFT 0 -#define CCDC_DFCMEMCTL_INC_ADDR (0 << 2) - -#define CCDC_LSCCFG_GFTSF_MASK 7 -#define CCDC_LSCCFG_GFTSF_SHIFT 1 -#define CCDC_LSCCFG_GFTINV_MASK 0xf -#define CCDC_LSCCFG_GFTINV_SHIFT 4 -#define CCDC_LSC_GFTABLE_SEL_MASK 3 -#define CCDC_LSC_GFTABLE_EPEL_SHIFT 8 -#define CCDC_LSC_GFTABLE_OPEL_SHIFT 10 -#define CCDC_LSC_GFTABLE_EPOL_SHIFT 12 -#define CCDC_LSC_GFTABLE_OPOL_SHIFT 14 -#define CCDC_LSC_GFMODE_MASK 3 -#define CCDC_LSC_GFMODE_SHIFT 4 -#define CCDC_LSC_DISABLE 0 -#define CCDC_LSC_ENABLE 1 -#define CCDC_LSC_TABLE1_SLC 0 -#define CCDC_LSC_TABLE2_SLC 1 -#define CCDC_LSC_TABLE3_SLC 2 -#define CCDC_LSC_MEMADDR_RESET (1 << 2) -#define CCDC_LSC_MEMADDR_INCR (0 << 2) -#define CCDC_LSC_FRAC_MASK_T1 0xFF -#define CCDC_LSC_INT_MASK 3 -#define CCDC_LSC_FRAC_MASK 0x3FFF -#define CCDC_LSC_CENTRE_MASK 0x3FFF -#define CCDC_LSC_COEF_MASK 0xff -#define CCDC_LSC_COEFL_SHIFT 0 -#define CCDC_LSC_COEFU_SHIFT 8 -#define CCDC_GAIN_MASK 0x7FF -#define CCDC_SYNCEN_VDHDEN_MASK (1 << 0) -#define CCDC_SYNCEN_WEN_MASK (1 << 1) -#define CCDC_SYNCEN_WEN_SHIFT 1 - -/* Power on Defaults in hardware */ -#define MODESET_DEFAULT 0x200 -#define CULH_DEFAULT 0xFFFF -#define CULV_DEFAULT 0xFF -#define GAIN_DEFAULT 256 -#define OUTCLIP_DEFAULT 0x3FFF -#define LSCCFG2_DEFAULT 0xE - -#endif diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.c b/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.c deleted file mode 100644 index 4a93e5ad6415..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.c +++ /dev/null @@ -1,879 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2006-2009 Texas Instruments Inc - * - * CCDC hardware module for DM6446 - * ------------------------------ - * - * This module is for configuring CCD controller of DM6446 VPFE to capture - * Raw yuv or Bayer RGB data from a decoder. CCDC has several modules - * such as Defect Pixel Correction, Color Space Conversion etc to - * pre-process the Raw Bayer RGB data, before writing it to SDRAM. - * This file is named DM644x so that other variants such DM6443 - * may be supported using the same module. - * - * TODO: Test Raw bayer parameter settings and bayer capture - * Split module parameter structure to module specific ioctl structs - * investigate if enum used for user space type definition - * to be replaced by #defines or integer - */ -#include <linux/platform_device.h> -#include <linux/uaccess.h> -#include <linux/videodev2.h> -#include <linux/gfp.h> -#include <linux/err.h> -#include <linux/module.h> - -#include "dm644x_ccdc.h" -#include <media/davinci/vpss.h> - -#include "dm644x_ccdc_regs.h" -#include "ccdc_hw_device.h" - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("CCDC Driver for DM6446"); -MODULE_AUTHOR("Texas Instruments"); - -static struct ccdc_oper_config { - struct device *dev; - /* CCDC interface type */ - enum vpfe_hw_if_type if_type; - /* Raw Bayer configuration */ - struct ccdc_params_raw bayer; - /* YCbCr configuration */ - struct ccdc_params_ycbcr ycbcr; - /* ccdc base address */ - void __iomem *base_addr; -} ccdc_cfg = { - /* Raw configurations */ - .bayer = { - .pix_fmt = CCDC_PIXFMT_RAW, - .frm_fmt = CCDC_FRMFMT_PROGRESSIVE, - .win = CCDC_WIN_VGA, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .config_params = { - .data_sz = CCDC_DATA_10BITS, - }, - }, - .ycbcr = { - .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT, - .frm_fmt = CCDC_FRMFMT_INTERLACED, - .win = CCDC_WIN_PAL, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .bt656_enable = 1, - .pix_order = CCDC_PIXORDER_CBYCRY, - .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED - }, -}; - -#define CCDC_MAX_RAW_YUV_FORMATS 2 - -/* Raw Bayer formats */ -static u32 ccdc_raw_bayer_pix_formats[] = - {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16}; - -/* Raw YUV formats */ -static u32 ccdc_raw_yuv_pix_formats[] = - {V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV}; - -/* CCDC Save/Restore context */ -static u32 ccdc_ctx[CCDC_REG_END / sizeof(u32)]; - -/* register access routines */ -static inline u32 regr(u32 offset) -{ - return __raw_readl(ccdc_cfg.base_addr + offset); -} - -static inline void regw(u32 val, u32 offset) -{ - __raw_writel(val, ccdc_cfg.base_addr + offset); -} - -static void ccdc_enable(int flag) -{ - regw(flag, CCDC_PCR); -} - -static void ccdc_enable_vport(int flag) -{ - if (flag) - /* enable video port */ - regw(CCDC_ENABLE_VIDEO_PORT, CCDC_FMTCFG); - else - regw(CCDC_DISABLE_VIDEO_PORT, CCDC_FMTCFG); -} - -/* - * ccdc_setwin() - * This function will configure the window size - * to be capture in CCDC reg - */ -static void ccdc_setwin(struct v4l2_rect *image_win, - enum ccdc_frmfmt frm_fmt, - int ppc) -{ - int horz_start, horz_nr_pixels; - int vert_start, vert_nr_lines; - int val = 0, mid_img = 0; - - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin..."); - /* - * ppc - per pixel count. indicates how many pixels per cell - * output to SDRAM. example, for ycbcr, it is one y and one c, so 2. - * raw capture this is 1 - */ - horz_start = image_win->left << (ppc - 1); - horz_nr_pixels = (image_win->width << (ppc - 1)) - 1; - regw((horz_start << CCDC_HORZ_INFO_SPH_SHIFT) | horz_nr_pixels, - CCDC_HORZ_INFO); - - vert_start = image_win->top; - - if (frm_fmt == CCDC_FRMFMT_INTERLACED) { - vert_nr_lines = (image_win->height >> 1) - 1; - vert_start >>= 1; - /* Since first line doesn't have any data */ - vert_start += 1; - /* configure VDINT0 */ - val = (vert_start << CCDC_VDINT_VDINT0_SHIFT); - regw(val, CCDC_VDINT); - - } else { - /* Since first line doesn't have any data */ - vert_start += 1; - vert_nr_lines = image_win->height - 1; - /* - * configure VDINT0 and VDINT1. VDINT1 will be at half - * of image height - */ - mid_img = vert_start + (image_win->height / 2); - val = (vert_start << CCDC_VDINT_VDINT0_SHIFT) | - (mid_img & CCDC_VDINT_VDINT1_MASK); - regw(val, CCDC_VDINT); - - } - regw((vert_start << CCDC_VERT_START_SLV0_SHIFT) | vert_start, - CCDC_VERT_START); - regw(vert_nr_lines, CCDC_VERT_LINES); - dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin..."); -} - -static void ccdc_readregs(void) -{ - unsigned int val = 0; - - val = regr(CCDC_ALAW); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to ALAW...\n", val); - val = regr(CCDC_CLAMP); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to CLAMP...\n", val); - val = regr(CCDC_DCSUB); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to DCSUB...\n", val); - val = regr(CCDC_BLKCMP); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to BLKCMP...\n", val); - val = regr(CCDC_FPC_ADDR); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC_ADDR...\n", val); - val = regr(CCDC_FPC); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC...\n", val); - val = regr(CCDC_FMTCFG); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMTCFG...\n", val); - val = regr(CCDC_COLPTN); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to COLPTN...\n", val); - val = regr(CCDC_FMT_HORZ); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_HORZ...\n", val); - val = regr(CCDC_FMT_VERT); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_VERT...\n", val); - val = regr(CCDC_HSIZE_OFF); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HSIZE_OFF...\n", val); - val = regr(CCDC_SDOFST); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SDOFST...\n", val); - val = regr(CCDC_VP_OUT); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VP_OUT...\n", val); - val = regr(CCDC_SYN_MODE); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SYN_MODE...\n", val); - val = regr(CCDC_HORZ_INFO); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HORZ_INFO...\n", val); - val = regr(CCDC_VERT_START); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_START...\n", val); - val = regr(CCDC_VERT_LINES); - dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_LINES...\n", val); -} - -static int ccdc_close(struct device *dev) -{ - return 0; -} - -/* - * ccdc_restore_defaults() - * This function will write defaults to all CCDC registers - */ -static void ccdc_restore_defaults(void) -{ - int i; - - /* disable CCDC */ - ccdc_enable(0); - /* set all registers to default value */ - for (i = 4; i <= 0x94; i += 4) - regw(0, i); - regw(CCDC_NO_CULLING, CCDC_CULLING); - regw(CCDC_GAMMA_BITS_11_2, CCDC_ALAW); -} - -static int ccdc_open(struct device *device) -{ - ccdc_restore_defaults(); - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_enable_vport(1); - return 0; -} - -static void ccdc_sbl_reset(void) -{ - vpss_clear_wbl_overflow(VPSS_PCR_CCDC_WBL_O); -} - -/* - * ccdc_config_ycbcr() - * This function will configure CCDC for YCbCr video capture - */ -static void ccdc_config_ycbcr(void) -{ - struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr; - u32 syn_mode; - - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr..."); - /* - * first restore the CCDC registers to default values - * This is important since we assume default values to be set in - * a lot of registers that we didn't touch - */ - ccdc_restore_defaults(); - - /* - * configure pixel format, frame format, configure video frame - * format, enable output to SDRAM, enable internal timing generator - * and 8bit pack mode - */ - syn_mode = (((params->pix_fmt & CCDC_SYN_MODE_INPMOD_MASK) << - CCDC_SYN_MODE_INPMOD_SHIFT) | - ((params->frm_fmt & CCDC_SYN_FLDMODE_MASK) << - CCDC_SYN_FLDMODE_SHIFT) | CCDC_VDHDEN_ENABLE | - CCDC_WEN_ENABLE | CCDC_DATA_PACK_ENABLE); - - /* setup BT.656 sync mode */ - if (params->bt656_enable) { - regw(CCDC_REC656IF_BT656_EN, CCDC_REC656IF); - - /* - * configure the FID, VD, HD pin polarity, - * fld,hd pol positive, vd negative, 8-bit data - */ - syn_mode |= CCDC_SYN_MODE_VD_POL_NEGATIVE; - if (ccdc_cfg.if_type == VPFE_BT656_10BIT) - syn_mode |= CCDC_SYN_MODE_10BITS; - else - syn_mode |= CCDC_SYN_MODE_8BITS; - } else { - /* y/c external sync mode */ - syn_mode |= (((params->fid_pol & CCDC_FID_POL_MASK) << - CCDC_FID_POL_SHIFT) | - ((params->hd_pol & CCDC_HD_POL_MASK) << - CCDC_HD_POL_SHIFT) | - ((params->vd_pol & CCDC_VD_POL_MASK) << - CCDC_VD_POL_SHIFT)); - } - regw(syn_mode, CCDC_SYN_MODE); - - /* configure video window */ - ccdc_setwin(¶ms->win, params->frm_fmt, 2); - - /* - * configure the order of y cb cr in SDRAM, and disable latch - * internal register on vsync - */ - if (ccdc_cfg.if_type == VPFE_BT656_10BIT) - regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) | - CCDC_LATCH_ON_VSYNC_DISABLE | CCDC_CCDCFG_BW656_10BIT, - CCDC_CCDCFG); - else - regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) | - CCDC_LATCH_ON_VSYNC_DISABLE, CCDC_CCDCFG); - - /* - * configure the horizontal line offset. This should be a - * on 32 byte boundary. So clear LSB 5 bits - */ - regw(((params->win.width * 2 + 31) & ~0x1f), CCDC_HSIZE_OFF); - - /* configure the memory line offset */ - if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) - /* two fields are interleaved in memory */ - regw(CCDC_SDOFST_FIELD_INTERLEAVED, CCDC_SDOFST); - - ccdc_sbl_reset(); - dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n"); -} - -static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp) -{ - u32 val; - - if (!bclamp->enable) { - /* configure DCSub */ - val = (bclamp->dc_sub) & CCDC_BLK_DC_SUB_MASK; - regw(val, CCDC_DCSUB); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to DCSUB...\n", val); - regw(CCDC_CLAMP_DEFAULT_VAL, CCDC_CLAMP); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to CLAMP...\n"); - return; - } - /* - * Configure gain, Start pixel, No of line to be avg, - * No of pixel/line to be avg, & Enable the Black clamping - */ - val = ((bclamp->sgain & CCDC_BLK_SGAIN_MASK) | - ((bclamp->start_pixel & CCDC_BLK_ST_PXL_MASK) << - CCDC_BLK_ST_PXL_SHIFT) | - ((bclamp->sample_ln & CCDC_BLK_SAMPLE_LINE_MASK) << - CCDC_BLK_SAMPLE_LINE_SHIFT) | - ((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) << - CCDC_BLK_SAMPLE_LN_SHIFT) | CCDC_BLK_CLAMP_ENABLE); - regw(val, CCDC_CLAMP); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to CLAMP...\n", val); - /* If Black clamping is enable then make dcsub 0 */ - regw(CCDC_DCSUB_DEFAULT_VAL, CCDC_DCSUB); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x00000000 to DCSUB...\n"); -} - -static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp) -{ - u32 val; - - val = ((bcomp->b & CCDC_BLK_COMP_MASK) | - ((bcomp->gb & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_GB_COMP_SHIFT) | - ((bcomp->gr & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_GR_COMP_SHIFT) | - ((bcomp->r & CCDC_BLK_COMP_MASK) << - CCDC_BLK_COMP_R_COMP_SHIFT)); - regw(val, CCDC_BLKCMP); -} - -/* - * ccdc_config_raw() - * This function will configure CCDC for Raw capture mode - */ -static void ccdc_config_raw(void) -{ - struct ccdc_params_raw *params = &ccdc_cfg.bayer; - struct ccdc_config_params_raw *config_params = - &ccdc_cfg.bayer.config_params; - unsigned int syn_mode = 0; - unsigned int val; - - dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw..."); - - /* Reset CCDC */ - ccdc_restore_defaults(); - - /* Disable latching function registers on VSYNC */ - regw(CCDC_LATCH_ON_VSYNC_DISABLE, CCDC_CCDCFG); - - /* - * Configure the vertical sync polarity(SYN_MODE.VDPOL), - * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity - * (SYN_MODE.FLDPOL), frame format(progressive or interlace), - * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output - * SDRAM, enable internal timing generator - */ - syn_mode = - (((params->vd_pol & CCDC_VD_POL_MASK) << CCDC_VD_POL_SHIFT) | - ((params->hd_pol & CCDC_HD_POL_MASK) << CCDC_HD_POL_SHIFT) | - ((params->fid_pol & CCDC_FID_POL_MASK) << CCDC_FID_POL_SHIFT) | - ((params->frm_fmt & CCDC_FRM_FMT_MASK) << CCDC_FRM_FMT_SHIFT) | - ((config_params->data_sz & CCDC_DATA_SZ_MASK) << - CCDC_DATA_SZ_SHIFT) | - ((params->pix_fmt & CCDC_PIX_FMT_MASK) << CCDC_PIX_FMT_SHIFT) | - CCDC_WEN_ENABLE | CCDC_VDHDEN_ENABLE); - - /* Enable and configure aLaw register if needed */ - if (config_params->alaw.enable) { - val = ((config_params->alaw.gamma_wd & - CCDC_ALAW_GAMMA_WD_MASK) | CCDC_ALAW_ENABLE); - regw(val, CCDC_ALAW); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to ALAW...\n", val); - } - - /* Configure video window */ - ccdc_setwin(¶ms->win, params->frm_fmt, CCDC_PPC_RAW); - - /* Configure Black Clamp */ - ccdc_config_black_clamp(&config_params->blk_clamp); - - /* Configure Black level compensation */ - ccdc_config_black_compense(&config_params->blk_comp); - - /* If data size is 8 bit then pack the data */ - if ((config_params->data_sz == CCDC_DATA_8BITS) || - config_params->alaw.enable) - syn_mode |= CCDC_DATA_PACK_ENABLE; - - /* disable video port */ - val = CCDC_DISABLE_VIDEO_PORT; - - if (config_params->data_sz == CCDC_DATA_8BITS) - val |= (CCDC_DATA_10BITS & CCDC_FMTCFG_VPIN_MASK) - << CCDC_FMTCFG_VPIN_SHIFT; - else - val |= (config_params->data_sz & CCDC_FMTCFG_VPIN_MASK) - << CCDC_FMTCFG_VPIN_SHIFT; - /* Write value in FMTCFG */ - regw(val, CCDC_FMTCFG); - - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMTCFG...\n", val); - /* Configure the color pattern according to mt9t001 sensor */ - regw(CCDC_COLPTN_VAL, CCDC_COLPTN); - - dev_dbg(ccdc_cfg.dev, "\nWriting 0xBB11BB11 to COLPTN...\n"); - /* - * Configure Data formatter(Video port) pixel selection - * (FMT_HORZ, FMT_VERT) - */ - val = ((params->win.left & CCDC_FMT_HORZ_FMTSPH_MASK) << - CCDC_FMT_HORZ_FMTSPH_SHIFT) | - (params->win.width & CCDC_FMT_HORZ_FMTLNH_MASK); - regw(val, CCDC_FMT_HORZ); - - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_HORZ...\n", val); - val = (params->win.top & CCDC_FMT_VERT_FMTSLV_MASK) - << CCDC_FMT_VERT_FMTSLV_SHIFT; - if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) - val |= (params->win.height) & CCDC_FMT_VERT_FMTLNV_MASK; - else - val |= (params->win.height >> 1) & CCDC_FMT_VERT_FMTLNV_MASK; - - dev_dbg(ccdc_cfg.dev, "\nparams->win.height 0x%x ...\n", - params->win.height); - regw(val, CCDC_FMT_VERT); - - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_VERT...\n", val); - - dev_dbg(ccdc_cfg.dev, "\nbelow regw(val, FMT_VERT)..."); - - /* - * Configure Horizontal offset register. If pack 8 is enabled then - * 1 pixel will take 1 byte - */ - if ((config_params->data_sz == CCDC_DATA_8BITS) || - config_params->alaw.enable) - regw((params->win.width + CCDC_32BYTE_ALIGN_VAL) & - CCDC_HSIZE_OFF_MASK, CCDC_HSIZE_OFF); - else - /* else one pixel will take 2 byte */ - regw(((params->win.width * CCDC_TWO_BYTES_PER_PIXEL) + - CCDC_32BYTE_ALIGN_VAL) & CCDC_HSIZE_OFF_MASK, - CCDC_HSIZE_OFF); - - /* Set value for SDOFST */ - if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) { - if (params->image_invert_enable) { - /* For intelace inverse mode */ - regw(CCDC_INTERLACED_IMAGE_INVERT, CCDC_SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x4B6D to SDOFST..\n"); - } - - else { - /* For intelace non inverse mode */ - regw(CCDC_INTERLACED_NO_IMAGE_INVERT, CCDC_SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x0249 to SDOFST..\n"); - } - } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { - regw(CCDC_PROGRESSIVE_NO_IMAGE_INVERT, CCDC_SDOFST); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to SDOFST...\n"); - } - - /* - * Configure video port pixel selection (VPOUT) - * Here -1 is to make the height value less than FMT_VERT.FMTLNV - */ - if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) - val = (((params->win.height - 1) & CCDC_VP_OUT_VERT_NUM_MASK)) - << CCDC_VP_OUT_VERT_NUM_SHIFT; - else - val = - ((((params->win.height >> CCDC_INTERLACED_HEIGHT_SHIFT) - - 1) & CCDC_VP_OUT_VERT_NUM_MASK)) << - CCDC_VP_OUT_VERT_NUM_SHIFT; - - val |= ((((params->win.width))) & CCDC_VP_OUT_HORZ_NUM_MASK) - << CCDC_VP_OUT_HORZ_NUM_SHIFT; - val |= (params->win.left) & CCDC_VP_OUT_HORZ_ST_MASK; - regw(val, CCDC_VP_OUT); - - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to VP_OUT...\n", val); - regw(syn_mode, CCDC_SYN_MODE); - dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to SYN_MODE...\n", syn_mode); - - ccdc_sbl_reset(); - dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw..."); - ccdc_readregs(); -} - -static int ccdc_configure(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_config_raw(); - else - ccdc_config_ycbcr(); - return 0; -} - -static int ccdc_set_buftype(enum ccdc_buftype buf_type) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.buf_type = buf_type; - else - ccdc_cfg.ycbcr.buf_type = buf_type; - return 0; -} - -static enum ccdc_buftype ccdc_get_buftype(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - return ccdc_cfg.bayer.buf_type; - return ccdc_cfg.ycbcr.buf_type; -} - -static int ccdc_enum_pix(u32 *pix, int i) -{ - int ret = -EINVAL; - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) { - *pix = ccdc_raw_bayer_pix_formats[i]; - ret = 0; - } - } else { - if (i < ARRAY_SIZE(ccdc_raw_yuv_pix_formats)) { - *pix = ccdc_raw_yuv_pix_formats[i]; - ret = 0; - } - } - return ret; -} - -static int ccdc_set_pixel_format(u32 pixfmt) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; - if (pixfmt == V4L2_PIX_FMT_SBGGR8) - ccdc_cfg.bayer.config_params.alaw.enable = 1; - else if (pixfmt != V4L2_PIX_FMT_SBGGR16) - return -EINVAL; - } else { - if (pixfmt == V4L2_PIX_FMT_YUYV) - ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; - else if (pixfmt == V4L2_PIX_FMT_UYVY) - ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; - else - return -EINVAL; - } - return 0; -} - -static u32 ccdc_get_pixel_format(void) -{ - struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw; - u32 pixfmt; - - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - if (alaw->enable) - pixfmt = V4L2_PIX_FMT_SBGGR8; - else - pixfmt = V4L2_PIX_FMT_SBGGR16; - else { - if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) - pixfmt = V4L2_PIX_FMT_YUYV; - else - pixfmt = V4L2_PIX_FMT_UYVY; - } - return pixfmt; -} - -static int ccdc_set_image_window(struct v4l2_rect *win) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.win = *win; - else - ccdc_cfg.ycbcr.win = *win; - return 0; -} - -static void ccdc_get_image_window(struct v4l2_rect *win) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - *win = ccdc_cfg.bayer.win; - else - *win = ccdc_cfg.ycbcr.win; -} - -static unsigned int ccdc_get_line_length(void) -{ - struct ccdc_config_params_raw *config_params = - &ccdc_cfg.bayer.config_params; - unsigned int len; - - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) { - if ((config_params->alaw.enable) || - (config_params->data_sz == CCDC_DATA_8BITS)) - len = ccdc_cfg.bayer.win.width; - else - len = ccdc_cfg.bayer.win.width * 2; - } else - len = ccdc_cfg.ycbcr.win.width * 2; - return ALIGN(len, 32); -} - -static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - ccdc_cfg.bayer.frm_fmt = frm_fmt; - else - ccdc_cfg.ycbcr.frm_fmt = frm_fmt; - return 0; -} - -static enum ccdc_frmfmt ccdc_get_frame_format(void) -{ - if (ccdc_cfg.if_type == VPFE_RAW_BAYER) - return ccdc_cfg.bayer.frm_fmt; - else - return ccdc_cfg.ycbcr.frm_fmt; -} - -static int ccdc_getfid(void) -{ - return (regr(CCDC_SYN_MODE) >> 15) & 1; -} - -/* misc operations */ -static inline void ccdc_setfbaddr(unsigned long addr) -{ - regw(addr & 0xffffffe0, CCDC_SDR_ADDR); -} - -static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params) -{ - ccdc_cfg.if_type = params->if_type; - - switch (params->if_type) { - case VPFE_BT656: - case VPFE_YCBCR_SYNC_16: - case VPFE_YCBCR_SYNC_8: - case VPFE_BT656_10BIT: - ccdc_cfg.ycbcr.vd_pol = params->vdpol; - ccdc_cfg.ycbcr.hd_pol = params->hdpol; - break; - default: - /* TODO add support for raw bayer here */ - return -EINVAL; - } - return 0; -} - -static void ccdc_save_context(void) -{ - ccdc_ctx[CCDC_PCR >> 2] = regr(CCDC_PCR); - ccdc_ctx[CCDC_SYN_MODE >> 2] = regr(CCDC_SYN_MODE); - ccdc_ctx[CCDC_HD_VD_WID >> 2] = regr(CCDC_HD_VD_WID); - ccdc_ctx[CCDC_PIX_LINES >> 2] = regr(CCDC_PIX_LINES); - ccdc_ctx[CCDC_HORZ_INFO >> 2] = regr(CCDC_HORZ_INFO); - ccdc_ctx[CCDC_VERT_START >> 2] = regr(CCDC_VERT_START); - ccdc_ctx[CCDC_VERT_LINES >> 2] = regr(CCDC_VERT_LINES); - ccdc_ctx[CCDC_CULLING >> 2] = regr(CCDC_CULLING); - ccdc_ctx[CCDC_HSIZE_OFF >> 2] = regr(CCDC_HSIZE_OFF); - ccdc_ctx[CCDC_SDOFST >> 2] = regr(CCDC_SDOFST); - ccdc_ctx[CCDC_SDR_ADDR >> 2] = regr(CCDC_SDR_ADDR); - ccdc_ctx[CCDC_CLAMP >> 2] = regr(CCDC_CLAMP); - ccdc_ctx[CCDC_DCSUB >> 2] = regr(CCDC_DCSUB); - ccdc_ctx[CCDC_COLPTN >> 2] = regr(CCDC_COLPTN); - ccdc_ctx[CCDC_BLKCMP >> 2] = regr(CCDC_BLKCMP); - ccdc_ctx[CCDC_FPC >> 2] = regr(CCDC_FPC); - ccdc_ctx[CCDC_FPC_ADDR >> 2] = regr(CCDC_FPC_ADDR); - ccdc_ctx[CCDC_VDINT >> 2] = regr(CCDC_VDINT); - ccdc_ctx[CCDC_ALAW >> 2] = regr(CCDC_ALAW); - ccdc_ctx[CCDC_REC656IF >> 2] = regr(CCDC_REC656IF); - ccdc_ctx[CCDC_CCDCFG >> 2] = regr(CCDC_CCDCFG); - ccdc_ctx[CCDC_FMTCFG >> 2] = regr(CCDC_FMTCFG); - ccdc_ctx[CCDC_FMT_HORZ >> 2] = regr(CCDC_FMT_HORZ); - ccdc_ctx[CCDC_FMT_VERT >> 2] = regr(CCDC_FMT_VERT); - ccdc_ctx[CCDC_FMT_ADDR0 >> 2] = regr(CCDC_FMT_ADDR0); - ccdc_ctx[CCDC_FMT_ADDR1 >> 2] = regr(CCDC_FMT_ADDR1); - ccdc_ctx[CCDC_FMT_ADDR2 >> 2] = regr(CCDC_FMT_ADDR2); - ccdc_ctx[CCDC_FMT_ADDR3 >> 2] = regr(CCDC_FMT_ADDR3); - ccdc_ctx[CCDC_FMT_ADDR4 >> 2] = regr(CCDC_FMT_ADDR4); - ccdc_ctx[CCDC_FMT_ADDR5 >> 2] = regr(CCDC_FMT_ADDR5); - ccdc_ctx[CCDC_FMT_ADDR6 >> 2] = regr(CCDC_FMT_ADDR6); - ccdc_ctx[CCDC_FMT_ADDR7 >> 2] = regr(CCDC_FMT_ADDR7); - ccdc_ctx[CCDC_PRGEVEN_0 >> 2] = regr(CCDC_PRGEVEN_0); - ccdc_ctx[CCDC_PRGEVEN_1 >> 2] = regr(CCDC_PRGEVEN_1); - ccdc_ctx[CCDC_PRGODD_0 >> 2] = regr(CCDC_PRGODD_0); - ccdc_ctx[CCDC_PRGODD_1 >> 2] = regr(CCDC_PRGODD_1); - ccdc_ctx[CCDC_VP_OUT >> 2] = regr(CCDC_VP_OUT); -} - -static void ccdc_restore_context(void) -{ - regw(ccdc_ctx[CCDC_SYN_MODE >> 2], CCDC_SYN_MODE); - regw(ccdc_ctx[CCDC_HD_VD_WID >> 2], CCDC_HD_VD_WID); - regw(ccdc_ctx[CCDC_PIX_LINES >> 2], CCDC_PIX_LINES); - regw(ccdc_ctx[CCDC_HORZ_INFO >> 2], CCDC_HORZ_INFO); - regw(ccdc_ctx[CCDC_VERT_START >> 2], CCDC_VERT_START); - regw(ccdc_ctx[CCDC_VERT_LINES >> 2], CCDC_VERT_LINES); - regw(ccdc_ctx[CCDC_CULLING >> 2], CCDC_CULLING); - regw(ccdc_ctx[CCDC_HSIZE_OFF >> 2], CCDC_HSIZE_OFF); - regw(ccdc_ctx[CCDC_SDOFST >> 2], CCDC_SDOFST); - regw(ccdc_ctx[CCDC_SDR_ADDR >> 2], CCDC_SDR_ADDR); - regw(ccdc_ctx[CCDC_CLAMP >> 2], CCDC_CLAMP); - regw(ccdc_ctx[CCDC_DCSUB >> 2], CCDC_DCSUB); - regw(ccdc_ctx[CCDC_COLPTN >> 2], CCDC_COLPTN); - regw(ccdc_ctx[CCDC_BLKCMP >> 2], CCDC_BLKCMP); - regw(ccdc_ctx[CCDC_FPC >> 2], CCDC_FPC); - regw(ccdc_ctx[CCDC_FPC_ADDR >> 2], CCDC_FPC_ADDR); - regw(ccdc_ctx[CCDC_VDINT >> 2], CCDC_VDINT); - regw(ccdc_ctx[CCDC_ALAW >> 2], CCDC_ALAW); - regw(ccdc_ctx[CCDC_REC656IF >> 2], CCDC_REC656IF); - regw(ccdc_ctx[CCDC_CCDCFG >> 2], CCDC_CCDCFG); - regw(ccdc_ctx[CCDC_FMTCFG >> 2], CCDC_FMTCFG); - regw(ccdc_ctx[CCDC_FMT_HORZ >> 2], CCDC_FMT_HORZ); - regw(ccdc_ctx[CCDC_FMT_VERT >> 2], CCDC_FMT_VERT); - regw(ccdc_ctx[CCDC_FMT_ADDR0 >> 2], CCDC_FMT_ADDR0); - regw(ccdc_ctx[CCDC_FMT_ADDR1 >> 2], CCDC_FMT_ADDR1); - regw(ccdc_ctx[CCDC_FMT_ADDR2 >> 2], CCDC_FMT_ADDR2); - regw(ccdc_ctx[CCDC_FMT_ADDR3 >> 2], CCDC_FMT_ADDR3); - regw(ccdc_ctx[CCDC_FMT_ADDR4 >> 2], CCDC_FMT_ADDR4); - regw(ccdc_ctx[CCDC_FMT_ADDR5 >> 2], CCDC_FMT_ADDR5); - regw(ccdc_ctx[CCDC_FMT_ADDR6 >> 2], CCDC_FMT_ADDR6); - regw(ccdc_ctx[CCDC_FMT_ADDR7 >> 2], CCDC_FMT_ADDR7); - regw(ccdc_ctx[CCDC_PRGEVEN_0 >> 2], CCDC_PRGEVEN_0); - regw(ccdc_ctx[CCDC_PRGEVEN_1 >> 2], CCDC_PRGEVEN_1); - regw(ccdc_ctx[CCDC_PRGODD_0 >> 2], CCDC_PRGODD_0); - regw(ccdc_ctx[CCDC_PRGODD_1 >> 2], CCDC_PRGODD_1); - regw(ccdc_ctx[CCDC_VP_OUT >> 2], CCDC_VP_OUT); - regw(ccdc_ctx[CCDC_PCR >> 2], CCDC_PCR); -} -static const struct ccdc_hw_device ccdc_hw_dev = { - .name = "DM6446 CCDC", - .owner = THIS_MODULE, - .hw_ops = { - .open = ccdc_open, - .close = ccdc_close, - .reset = ccdc_sbl_reset, - .enable = ccdc_enable, - .set_hw_if_params = ccdc_set_hw_if_params, - .configure = ccdc_configure, - .set_buftype = ccdc_set_buftype, - .get_buftype = ccdc_get_buftype, - .enum_pix = ccdc_enum_pix, - .set_pixel_format = ccdc_set_pixel_format, - .get_pixel_format = ccdc_get_pixel_format, - .set_frame_format = ccdc_set_frame_format, - .get_frame_format = ccdc_get_frame_format, - .set_image_window = ccdc_set_image_window, - .get_image_window = ccdc_get_image_window, - .get_line_length = ccdc_get_line_length, - .setfbaddr = ccdc_setfbaddr, - .getfid = ccdc_getfid, - }, -}; - -static int dm644x_ccdc_probe(struct platform_device *pdev) -{ - struct resource *res; - int status = 0; - - /* - * first try to register with vpfe. If not correct platform, then we - * don't have to iomap - */ - status = vpfe_register_ccdc_device(&ccdc_hw_dev); - if (status < 0) - return status; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - status = -ENODEV; - goto fail_nores; - } - - res = request_mem_region(res->start, resource_size(res), res->name); - if (!res) { - status = -EBUSY; - goto fail_nores; - } - - ccdc_cfg.base_addr = ioremap(res->start, resource_size(res)); - if (!ccdc_cfg.base_addr) { - status = -ENOMEM; - goto fail_nomem; - } - - ccdc_cfg.dev = &pdev->dev; - printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name); - return 0; -fail_nomem: - release_mem_region(res->start, resource_size(res)); -fail_nores: - vpfe_unregister_ccdc_device(&ccdc_hw_dev); - return status; -} - -static int dm644x_ccdc_remove(struct platform_device *pdev) -{ - struct resource *res; - - iounmap(ccdc_cfg.base_addr); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, resource_size(res)); - vpfe_unregister_ccdc_device(&ccdc_hw_dev); - return 0; -} - -static int dm644x_ccdc_suspend(struct device *dev) -{ - /* Save CCDC context */ - ccdc_save_context(); - /* Disable CCDC */ - ccdc_enable(0); - - return 0; -} - -static int dm644x_ccdc_resume(struct device *dev) -{ - /* Restore CCDC context */ - ccdc_restore_context(); - - return 0; -} - -static const struct dev_pm_ops dm644x_ccdc_pm_ops = { - .suspend = dm644x_ccdc_suspend, - .resume = dm644x_ccdc_resume, -}; - -static struct platform_driver dm644x_ccdc_driver = { - .driver = { - .name = "dm644x_ccdc", - .pm = &dm644x_ccdc_pm_ops, - }, - .remove = dm644x_ccdc_remove, - .probe = dm644x_ccdc_probe, -}; - -module_platform_driver(dm644x_ccdc_driver); diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.h b/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.h deleted file mode 100644 index c20dba3d76d6..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc.h +++ /dev/null @@ -1,171 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2006-2009 Texas Instruments Inc - */ -#ifndef _DM644X_CCDC_H -#define _DM644X_CCDC_H -#include <media/davinci/ccdc_types.h> -#include <media/davinci/vpfe_types.h> - -/* enum for No of pixel per line to be avg. in Black Clamping*/ -enum ccdc_sample_length { - CCDC_SAMPLE_1PIXELS, - CCDC_SAMPLE_2PIXELS, - CCDC_SAMPLE_4PIXELS, - CCDC_SAMPLE_8PIXELS, - CCDC_SAMPLE_16PIXELS -}; - -/* enum for No of lines in Black Clamping */ -enum ccdc_sample_line { - CCDC_SAMPLE_1LINES, - CCDC_SAMPLE_2LINES, - CCDC_SAMPLE_4LINES, - CCDC_SAMPLE_8LINES, - CCDC_SAMPLE_16LINES -}; - -/* enum for Alaw gamma width */ -enum ccdc_gamma_width { - CCDC_GAMMA_BITS_15_6, /* use bits 15-6 for gamma */ - CCDC_GAMMA_BITS_14_5, - CCDC_GAMMA_BITS_13_4, - CCDC_GAMMA_BITS_12_3, - CCDC_GAMMA_BITS_11_2, - CCDC_GAMMA_BITS_10_1, - CCDC_GAMMA_BITS_09_0 /* use bits 9-0 for gamma */ -}; - -/* returns the highest bit used for the gamma */ -static inline u8 ccdc_gamma_width_max_bit(enum ccdc_gamma_width width) -{ - return 15 - width; -} - -enum ccdc_data_size { - CCDC_DATA_16BITS, - CCDC_DATA_15BITS, - CCDC_DATA_14BITS, - CCDC_DATA_13BITS, - CCDC_DATA_12BITS, - CCDC_DATA_11BITS, - CCDC_DATA_10BITS, - CCDC_DATA_8BITS -}; - -/* returns the highest bit used for this data size */ -static inline u8 ccdc_data_size_max_bit(enum ccdc_data_size sz) -{ - return sz == CCDC_DATA_8BITS ? 7 : 15 - sz; -} - -/* structure for ALaw */ -struct ccdc_a_law { - /* Enable/disable A-Law */ - unsigned char enable; - /* Gamma Width Input */ - enum ccdc_gamma_width gamma_wd; -}; - -/* structure for Black Clamping */ -struct ccdc_black_clamp { - unsigned char enable; - /* only if bClampEnable is TRUE */ - enum ccdc_sample_length sample_pixel; - /* only if bClampEnable is TRUE */ - enum ccdc_sample_line sample_ln; - /* only if bClampEnable is TRUE */ - unsigned short start_pixel; - /* only if bClampEnable is TRUE */ - unsigned short sgain; - /* only if bClampEnable is FALSE */ - unsigned short dc_sub; -}; - -/* structure for Black Level Compensation */ -struct ccdc_black_compensation { - /* Constant value to subtract from Red component */ - char r; - /* Constant value to subtract from Gr component */ - char gr; - /* Constant value to subtract from Blue component */ - char b; - /* Constant value to subtract from Gb component */ - char gb; -}; - -/* Structure for CCDC configuration parameters for raw capture mode passed - * by application - */ -struct ccdc_config_params_raw { - /* data size value from 8 to 16 bits */ - enum ccdc_data_size data_sz; - /* Structure for Optional A-Law */ - struct ccdc_a_law alaw; - /* Structure for Optical Black Clamp */ - struct ccdc_black_clamp blk_clamp; - /* Structure for Black Compensation */ - struct ccdc_black_compensation blk_comp; -}; - - -#ifdef __KERNEL__ -#include <linux/io.h> -/* Define to enable/disable video port */ -#define FP_NUM_BYTES 4 -/* Define for extra pixel/line and extra lines/frame */ -#define NUM_EXTRAPIXELS 8 -#define NUM_EXTRALINES 8 - -/* settings for commonly used video formats */ -#define CCDC_WIN_PAL {0, 0, 720, 576} -/* ntsc square pixel */ -#define CCDC_WIN_VGA {0, 0, (640 + NUM_EXTRAPIXELS), (480 + NUM_EXTRALINES)} - -/* Structure for CCDC configuration parameters for raw capture mode */ -struct ccdc_params_raw { - /* pixel format */ - enum ccdc_pixfmt pix_fmt; - /* progressive or interlaced frame */ - enum ccdc_frmfmt frm_fmt; - /* video window */ - struct v4l2_rect win; - /* field id polarity */ - enum vpfe_pin_pol fid_pol; - /* vertical sync polarity */ - enum vpfe_pin_pol vd_pol; - /* horizontal sync polarity */ - enum vpfe_pin_pol hd_pol; - /* interleaved or separated fields */ - enum ccdc_buftype buf_type; - /* - * enable to store the image in inverse - * order in memory(bottom to top) - */ - unsigned char image_invert_enable; - /* configurable parameters */ - struct ccdc_config_params_raw config_params; -}; - -struct ccdc_params_ycbcr { - /* pixel format */ - enum ccdc_pixfmt pix_fmt; - /* progressive or interlaced frame */ - enum ccdc_frmfmt frm_fmt; - /* video window */ - struct v4l2_rect win; - /* field id polarity */ - enum vpfe_pin_pol fid_pol; - /* vertical sync polarity */ - enum vpfe_pin_pol vd_pol; - /* horizontal sync polarity */ - enum vpfe_pin_pol hd_pol; - /* enable BT.656 embedded sync mode */ - int bt656_enable; - /* cb:y:cr:y or y:cb:y:cr in memory */ - enum ccdc_pixorder pix_order; - /* interleaved or separated fields */ - enum ccdc_buftype buf_type; -}; -#endif -#endif /* _DM644X_CCDC_H */ diff --git a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc_regs.h b/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc_regs.h deleted file mode 100644 index c4894f6a254e..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/dm644x_ccdc_regs.h +++ /dev/null @@ -1,140 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2006-2009 Texas Instruments Inc - */ -#ifndef _DM644X_CCDC_REGS_H -#define _DM644X_CCDC_REGS_H - -/**************************************************************************\ -* Register OFFSET Definitions -\**************************************************************************/ -#define CCDC_PID 0x0 -#define CCDC_PCR 0x4 -#define CCDC_SYN_MODE 0x8 -#define CCDC_HD_VD_WID 0xc -#define CCDC_PIX_LINES 0x10 -#define CCDC_HORZ_INFO 0x14 -#define CCDC_VERT_START 0x18 -#define CCDC_VERT_LINES 0x1c -#define CCDC_CULLING 0x20 -#define CCDC_HSIZE_OFF 0x24 -#define CCDC_SDOFST 0x28 -#define CCDC_SDR_ADDR 0x2c -#define CCDC_CLAMP 0x30 -#define CCDC_DCSUB 0x34 -#define CCDC_COLPTN 0x38 -#define CCDC_BLKCMP 0x3c -#define CCDC_FPC 0x40 -#define CCDC_FPC_ADDR 0x44 -#define CCDC_VDINT 0x48 -#define CCDC_ALAW 0x4c -#define CCDC_REC656IF 0x50 -#define CCDC_CCDCFG 0x54 -#define CCDC_FMTCFG 0x58 -#define CCDC_FMT_HORZ 0x5c -#define CCDC_FMT_VERT 0x60 -#define CCDC_FMT_ADDR0 0x64 -#define CCDC_FMT_ADDR1 0x68 -#define CCDC_FMT_ADDR2 0x6c -#define CCDC_FMT_ADDR3 0x70 -#define CCDC_FMT_ADDR4 0x74 -#define CCDC_FMT_ADDR5 0x78 -#define CCDC_FMT_ADDR6 0x7c -#define CCDC_FMT_ADDR7 0x80 -#define CCDC_PRGEVEN_0 0x84 -#define CCDC_PRGEVEN_1 0x88 -#define CCDC_PRGODD_0 0x8c -#define CCDC_PRGODD_1 0x90 -#define CCDC_VP_OUT 0x94 -#define CCDC_REG_END 0x98 - -/*************************************************************** -* Define for various register bit mask and shifts for CCDC -****************************************************************/ -#define CCDC_FID_POL_MASK 1 -#define CCDC_FID_POL_SHIFT 4 -#define CCDC_HD_POL_MASK 1 -#define CCDC_HD_POL_SHIFT 3 -#define CCDC_VD_POL_MASK 1 -#define CCDC_VD_POL_SHIFT 2 -#define CCDC_HSIZE_OFF_MASK 0xffffffe0 -#define CCDC_32BYTE_ALIGN_VAL 31 -#define CCDC_FRM_FMT_MASK 0x1 -#define CCDC_FRM_FMT_SHIFT 7 -#define CCDC_DATA_SZ_MASK 7 -#define CCDC_DATA_SZ_SHIFT 8 -#define CCDC_PIX_FMT_MASK 3 -#define CCDC_PIX_FMT_SHIFT 12 -#define CCDC_VP2SDR_DISABLE 0xFFFBFFFF -#define CCDC_WEN_ENABLE BIT(17) -#define CCDC_SDR2RSZ_DISABLE 0xFFF7FFFF -#define CCDC_VDHDEN_ENABLE BIT(16) -#define CCDC_LPF_ENABLE BIT(14) -#define CCDC_ALAW_ENABLE BIT(3) -#define CCDC_ALAW_GAMMA_WD_MASK 7 -#define CCDC_BLK_CLAMP_ENABLE BIT(31) -#define CCDC_BLK_SGAIN_MASK 0x1F -#define CCDC_BLK_ST_PXL_MASK 0x7FFF -#define CCDC_BLK_ST_PXL_SHIFT 10 -#define CCDC_BLK_SAMPLE_LN_MASK 7 -#define CCDC_BLK_SAMPLE_LN_SHIFT 28 -#define CCDC_BLK_SAMPLE_LINE_MASK 7 -#define CCDC_BLK_SAMPLE_LINE_SHIFT 25 -#define CCDC_BLK_DC_SUB_MASK 0x03FFF -#define CCDC_BLK_COMP_MASK 0xFF -#define CCDC_BLK_COMP_GB_COMP_SHIFT 8 -#define CCDC_BLK_COMP_GR_COMP_SHIFT 16 -#define CCDC_BLK_COMP_R_COMP_SHIFT 24 -#define CCDC_LATCH_ON_VSYNC_DISABLE BIT(15) -#define CCDC_FPC_ENABLE BIT(15) -#define CCDC_FPC_DISABLE 0 -#define CCDC_FPC_FPC_NUM_MASK 0x7FFF -#define CCDC_DATA_PACK_ENABLE BIT(11) -#define CCDC_FMTCFG_VPIN_MASK 7 -#define CCDC_FMTCFG_VPIN_SHIFT 12 -#define CCDC_FMT_HORZ_FMTLNH_MASK 0x1FFF -#define CCDC_FMT_HORZ_FMTSPH_MASK 0x1FFF -#define CCDC_FMT_HORZ_FMTSPH_SHIFT 16 -#define CCDC_FMT_VERT_FMTLNV_MASK 0x1FFF -#define CCDC_FMT_VERT_FMTSLV_MASK 0x1FFF -#define CCDC_FMT_VERT_FMTSLV_SHIFT 16 -#define CCDC_VP_OUT_VERT_NUM_MASK 0x3FFF -#define CCDC_VP_OUT_VERT_NUM_SHIFT 17 -#define CCDC_VP_OUT_HORZ_NUM_MASK 0x1FFF -#define CCDC_VP_OUT_HORZ_NUM_SHIFT 4 -#define CCDC_VP_OUT_HORZ_ST_MASK 0xF -#define CCDC_HORZ_INFO_SPH_SHIFT 16 -#define CCDC_VERT_START_SLV0_SHIFT 16 -#define CCDC_VDINT_VDINT0_SHIFT 16 -#define CCDC_VDINT_VDINT1_MASK 0xFFFF -#define CCDC_PPC_RAW 1 -#define CCDC_DCSUB_DEFAULT_VAL 0 -#define CCDC_CLAMP_DEFAULT_VAL 0 -#define CCDC_ENABLE_VIDEO_PORT 0x8000 -#define CCDC_DISABLE_VIDEO_PORT 0 -#define CCDC_COLPTN_VAL 0xBB11BB11 -#define CCDC_TWO_BYTES_PER_PIXEL 2 -#define CCDC_INTERLACED_IMAGE_INVERT 0x4B6D -#define CCDC_INTERLACED_NO_IMAGE_INVERT 0x0249 -#define CCDC_PROGRESSIVE_IMAGE_INVERT 0x4000 -#define CCDC_PROGRESSIVE_NO_IMAGE_INVERT 0 -#define CCDC_INTERLACED_HEIGHT_SHIFT 1 -#define CCDC_SYN_MODE_INPMOD_SHIFT 12 -#define CCDC_SYN_MODE_INPMOD_MASK 3 -#define CCDC_SYN_MODE_8BITS (7 << 8) -#define CCDC_SYN_MODE_10BITS (6 << 8) -#define CCDC_SYN_MODE_11BITS (5 << 8) -#define CCDC_SYN_MODE_12BITS (4 << 8) -#define CCDC_SYN_MODE_13BITS (3 << 8) -#define CCDC_SYN_MODE_14BITS (2 << 8) -#define CCDC_SYN_MODE_15BITS (1 << 8) -#define CCDC_SYN_MODE_16BITS (0 << 8) -#define CCDC_SYN_FLDMODE_MASK 1 -#define CCDC_SYN_FLDMODE_SHIFT 7 -#define CCDC_REC656IF_BT656_EN 3 -#define CCDC_SYN_MODE_VD_POL_NEGATIVE BIT(2) -#define CCDC_CCDCFG_Y8POS_SHIFT 11 -#define CCDC_CCDCFG_BW656_10BIT BIT(5) -#define CCDC_SDOFST_FIELD_INTERLEAVED 0x249 -#define CCDC_NO_CULLING 0xffff00ff -#endif diff --git a/drivers/staging/media/deprecated/vpfe_capture/isif.c b/drivers/staging/media/deprecated/vpfe_capture/isif.c deleted file mode 100644 index 4059891c2824..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/isif.c +++ /dev/null @@ -1,1127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * Image Sensor Interface (ISIF) driver - * - * This driver is for configuring the ISIF IP available on DM365 or any other - * TI SoCs. This is used for capturing yuv or bayer video or image data - * from a decoder or sensor. This IP is similar to the CCDC IP on DM355 - * and DM6446, but with enhanced or additional ip blocks. The driver - * configures the ISIF upon commands from the vpfe bridge driver through - * ccdc_hw_device interface. - * - * TODO: 1) Raw bayer parameter settings and bayer capture - * 2) Add support for control ioctl - */ -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/uaccess.h> -#include <linux/io.h> -#include <linux/videodev2.h> -#include <linux/err.h> -#include <linux/module.h> - -#include "isif.h" -#include <media/davinci/vpss.h> - -#include "isif_regs.h" -#include "ccdc_hw_device.h" - -/* Defaults for module configuration parameters */ -static const struct isif_config_params_raw isif_config_defaults = { - .linearize = { - .en = 0, - .corr_shft = ISIF_NO_SHIFT, - .scale_fact = {1, 0}, - }, - .df_csc = { - .df_or_csc = 0, - .csc = { - .en = 0, - }, - }, - .dfc = { - .en = 0, - }, - .bclamp = { - .en = 0, - }, - .gain_offset = { - .gain = { - .r_ye = {1, 0}, - .gr_cy = {1, 0}, - .gb_g = {1, 0}, - .b_mg = {1, 0}, - }, - }, - .culling = { - .hcpat_odd = 0xff, - .hcpat_even = 0xff, - .vcpat = 0xff, - }, - .compress = { - .alg = ISIF_ALAW, - }, -}; - -/* ISIF operation configuration */ -static struct isif_oper_config { - struct device *dev; - enum vpfe_hw_if_type if_type; - struct isif_ycbcr_config ycbcr; - struct isif_params_raw bayer; - enum isif_data_pack data_pack; - /* ISIF base address */ - void __iomem *base_addr; - /* ISIF Linear Table 0 */ - void __iomem *linear_tbl0_addr; - /* ISIF Linear Table 1 */ - void __iomem *linear_tbl1_addr; -} isif_cfg = { - .ycbcr = { - .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT, - .frm_fmt = CCDC_FRMFMT_INTERLACED, - .win = ISIF_WIN_NTSC, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .pix_order = CCDC_PIXORDER_CBYCRY, - .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED, - }, - .bayer = { - .pix_fmt = CCDC_PIXFMT_RAW, - .frm_fmt = CCDC_FRMFMT_PROGRESSIVE, - .win = ISIF_WIN_VGA, - .fid_pol = VPFE_PINPOL_POSITIVE, - .vd_pol = VPFE_PINPOL_POSITIVE, - .hd_pol = VPFE_PINPOL_POSITIVE, - .gain = { - .r_ye = {1, 0}, - .gr_cy = {1, 0}, - .gb_g = {1, 0}, - .b_mg = {1, 0}, - }, - .cfa_pat = ISIF_CFA_PAT_MOSAIC, - .data_msb = ISIF_BIT_MSB_11, - .config_params = { - .data_shift = ISIF_NO_SHIFT, - .col_pat_field0 = { - .olop = ISIF_GREEN_BLUE, - .olep = ISIF_BLUE, - .elop = ISIF_RED, - .elep = ISIF_GREEN_RED, - }, - .col_pat_field1 = { - .olop = ISIF_GREEN_BLUE, - .olep = ISIF_BLUE, - .elop = ISIF_RED, - .elep = ISIF_GREEN_RED, - }, - .test_pat_gen = 0, - }, - }, - .data_pack = ISIF_DATA_PACK8, -}; - -/* Raw Bayer formats */ -static const u32 isif_raw_bayer_pix_formats[] = { - V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16}; - -/* Raw YUV formats */ -static const u32 isif_raw_yuv_pix_formats[] = { - V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV}; - -/* register access routines */ -static inline u32 regr(u32 offset) -{ - return __raw_readl(isif_cfg.base_addr + offset); -} - -static inline void regw(u32 val, u32 offset) -{ - __raw_writel(val, isif_cfg.base_addr + offset); -} - -/* reg_modify() - read, modify and write register */ -static inline u32 reg_modify(u32 mask, u32 val, u32 offset) -{ - u32 new_val = (regr(offset) & ~mask) | (val & mask); - - regw(new_val, offset); - return new_val; -} - -static inline void regw_lin_tbl(u32 val, u32 offset, int i) -{ - if (!i) - __raw_writel(val, isif_cfg.linear_tbl0_addr + offset); - else - __raw_writel(val, isif_cfg.linear_tbl1_addr + offset); -} - -static void isif_disable_all_modules(void) -{ - /* disable BC */ - regw(0, CLAMPCFG); - /* disable vdfc */ - regw(0, DFCCTL); - /* disable CSC */ - regw(0, CSCCTL); - /* disable linearization */ - regw(0, LINCFG0); - /* disable other modules here as they are supported */ -} - -static void isif_enable(int en) -{ - if (!en) { - /* Before disable isif, disable all ISIF modules */ - isif_disable_all_modules(); - /* - * wait for next VD. Assume lowest scan rate is 12 Hz. So - * 100 msec delay is good enough - */ - msleep(100); - } - reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN); -} - -static void isif_enable_output_to_sdram(int en) -{ - reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN); -} - -static void isif_config_culling(struct isif_cul *cul) -{ - u32 val; - - /* Horizontal pattern */ - val = (cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT) | cul->hcpat_odd; - regw(val, CULH); - - /* vertical pattern */ - regw(cul->vcpat, CULV); - - /* LPF */ - reg_modify(ISIF_LPF_MASK << ISIF_LPF_SHIFT, - cul->en_lpf << ISIF_LPF_SHIFT, MODESET); -} - -static void isif_config_gain_offset(void) -{ - struct isif_gain_offsets_adj *gain_off_p = - &isif_cfg.bayer.config_params.gain_offset; - u32 val; - - val = (!!gain_off_p->gain_sdram_en << GAIN_SDRAM_EN_SHIFT) | - (!!gain_off_p->gain_ipipe_en << GAIN_IPIPE_EN_SHIFT) | - (!!gain_off_p->gain_h3a_en << GAIN_H3A_EN_SHIFT) | - (!!gain_off_p->offset_sdram_en << OFST_SDRAM_EN_SHIFT) | - (!!gain_off_p->offset_ipipe_en << OFST_IPIPE_EN_SHIFT) | - (!!gain_off_p->offset_h3a_en << OFST_H3A_EN_SHIFT); - - reg_modify(GAIN_OFFSET_EN_MASK, val, CGAMMAWD); - - val = (gain_off_p->gain.r_ye.integer << GAIN_INTEGER_SHIFT) | - gain_off_p->gain.r_ye.decimal; - regw(val, CRGAIN); - - val = (gain_off_p->gain.gr_cy.integer << GAIN_INTEGER_SHIFT) | - gain_off_p->gain.gr_cy.decimal; - regw(val, CGRGAIN); - - val = (gain_off_p->gain.gb_g.integer << GAIN_INTEGER_SHIFT) | - gain_off_p->gain.gb_g.decimal; - regw(val, CGBGAIN); - - val = (gain_off_p->gain.b_mg.integer << GAIN_INTEGER_SHIFT) | - gain_off_p->gain.b_mg.decimal; - regw(val, CBGAIN); - - regw(gain_off_p->offset, COFSTA); -} - -static void isif_restore_defaults(void) -{ - enum vpss_ccdc_source_sel source = VPSS_CCDCIN; - - dev_dbg(isif_cfg.dev, "\nstarting isif_restore_defaults..."); - isif_cfg.bayer.config_params = isif_config_defaults; - /* Enable clock to ISIF, IPIPEIF and BL */ - vpss_enable_clock(VPSS_CCDC_CLOCK, 1); - vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1); - vpss_enable_clock(VPSS_BL_CLOCK, 1); - /* Set default offset and gain */ - isif_config_gain_offset(); - vpss_select_ccdc_source(source); - dev_dbg(isif_cfg.dev, "\nEnd of isif_restore_defaults..."); -} - -static int isif_open(struct device *device) -{ - isif_restore_defaults(); - return 0; -} - -/* This function will configure the window size to be capture in ISIF reg */ -static void isif_setwin(struct v4l2_rect *image_win, - enum ccdc_frmfmt frm_fmt, int ppc) -{ - int horz_start, horz_nr_pixels; - int vert_start, vert_nr_lines; - int mid_img = 0; - - dev_dbg(isif_cfg.dev, "\nStarting isif_setwin..."); - /* - * ppc - per pixel count. indicates how many pixels per cell - * output to SDRAM. example, for ycbcr, it is one y and one c, so 2. - * raw capture this is 1 - */ - horz_start = image_win->left << (ppc - 1); - horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; - - /* Writing the horizontal info into the registers */ - regw(horz_start & START_PX_HOR_MASK, SPH); - regw(horz_nr_pixels & NUM_PX_HOR_MASK, LNH); - vert_start = image_win->top; - - if (frm_fmt == CCDC_FRMFMT_INTERLACED) { - vert_nr_lines = (image_win->height >> 1) - 1; - vert_start >>= 1; - /* To account for VD since line 0 doesn't have any data */ - vert_start += 1; - } else { - /* To account for VD since line 0 doesn't have any data */ - vert_start += 1; - vert_nr_lines = image_win->height - 1; - /* configure VDINT0 and VDINT1 */ - mid_img = vert_start + (image_win->height / 2); - regw(mid_img, VDINT1); - } - - regw(0, VDINT0); - regw(vert_start & START_VER_ONE_MASK, SLV0); - regw(vert_start & START_VER_TWO_MASK, SLV1); - regw(vert_nr_lines & NUM_LINES_VER, LNV); -} - -static void isif_config_bclamp(struct isif_black_clamp *bc) -{ - u32 val; - - /* - * DC Offset is always added to image data irrespective of bc enable - * status - */ - regw(bc->dc_offset, CLDCOFST); - - if (bc->en) { - val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT; - - /* Enable BC and horizontal clamp calculation parameters */ - val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT); - - regw(val, CLAMPCFG); - - if (bc->horz.mode != ISIF_HORZ_BC_DISABLE) { - /* - * Window count for calculation - * Base window selection - * pixel limit - * Horizontal size of window - * vertical size of the window - * Horizontal start position of the window - * Vertical start position of the window - */ - val = bc->horz.win_count_calc | - ((!!bc->horz.base_win_sel_calc) << - ISIF_HORZ_BC_WIN_SEL_SHIFT) | - ((!!bc->horz.clamp_pix_limit) << - ISIF_HORZ_BC_PIX_LIMIT_SHIFT) | - (bc->horz.win_h_sz_calc << - ISIF_HORZ_BC_WIN_H_SIZE_SHIFT) | - (bc->horz.win_v_sz_calc << - ISIF_HORZ_BC_WIN_V_SIZE_SHIFT); - regw(val, CLHWIN0); - - regw(bc->horz.win_start_h_calc, CLHWIN1); - regw(bc->horz.win_start_v_calc, CLHWIN2); - } - - /* vertical clamp calculation parameters */ - - /* Reset clamp value sel for previous line */ - val |= - (bc->vert.reset_val_sel << ISIF_VERT_BC_RST_VAL_SEL_SHIFT) | - (bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT); - regw(val, CLVWIN0); - - /* Optical Black horizontal start position */ - regw(bc->vert.ob_start_h, CLVWIN1); - /* Optical Black vertical start position */ - regw(bc->vert.ob_start_v, CLVWIN2); - /* Optical Black vertical size for calculation */ - regw(bc->vert.ob_v_sz_calc, CLVWIN3); - /* Vertical start position for BC subtraction */ - regw(bc->vert_start_sub, CLSV); - } -} - -static void isif_config_linearization(struct isif_linearize *linearize) -{ - u32 val, i; - - if (!linearize->en) { - regw(0, LINCFG0); - return; - } - - /* shift value for correction & enable linearization (set lsb) */ - val = (linearize->corr_shft << ISIF_LIN_CORRSFT_SHIFT) | 1; - regw(val, LINCFG0); - - /* Scale factor */ - val = ((!!linearize->scale_fact.integer) << - ISIF_LIN_SCALE_FACT_INTEG_SHIFT) | - linearize->scale_fact.decimal; - regw(val, LINCFG1); - - for (i = 0; i < ISIF_LINEAR_TAB_SIZE; i++) { - if (i % 2) - regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 1); - else - regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 0); - } -} - -static int isif_config_dfc(struct isif_dfc *vdfc) -{ - /* initialize retries to loop for max ~ 250 usec */ - u32 val, count, retries = loops_per_jiffy / (4000/HZ); - int i; - - if (!vdfc->en) - return 0; - - /* Correction mode */ - val = (vdfc->corr_mode << ISIF_VDFC_CORR_MOD_SHIFT); - - /* Correct whole line or partial */ - if (vdfc->corr_whole_line) - val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT; - - /* level shift value */ - val |= vdfc->def_level_shift << ISIF_VDFC_LEVEL_SHFT_SHIFT; - - regw(val, DFCCTL); - - /* Defect saturation level */ - regw(vdfc->def_sat_level, VDFSATLV); - - regw(vdfc->table[0].pos_vert, DFCMEM0); - regw(vdfc->table[0].pos_horz, DFCMEM1); - if (vdfc->corr_mode == ISIF_VDFC_NORMAL || - vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) { - regw(vdfc->table[0].level_at_pos, DFCMEM2); - regw(vdfc->table[0].level_up_pixels, DFCMEM3); - regw(vdfc->table[0].level_low_pixels, DFCMEM4); - } - - /* set DFCMARST and set DFCMWR */ - val = regr(DFCMEMCTL) | (1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT) | 1; - regw(val, DFCMEMCTL); - - count = retries; - while (count && (regr(DFCMEMCTL) & 0x1)) - count--; - - if (!count) { - dev_dbg(isif_cfg.dev, "defect table write timeout !!!\n"); - return -1; - } - - for (i = 1; i < vdfc->num_vdefects; i++) { - regw(vdfc->table[i].pos_vert, DFCMEM0); - regw(vdfc->table[i].pos_horz, DFCMEM1); - if (vdfc->corr_mode == ISIF_VDFC_NORMAL || - vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) { - regw(vdfc->table[i].level_at_pos, DFCMEM2); - regw(vdfc->table[i].level_up_pixels, DFCMEM3); - regw(vdfc->table[i].level_low_pixels, DFCMEM4); - } - val = regr(DFCMEMCTL); - /* clear DFCMARST and set DFCMWR */ - val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT); - val |= 1; - regw(val, DFCMEMCTL); - - count = retries; - while (count && (regr(DFCMEMCTL) & 0x1)) - count--; - - if (!count) { - dev_err(isif_cfg.dev, - "defect table write timeout !!!\n"); - return -1; - } - } - if (vdfc->num_vdefects < ISIF_VDFC_TABLE_SIZE) { - /* Extra cycle needed */ - regw(0, DFCMEM0); - regw(0x1FFF, DFCMEM1); - regw(1, DFCMEMCTL); - } - - /* enable VDFC */ - reg_modify((1 << ISIF_VDFC_EN_SHIFT), (1 << ISIF_VDFC_EN_SHIFT), - DFCCTL); - return 0; -} - -static void isif_config_csc(struct isif_df_csc *df_csc) -{ - u32 val1 = 0, val2 = 0, i; - - if (!df_csc->csc.en) { - regw(0, CSCCTL); - return; - } - for (i = 0; i < ISIF_CSC_NUM_COEFF; i++) { - if ((i % 2) == 0) { - /* CSCM - LSB */ - val1 = (df_csc->csc.coeff[i].integer << - ISIF_CSC_COEF_INTEG_SHIFT) | - df_csc->csc.coeff[i].decimal; - } else { - - /* CSCM - MSB */ - val2 = (df_csc->csc.coeff[i].integer << - ISIF_CSC_COEF_INTEG_SHIFT) | - df_csc->csc.coeff[i].decimal; - val2 <<= ISIF_CSCM_MSB_SHIFT; - val2 |= val1; - regw(val2, (CSCM0 + ((i - 1) << 1))); - } - } - - /* program the active area */ - regw(df_csc->start_pix, FMTSPH); - /* - * one extra pixel as required for CSC. Actually number of - * pixel - 1 should be configured in this register. So we - * need to subtract 1 before writing to FMTSPH, but we will - * not do this since csc requires one extra pixel - */ - regw(df_csc->num_pixels, FMTLNH); - regw(df_csc->start_line, FMTSLV); - /* - * one extra line as required for CSC. See reason documented for - * num_pixels - */ - regw(df_csc->num_lines, FMTLNV); - - /* Enable CSC */ - regw(1, CSCCTL); -} - -static int isif_config_raw(void) -{ - struct isif_params_raw *params = &isif_cfg.bayer; - struct isif_config_params_raw *module_params = - &isif_cfg.bayer.config_params; - struct vpss_pg_frame_size frame_size; - struct vpss_sync_pol sync; - u32 val; - - dev_dbg(isif_cfg.dev, "\nStarting isif_config_raw..\n"); - - /* - * Configure CCDCFG register:- - * Set CCD Not to swap input since input is RAW data - * Set FID detection function to Latch at V-Sync - * Set WENLOG - isif valid area - * Set TRGSEL - * Set EXTRG - * Packed to 8 or 16 bits - */ - - val = ISIF_YCINSWP_RAW | ISIF_CCDCFG_FIDMD_LATCH_VSYNC | - ISIF_CCDCFG_WENLOG_AND | ISIF_CCDCFG_TRGSEL_WEN | - ISIF_CCDCFG_EXTRG_DISABLE | isif_cfg.data_pack; - - dev_dbg(isif_cfg.dev, "Writing 0x%x to ...CCDCFG \n", val); - regw(val, CCDCFG); - - /* - * Configure the vertical sync polarity(MODESET.VDPOL) - * Configure the horizontal sync polarity (MODESET.HDPOL) - * Configure frame id polarity (MODESET.FLDPOL) - * Configure data polarity - * Configure External WEN Selection - * Configure frame format(progressive or interlace) - * Configure pixel format (Input mode) - * Configure the data shift - */ - - val = ISIF_VDHDOUT_INPUT | (params->vd_pol << ISIF_VD_POL_SHIFT) | - (params->hd_pol << ISIF_HD_POL_SHIFT) | - (params->fid_pol << ISIF_FID_POL_SHIFT) | - (ISIF_DATAPOL_NORMAL << ISIF_DATAPOL_SHIFT) | - (ISIF_EXWEN_DISABLE << ISIF_EXWEN_SHIFT) | - (params->frm_fmt << ISIF_FRM_FMT_SHIFT) | - (params->pix_fmt << ISIF_INPUT_SHIFT) | - (params->config_params.data_shift << ISIF_DATASFT_SHIFT); - - regw(val, MODESET); - dev_dbg(isif_cfg.dev, "Writing 0x%x to MODESET...\n", val); - - /* - * Configure GAMMAWD register - * CFA pattern setting - */ - val = params->cfa_pat << ISIF_GAMMAWD_CFA_SHIFT; - - /* Gamma msb */ - if (module_params->compress.alg == ISIF_ALAW) - val |= ISIF_ALAW_ENABLE; - - val |= (params->data_msb << ISIF_ALAW_GAMMA_WD_SHIFT); - regw(val, CGAMMAWD); - - /* Configure DPCM compression settings */ - if (module_params->compress.alg == ISIF_DPCM) { - val = BIT(ISIF_DPCM_EN_SHIFT) | - (module_params->compress.pred << - ISIF_DPCM_PREDICTOR_SHIFT); - } - - regw(val, MISC); - - /* Configure Gain & Offset */ - isif_config_gain_offset(); - - /* Configure Color pattern */ - val = (params->config_params.col_pat_field0.olop) | - (params->config_params.col_pat_field0.olep << 2) | - (params->config_params.col_pat_field0.elop << 4) | - (params->config_params.col_pat_field0.elep << 6) | - (params->config_params.col_pat_field1.olop << 8) | - (params->config_params.col_pat_field1.olep << 10) | - (params->config_params.col_pat_field1.elop << 12) | - (params->config_params.col_pat_field1.elep << 14); - regw(val, CCOLP); - dev_dbg(isif_cfg.dev, "Writing %x to CCOLP ...\n", val); - - /* Configure HSIZE register */ - val = (!!params->horz_flip_en) << ISIF_HSIZE_FLIP_SHIFT; - - /* calculate line offset in 32 bytes based on pack value */ - if (isif_cfg.data_pack == ISIF_PACK_8BIT) - val |= ((params->win.width + 31) >> 5); - else if (isif_cfg.data_pack == ISIF_PACK_12BIT) - val |= (((params->win.width + - (params->win.width >> 2)) + 31) >> 5); - else - val |= (((params->win.width * 2) + 31) >> 5); - regw(val, HSIZE); - - /* Configure SDOFST register */ - if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) { - if (params->image_invert_en) { - /* For interlace inverse mode */ - regw(0x4B6D, SDOFST); - dev_dbg(isif_cfg.dev, "Writing 0x4B6D to SDOFST...\n"); - } else { - /* For interlace non inverse mode */ - regw(0x0B6D, SDOFST); - dev_dbg(isif_cfg.dev, "Writing 0x0B6D to SDOFST...\n"); - } - } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { - if (params->image_invert_en) { - /* For progressive inverse mode */ - regw(0x4000, SDOFST); - dev_dbg(isif_cfg.dev, "Writing 0x4000 to SDOFST...\n"); - } else { - /* For progressive non inverse mode */ - regw(0x0000, SDOFST); - dev_dbg(isif_cfg.dev, "Writing 0x0000 to SDOFST...\n"); - } - } - - /* Configure video window */ - isif_setwin(¶ms->win, params->frm_fmt, 1); - - /* Configure Black Clamp */ - isif_config_bclamp(&module_params->bclamp); - - /* Configure Vertical Defection Pixel Correction */ - if (isif_config_dfc(&module_params->dfc) < 0) - return -EFAULT; - - if (!module_params->df_csc.df_or_csc) - /* Configure Color Space Conversion */ - isif_config_csc(&module_params->df_csc); - - isif_config_linearization(&module_params->linearize); - - /* Configure Culling */ - isif_config_culling(&module_params->culling); - - /* Configure horizontal and vertical offsets(DFC,LSC,Gain) */ - regw(module_params->horz_offset, DATAHOFST); - regw(module_params->vert_offset, DATAVOFST); - - /* Setup test pattern if enabled */ - if (params->config_params.test_pat_gen) { - /* Use the HD/VD pol settings from user */ - sync.ccdpg_hdpol = params->hd_pol; - sync.ccdpg_vdpol = params->vd_pol; - dm365_vpss_set_sync_pol(sync); - frame_size.hlpfr = isif_cfg.bayer.win.width; - frame_size.pplen = isif_cfg.bayer.win.height; - dm365_vpss_set_pg_frame_size(frame_size); - vpss_select_ccdc_source(VPSS_PGLPBK); - } - - dev_dbg(isif_cfg.dev, "\nEnd of isif_config_ycbcr...\n"); - return 0; -} - -static int isif_set_buftype(enum ccdc_buftype buf_type) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - isif_cfg.bayer.buf_type = buf_type; - else - isif_cfg.ycbcr.buf_type = buf_type; - - return 0; - -} -static enum ccdc_buftype isif_get_buftype(void) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - return isif_cfg.bayer.buf_type; - - return isif_cfg.ycbcr.buf_type; -} - -static int isif_enum_pix(u32 *pix, int i) -{ - int ret = -EINVAL; - - if (isif_cfg.if_type == VPFE_RAW_BAYER) { - if (i < ARRAY_SIZE(isif_raw_bayer_pix_formats)) { - *pix = isif_raw_bayer_pix_formats[i]; - ret = 0; - } - } else { - if (i < ARRAY_SIZE(isif_raw_yuv_pix_formats)) { - *pix = isif_raw_yuv_pix_formats[i]; - ret = 0; - } - } - - return ret; -} - -static int isif_set_pixel_format(unsigned int pixfmt) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) { - if (pixfmt == V4L2_PIX_FMT_SBGGR8) { - if ((isif_cfg.bayer.config_params.compress.alg != - ISIF_ALAW) && - (isif_cfg.bayer.config_params.compress.alg != - ISIF_DPCM)) { - dev_dbg(isif_cfg.dev, - "Either configure A-Law or DPCM\n"); - return -EINVAL; - } - isif_cfg.data_pack = ISIF_PACK_8BIT; - } else if (pixfmt == V4L2_PIX_FMT_SBGGR16) { - isif_cfg.bayer.config_params.compress.alg = - ISIF_NO_COMPRESSION; - isif_cfg.data_pack = ISIF_PACK_16BIT; - } else - return -EINVAL; - isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; - } else { - if (pixfmt == V4L2_PIX_FMT_YUYV) - isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; - else if (pixfmt == V4L2_PIX_FMT_UYVY) - isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; - else - return -EINVAL; - isif_cfg.data_pack = ISIF_PACK_8BIT; - } - return 0; -} - -static u32 isif_get_pixel_format(void) -{ - u32 pixfmt; - - if (isif_cfg.if_type == VPFE_RAW_BAYER) - if (isif_cfg.bayer.config_params.compress.alg == ISIF_ALAW || - isif_cfg.bayer.config_params.compress.alg == ISIF_DPCM) - pixfmt = V4L2_PIX_FMT_SBGGR8; - else - pixfmt = V4L2_PIX_FMT_SBGGR16; - else { - if (isif_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) - pixfmt = V4L2_PIX_FMT_YUYV; - else - pixfmt = V4L2_PIX_FMT_UYVY; - } - return pixfmt; -} - -static int isif_set_image_window(struct v4l2_rect *win) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) { - isif_cfg.bayer.win.top = win->top; - isif_cfg.bayer.win.left = win->left; - isif_cfg.bayer.win.width = win->width; - isif_cfg.bayer.win.height = win->height; - } else { - isif_cfg.ycbcr.win.top = win->top; - isif_cfg.ycbcr.win.left = win->left; - isif_cfg.ycbcr.win.width = win->width; - isif_cfg.ycbcr.win.height = win->height; - } - return 0; -} - -static void isif_get_image_window(struct v4l2_rect *win) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - *win = isif_cfg.bayer.win; - else - *win = isif_cfg.ycbcr.win; -} - -static unsigned int isif_get_line_length(void) -{ - unsigned int len; - - if (isif_cfg.if_type == VPFE_RAW_BAYER) { - if (isif_cfg.data_pack == ISIF_PACK_8BIT) - len = ((isif_cfg.bayer.win.width)); - else if (isif_cfg.data_pack == ISIF_PACK_12BIT) - len = (((isif_cfg.bayer.win.width * 2) + - (isif_cfg.bayer.win.width >> 2))); - else - len = (((isif_cfg.bayer.win.width * 2))); - } else - len = (((isif_cfg.ycbcr.win.width * 2))); - return ALIGN(len, 32); -} - -static int isif_set_frame_format(enum ccdc_frmfmt frm_fmt) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - isif_cfg.bayer.frm_fmt = frm_fmt; - else - isif_cfg.ycbcr.frm_fmt = frm_fmt; - return 0; -} -static enum ccdc_frmfmt isif_get_frame_format(void) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - return isif_cfg.bayer.frm_fmt; - return isif_cfg.ycbcr.frm_fmt; -} - -static int isif_getfid(void) -{ - return (regr(MODESET) >> 15) & 0x1; -} - -/* misc operations */ -static void isif_setfbaddr(unsigned long addr) -{ - regw((addr >> 21) & 0x07ff, CADU); - regw((addr >> 5) & 0x0ffff, CADL); -} - -static int isif_set_hw_if_params(struct vpfe_hw_if_param *params) -{ - isif_cfg.if_type = params->if_type; - - switch (params->if_type) { - case VPFE_BT656: - case VPFE_BT656_10BIT: - case VPFE_YCBCR_SYNC_8: - isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT; - isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; - break; - case VPFE_BT1120: - case VPFE_YCBCR_SYNC_16: - isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT; - isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; - break; - case VPFE_RAW_BAYER: - isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; - break; - default: - dev_dbg(isif_cfg.dev, "Invalid interface type\n"); - return -EINVAL; - } - - return 0; -} - -/* This function will configure ISIF for YCbCr parameters. */ -static int isif_config_ycbcr(void) -{ - struct isif_ycbcr_config *params = &isif_cfg.ycbcr; - u32 modeset = 0, ccdcfg = 0; - - dev_dbg(isif_cfg.dev, "\nStarting isif_config_ycbcr..."); - - /* configure pixel format or input mode */ - modeset = modeset | (params->pix_fmt << ISIF_INPUT_SHIFT) | - (params->frm_fmt << ISIF_FRM_FMT_SHIFT) | - (params->fid_pol << ISIF_FID_POL_SHIFT) | - (params->hd_pol << ISIF_HD_POL_SHIFT) | - (params->vd_pol << ISIF_VD_POL_SHIFT); - - /* pack the data to 8-bit ISIFCFG */ - switch (isif_cfg.if_type) { - case VPFE_BT656: - if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) { - dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n"); - return -EINVAL; - } - modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT); - regw(3, REC656IF); - ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR; - break; - case VPFE_BT656_10BIT: - if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) { - dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n"); - return -EINVAL; - } - /* setup BT.656, embedded sync */ - regw(3, REC656IF); - /* enable 10 bit mode in ccdcfg */ - ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR | - ISIF_BW656_ENABLE; - break; - case VPFE_BT1120: - if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) { - dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n"); - return -EINVAL; - } - regw(3, REC656IF); - break; - - case VPFE_YCBCR_SYNC_8: - ccdcfg |= ISIF_DATA_PACK8; - ccdcfg |= ISIF_YCINSWP_YCBCR; - if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) { - dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n"); - return -EINVAL; - } - break; - case VPFE_YCBCR_SYNC_16: - if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) { - dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n"); - return -EINVAL; - } - break; - default: - /* should never come here */ - dev_dbg(isif_cfg.dev, "Invalid interface type\n"); - return -EINVAL; - } - - regw(modeset, MODESET); - - /* Set up pix order */ - ccdcfg |= params->pix_order << ISIF_PIX_ORDER_SHIFT; - - regw(ccdcfg, CCDCFG); - - /* configure video window */ - if ((isif_cfg.if_type == VPFE_BT1120) || - (isif_cfg.if_type == VPFE_YCBCR_SYNC_16)) - isif_setwin(¶ms->win, params->frm_fmt, 1); - else - isif_setwin(¶ms->win, params->frm_fmt, 2); - - /* - * configure the horizontal line offset - * this is done by rounding up width to a multiple of 16 pixels - * and multiply by two to account for y:cb:cr 4:2:2 data - */ - regw(((((params->win.width * 2) + 31) & 0xffffffe0) >> 5), HSIZE); - - /* configure the memory line offset */ - if ((params->frm_fmt == CCDC_FRMFMT_INTERLACED) && - (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)) - /* two fields are interleaved in memory */ - regw(0x00000249, SDOFST); - - return 0; -} - -static int isif_configure(void) -{ - if (isif_cfg.if_type == VPFE_RAW_BAYER) - return isif_config_raw(); - return isif_config_ycbcr(); -} - -static int isif_close(struct device *device) -{ - /* copy defaults to module params */ - isif_cfg.bayer.config_params = isif_config_defaults; - return 0; -} - -static const struct ccdc_hw_device isif_hw_dev = { - .name = "ISIF", - .owner = THIS_MODULE, - .hw_ops = { - .open = isif_open, - .close = isif_close, - .enable = isif_enable, - .enable_out_to_sdram = isif_enable_output_to_sdram, - .set_hw_if_params = isif_set_hw_if_params, - .configure = isif_configure, - .set_buftype = isif_set_buftype, - .get_buftype = isif_get_buftype, - .enum_pix = isif_enum_pix, - .set_pixel_format = isif_set_pixel_format, - .get_pixel_format = isif_get_pixel_format, - .set_frame_format = isif_set_frame_format, - .get_frame_format = isif_get_frame_format, - .set_image_window = isif_set_image_window, - .get_image_window = isif_get_image_window, - .get_line_length = isif_get_line_length, - .setfbaddr = isif_setfbaddr, - .getfid = isif_getfid, - }, -}; - -static int isif_probe(struct platform_device *pdev) -{ - void (*setup_pinmux)(void); - struct resource *res; - void __iomem *addr; - int status = 0, i; - - /* Platform data holds setup_pinmux function ptr */ - if (!pdev->dev.platform_data) - return -ENODEV; - - /* - * first try to register with vpfe. If not correct platform, then we - * don't have to iomap - */ - status = vpfe_register_ccdc_device(&isif_hw_dev); - if (status < 0) - return status; - - setup_pinmux = pdev->dev.platform_data; - /* - * setup Mux configuration for ccdc which may be different for - * different SoCs using this CCDC - */ - setup_pinmux(); - - i = 0; - /* Get the ISIF base address, linearization table0 and table1 addr. */ - while (i < 3) { - res = platform_get_resource(pdev, IORESOURCE_MEM, i); - if (!res) { - status = -ENODEV; - goto fail_nobase_res; - } - res = request_mem_region(res->start, resource_size(res), - res->name); - if (!res) { - status = -EBUSY; - goto fail_nobase_res; - } - addr = ioremap(res->start, resource_size(res)); - if (!addr) { - status = -ENOMEM; - goto fail_base_iomap; - } - switch (i) { - case 0: - /* ISIF base address */ - isif_cfg.base_addr = addr; - break; - case 1: - /* ISIF linear tbl0 address */ - isif_cfg.linear_tbl0_addr = addr; - break; - default: - /* ISIF linear tbl0 address */ - isif_cfg.linear_tbl1_addr = addr; - break; - } - i++; - } - isif_cfg.dev = &pdev->dev; - - printk(KERN_NOTICE "%s is registered with vpfe.\n", - isif_hw_dev.name); - return 0; -fail_base_iomap: - release_mem_region(res->start, resource_size(res)); - i--; -fail_nobase_res: - if (isif_cfg.base_addr) { - iounmap(isif_cfg.base_addr); - isif_cfg.base_addr = NULL; - } - if (isif_cfg.linear_tbl0_addr) { - iounmap(isif_cfg.linear_tbl0_addr); - isif_cfg.linear_tbl0_addr = NULL; - } - - while (i >= 0) { - res = platform_get_resource(pdev, IORESOURCE_MEM, i); - if (res) - release_mem_region(res->start, resource_size(res)); - i--; - } - vpfe_unregister_ccdc_device(&isif_hw_dev); - return status; -} - -static int isif_remove(struct platform_device *pdev) -{ - struct resource *res; - int i = 0; - - iounmap(isif_cfg.base_addr); - isif_cfg.base_addr = NULL; - iounmap(isif_cfg.linear_tbl0_addr); - isif_cfg.linear_tbl0_addr = NULL; - iounmap(isif_cfg.linear_tbl1_addr); - isif_cfg.linear_tbl1_addr = NULL; - while (i < 3) { - res = platform_get_resource(pdev, IORESOURCE_MEM, i); - release_mem_region(res->start, resource_size(res)); - i++; - } - vpfe_unregister_ccdc_device(&isif_hw_dev); - return 0; -} - -static struct platform_driver isif_driver = { - .driver = { - .name = "isif", - }, - .remove = isif_remove, - .probe = isif_probe, -}; - -module_platform_driver(isif_driver); - -MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/deprecated/vpfe_capture/isif.h b/drivers/staging/media/deprecated/vpfe_capture/isif.h deleted file mode 100644 index 8369acd26e7e..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/isif.h +++ /dev/null @@ -1,518 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * isif header file - */ -#ifndef _ISIF_H -#define _ISIF_H - -#include <media/davinci/ccdc_types.h> -#include <media/davinci/vpfe_types.h> - -/* isif float type S8Q8/U8Q8 */ -struct isif_float_8 { - /* 8 bit integer part */ - __u8 integer; - /* 8 bit decimal part */ - __u8 decimal; -}; - -/* isif float type U16Q16/S16Q16 */ -struct isif_float_16 { - /* 16 bit integer part */ - __u16 integer; - /* 16 bit decimal part */ - __u16 decimal; -}; - -/************************************************************************ - * Vertical Defect Correction parameters - ***********************************************************************/ -/* Defect Correction (DFC) table entry */ -struct isif_vdfc_entry { - /* vertical position of defect */ - __u16 pos_vert; - /* horizontal position of defect */ - __u16 pos_horz; - /* - * Defect level of Vertical line defect position. This is subtracted - * from the data at the defect position - */ - __u8 level_at_pos; - /* - * Defect level of the pixels upper than the vertical line defect. - * This is subtracted from the data - */ - __u8 level_up_pixels; - /* - * Defect level of the pixels lower than the vertical line defect. - * This is subtracted from the data - */ - __u8 level_low_pixels; -}; - -#define ISIF_VDFC_TABLE_SIZE 8 -struct isif_dfc { - /* enable vertical defect correction */ - __u8 en; - /* Defect level subtraction. Just fed through if saturating */ -#define ISIF_VDFC_NORMAL 0 - /* - * Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2 - * if data saturating - */ -#define ISIF_VDFC_HORZ_INTERPOL_IF_SAT 1 - /* Horizontal interpolation (((i-2)+(i+2))/2) */ -#define ISIF_VDFC_HORZ_INTERPOL 2 - /* one of the vertical defect correction modes above */ - __u8 corr_mode; - /* 0 - whole line corrected, 1 - not pixels upper than the defect */ - __u8 corr_whole_line; -#define ISIF_VDFC_NO_SHIFT 0 -#define ISIF_VDFC_SHIFT_1 1 -#define ISIF_VDFC_SHIFT_2 2 -#define ISIF_VDFC_SHIFT_3 3 -#define ISIF_VDFC_SHIFT_4 4 - /* - * defect level shift value. level_at_pos, level_upper_pos, - * and level_lower_pos can be shifted up by this value. Choose - * one of the values above - */ - __u8 def_level_shift; - /* defect saturation level */ - __u16 def_sat_level; - /* number of vertical defects. Max is ISIF_VDFC_TABLE_SIZE */ - __u16 num_vdefects; - /* VDFC table ptr */ - struct isif_vdfc_entry table[ISIF_VDFC_TABLE_SIZE]; -}; - -struct isif_horz_bclamp { - - /* Horizontal clamp disabled. Only vertical clamp value is subtracted */ -#define ISIF_HORZ_BC_DISABLE 0 - /* - * Horizontal clamp value is calculated and subtracted from image data - * along with vertical clamp value - */ -#define ISIF_HORZ_BC_CLAMP_CALC_ENABLED 1 - /* - * Horizontal clamp value calculated from previous image is subtracted - * from image data along with vertical clamp value. - */ -#define ISIF_HORZ_BC_CLAMP_NOT_UPDATED 2 - /* horizontal clamp mode. One of the values above */ - __u8 mode; - /* - * pixel value limit enable. - * 0 - limit disabled - * 1 - pixel value limited to 1023 - */ - __u8 clamp_pix_limit; - /* Select Most left window for bc calculation */ -#define ISIF_SEL_MOST_LEFT_WIN 0 - /* Select Most right window for bc calculation */ -#define ISIF_SEL_MOST_RIGHT_WIN 1 - /* Select most left or right window for clamp val calculation */ - __u8 base_win_sel_calc; - /* Window count per color for calculation. range 1-32 */ - __u8 win_count_calc; - /* Window start position - horizontal for calculation. 0 - 8191 */ - __u16 win_start_h_calc; - /* Window start position - vertical for calculation 0 - 8191 */ - __u16 win_start_v_calc; -#define ISIF_HORZ_BC_SZ_H_2PIXELS 0 -#define ISIF_HORZ_BC_SZ_H_4PIXELS 1 -#define ISIF_HORZ_BC_SZ_H_8PIXELS 2 -#define ISIF_HORZ_BC_SZ_H_16PIXELS 3 - /* Width of the sample window in pixels for calculation */ - __u8 win_h_sz_calc; -#define ISIF_HORZ_BC_SZ_V_32PIXELS 0 -#define ISIF_HORZ_BC_SZ_V_64PIXELS 1 -#define ISIF_HORZ_BC_SZ_V_128PIXELS 2 -#define ISIF_HORZ_BC_SZ_V_256PIXELS 3 - /* Height of the sample window in pixels for calculation */ - __u8 win_v_sz_calc; -}; - -/************************************************************************ - * Black Clamp parameters - ***********************************************************************/ -struct isif_vert_bclamp { - /* Reset value used is the clamp value calculated */ -#define ISIF_VERT_BC_USE_HORZ_CLAMP_VAL 0 - /* Reset value used is reset_clamp_val configured */ -#define ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL 1 - /* No update, previous image value is used */ -#define ISIF_VERT_BC_NO_UPDATE 2 - /* - * Reset value selector for vertical clamp calculation. Use one of - * the above values - */ - __u8 reset_val_sel; - /* U8Q8. Line average coefficient used in vertical clamp calculation */ - __u8 line_ave_coef; - /* Height of the optical black region for calculation */ - __u16 ob_v_sz_calc; - /* Optical black region start position - horizontal. 0 - 8191 */ - __u16 ob_start_h; - /* Optical black region start position - vertical 0 - 8191 */ - __u16 ob_start_v; -}; - -struct isif_black_clamp { - /* - * This offset value is added irrespective of the clamp enable status. - * S13 - */ - __u16 dc_offset; - /* - * Enable black/digital clamp value to be subtracted from the image data - */ - __u8 en; - /* - * black clamp mode. same/separate clamp for 4 colors - * 0 - disable - same clamp value for all colors - * 1 - clamp value calculated separately for all colors - */ - __u8 bc_mode_color; - /* Vertical start position for bc subtraction */ - __u16 vert_start_sub; - /* Black clamp for horizontal direction */ - struct isif_horz_bclamp horz; - /* Black clamp for vertical direction */ - struct isif_vert_bclamp vert; -}; - -/************************************************************************* -** Color Space Conversion (CSC) -*************************************************************************/ -#define ISIF_CSC_NUM_COEFF 16 -struct isif_color_space_conv { - /* Enable color space conversion */ - __u8 en; - /* - * csc coefficient table. S8Q5, M00 at index 0, M01 at index 1, and - * so forth - */ - struct isif_float_8 coeff[ISIF_CSC_NUM_COEFF]; -}; - - -/************************************************************************* -** Black Compensation parameters -*************************************************************************/ -struct isif_black_comp { - /* Comp for Red */ - __s8 r_comp; - /* Comp for Gr */ - __s8 gr_comp; - /* Comp for Blue */ - __s8 b_comp; - /* Comp for Gb */ - __s8 gb_comp; -}; - -/************************************************************************* -** Gain parameters -*************************************************************************/ -struct isif_gain { - /* Gain for Red or ye */ - struct isif_float_16 r_ye; - /* Gain for Gr or cy */ - struct isif_float_16 gr_cy; - /* Gain for Gb or g */ - struct isif_float_16 gb_g; - /* Gain for Blue or mg */ - struct isif_float_16 b_mg; -}; - -#define ISIF_LINEAR_TAB_SIZE 192 -/************************************************************************* -** Linearization parameters -*************************************************************************/ -struct isif_linearize { - /* Enable or Disable linearization of data */ - __u8 en; - /* Shift value applied */ - __u8 corr_shft; - /* scale factor applied U11Q10 */ - struct isif_float_16 scale_fact; - /* Size of the linear table */ - __u16 table[ISIF_LINEAR_TAB_SIZE]; -}; - -/* Color patterns */ -#define ISIF_RED 0 -#define ISIF_GREEN_RED 1 -#define ISIF_GREEN_BLUE 2 -#define ISIF_BLUE 3 -struct isif_col_pat { - __u8 olop; - __u8 olep; - __u8 elop; - __u8 elep; -}; - -/************************************************************************* -** Data formatter parameters -*************************************************************************/ -struct isif_fmtplen { - /* - * number of program entries for SET0, range 1 - 16 - * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is - * ISIF_COMBINE - */ - __u16 plen0; - /* - * number of program entries for SET1, range 1 - 16 - * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is - * ISIF_COMBINE - */ - __u16 plen1; - /** - * number of program entries for SET2, range 1 - 16 - * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is - * ISIF_COMBINE - */ - __u16 plen2; - /** - * number of program entries for SET3, range 1 - 16 - * when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is - * ISIF_COMBINE - */ - __u16 plen3; -}; - -struct isif_fmt_cfg { -#define ISIF_SPLIT 0 -#define ISIF_COMBINE 1 - /* Split or combine or line alternate */ - __u8 fmtmode; - /* enable or disable line alternating mode */ - __u8 ln_alter_en; -#define ISIF_1LINE 0 -#define ISIF_2LINES 1 -#define ISIF_3LINES 2 -#define ISIF_4LINES 3 - /* Split/combine line number */ - __u8 lnum; - /* Address increment Range 1 - 16 */ - __u8 addrinc; -}; - -struct isif_fmt_addr_ptr { - /* Initial address */ - __u32 init_addr; - /* output line number */ -#define ISIF_1STLINE 0 -#define ISIF_2NDLINE 1 -#define ISIF_3RDLINE 2 -#define ISIF_4THLINE 3 - __u8 out_line; -}; - -struct isif_fmtpgm_ap { - /* program address pointer */ - __u8 pgm_aptr; - /* program address increment or decrement */ - __u8 pgmupdt; -}; - -struct isif_data_formatter { - /* Enable/Disable data formatter */ - __u8 en; - /* data formatter configuration */ - struct isif_fmt_cfg cfg; - /* Formatter program entries length */ - struct isif_fmtplen plen; - /* first pixel in a line fed to formatter */ - __u16 fmtrlen; - /* HD interval for output line. Only valid when split line */ - __u16 fmthcnt; - /* formatter address pointers */ - struct isif_fmt_addr_ptr fmtaddr_ptr[16]; - /* program enable/disable */ - __u8 pgm_en[32]; - /* program address pointers */ - struct isif_fmtpgm_ap fmtpgm_ap[32]; -}; - -struct isif_df_csc { - /* Color Space Conversion configuration, 0 - csc, 1 - df */ - __u8 df_or_csc; - /* csc configuration valid if df_or_csc is 0 */ - struct isif_color_space_conv csc; - /* data formatter configuration valid if df_or_csc is 1 */ - struct isif_data_formatter df; - /* start pixel in a line at the input */ - __u32 start_pix; - /* number of pixels in input line */ - __u32 num_pixels; - /* start line at the input */ - __u32 start_line; - /* number of lines at the input */ - __u32 num_lines; -}; - -struct isif_gain_offsets_adj { - /* Gain adjustment per color */ - struct isif_gain gain; - /* Offset adjustment */ - __u16 offset; - /* Enable or Disable Gain adjustment for SDRAM data */ - __u8 gain_sdram_en; - /* Enable or Disable Gain adjustment for IPIPE data */ - __u8 gain_ipipe_en; - /* Enable or Disable Gain adjustment for H3A data */ - __u8 gain_h3a_en; - /* Enable or Disable Gain adjustment for SDRAM data */ - __u8 offset_sdram_en; - /* Enable or Disable Gain adjustment for IPIPE data */ - __u8 offset_ipipe_en; - /* Enable or Disable Gain adjustment for H3A data */ - __u8 offset_h3a_en; -}; - -struct isif_cul { - /* Horizontal Cull pattern for odd lines */ - __u8 hcpat_odd; - /* Horizontal Cull pattern for even lines */ - __u8 hcpat_even; - /* Vertical Cull pattern */ - __u8 vcpat; - /* Enable or disable lpf. Apply when cull is enabled */ - __u8 en_lpf; -}; - -struct isif_compress { -#define ISIF_ALAW 0 -#define ISIF_DPCM 1 -#define ISIF_NO_COMPRESSION 2 - /* Compression Algorithm used */ - __u8 alg; - /* Choose Predictor1 for DPCM compression */ -#define ISIF_DPCM_PRED1 0 - /* Choose Predictor2 for DPCM compression */ -#define ISIF_DPCM_PRED2 1 - /* Predictor for DPCM compression */ - __u8 pred; -}; - -/* all the stuff in this struct will be provided by userland */ -struct isif_config_params_raw { - /* Linearization parameters for image sensor data input */ - struct isif_linearize linearize; - /* Data formatter or CSC */ - struct isif_df_csc df_csc; - /* Defect Pixel Correction (DFC) configuration */ - struct isif_dfc dfc; - /* Black/Digital Clamp configuration */ - struct isif_black_clamp bclamp; - /* Gain, offset adjustments */ - struct isif_gain_offsets_adj gain_offset; - /* Culling */ - struct isif_cul culling; - /* A-Law and DPCM compression options */ - struct isif_compress compress; - /* horizontal offset for Gain/LSC/DFC */ - __u16 horz_offset; - /* vertical offset for Gain/LSC/DFC */ - __u16 vert_offset; - /* color pattern for field 0 */ - struct isif_col_pat col_pat_field0; - /* color pattern for field 1 */ - struct isif_col_pat col_pat_field1; -#define ISIF_NO_SHIFT 0 -#define ISIF_1BIT_SHIFT 1 -#define ISIF_2BIT_SHIFT 2 -#define ISIF_3BIT_SHIFT 3 -#define ISIF_4BIT_SHIFT 4 -#define ISIF_5BIT_SHIFT 5 -#define ISIF_6BIT_SHIFT 6 - /* Data shift applied before storing to SDRAM */ - __u8 data_shift; - /* enable input test pattern generation */ - __u8 test_pat_gen; -}; - -#ifdef __KERNEL__ -struct isif_ycbcr_config { - /* isif pixel format */ - enum ccdc_pixfmt pix_fmt; - /* isif frame format */ - enum ccdc_frmfmt frm_fmt; - /* ISIF crop window */ - struct v4l2_rect win; - /* field polarity */ - enum vpfe_pin_pol fid_pol; - /* interface VD polarity */ - enum vpfe_pin_pol vd_pol; - /* interface HD polarity */ - enum vpfe_pin_pol hd_pol; - /* isif pix order. Only used for ycbcr capture */ - enum ccdc_pixorder pix_order; - /* isif buffer type. Only used for ycbcr capture */ - enum ccdc_buftype buf_type; -}; - -/* MSB of image data connected to sensor port */ -enum isif_data_msb { - ISIF_BIT_MSB_15, - ISIF_BIT_MSB_14, - ISIF_BIT_MSB_13, - ISIF_BIT_MSB_12, - ISIF_BIT_MSB_11, - ISIF_BIT_MSB_10, - ISIF_BIT_MSB_9, - ISIF_BIT_MSB_8, - ISIF_BIT_MSB_7 -}; - -enum isif_cfa_pattern { - ISIF_CFA_PAT_MOSAIC, - ISIF_CFA_PAT_STRIPE -}; - -struct isif_params_raw { - /* isif pixel format */ - enum ccdc_pixfmt pix_fmt; - /* isif frame format */ - enum ccdc_frmfmt frm_fmt; - /* video window */ - struct v4l2_rect win; - /* field polarity */ - enum vpfe_pin_pol fid_pol; - /* interface VD polarity */ - enum vpfe_pin_pol vd_pol; - /* interface HD polarity */ - enum vpfe_pin_pol hd_pol; - /* buffer type. Applicable for interlaced mode */ - enum ccdc_buftype buf_type; - /* Gain values */ - struct isif_gain gain; - /* cfa pattern */ - enum isif_cfa_pattern cfa_pat; - /* Data MSB position */ - enum isif_data_msb data_msb; - /* Enable horizontal flip */ - unsigned char horz_flip_en; - /* Enable image invert vertically */ - unsigned char image_invert_en; - - /* all the userland defined stuff*/ - struct isif_config_params_raw config_params; -}; - -enum isif_data_pack { - ISIF_PACK_16BIT, - ISIF_PACK_12BIT, - ISIF_PACK_8BIT -}; - -#define ISIF_WIN_NTSC {0, 0, 720, 480} -#define ISIF_WIN_VGA {0, 0, 640, 480} - -#endif -#endif diff --git a/drivers/staging/media/deprecated/vpfe_capture/isif_regs.h b/drivers/staging/media/deprecated/vpfe_capture/isif_regs.h deleted file mode 100644 index d68d38841ae7..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/isif_regs.h +++ /dev/null @@ -1,256 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2008-2009 Texas Instruments Inc - */ -#ifndef _ISIF_REGS_H -#define _ISIF_REGS_H - -/* ISIF registers relative offsets */ -#define SYNCEN 0x00 -#define MODESET 0x04 -#define HDW 0x08 -#define VDW 0x0c -#define PPLN 0x10 -#define LPFR 0x14 -#define SPH 0x18 -#define LNH 0x1c -#define SLV0 0x20 -#define SLV1 0x24 -#define LNV 0x28 -#define CULH 0x2c -#define CULV 0x30 -#define HSIZE 0x34 -#define SDOFST 0x38 -#define CADU 0x3c -#define CADL 0x40 -#define LINCFG0 0x44 -#define LINCFG1 0x48 -#define CCOLP 0x4c -#define CRGAIN 0x50 -#define CGRGAIN 0x54 -#define CGBGAIN 0x58 -#define CBGAIN 0x5c -#define COFSTA 0x60 -#define FLSHCFG0 0x64 -#define FLSHCFG1 0x68 -#define FLSHCFG2 0x6c -#define VDINT0 0x70 -#define VDINT1 0x74 -#define VDINT2 0x78 -#define MISC 0x7c -#define CGAMMAWD 0x80 -#define REC656IF 0x84 -#define CCDCFG 0x88 -/***************************************************** -* Defect Correction registers -*****************************************************/ -#define DFCCTL 0x8c -#define VDFSATLV 0x90 -#define DFCMEMCTL 0x94 -#define DFCMEM0 0x98 -#define DFCMEM1 0x9c -#define DFCMEM2 0xa0 -#define DFCMEM3 0xa4 -#define DFCMEM4 0xa8 -/**************************************************** -* Black Clamp registers -****************************************************/ -#define CLAMPCFG 0xac -#define CLDCOFST 0xb0 -#define CLSV 0xb4 -#define CLHWIN0 0xb8 -#define CLHWIN1 0xbc -#define CLHWIN2 0xc0 -#define CLVRV 0xc4 -#define CLVWIN0 0xc8 -#define CLVWIN1 0xcc -#define CLVWIN2 0xd0 -#define CLVWIN3 0xd4 -/**************************************************** -* Lense Shading Correction -****************************************************/ -#define DATAHOFST 0xd8 -#define DATAVOFST 0xdc -#define LSCHVAL 0xe0 -#define LSCVVAL 0xe4 -#define TWODLSCCFG 0xe8 -#define TWODLSCOFST 0xec -#define TWODLSCINI 0xf0 -#define TWODLSCGRBU 0xf4 -#define TWODLSCGRBL 0xf8 -#define TWODLSCGROF 0xfc -#define TWODLSCORBU 0x100 -#define TWODLSCORBL 0x104 -#define TWODLSCOROF 0x108 -#define TWODLSCIRQEN 0x10c -#define TWODLSCIRQST 0x110 -/**************************************************** -* Data formatter -****************************************************/ -#define FMTCFG 0x114 -#define FMTPLEN 0x118 -#define FMTSPH 0x11c -#define FMTLNH 0x120 -#define FMTSLV 0x124 -#define FMTLNV 0x128 -#define FMTRLEN 0x12c -#define FMTHCNT 0x130 -#define FMTAPTR_BASE 0x134 -/* Below macro for addresses FMTAPTR0 - FMTAPTR15 */ -#define FMTAPTR(i) (FMTAPTR_BASE + (i * 4)) -#define FMTPGMVF0 0x174 -#define FMTPGMVF1 0x178 -#define FMTPGMAPU0 0x17c -#define FMTPGMAPU1 0x180 -#define FMTPGMAPS0 0x184 -#define FMTPGMAPS1 0x188 -#define FMTPGMAPS2 0x18c -#define FMTPGMAPS3 0x190 -#define FMTPGMAPS4 0x194 -#define FMTPGMAPS5 0x198 -#define FMTPGMAPS6 0x19c -#define FMTPGMAPS7 0x1a0 -/************************************************ -* Color Space Converter -************************************************/ -#define CSCCTL 0x1a4 -#define CSCM0 0x1a8 -#define CSCM1 0x1ac -#define CSCM2 0x1b0 -#define CSCM3 0x1b4 -#define CSCM4 0x1b8 -#define CSCM5 0x1bc -#define CSCM6 0x1c0 -#define CSCM7 0x1c4 -#define OBWIN0 0x1c8 -#define OBWIN1 0x1cc -#define OBWIN2 0x1d0 -#define OBWIN3 0x1d4 -#define OBVAL0 0x1d8 -#define OBVAL1 0x1dc -#define OBVAL2 0x1e0 -#define OBVAL3 0x1e4 -#define OBVAL4 0x1e8 -#define OBVAL5 0x1ec -#define OBVAL6 0x1f0 -#define OBVAL7 0x1f4 -#define CLKCTL 0x1f8 - -/* Masks & Shifts below */ -#define START_PX_HOR_MASK 0x7FFF -#define NUM_PX_HOR_MASK 0x7FFF -#define START_VER_ONE_MASK 0x7FFF -#define START_VER_TWO_MASK 0x7FFF -#define NUM_LINES_VER 0x7FFF - -/* gain - offset masks */ -#define GAIN_INTEGER_SHIFT 9 -#define OFFSET_MASK 0xFFF -#define GAIN_SDRAM_EN_SHIFT 12 -#define GAIN_IPIPE_EN_SHIFT 13 -#define GAIN_H3A_EN_SHIFT 14 -#define OFST_SDRAM_EN_SHIFT 8 -#define OFST_IPIPE_EN_SHIFT 9 -#define OFST_H3A_EN_SHIFT 10 -#define GAIN_OFFSET_EN_MASK 0x7700 - -/* Culling */ -#define CULL_PAT_EVEN_LINE_SHIFT 8 - -/* CCDCFG register */ -#define ISIF_YCINSWP_RAW (0x00 << 4) -#define ISIF_YCINSWP_YCBCR (0x01 << 4) -#define ISIF_CCDCFG_FIDMD_LATCH_VSYNC (0x00 << 6) -#define ISIF_CCDCFG_WENLOG_AND (0x00 << 8) -#define ISIF_CCDCFG_TRGSEL_WEN (0x00 << 9) -#define ISIF_CCDCFG_EXTRG_DISABLE (0x00 << 10) -#define ISIF_LATCH_ON_VSYNC_DISABLE (0x01 << 15) -#define ISIF_LATCH_ON_VSYNC_ENABLE (0x00 << 15) -#define ISIF_DATA_PACK_MASK 3 -#define ISIF_DATA_PACK16 0 -#define ISIF_DATA_PACK12 1 -#define ISIF_DATA_PACK8 2 -#define ISIF_PIX_ORDER_SHIFT 11 -#define ISIF_BW656_ENABLE (0x01 << 5) - -/* MODESET registers */ -#define ISIF_VDHDOUT_INPUT (0x00 << 0) -#define ISIF_INPUT_SHIFT 12 -#define ISIF_RAW_INPUT_MODE 0 -#define ISIF_FID_POL_SHIFT 4 -#define ISIF_HD_POL_SHIFT 3 -#define ISIF_VD_POL_SHIFT 2 -#define ISIF_DATAPOL_NORMAL 0 -#define ISIF_DATAPOL_SHIFT 6 -#define ISIF_EXWEN_DISABLE 0 -#define ISIF_EXWEN_SHIFT 5 -#define ISIF_FRM_FMT_SHIFT 7 -#define ISIF_DATASFT_SHIFT 8 -#define ISIF_LPF_SHIFT 14 -#define ISIF_LPF_MASK 1 - -/* GAMMAWD registers */ -#define ISIF_ALAW_GAMMA_WD_MASK 0xF -#define ISIF_ALAW_GAMMA_WD_SHIFT 1 -#define ISIF_ALAW_ENABLE 1 -#define ISIF_GAMMAWD_CFA_SHIFT 5 - -/* HSIZE registers */ -#define ISIF_HSIZE_FLIP_MASK 1 -#define ISIF_HSIZE_FLIP_SHIFT 12 - -/* MISC registers */ -#define ISIF_DPCM_EN_SHIFT 12 -#define ISIF_DPCM_PREDICTOR_SHIFT 13 - -/* Black clamp related */ -#define ISIF_BC_MODE_COLOR_SHIFT 4 -#define ISIF_HORZ_BC_MODE_SHIFT 1 -#define ISIF_HORZ_BC_WIN_SEL_SHIFT 5 -#define ISIF_HORZ_BC_PIX_LIMIT_SHIFT 6 -#define ISIF_HORZ_BC_WIN_H_SIZE_SHIFT 8 -#define ISIF_HORZ_BC_WIN_V_SIZE_SHIFT 12 -#define ISIF_VERT_BC_RST_VAL_SEL_SHIFT 4 -#define ISIF_VERT_BC_LINE_AVE_COEF_SHIFT 8 - -/* VDFC registers */ -#define ISIF_VDFC_EN_SHIFT 4 -#define ISIF_VDFC_CORR_MOD_SHIFT 5 -#define ISIF_VDFC_CORR_WHOLE_LN_SHIFT 7 -#define ISIF_VDFC_LEVEL_SHFT_SHIFT 8 -#define ISIF_VDFC_POS_MASK 0x1FFF -#define ISIF_DFCMEMCTL_DFCMARST_SHIFT 2 - -/* CSC registers */ -#define ISIF_CSC_COEF_INTEG_MASK 7 -#define ISIF_CSC_COEF_DECIMAL_MASK 0x1f -#define ISIF_CSC_COEF_INTEG_SHIFT 5 -#define ISIF_CSCM_MSB_SHIFT 8 -#define ISIF_DF_CSC_SPH_MASK 0x1FFF -#define ISIF_DF_CSC_LNH_MASK 0x1FFF -#define ISIF_DF_CSC_SLV_MASK 0x1FFF -#define ISIF_DF_CSC_LNV_MASK 0x1FFF -#define ISIF_DF_NUMLINES 0x7FFF -#define ISIF_DF_NUMPIX 0x1FFF - -/* Offsets for LSC/DFC/Gain */ -#define ISIF_DATA_H_OFFSET_MASK 0x1FFF -#define ISIF_DATA_V_OFFSET_MASK 0x1FFF - -/* Linearization */ -#define ISIF_LIN_CORRSFT_SHIFT 4 -#define ISIF_LIN_SCALE_FACT_INTEG_SHIFT 10 - - -/* Pattern registers */ -#define ISIF_PG_EN (1 << 3) -#define ISIF_SEL_PG_SRC (3 << 4) -#define ISIF_PG_VD_POL_SHIFT 0 -#define ISIF_PG_HD_POL_SHIFT 1 - -/*random other junk*/ -#define ISIF_SYNCEN_VDHDEN_MASK (1 << 0) -#define ISIF_SYNCEN_WEN_MASK (1 << 1) -#define ISIF_SYNCEN_WEN_SHIFT 1 - -#endif diff --git a/drivers/staging/media/deprecated/vpfe_capture/vpfe_capture.c b/drivers/staging/media/deprecated/vpfe_capture/vpfe_capture.c deleted file mode 100644 index 0a2226b321d7..000000000000 --- a/drivers/staging/media/deprecated/vpfe_capture/vpfe_capture.c +++ /dev/null @@ -1,1902 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * Driver name : VPFE Capture driver - * VPFE Capture driver allows applications to capture and stream video - * frames on DaVinci SoCs (DM6446, DM355 etc) from a YUV source such as - * TVP5146 or Raw Bayer RGB image data from an image sensor - * such as Microns' MT9T001, MT9T031 etc. - * - * These SoCs have, in common, a Video Processing Subsystem (VPSS) that - * consists of a Video Processing Front End (VPFE) for capturing - * video/raw image data and Video Processing Back End (VPBE) for displaying - * YUV data through an in-built analog encoder or Digital LCD port. This - * driver is for capture through VPFE. A typical EVM using these SoCs have - * following high level configuration. - * - * decoder(TVP5146/ YUV/ - * MT9T001) --> Raw Bayer RGB ---> MUX -> VPFE (CCDC/ISIF) - * data input | | - * V | - * SDRAM | - * V - * Image Processor - * | - * V - * SDRAM - * The data flow happens from a decoder connected to the VPFE over a - * YUV embedded (BT.656/BT.1120) or separate sync or raw bayer rgb interface - * and to the input of VPFE through an optional MUX (if more inputs are - * to be interfaced on the EVM). The input data is first passed through - * CCDC (CCD Controller, a.k.a Image Sensor Interface, ISIF). The CCDC - * does very little or no processing on YUV data and does pre-process Raw - * Bayer RGB data through modules such as Defect Pixel Correction (DFC) - * Color Space Conversion (CSC), data gain/offset etc. After this, data - * can be written to SDRAM or can be connected to the image processing - * block such as IPIPE (on DM355 only). - * - * Features supported - * - MMAP IO - * - Capture using TVP5146 over BT.656 - * - support for interfacing decoders using sub device model - * - Work with DM355 or DM6446 CCDC to do Raw Bayer RGB/YUV - * data capture to SDRAM. - * TODO list - * - Support multiple REQBUF after open - * - Support for de-allocating buffers through REQBUF - * - Support for Raw Bayer RGB capture - * - Support for chaining Image Processor - * - Support for static allocation of buffers - * - Support for USERPTR IO - * - Support for STREAMON before QBUF - * - Support for control ioctls - */ -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <media/v4l2-common.h> -#include <linux/io.h> -#include <media/davinci/vpfe_capture.h> -#include "ccdc_hw_device.h" - -static int debug; -static u32 numbuffers = 3; -static u32 bufsize = (720 * 576 * 2); - -module_param(numbuffers, uint, S_IRUGO); -module_param(bufsize, uint, S_IRUGO); -module_param(debug, int, 0644); - -MODULE_PARM_DESC(numbuffers, "buffer count (default:3)"); -MODULE_PARM_DESC(bufsize, "buffer size in bytes (default:720 x 576 x 2)"); -MODULE_PARM_DESC(debug, "Debug level 0-1"); - -MODULE_DESCRIPTION("VPFE Video for Linux Capture Driver"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Texas Instruments"); - -/* standard information */ -struct vpfe_standard { - v4l2_std_id std_id; - unsigned int width; - unsigned int height; - struct v4l2_fract pixelaspect; - /* 0 - progressive, 1 - interlaced */ - int frame_format; -}; - -/* ccdc configuration */ -struct ccdc_config { - /* This make sure vpfe is probed and ready to go */ - int vpfe_probed; - /* name of ccdc device */ - char name[32]; -}; - -/* data structures */ -static struct vpfe_config_params config_params = { - .min_numbuffers = 3, - .numbuffers = 3, - .min_bufsize = 720 * 480 * 2, - .device_bufsize = 720 * 576 * 2, -}; - -/* ccdc device registered */ -static const struct ccdc_hw_device *ccdc_dev; -/* lock for accessing ccdc information */ -static DEFINE_MUTEX(ccdc_lock); -/* ccdc configuration */ -static struct ccdc_config *ccdc_cfg; - -static const struct vpfe_standard vpfe_standards[] = { - {V4L2_STD_525_60, 720, 480, {11, 10}, 1}, - {V4L2_STD_625_50, 720, 576, {54, 59}, 1}, -}; - -/* Used when raw Bayer image from ccdc is directly captured to SDRAM */ -static const struct vpfe_pixel_format vpfe_pix_fmts[] = { - { - .pixelformat = V4L2_PIX_FMT_SBGGR8, - .bpp = 1, - }, - { - .pixelformat = V4L2_PIX_FMT_SBGGR16, - .bpp = 2, - }, - { - .pixelformat = V4L2_PIX_FMT_SGRBG10DPCM8, - .bpp = 1, - }, - { - .pixelformat = V4L2_PIX_FMT_UYVY, - .bpp = 2, - }, - { - .pixelformat = V4L2_PIX_FMT_YUYV, - .bpp = 2, - }, - { - .pixelformat = V4L2_PIX_FMT_NV12, - .bpp = 1, - }, -}; - -/* - * vpfe_lookup_pix_format() - * lookup an entry in the vpfe pix format table based on pix_format - */ -static const struct vpfe_pixel_format *vpfe_lookup_pix_format(u32 pix_format) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(vpfe_pix_fmts); i++) { - if (pix_format == vpfe_pix_fmts[i].pixelformat) - return &vpfe_pix_fmts[i]; - } - return NULL; -} - -/* - * vpfe_register_ccdc_device. CCDC module calls this to - * register with vpfe capture - */ -int vpfe_register_ccdc_device(const struct ccdc_hw_device *dev) -{ - int ret = 0; - printk(KERN_NOTICE "vpfe_register_ccdc_device: %s\n", dev->name); - - if (!dev->hw_ops.open || - !dev->hw_ops.enable || - !dev->hw_ops.set_hw_if_params || - !dev->hw_ops.configure || - !dev->hw_ops.set_buftype || - !dev->hw_ops.get_buftype || - !dev->hw_ops.enum_pix || - !dev->hw_ops.set_frame_format || - !dev->hw_ops.get_frame_format || - !dev->hw_ops.get_pixel_format || - !dev->hw_ops.set_pixel_format || - !dev->hw_ops.set_image_window || - !dev->hw_ops.get_image_window || - !dev->hw_ops.get_line_length || - !dev->hw_ops.getfid) - return -EINVAL; - - mutex_lock(&ccdc_lock); - if (!ccdc_cfg) { - /* - * TODO. Will this ever happen? if so, we need to fix it. - * Probably we need to add the request to a linked list and - * walk through it during vpfe probe - */ - printk(KERN_ERR "vpfe capture not initialized\n"); - ret = -EFAULT; - goto unlock; - } - - if (strcmp(dev->name, ccdc_cfg->name)) { - /* ignore this ccdc */ - ret = -EINVAL; - goto unlock; - } - - if (ccdc_dev) { - printk(KERN_ERR "ccdc already registered\n"); - ret = -EINVAL; - goto unlock; - } - - ccdc_dev = dev; -unlock: - mutex_unlock(&ccdc_lock); - return ret; -} -EXPORT_SYMBOL(vpfe_register_ccdc_device); - -/* - * vpfe_unregister_ccdc_device. CCDC module calls this to - * unregister with vpfe capture - */ -void vpfe_unregister_ccdc_device(const struct ccdc_hw_device *dev) -{ - if (!dev) { - printk(KERN_ERR "invalid ccdc device ptr\n"); - return; - } - - printk(KERN_NOTICE "vpfe_unregister_ccdc_device, dev->name = %s\n", - dev->name); - - if (strcmp(dev->name, ccdc_cfg->name)) { - /* ignore this ccdc */ - return; - } - - mutex_lock(&ccdc_lock); - ccdc_dev = NULL; - mutex_unlock(&ccdc_lock); -} -EXPORT_SYMBOL(vpfe_unregister_ccdc_device); - -/* - * vpfe_config_ccdc_image_format() - * For a pix format, configure ccdc to setup the capture - */ -static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe_dev) -{ - enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED; - int ret = 0; - - if (ccdc_dev->hw_ops.set_pixel_format( - vpfe_dev->fmt.fmt.pix.pixelformat) < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, - "couldn't set pix format in ccdc\n"); - return -EINVAL; - } - /* configure the image window */ - ccdc_dev->hw_ops.set_image_window(&vpfe_dev->crop); - - switch (vpfe_dev->fmt.fmt.pix.field) { - case V4L2_FIELD_INTERLACED: - /* do nothing, since it is default */ - ret = ccdc_dev->hw_ops.set_buftype( - CCDC_BUFTYPE_FLD_INTERLEAVED); - break; - case V4L2_FIELD_NONE: - frm_fmt = CCDC_FRMFMT_PROGRESSIVE; - /* buffer type only applicable for interlaced scan */ - break; - case V4L2_FIELD_SEQ_TB: - ret = ccdc_dev->hw_ops.set_buftype( - CCDC_BUFTYPE_FLD_SEPARATED); - break; - default: - return -EINVAL; - } - - /* set the frame format */ - if (!ret) - ret = ccdc_dev->hw_ops.set_frame_format(frm_fmt); - return ret; -} -/* - * vpfe_config_image_format() - * For a given standard, this functions sets up the default - * pix format & crop values in the vpfe device and ccdc. It first - * starts with defaults based values from the standard table. - * It then checks if sub device supports get_fmt and then override the - * values based on that.Sets crop values to match with scan resolution - * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the - * values in ccdc - */ -static int vpfe_config_image_format(struct vpfe_device *vpfe_dev, - v4l2_std_id std_id) -{ - struct vpfe_subdev_info *sdinfo = vpfe_dev->current_subdev; - struct v4l2_subdev_format fmt = { - .which = V4L2_SUBDEV_FORMAT_ACTIVE, - }; - struct v4l2_mbus_framefmt *mbus_fmt = &fmt.format; - struct v4l2_pix_format *pix = &vpfe_dev->fmt.fmt.pix; - int i, ret; - - for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) { - if (vpfe_standards[i].std_id & std_id) { - vpfe_dev->std_info.active_pixels = - vpfe_standards[i].width; - vpfe_dev->std_info.active_lines = - vpfe_standards[i].height; - vpfe_dev->std_info.frame_format = - vpfe_standards[i].frame_format; - vpfe_dev->std_index = i; - break; - } - } - - if (i == ARRAY_SIZE(vpfe_standards)) { - v4l2_err(&vpfe_dev->v4l2_dev, "standard not supported\n"); - return -EINVAL; - } - - vpfe_dev->crop.top = 0; - vpfe_dev->crop.left = 0; - vpfe_dev->crop.width = vpfe_dev->std_info.active_pixels; - vpfe_dev->crop.height = vpfe_dev->std_info.active_lines; - pix->width = vpfe_dev->crop.width; - pix->height = vpfe_dev->crop.height; - - /* first field and frame format based on standard frame format */ - if (vpfe_dev->std_info.frame_format) { - pix->field = V4L2_FIELD_INTERLACED; - /* assume V4L2_PIX_FMT_UYVY as default */ - pix->pixelformat = V4L2_PIX_FMT_UYVY; - v4l2_fill_mbus_format(mbus_fmt, pix, - MEDIA_BUS_FMT_YUYV10_2X10); - } else { - pix->field = V4L2_FIELD_NONE; - /* assume V4L2_PIX_FMT_SBGGR8 */ - pix->pixelformat = V4L2_PIX_FMT_SBGGR8; - v4l2_fill_mbus_format(mbus_fmt, pix, - MEDIA_BUS_FMT_SBGGR8_1X8); - } - - /* if sub device supports get_fmt, override the defaults */ - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, - sdinfo->grp_id, pad, get_fmt, NULL, &fmt); - - if (ret && ret != -ENOIOCTLCMD) { - v4l2_err(&vpfe_dev->v4l2_dev, - "error in getting get_fmt from sub device\n"); - return ret; - } - v4l2_fill_pix_format(pix, mbus_fmt); - pix->bytesperline = pix->width * 2; - pix->sizeimage = pix->bytesperline * pix->height; - - /* Sets the values in CCDC */ - ret = vpfe_config_ccdc_image_format(vpfe_dev); - if (ret) - return ret; - - /* Update the values of sizeimage and bytesperline */ - pix->bytesperline = ccdc_dev->hw_ops.get_line_length(); - pix->sizeimage = pix->bytesperline * pix->height; - - return 0; -} - -static int vpfe_initialize_device(struct vpfe_device *vpfe_dev) -{ - int ret; - - /* set first input of current subdevice as the current input */ - vpfe_dev->current_input = 0; - - /* set default standard */ - vpfe_dev->std_index = 0; - - /* Configure the default format information */ - ret = vpfe_config_image_format(vpfe_dev, - vpfe_standards[vpfe_dev->std_index].std_id); - if (ret) - return ret; - - /* now open the ccdc device to initialize it */ - mutex_lock(&ccdc_lock); - if (!ccdc_dev) { - v4l2_err(&vpfe_dev->v4l2_dev, "ccdc device not registered\n"); - ret = -ENODEV; - goto unlock; - } - - if (!try_module_get(ccdc_dev->owner)) { - v4l2_err(&vpfe_dev->v4l2_dev, "Couldn't lock ccdc module\n"); - ret = -ENODEV; - goto unlock; - } - ret = ccdc_dev->hw_ops.open(vpfe_dev->pdev); - if (!ret) - vpfe_dev->initialized = 1; - - /* Clear all VPFE/CCDC interrupts */ - if (vpfe_dev->cfg->clr_intr) - vpfe_dev->cfg->clr_intr(-1); - -unlock: - mutex_unlock(&ccdc_lock); - return ret; -} - -/* - * vpfe_open : It creates object of file handle structure and - * stores it in private_data member of filepointer - */ -static int vpfe_open(struct file *file) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct video_device *vdev = video_devdata(file); - struct vpfe_fh *fh; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_open\n"); - - if (!vpfe_dev->cfg->num_subdevs) { - v4l2_err(&vpfe_dev->v4l2_dev, "No decoder registered\n"); - return -ENODEV; - } - - /* Allocate memory for the file handle object */ - fh = kmalloc(sizeof(*fh), GFP_KERNEL); - if (!fh) - return -ENOMEM; - - /* store pointer to fh in private_data member of file */ - file->private_data = fh; - fh->vpfe_dev = vpfe_dev; - v4l2_fh_init(&fh->fh, vdev); - mutex_lock(&vpfe_dev->lock); - /* If decoder is not initialized. initialize it */ - if (!vpfe_dev->initialized) { - if (vpfe_initialize_device(vpfe_dev)) { - mutex_unlock(&vpfe_dev->lock); - v4l2_fh_exit(&fh->fh); - kfree(fh); - return -ENODEV; - } - } - /* Increment device usrs counter */ - vpfe_dev->usrs++; - /* Set io_allowed member to false */ - fh->io_allowed = 0; - v4l2_fh_add(&fh->fh); - mutex_unlock(&vpfe_dev->lock); - return 0; -} - -static void vpfe_schedule_next_buffer(struct vpfe_device *vpfe_dev) -{ - unsigned long addr; - - vpfe_dev->next_frm = list_entry(vpfe_dev->dma_queue.next, - struct videobuf_buffer, queue); - list_del(&vpfe_dev->next_frm->queue); - vpfe_dev->next_frm->state = VIDEOBUF_ACTIVE; - addr = videobuf_to_dma_contig(vpfe_dev->next_frm); - - ccdc_dev->hw_ops.setfbaddr(addr); -} - -static void vpfe_schedule_bottom_field(struct vpfe_device *vpfe_dev) -{ - unsigned long addr; - - addr = videobuf_to_dma_contig(vpfe_dev->cur_frm); - addr += vpfe_dev->field_off; - ccdc_dev->hw_ops.setfbaddr(addr); -} - -static void vpfe_process_buffer_complete(struct vpfe_device *vpfe_dev) -{ - vpfe_dev->cur_frm->ts = ktime_get_ns(); - vpfe_dev->cur_frm->state = VIDEOBUF_DONE; - vpfe_dev->cur_frm->size = vpfe_dev->fmt.fmt.pix.sizeimage; - wake_up_interruptible(&vpfe_dev->cur_frm->done); - vpfe_dev->cur_frm = vpfe_dev->next_frm; -} - -/* ISR for VINT0*/ -static irqreturn_t vpfe_isr(int irq, void *dev_id) -{ - struct vpfe_device *vpfe_dev = dev_id; - enum v4l2_field field; - int fid; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nStarting vpfe_isr...\n"); - field = vpfe_dev->fmt.fmt.pix.field; - - /* if streaming not started, don't do anything */ - if (!vpfe_dev->started) - goto clear_intr; - - /* only for 6446 this will be applicable */ - if (ccdc_dev->hw_ops.reset) - ccdc_dev->hw_ops.reset(); - - if (field == V4L2_FIELD_NONE) { - /* handle progressive frame capture */ - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, - "frame format is progressive...\n"); - if (vpfe_dev->cur_frm != vpfe_dev->next_frm) - vpfe_process_buffer_complete(vpfe_dev); - goto clear_intr; - } - - /* interlaced or TB capture check which field we are in hardware */ - fid = ccdc_dev->hw_ops.getfid(); - - /* switch the software maintained field id */ - vpfe_dev->field_id ^= 1; - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "field id = %x:%x.\n", - fid, vpfe_dev->field_id); - if (fid == vpfe_dev->field_id) { - /* we are in-sync here,continue */ - if (fid == 0) { - /* - * One frame is just being captured. If the next frame - * is available, release the current frame and move on - */ - if (vpfe_dev->cur_frm != vpfe_dev->next_frm) - vpfe_process_buffer_complete(vpfe_dev); - /* - * based on whether the two fields are stored - * interleavely or separately in memory, reconfigure - * the CCDC memory address - */ - if (field == V4L2_FIELD_SEQ_TB) - vpfe_schedule_bottom_field(vpfe_dev); - goto clear_intr; - } - /* - * if one field is just being captured configure - * the next frame get the next frame from the empty - * queue if no frame is available hold on to the - * current buffer - */ - spin_lock(&vpfe_dev->dma_queue_lock); - if (!list_empty(&vpfe_dev->dma_queue) && - vpfe_dev->cur_frm == vpfe_dev->next_frm) - vpfe_schedule_next_buffer(vpfe_dev); - spin_unlock(&vpfe_dev->dma_queue_lock); - } else if (fid == 0) { - /* - * out of sync. Recover from any hardware out-of-sync. - * May loose one frame - */ - vpfe_dev->field_id = fid; - } -clear_intr: - if (vpfe_dev->cfg->clr_intr) - vpfe_dev->cfg->clr_intr(irq); - - return IRQ_HANDLED; -} - -/* vdint1_isr - isr handler for VINT1 interrupt */ -static irqreturn_t vdint1_isr(int irq, void *dev_id) -{ - struct vpfe_device *vpfe_dev = dev_id; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "\nInside vdint1_isr...\n"); - - /* if streaming not started, don't do anything */ - if (!vpfe_dev->started) { - if (vpfe_dev->cfg->clr_intr) - vpfe_dev->cfg->clr_intr(irq); - return IRQ_HANDLED; - } - - spin_lock(&vpfe_dev->dma_queue_lock); - if ((vpfe_dev->fmt.fmt.pix.field == V4L2_FIELD_NONE) && - !list_empty(&vpfe_dev->dma_queue) && - vpfe_dev->cur_frm == vpfe_dev->next_frm) - vpfe_schedule_next_buffer(vpfe_dev); - spin_unlock(&vpfe_dev->dma_queue_lock); - - if (vpfe_dev->cfg->clr_intr) - vpfe_dev->cfg->clr_intr(irq); - - return IRQ_HANDLED; -} - -static void vpfe_detach_irq(struct vpfe_device *vpfe_dev) -{ - enum ccdc_frmfmt frame_format; - - frame_format = ccdc_dev->hw_ops.get_frame_format(); - if (frame_format == CCDC_FRMFMT_PROGRESSIVE) - free_irq(vpfe_dev->ccdc_irq1, vpfe_dev); -} - -static int vpfe_attach_irq(struct vpfe_device *vpfe_dev) -{ - enum ccdc_frmfmt frame_format; - - frame_format = ccdc_dev->hw_ops.get_frame_format(); - if (frame_format == CCDC_FRMFMT_PROGRESSIVE) { - return request_irq(vpfe_dev->ccdc_irq1, vdint1_isr, - 0, "vpfe_capture1", - vpfe_dev); - } - return 0; -} - -/* vpfe_stop_ccdc_capture: stop streaming in ccdc/isif */ -static void vpfe_stop_ccdc_capture(struct vpfe_device *vpfe_dev) -{ - vpfe_dev->started = 0; - ccdc_dev->hw_ops.enable(0); - if (ccdc_dev->hw_ops.enable_out_to_sdram) - ccdc_dev->hw_ops.enable_out_to_sdram(0); -} - -/* - * vpfe_release : This function deletes buffer queue, frees the - * buffers and the vpfe file handle - */ -static int vpfe_release(struct file *file) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_fh *fh = file->private_data; - struct vpfe_subdev_info *sdinfo; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_release\n"); - - /* Get the device lock */ - mutex_lock(&vpfe_dev->lock); - /* if this instance is doing IO */ - if (fh->io_allowed) { - if (vpfe_dev->started) { - sdinfo = vpfe_dev->current_subdev; - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, - sdinfo->grp_id, - video, s_stream, 0); - if (ret && (ret != -ENOIOCTLCMD)) - v4l2_err(&vpfe_dev->v4l2_dev, - "stream off failed in subdev\n"); - vpfe_stop_ccdc_capture(vpfe_dev); - vpfe_detach_irq(vpfe_dev); - videobuf_streamoff(&vpfe_dev->buffer_queue); - } - vpfe_dev->io_usrs = 0; - vpfe_dev->numbuffers = config_params.numbuffers; - videobuf_stop(&vpfe_dev->buffer_queue); - videobuf_mmap_free(&vpfe_dev->buffer_queue); - } - - /* Decrement device usrs counter */ - vpfe_dev->usrs--; - v4l2_fh_del(&fh->fh); - v4l2_fh_exit(&fh->fh); - /* If this is the last file handle */ - if (!vpfe_dev->usrs) { - vpfe_dev->initialized = 0; - if (ccdc_dev->hw_ops.close) - ccdc_dev->hw_ops.close(vpfe_dev->pdev); - module_put(ccdc_dev->owner); - } - mutex_unlock(&vpfe_dev->lock); - file->private_data = NULL; - /* Free memory allocated to file handle object */ - kfree(fh); - return 0; -} - -/* - * vpfe_mmap : It is used to map kernel space buffers - * into user spaces - */ -static int vpfe_mmap(struct file *file, struct vm_area_struct *vma) -{ - /* Get the device object and file handle object */ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_mmap\n"); - - return videobuf_mmap_mapper(&vpfe_dev->buffer_queue, vma); -} - -/* - * vpfe_poll: It is used for select/poll system call - */ -static __poll_t vpfe_poll(struct file *file, poll_table *wait) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_poll\n"); - - if (vpfe_dev->started) - return videobuf_poll_stream(file, - &vpfe_dev->buffer_queue, wait); - return 0; -} - -/* vpfe capture driver file operations */ -static const struct v4l2_file_operations vpfe_fops = { - .owner = THIS_MODULE, - .open = vpfe_open, - .release = vpfe_release, - .unlocked_ioctl = video_ioctl2, - .mmap = vpfe_mmap, - .poll = vpfe_poll -}; - -/* - * vpfe_check_format() - * This function adjust the input pixel format as per hardware - * capabilities and update the same in pixfmt. - * Following algorithm used :- - * - * If given pixformat is not in the vpfe list of pix formats or not - * supported by the hardware, current value of pixformat in the device - * is used - * If given field is not supported, then current field is used. If field - * is different from current, then it is matched with that from sub device. - * Minimum height is 2 lines for interlaced or tb field and 1 line for - * progressive. Maximum height is clamped to active active lines of scan - * Minimum width is 32 bytes in memory and width is clamped to active - * pixels of scan. - * bytesperline is a multiple of 32. - */ -static const struct vpfe_pixel_format * - vpfe_check_format(struct vpfe_device *vpfe_dev, - struct v4l2_pix_format *pixfmt) -{ - u32 min_height = 1, min_width = 32, max_width, max_height; - const struct vpfe_pixel_format *vpfe_pix_fmt; - u32 pix; - int temp, found; - - vpfe_pix_fmt = vpfe_lookup_pix_format(pixfmt->pixelformat); - if (!vpfe_pix_fmt) { - /* - * use current pixel format in the vpfe device. We - * will find this pix format in the table - */ - pixfmt->pixelformat = vpfe_dev->fmt.fmt.pix.pixelformat; - vpfe_pix_fmt = vpfe_lookup_pix_format(pixfmt->pixelformat); - } - - /* check if hw supports it */ - temp = 0; - found = 0; - while (ccdc_dev->hw_ops.enum_pix(&pix, temp) >= 0) { - if (vpfe_pix_fmt->pixelformat == pix) { - found = 1; - break; - } - temp++; - } - - if (!found) { - /* use current pixel format */ - pixfmt->pixelformat = vpfe_dev->fmt.fmt.pix.pixelformat; - /* - * Since this is currently used in the vpfe device, we - * will find this pix format in the table - */ - vpfe_pix_fmt = vpfe_lookup_pix_format(pixfmt->pixelformat); - } - - /* check what field format is supported */ - if (pixfmt->field == V4L2_FIELD_ANY) { - /* if field is any, use current value as default */ - pixfmt->field = vpfe_dev->fmt.fmt.pix.field; - } - - /* - * if field is not same as current field in the vpfe device - * try matching the field with the sub device field - */ - if (vpfe_dev->fmt.fmt.pix.field != pixfmt->field) { - /* - * If field value is not in the supported fields, use current - * field used in the device as default - */ - switch (pixfmt->field) { - case V4L2_FIELD_INTERLACED: - case V4L2_FIELD_SEQ_TB: - /* if sub device is supporting progressive, use that */ - if (!vpfe_dev->std_info.frame_format) - pixfmt->field = V4L2_FIELD_NONE; - break; - case V4L2_FIELD_NONE: - if (vpfe_dev->std_info.frame_format) - pixfmt->field = V4L2_FIELD_INTERLACED; - break; - - default: - /* use current field as default */ - pixfmt->field = vpfe_dev->fmt.fmt.pix.field; - break; - } - } - - /* Now adjust image resolutions supported */ - if (pixfmt->field == V4L2_FIELD_INTERLACED || - pixfmt->field == V4L2_FIELD_SEQ_TB) - min_height = 2; - - max_width = vpfe_dev->std_info.active_pixels; - max_height = vpfe_dev->std_info.active_lines; - min_width /= vpfe_pix_fmt->bpp; - - v4l2_info(&vpfe_dev->v4l2_dev, "width = %d, height = %d, bpp = %d\n", - pixfmt->width, pixfmt->height, vpfe_pix_fmt->bpp); - - pixfmt->width = clamp((pixfmt->width), min_width, max_width); - pixfmt->height = clamp((pixfmt->height), min_height, max_height); - - /* If interlaced, adjust height to be a multiple of 2 */ - if (pixfmt->field == V4L2_FIELD_INTERLACED) - pixfmt->height &= (~1); - /* - * recalculate bytesperline and sizeimage since width - * and height might have changed - */ - pixfmt->bytesperline = (((pixfmt->width * vpfe_pix_fmt->bpp) + 31) - & ~31); - if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) - pixfmt->sizeimage = - pixfmt->bytesperline * pixfmt->height + - ((pixfmt->bytesperline * pixfmt->height) >> 1); - else - pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; - - v4l2_info(&vpfe_dev->v4l2_dev, "adjusted width = %d, height = %d, bpp = %d, bytesperline = %d, sizeimage = %d\n", - pixfmt->width, pixfmt->height, vpfe_pix_fmt->bpp, - pixfmt->bytesperline, pixfmt->sizeimage); - return vpfe_pix_fmt; -} - -static int vpfe_querycap(struct file *file, void *priv, - struct v4l2_capability *cap) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querycap\n"); - - strscpy(cap->driver, CAPTURE_DRV_NAME, sizeof(cap->driver)); - strscpy(cap->bus_info, "VPFE", sizeof(cap->bus_info)); - strscpy(cap->card, vpfe_dev->cfg->card_name, sizeof(cap->card)); - return 0; -} - -static int vpfe_g_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *fmt) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_fmt_vid_cap\n"); - /* Fill in the information about format */ - *fmt = vpfe_dev->fmt; - return 0; -} - -static int vpfe_enum_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_fmtdesc *fmt) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - const struct vpfe_pixel_format *pix_fmt; - u32 pix; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_fmt_vid_cap\n"); - - if (ccdc_dev->hw_ops.enum_pix(&pix, fmt->index) < 0) - return -EINVAL; - - /* Fill in the information about format */ - pix_fmt = vpfe_lookup_pix_format(pix); - if (pix_fmt) { - fmt->pixelformat = pix_fmt->pixelformat; - return 0; - } - return -EINVAL; -} - -static int vpfe_s_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *fmt) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - const struct vpfe_pixel_format *pix_fmts; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_fmt_vid_cap\n"); - - /* If streaming is started, return error */ - if (vpfe_dev->started) { - v4l2_err(&vpfe_dev->v4l2_dev, "Streaming is started\n"); - return -EBUSY; - } - - /* Check for valid frame format */ - pix_fmts = vpfe_check_format(vpfe_dev, &fmt->fmt.pix); - if (!pix_fmts) - return -EINVAL; - - /* store the pixel format in the device object */ - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - /* First detach any IRQ if currently attached */ - vpfe_detach_irq(vpfe_dev); - vpfe_dev->fmt = *fmt; - /* set image capture parameters in the ccdc */ - ret = vpfe_config_ccdc_image_format(vpfe_dev); - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_try_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - const struct vpfe_pixel_format *pix_fmts; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_try_fmt_vid_cap\n"); - - pix_fmts = vpfe_check_format(vpfe_dev, &f->fmt.pix); - if (!pix_fmts) - return -EINVAL; - return 0; -} - -/* - * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a - * given app input index - */ -static int vpfe_get_subdev_input_index(struct vpfe_device *vpfe_dev, - int *subdev_index, - int *subdev_input_index, - int app_input_index) -{ - struct vpfe_config *cfg = vpfe_dev->cfg; - struct vpfe_subdev_info *sdinfo; - int i, j = 0; - - for (i = 0; i < cfg->num_subdevs; i++) { - sdinfo = &cfg->sub_devs[i]; - if (app_input_index < (j + sdinfo->num_inputs)) { - *subdev_index = i; - *subdev_input_index = app_input_index - j; - return 0; - } - j += sdinfo->num_inputs; - } - return -EINVAL; -} - -/* - * vpfe_get_app_input - Get app input index for a given subdev input index - * driver stores the input index of the current sub device and translate it - * when application request the current input - */ -static int vpfe_get_app_input_index(struct vpfe_device *vpfe_dev, - int *app_input_index) -{ - struct vpfe_config *cfg = vpfe_dev->cfg; - struct vpfe_subdev_info *sdinfo; - int i, j = 0; - - for (i = 0; i < cfg->num_subdevs; i++) { - sdinfo = &cfg->sub_devs[i]; - if (!strcmp(sdinfo->name, vpfe_dev->current_subdev->name)) { - if (vpfe_dev->current_input >= sdinfo->num_inputs) - return -1; - *app_input_index = j + vpfe_dev->current_input; - return 0; - } - j += sdinfo->num_inputs; - } - return -EINVAL; -} - -static int vpfe_enum_input(struct file *file, void *priv, - struct v4l2_input *inp) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_subdev_info *sdinfo; - int subdev, index ; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_input\n"); - - if (vpfe_get_subdev_input_index(vpfe_dev, - &subdev, - &index, - inp->index) < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, "input information not found for the subdev\n"); - return -EINVAL; - } - sdinfo = &vpfe_dev->cfg->sub_devs[subdev]; - *inp = sdinfo->inputs[index]; - return 0; -} - -static int vpfe_g_input(struct file *file, void *priv, unsigned int *index) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_input\n"); - - return vpfe_get_app_input_index(vpfe_dev, index); -} - - -static int vpfe_s_input(struct file *file, void *priv, unsigned int index) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct v4l2_subdev *sd; - struct vpfe_subdev_info *sdinfo; - int subdev_index, inp_index; - struct vpfe_route *route; - u32 input, output; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_input\n"); - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - /* - * If streaming is started return device busy - * error - */ - if (vpfe_dev->started) { - v4l2_err(&vpfe_dev->v4l2_dev, "Streaming is on\n"); - ret = -EBUSY; - goto unlock_out; - } - ret = vpfe_get_subdev_input_index(vpfe_dev, - &subdev_index, - &inp_index, - index); - if (ret < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, "invalid input index\n"); - goto unlock_out; - } - - sdinfo = &vpfe_dev->cfg->sub_devs[subdev_index]; - sd = vpfe_dev->sd[subdev_index]; - route = &sdinfo->routes[inp_index]; - if (route && sdinfo->can_route) { - input = route->input; - output = route->output; - } else { - input = 0; - output = 0; - } - - if (sd) - ret = v4l2_subdev_call(sd, video, s_routing, input, output, 0); - - if (ret) { - v4l2_err(&vpfe_dev->v4l2_dev, - "vpfe_doioctl:error in setting input in decoder\n"); - ret = -EINVAL; - goto unlock_out; - } - vpfe_dev->current_subdev = sdinfo; - if (sd) - vpfe_dev->v4l2_dev.ctrl_handler = sd->ctrl_handler; - vpfe_dev->current_input = index; - vpfe_dev->std_index = 0; - - /* set the bus/interface parameter for the sub device in ccdc */ - ret = ccdc_dev->hw_ops.set_hw_if_params(&sdinfo->ccdc_if_params); - if (ret) - goto unlock_out; - - /* set the default image parameters in the device */ - ret = vpfe_config_image_format(vpfe_dev, - vpfe_standards[vpfe_dev->std_index].std_id); -unlock_out: - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_subdev_info *sdinfo; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querystd\n"); - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - sdinfo = vpfe_dev->current_subdev; - if (ret) - return ret; - /* Call querystd function of decoder device */ - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id, - video, querystd, std_id); - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_subdev_info *sdinfo; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_std\n"); - - /* Call decoder driver function to set the standard */ - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - sdinfo = vpfe_dev->current_subdev; - /* If streaming is started, return device busy error */ - if (vpfe_dev->started) { - v4l2_err(&vpfe_dev->v4l2_dev, "streaming is started\n"); - ret = -EBUSY; - goto unlock_out; - } - - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id, - video, s_std, std_id); - if (ret < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, "Failed to set standard\n"); - goto unlock_out; - } - ret = vpfe_config_image_format(vpfe_dev, std_id); - -unlock_out: - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_std\n"); - - *std_id = vpfe_standards[vpfe_dev->std_index].std_id; - return 0; -} -/* - * Videobuf operations - */ -static int vpfe_videobuf_setup(struct videobuf_queue *vq, - unsigned int *count, - unsigned int *size) -{ - struct vpfe_fh *fh = vq->priv_data; - struct vpfe_device *vpfe_dev = fh->vpfe_dev; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_setup\n"); - *size = vpfe_dev->fmt.fmt.pix.sizeimage; - if (vpfe_dev->memory == V4L2_MEMORY_MMAP && - vpfe_dev->fmt.fmt.pix.sizeimage > config_params.device_bufsize) - *size = config_params.device_bufsize; - - if (*count < config_params.min_numbuffers) - *count = config_params.min_numbuffers; - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, - "count=%d, size=%d\n", *count, *size); - return 0; -} - -static int vpfe_videobuf_prepare(struct videobuf_queue *vq, - struct videobuf_buffer *vb, - enum v4l2_field field) -{ - struct vpfe_fh *fh = vq->priv_data; - struct vpfe_device *vpfe_dev = fh->vpfe_dev; - unsigned long addr; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_prepare\n"); - - /* If buffer is not initialized, initialize it */ - if (VIDEOBUF_NEEDS_INIT == vb->state) { - vb->width = vpfe_dev->fmt.fmt.pix.width; - vb->height = vpfe_dev->fmt.fmt.pix.height; - vb->size = vpfe_dev->fmt.fmt.pix.sizeimage; - vb->field = field; - - ret = videobuf_iolock(vq, vb, NULL); - if (ret < 0) - return ret; - - addr = videobuf_to_dma_contig(vb); - /* Make sure user addresses are aligned to 32 bytes */ - if (!ALIGN(addr, 32)) - return -EINVAL; - - vb->state = VIDEOBUF_PREPARED; - } - return 0; -} - -static void vpfe_videobuf_queue(struct videobuf_queue *vq, - struct videobuf_buffer *vb) -{ - /* Get the file handle object and device object */ - struct vpfe_fh *fh = vq->priv_data; - struct vpfe_device *vpfe_dev = fh->vpfe_dev; - unsigned long flags; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_buffer_queue\n"); - - /* add the buffer to the DMA queue */ - spin_lock_irqsave(&vpfe_dev->dma_queue_lock, flags); - list_add_tail(&vb->queue, &vpfe_dev->dma_queue); - spin_unlock_irqrestore(&vpfe_dev->dma_queue_lock, flags); - - /* Change state of the buffer */ - vb->state = VIDEOBUF_QUEUED; -} - -static void vpfe_videobuf_release(struct videobuf_queue *vq, - struct videobuf_buffer *vb) -{ - struct vpfe_fh *fh = vq->priv_data; - struct vpfe_device *vpfe_dev = fh->vpfe_dev; - unsigned long flags; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_videobuf_release\n"); - - /* - * We need to flush the buffer from the dma queue since - * they are de-allocated - */ - spin_lock_irqsave(&vpfe_dev->dma_queue_lock, flags); - INIT_LIST_HEAD(&vpfe_dev->dma_queue); - spin_unlock_irqrestore(&vpfe_dev->dma_queue_lock, flags); - videobuf_dma_contig_free(vq, vb); - vb->state = VIDEOBUF_NEEDS_INIT; -} - -static const struct videobuf_queue_ops vpfe_videobuf_qops = { - .buf_setup = vpfe_videobuf_setup, - .buf_prepare = vpfe_videobuf_prepare, - .buf_queue = vpfe_videobuf_queue, - .buf_release = vpfe_videobuf_release, -}; - -/* - * vpfe_reqbufs. currently support REQBUF only once opening - * the device. - */ -static int vpfe_reqbufs(struct file *file, void *priv, - struct v4l2_requestbuffers *req_buf) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_fh *fh = file->private_data; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_reqbufs\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != req_buf->type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buffer type\n"); - return -EINVAL; - } - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - if (vpfe_dev->io_usrs != 0) { - v4l2_err(&vpfe_dev->v4l2_dev, "Only one IO user allowed\n"); - ret = -EBUSY; - goto unlock_out; - } - - vpfe_dev->memory = req_buf->memory; - videobuf_queue_dma_contig_init(&vpfe_dev->buffer_queue, - &vpfe_videobuf_qops, - vpfe_dev->pdev, - &vpfe_dev->irqlock, - req_buf->type, - vpfe_dev->fmt.fmt.pix.field, - sizeof(struct videobuf_buffer), - fh, NULL); - - fh->io_allowed = 1; - vpfe_dev->io_usrs = 1; - INIT_LIST_HEAD(&vpfe_dev->dma_queue); - ret = videobuf_reqbufs(&vpfe_dev->buffer_queue, req_buf); -unlock_out: - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_querybuf(struct file *file, void *priv, - struct v4l2_buffer *buf) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_querybuf\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf->type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n"); - return -EINVAL; - } - - if (vpfe_dev->memory != V4L2_MEMORY_MMAP) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid memory\n"); - return -EINVAL; - } - /* Call videobuf_querybuf to get information */ - return videobuf_querybuf(&vpfe_dev->buffer_queue, buf); -} - -static int vpfe_qbuf(struct file *file, void *priv, - struct v4l2_buffer *p) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_fh *fh = file->private_data; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_qbuf\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != p->type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n"); - return -EINVAL; - } - - /* - * If this file handle is not allowed to do IO, - * return error - */ - if (!fh->io_allowed) { - v4l2_err(&vpfe_dev->v4l2_dev, "fh->io_allowed\n"); - return -EACCES; - } - return videobuf_qbuf(&vpfe_dev->buffer_queue, p); -} - -static int vpfe_dqbuf(struct file *file, void *priv, - struct v4l2_buffer *buf) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_dqbuf\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf->type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n"); - return -EINVAL; - } - return videobuf_dqbuf(&vpfe_dev->buffer_queue, - buf, file->f_flags & O_NONBLOCK); -} - -/* - * vpfe_calculate_offsets : This function calculates buffers offset - * for top and bottom field - */ -static void vpfe_calculate_offsets(struct vpfe_device *vpfe_dev) -{ - struct v4l2_rect image_win; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_calculate_offsets\n"); - - ccdc_dev->hw_ops.get_image_window(&image_win); - vpfe_dev->field_off = image_win.height * image_win.width; -} - -/* vpfe_start_ccdc_capture: start streaming in ccdc/isif */ -static void vpfe_start_ccdc_capture(struct vpfe_device *vpfe_dev) -{ - ccdc_dev->hw_ops.enable(1); - if (ccdc_dev->hw_ops.enable_out_to_sdram) - ccdc_dev->hw_ops.enable_out_to_sdram(1); - vpfe_dev->started = 1; -} - -/* - * vpfe_streamon. Assume the DMA queue is not empty. - * application is expected to call QBUF before calling - * this ioctl. If not, driver returns error - */ -static int vpfe_streamon(struct file *file, void *priv, - enum v4l2_buf_type buf_type) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_fh *fh = file->private_data; - struct vpfe_subdev_info *sdinfo; - unsigned long addr; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_streamon\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf_type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n"); - return -EINVAL; - } - - /* If file handle is not allowed IO, return error */ - if (!fh->io_allowed) { - v4l2_err(&vpfe_dev->v4l2_dev, "fh->io_allowed\n"); - return -EACCES; - } - - sdinfo = vpfe_dev->current_subdev; - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id, - video, s_stream, 1); - - if (ret && (ret != -ENOIOCTLCMD)) { - v4l2_err(&vpfe_dev->v4l2_dev, "stream on failed in subdev\n"); - return -EINVAL; - } - - /* If buffer queue is empty, return error */ - if (list_empty(&vpfe_dev->buffer_queue.stream)) { - v4l2_err(&vpfe_dev->v4l2_dev, "buffer queue is empty\n"); - return -EIO; - } - - /* Call videobuf_streamon to start streaming * in videobuf */ - ret = videobuf_streamon(&vpfe_dev->buffer_queue); - if (ret) - return ret; - - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - goto streamoff; - /* Get the next frame from the buffer queue */ - vpfe_dev->next_frm = list_entry(vpfe_dev->dma_queue.next, - struct videobuf_buffer, queue); - vpfe_dev->cur_frm = vpfe_dev->next_frm; - /* Remove buffer from the buffer queue */ - list_del(&vpfe_dev->cur_frm->queue); - /* Mark state of the current frame to active */ - vpfe_dev->cur_frm->state = VIDEOBUF_ACTIVE; - /* Initialize field_id and started member */ - vpfe_dev->field_id = 0; - addr = videobuf_to_dma_contig(vpfe_dev->cur_frm); - - /* Calculate field offset */ - vpfe_calculate_offsets(vpfe_dev); - - if (vpfe_attach_irq(vpfe_dev) < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, - "Error in attaching interrupt handle\n"); - ret = -EFAULT; - goto unlock_out; - } - if (ccdc_dev->hw_ops.configure() < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, - "Error in configuring ccdc\n"); - ret = -EINVAL; - goto unlock_out; - } - ccdc_dev->hw_ops.setfbaddr((unsigned long)(addr)); - vpfe_start_ccdc_capture(vpfe_dev); - mutex_unlock(&vpfe_dev->lock); - return ret; -unlock_out: - mutex_unlock(&vpfe_dev->lock); -streamoff: - videobuf_streamoff(&vpfe_dev->buffer_queue); - return ret; -} - -static int vpfe_streamoff(struct file *file, void *priv, - enum v4l2_buf_type buf_type) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct vpfe_fh *fh = file->private_data; - struct vpfe_subdev_info *sdinfo; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_streamoff\n"); - - if (V4L2_BUF_TYPE_VIDEO_CAPTURE != buf_type) { - v4l2_err(&vpfe_dev->v4l2_dev, "Invalid buf type\n"); - return -EINVAL; - } - - /* If io is allowed for this file handle, return error */ - if (!fh->io_allowed) { - v4l2_err(&vpfe_dev->v4l2_dev, "fh->io_allowed\n"); - return -EACCES; - } - - /* If streaming is not started, return error */ - if (!vpfe_dev->started) { - v4l2_err(&vpfe_dev->v4l2_dev, "device started\n"); - return -EINVAL; - } - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - vpfe_stop_ccdc_capture(vpfe_dev); - vpfe_detach_irq(vpfe_dev); - - sdinfo = vpfe_dev->current_subdev; - ret = v4l2_device_call_until_err(&vpfe_dev->v4l2_dev, sdinfo->grp_id, - video, s_stream, 0); - - if (ret && (ret != -ENOIOCTLCMD)) - v4l2_err(&vpfe_dev->v4l2_dev, "stream off failed in subdev\n"); - ret = videobuf_streamoff(&vpfe_dev->buffer_queue); - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -static int vpfe_g_pixelaspect(struct file *file, void *priv, - int type, struct v4l2_fract *f) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_pixelaspect\n"); - - if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) - return -EINVAL; - /* If std_index is invalid, then just return (== 1:1 aspect) */ - if (vpfe_dev->std_index >= ARRAY_SIZE(vpfe_standards)) - return 0; - - *f = vpfe_standards[vpfe_dev->std_index].pixelaspect; - return 0; -} - -static int vpfe_g_selection(struct file *file, void *priv, - struct v4l2_selection *sel) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_selection\n"); - - if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) - return -EINVAL; - - switch (sel->target) { - case V4L2_SEL_TGT_CROP: - sel->r = vpfe_dev->crop; - break; - case V4L2_SEL_TGT_CROP_DEFAULT: - case V4L2_SEL_TGT_CROP_BOUNDS: - sel->r.width = vpfe_standards[vpfe_dev->std_index].width; - sel->r.height = vpfe_standards[vpfe_dev->std_index].height; - break; - default: - return -EINVAL; - } - return 0; -} - -static int vpfe_s_selection(struct file *file, void *priv, - struct v4l2_selection *sel) -{ - struct vpfe_device *vpfe_dev = video_drvdata(file); - struct v4l2_rect rect = sel->r; - int ret; - - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_selection\n"); - - if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || - sel->target != V4L2_SEL_TGT_CROP) - return -EINVAL; - - if (vpfe_dev->started) { - /* make sure streaming is not started */ - v4l2_err(&vpfe_dev->v4l2_dev, - "Cannot change crop when streaming is ON\n"); - return -EBUSY; - } - - ret = mutex_lock_interruptible(&vpfe_dev->lock); - if (ret) - return ret; - - if (rect.top < 0 || rect.left < 0) { - v4l2_err(&vpfe_dev->v4l2_dev, - "doesn't support negative values for top & left\n"); - ret = -EINVAL; - goto unlock_out; - } - - /* adjust the width to 16 pixel boundary */ - rect.width = ((rect.width + 15) & ~0xf); - - /* make sure parameters are valid */ - if ((rect.left + rect.width > - vpfe_dev->std_info.active_pixels) || - (rect.top + rect.height > - vpfe_dev->std_info.active_lines)) { - v4l2_err(&vpfe_dev->v4l2_dev, "Error in S_SELECTION params\n"); - ret = -EINVAL; - goto unlock_out; - } - ccdc_dev->hw_ops.set_image_window(&rect); - vpfe_dev->fmt.fmt.pix.width = rect.width; - vpfe_dev->fmt.fmt.pix.height = rect.height; - vpfe_dev->fmt.fmt.pix.bytesperline = - ccdc_dev->hw_ops.get_line_length(); - vpfe_dev->fmt.fmt.pix.sizeimage = - vpfe_dev->fmt.fmt.pix.bytesperline * - vpfe_dev->fmt.fmt.pix.height; - vpfe_dev->crop = rect; - sel->r = rect; -unlock_out: - mutex_unlock(&vpfe_dev->lock); - return ret; -} - -/* vpfe capture ioctl operations */ -static const struct v4l2_ioctl_ops vpfe_ioctl_ops = { - .vidioc_querycap = vpfe_querycap, - .vidioc_g_fmt_vid_cap = vpfe_g_fmt_vid_cap, - .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt_vid_cap, - .vidioc_s_fmt_vid_cap = vpfe_s_fmt_vid_cap, - .vidioc_try_fmt_vid_cap = vpfe_try_fmt_vid_cap, - .vidioc_enum_input = vpfe_enum_input, - .vidioc_g_input = vpfe_g_input, - .vidioc_s_input = vpfe_s_input, - .vidioc_querystd = vpfe_querystd, - .vidioc_s_std = vpfe_s_std, - .vidioc_g_std = vpfe_g_std, - .vidioc_reqbufs = vpfe_reqbufs, - .vidioc_querybuf = vpfe_querybuf, - .vidioc_qbuf = vpfe_qbuf, - .vidioc_dqbuf = vpfe_dqbuf, - .vidioc_streamon = vpfe_streamon, - .vidioc_streamoff = vpfe_streamoff, - .vidioc_g_pixelaspect = vpfe_g_pixelaspect, - .vidioc_g_selection = vpfe_g_selection, - .vidioc_s_selection = vpfe_s_selection, -}; - -static struct vpfe_device *vpfe_initialize(void) -{ - struct vpfe_device *vpfe_dev; - - /* Default number of buffers should be 3 */ - if ((numbuffers > 0) && - (numbuffers < config_params.min_numbuffers)) - numbuffers = config_params.min_numbuffers; - - /* - * Set buffer size to min buffers size if invalid buffer size is - * given - */ - if (bufsize < config_params.min_bufsize) - bufsize = config_params.min_bufsize; - - config_params.numbuffers = numbuffers; - - if (numbuffers) - config_params.device_bufsize = bufsize; - - /* Allocate memory for device objects */ - vpfe_dev = kzalloc(sizeof(*vpfe_dev), GFP_KERNEL); - - return vpfe_dev; -} - -/* - * vpfe_probe : This function creates device entries by register - * itself to the V4L2 driver and initializes fields of each - * device objects - */ -static int vpfe_probe(struct platform_device *pdev) -{ - struct vpfe_subdev_info *sdinfo; - struct vpfe_config *vpfe_cfg; - struct resource *res1; - struct vpfe_device *vpfe_dev; - struct i2c_adapter *i2c_adap; - struct video_device *vfd; - int ret, i, j; - int num_subdevs = 0; - - /* Get the pointer to the device object */ - vpfe_dev = vpfe_initialize(); - - if (!vpfe_dev) { - v4l2_err(pdev->dev.driver, - "Failed to allocate memory for vpfe_dev\n"); - return -ENOMEM; - } - - vpfe_dev->pdev = &pdev->dev; - - if (!pdev->dev.platform_data) { - v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n"); - ret = -ENODEV; - goto probe_free_dev_mem; - } - - vpfe_cfg = pdev->dev.platform_data; - vpfe_dev->cfg = vpfe_cfg; - if (!vpfe_cfg->ccdc || !vpfe_cfg->card_name || !vpfe_cfg->sub_devs) { - v4l2_err(pdev->dev.driver, "null ptr in vpfe_cfg\n"); - ret = -ENOENT; - goto probe_free_dev_mem; - } - - /* Allocate memory for ccdc configuration */ - ccdc_cfg = kmalloc(sizeof(*ccdc_cfg), GFP_KERNEL); - if (!ccdc_cfg) { - ret = -ENOMEM; - goto probe_free_dev_mem; - } - - mutex_lock(&ccdc_lock); - - strscpy(ccdc_cfg->name, vpfe_cfg->ccdc, sizeof(ccdc_cfg->name)); - /* Get VINT0 irq resource */ - res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res1) { - v4l2_err(pdev->dev.driver, - "Unable to get interrupt for VINT0\n"); - ret = -ENODEV; - goto probe_free_ccdc_cfg_mem; - } - vpfe_dev->ccdc_irq0 = res1->start; - - /* Get VINT1 irq resource */ - res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1); - if (!res1) { - v4l2_err(pdev->dev.driver, - "Unable to get interrupt for VINT1\n"); - ret = -ENODEV; - goto probe_free_ccdc_cfg_mem; - } - vpfe_dev->ccdc_irq1 = res1->start; - - ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, 0, - "vpfe_capture0", vpfe_dev); - - if (0 != ret) { - v4l2_err(pdev->dev.driver, "Unable to request interrupt\n"); - goto probe_free_ccdc_cfg_mem; - } - - vfd = &vpfe_dev->video_dev; - /* Initialize field of video device */ - vfd->release = video_device_release_empty; - vfd->fops = &vpfe_fops; - vfd->ioctl_ops = &vpfe_ioctl_ops; - vfd->tvnorms = 0; - vfd->v4l2_dev = &vpfe_dev->v4l2_dev; - vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; - snprintf(vfd->name, sizeof(vfd->name), - "%s_V%d.%d.%d", - CAPTURE_DRV_NAME, - (VPFE_CAPTURE_VERSION_CODE >> 16) & 0xff, - (VPFE_CAPTURE_VERSION_CODE >> 8) & 0xff, - (VPFE_CAPTURE_VERSION_CODE) & 0xff); - - ret = v4l2_device_register(&pdev->dev, &vpfe_dev->v4l2_dev); - if (ret) { - v4l2_err(pdev->dev.driver, - "Unable to register v4l2 device.\n"); - goto probe_out_release_irq; - } - v4l2_info(&vpfe_dev->v4l2_dev, "v4l2 device registered\n"); - spin_lock_init(&vpfe_dev->irqlock); - spin_lock_init(&vpfe_dev->dma_queue_lock); - mutex_init(&vpfe_dev->lock); - - /* Initialize field of the device objects */ - vpfe_dev->numbuffers = config_params.numbuffers; - - /* register video device */ - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, - "trying to register vpfe device.\n"); - v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, - "video_dev=%p\n", &vpfe_dev->video_dev); - vpfe_dev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - ret = video_register_device(&vpfe_dev->video_dev, - VFL_TYPE_VIDEO, -1); - - if (ret) { - v4l2_err(pdev->dev.driver, - "Unable to register video device.\n"); - goto probe_out_v4l2_unregister; - } - - v4l2_info(&vpfe_dev->v4l2_dev, "video device registered\n"); - /* set the driver data in platform device */ - platform_set_drvdata(pdev, vpfe_dev); - /* set driver private data */ - video_set_drvdata(&vpfe_dev->video_dev, vpfe_dev); - i2c_adap = i2c_get_adapter(vpfe_cfg->i2c_adapter_id); - num_subdevs = vpfe_cfg->num_subdevs; - vpfe_dev->sd = kmalloc_array(num_subdevs, - sizeof(*vpfe_dev->sd), - GFP_KERNEL); - if (!vpfe_dev->sd) { - ret = -ENOMEM; - goto probe_out_video_unregister; - } - - for (i = 0; i < num_subdevs; i++) { - struct v4l2_input *inps; - - sdinfo = &vpfe_cfg->sub_devs[i]; - - /* Load up the subdevice */ - vpfe_dev->sd[i] = - v4l2_i2c_new_subdev_board(&vpfe_dev->v4l2_dev, - i2c_adap, - &sdinfo->board_info, - NULL); - if (vpfe_dev->sd[i]) { - v4l2_info(&vpfe_dev->v4l2_dev, - "v4l2 sub device %s registered\n", - sdinfo->name); - vpfe_dev->sd[i]->grp_id = sdinfo->grp_id; - /* update tvnorms from the sub devices */ - for (j = 0; j < sdinfo->num_inputs; j++) { - inps = &sdinfo->inputs[j]; - vfd->tvnorms |= inps->std; - } - } else { - v4l2_info(&vpfe_dev->v4l2_dev, - "v4l2 sub device %s register fails\n", - sdinfo->name); - ret = -ENXIO; - goto probe_sd_out; - } - } - - /* set first sub device as current one */ - vpfe_dev->current_subdev = &vpfe_cfg->sub_devs[0]; - vpfe_dev->v4l2_dev.ctrl_handler = vpfe_dev->sd[0]->ctrl_handler; - - /* We have at least one sub device to work with */ - mutex_unlock(&ccdc_lock); - return 0; - -probe_sd_out: - kfree(vpfe_dev->sd); -probe_out_video_unregister: - video_unregister_device(&vpfe_dev->video_dev); -probe_out_v4l2_unregister: - v4l2_device_unregister(&vpfe_dev->v4l2_dev); -probe_out_release_irq: - free_irq(vpfe_dev->ccdc_irq0, vpfe_dev); -probe_free_ccdc_cfg_mem: - kfree(ccdc_cfg); - mutex_unlock(&ccdc_lock); -probe_free_dev_mem: - kfree(vpfe_dev); - return ret; -} - -/* - * vpfe_remove : It un-register device from V4L2 driver - */ -static int vpfe_remove(struct platform_device *pdev) -{ - struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev); - - v4l2_info(pdev->dev.driver, "vpfe_remove\n"); - - free_irq(vpfe_dev->ccdc_irq0, vpfe_dev); - kfree(vpfe_dev->sd); - v4l2_device_unregister(&vpfe_dev->v4l2_dev); - video_unregister_device(&vpfe_dev->video_dev); - kfree(vpfe_dev); - kfree(ccdc_cfg); - return 0; -} - -static int vpfe_suspend(struct device *dev) -{ - return 0; -} - -static int vpfe_resume(struct device *dev) -{ - return 0; -} - -static const struct dev_pm_ops vpfe_dev_pm_ops = { - .suspend = vpfe_suspend, - .resume = vpfe_resume, -}; - -static struct platform_driver vpfe_driver = { - .driver = { - .name = CAPTURE_DRV_NAME, - .pm = &vpfe_dev_pm_ops, - }, - .probe = vpfe_probe, - .remove = vpfe_remove, -}; - -module_platform_driver(vpfe_driver); diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index c55b947f3cdb..ed0672d2d0ef 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -242,23 +242,23 @@ config SERIAL_SAMSUNG select SERIAL_CORE help Support for the on-chip UARTs on the Samsung - S3C24xx/S3C64xx/S5Pv210/Exynos and Apple M1 SoCs, providing + S3C64xx/S5Pv210/Exynos and Apple M1 SoCs, providing /dev/ttySAC0, 1 and 2 (note, some machines may not provide all of these ports, depending on how the serial port pins are configured. + Choose Y/M here only if you build for such SoC. config SERIAL_SAMSUNG_UARTS_4 bool depends on SERIAL_SAMSUNG - default y if !(CPU_S3C2410 || CPU_S3C2412 || CPU_S3C2440 || CPU_S3C2442) + default y help Internal node for the common case of 4 Samsung compatible UARTs config SERIAL_SAMSUNG_UARTS int depends on SERIAL_SAMSUNG - default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416 - default 3 + default 4 help Select the number of available UART ports for the Samsung S3C serial driver diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 0fce856434da..2a7520ad3abd 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -152,10 +152,6 @@ struct s3c24xx_uart_port { const struct s3c2410_uartcfg *cfg; struct s3c24xx_uart_dma *dma; - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - struct notifier_block freq_transition; -#endif }; static void s3c24xx_serial_tx_chars(struct s3c24xx_uart_port *ourport); @@ -1855,93 +1851,6 @@ static void s3c24xx_serial_resetport(struct uart_port *port, udelay(1); } -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - -static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct s3c24xx_uart_port *port; - struct uart_port *uport; - - port = container_of(nb, struct s3c24xx_uart_port, freq_transition); - uport = &port->port; - - /* check to see if port is enabled */ - - if (port->pm_level != 0) - return 0; - - /* try and work out if the baudrate is changing, we can detect - * a change in rate, but we do not have support for detecting - * a disturbance in the clock-rate over the change. - */ - - if (IS_ERR(port->baudclk)) - goto exit; - - if (port->baudclk_rate == clk_get_rate(port->baudclk)) - goto exit; - - if (val == CPUFREQ_PRECHANGE) { - /* we should really shut the port down whilst the - * frequency change is in progress. - */ - - } else if (val == CPUFREQ_POSTCHANGE) { - struct ktermios *termios; - struct tty_struct *tty; - - if (uport->state == NULL) - goto exit; - - tty = uport->state->port.tty; - - if (tty == NULL) - goto exit; - - termios = &tty->termios; - - if (termios == NULL) { - dev_warn(uport->dev, "%s: no termios?\n", __func__); - goto exit; - } - - s3c24xx_serial_set_termios(uport, termios, NULL); - } - -exit: - return 0; -} - -static inline int -s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) -{ - port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition; - - return cpufreq_register_notifier(&port->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void -s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) -{ - cpufreq_unregister_notifier(&port->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -static inline int -s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) -{ - return 0; -} - -static inline void -s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) -{ -} -#endif - static int s3c24xx_serial_enable_baudclk(struct s3c24xx_uart_port *ourport) { struct device *dev = ourport->port.dev; @@ -2233,10 +2142,6 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) if (!IS_ERR(ourport->baudclk)) clk_disable_unprepare(ourport->baudclk); - ret = s3c24xx_serial_cpufreq_register(ourport); - if (ret < 0) - dev_err(&pdev->dev, "failed to add cpufreq notifier\n"); - probe_index++; return 0; @@ -2247,7 +2152,6 @@ static int s3c24xx_serial_remove(struct platform_device *dev) struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); if (port) { - s3c24xx_serial_cpufreq_deregister(to_ourport(port)); uart_remove_one_port(&s3c24xx_uart_drv, port); } @@ -2585,94 +2489,6 @@ static struct console s3c24xx_serial_console = { }; #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ -#ifdef CONFIG_CPU_S3C2410 -static const struct s3c24xx_serial_drv_data s3c2410_serial_drv_data = { - .info = { - .name = "Samsung S3C2410 UART", - .type = TYPE_S3C24XX, - .port_type = PORT_S3C2410, - .fifosize = 16, - .rx_fifomask = S3C2410_UFSTAT_RXMASK, - .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, - .rx_fifofull = S3C2410_UFSTAT_RXFULL, - .tx_fifofull = S3C2410_UFSTAT_TXFULL, - .tx_fifomask = S3C2410_UFSTAT_TXMASK, - .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, - .def_clk_sel = S3C2410_UCON_CLKSEL0, - .num_clks = 2, - .clksel_mask = S3C2410_UCON_CLKMASK, - .clksel_shift = S3C2410_UCON_CLKSHIFT, - }, - .def_cfg = { - .ucon = S3C2410_UCON_DEFAULT, - .ufcon = S3C2410_UFCON_DEFAULT, - }, -}; -#define S3C2410_SERIAL_DRV_DATA (&s3c2410_serial_drv_data) -#else -#define S3C2410_SERIAL_DRV_DATA NULL -#endif - -#ifdef CONFIG_CPU_S3C2412 -static const struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = { - .info = { - .name = "Samsung S3C2412 UART", - .type = TYPE_S3C24XX, - .port_type = PORT_S3C2412, - .fifosize = 64, - .has_divslot = 1, - .rx_fifomask = S3C2440_UFSTAT_RXMASK, - .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, - .rx_fifofull = S3C2440_UFSTAT_RXFULL, - .tx_fifofull = S3C2440_UFSTAT_TXFULL, - .tx_fifomask = S3C2440_UFSTAT_TXMASK, - .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, - .def_clk_sel = S3C2410_UCON_CLKSEL2, - .num_clks = 4, - .clksel_mask = S3C2412_UCON_CLKMASK, - .clksel_shift = S3C2412_UCON_CLKSHIFT, - }, - .def_cfg = { - .ucon = S3C2410_UCON_DEFAULT, - .ufcon = S3C2410_UFCON_DEFAULT, - }, -}; -#define S3C2412_SERIAL_DRV_DATA (&s3c2412_serial_drv_data) -#else -#define S3C2412_SERIAL_DRV_DATA NULL -#endif - -#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \ - defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2442) -static const struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = { - .info = { - .name = "Samsung S3C2440 UART", - .type = TYPE_S3C24XX, - .port_type = PORT_S3C2440, - .fifosize = 64, - .has_divslot = 1, - .rx_fifomask = S3C2440_UFSTAT_RXMASK, - .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, - .rx_fifofull = S3C2440_UFSTAT_RXFULL, - .tx_fifofull = S3C2440_UFSTAT_TXFULL, - .tx_fifomask = S3C2440_UFSTAT_TXMASK, - .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, - .def_clk_sel = S3C2410_UCON_CLKSEL2, - .num_clks = 4, - .clksel_mask = S3C2412_UCON_CLKMASK, - .clksel_shift = S3C2412_UCON_CLKSHIFT, - .ucon_mask = S3C2440_UCON0_DIVMASK, - }, - .def_cfg = { - .ucon = S3C2410_UCON_DEFAULT, - .ufcon = S3C2410_UFCON_DEFAULT, - }, -}; -#define S3C2440_SERIAL_DRV_DATA (&s3c2440_serial_drv_data) -#else -#define S3C2440_SERIAL_DRV_DATA NULL -#endif - #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) static const struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = { .info = { @@ -2841,15 +2657,6 @@ static const struct s3c24xx_serial_drv_data artpec8_serial_drv_data = { static const struct platform_device_id s3c24xx_serial_driver_ids[] = { { - .name = "s3c2410-uart", - .driver_data = (kernel_ulong_t)S3C2410_SERIAL_DRV_DATA, - }, { - .name = "s3c2412-uart", - .driver_data = (kernel_ulong_t)S3C2412_SERIAL_DRV_DATA, - }, { - .name = "s3c2440-uart", - .driver_data = (kernel_ulong_t)S3C2440_SERIAL_DRV_DATA, - }, { .name = "s3c6400-uart", .driver_data = (kernel_ulong_t)S3C6400_SERIAL_DRV_DATA, }, { @@ -2877,12 +2684,6 @@ MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids); #ifdef CONFIG_OF static const struct of_device_id s3c24xx_uart_dt_match[] = { - { .compatible = "samsung,s3c2410-uart", - .data = S3C2410_SERIAL_DRV_DATA }, - { .compatible = "samsung,s3c2412-uart", - .data = S3C2412_SERIAL_DRV_DATA }, - { .compatible = "samsung,s3c2440-uart", - .data = S3C2440_SERIAL_DRV_DATA }, { .compatible = "samsung,s3c6400-uart", .data = S3C6400_SERIAL_DRV_DATA }, { .compatible = "samsung,s5pv210-uart", diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig index b3006d8b04ab..511ab57cdc81 100644 --- a/drivers/usb/gadget/udc/Kconfig +++ b/drivers/usb/gadget/udc/Kconfig @@ -118,7 +118,6 @@ config USB_GR_UDC config USB_OMAP tristate "OMAP USB Device Controller" depends on ARCH_OMAP1 - depends on ISP1301_OMAP || !(MACH_OMAP_H2 || MACH_OMAP_H3) help Many Texas Instruments OMAP processors have flexible full speed USB device controllers, with support for up to 30 @@ -207,31 +206,6 @@ config USB_PXA27X dynamically linked module called "pxa27x_udc" and force all gadget drivers to also be dynamically linked. -config USB_S3C2410 - tristate "S3C2410 USB Device Controller" - depends on ARCH_S3C24XX - help - Samsung's S3C2410 is an ARM-4 processor with an integrated - full speed USB 1.1 device controller. It has 4 configurable - endpoints, as well as endpoint zero (for control transfers). - - This driver has been tested on the S3C2410, S3C2412, and - S3C2440 processors. - -config USB_S3C2410_DEBUG - bool "S3C2410 udc debug messages" - depends on USB_S3C2410 - -config USB_S3C_HSUDC - tristate "S3C2416, S3C2443 and S3C2450 USB Device Controller" - depends on ARCH_S3C24XX - help - Samsung's S3C2416, S3C2443 and S3C2450 is an ARM9 based SoC - integrated with dual speed USB 2.0 device controller. It has - 8 endpoints, as well as endpoint zero. - - This driver has been tested on S3C2416 and S3C2450 processors. - config USB_MV_UDC tristate "Marvell USB2.0 Device Controller" depends on HAS_DMA diff --git a/drivers/usb/gadget/udc/Makefile b/drivers/usb/gadget/udc/Makefile index 39daf36a2baa..239ea22bdfd9 100644 --- a/drivers/usb/gadget/udc/Makefile +++ b/drivers/usb/gadget/udc/Makefile @@ -17,7 +17,6 @@ obj-$(CONFIG_USB_PXA25X) += pxa25x_udc.o obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o obj-$(CONFIG_USB_GOKU) += goku_udc.o obj-$(CONFIG_USB_OMAP) += omap_udc.o -obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o obj-$(CONFIG_USB_AT91) += at91_udc.o obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_BCM63XX_UDC) += bcm63xx_udc.o @@ -28,7 +27,6 @@ obj-$(CONFIG_USB_M66592) += m66592-udc.o obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o obj-$(CONFIG_USB_RENESAS_USB3) += renesas_usb3.o obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o -obj-$(CONFIG_USB_S3C_HSUDC) += s3c-hsudc.o obj-$(CONFIG_USB_LPC32XX) += lpc32xx_udc.o obj-$(CONFIG_USB_EG20T) += pch_udc.o obj-$(CONFIG_USB_MV_UDC) += mv_udc.o diff --git a/drivers/usb/gadget/udc/omap_udc.c b/drivers/usb/gadget/udc/omap_udc.c index f660ebfa1379..2d87c7cd5f7e 100644 --- a/drivers/usb/gadget/udc/omap_udc.c +++ b/drivers/usb/gadget/udc/omap_udc.c @@ -2036,12 +2036,7 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev) static inline int machine_without_vbus_sense(void) { - return machine_is_omap_innovator() - || machine_is_omap_osk() - || machine_is_omap_palmte() - || machine_is_sx1() - /* No known omap7xx boards with vbus sense */ - || cpu_is_omap7xx(); + return machine_is_omap_osk() || machine_is_sx1(); } static int omap_udc_start(struct usb_gadget *g, @@ -2758,9 +2753,6 @@ static int omap_udc_probe(struct platform_device *pdev) struct clk *dc_clk = NULL; struct clk *hhc_clk = NULL; - if (cpu_is_omap7xx()) - use_dma = 0; - /* NOTE: "knows" the order of the resources! */ if (!request_mem_region(pdev->resource[0].start, resource_size(&pdev->resource[0]), @@ -2779,16 +2771,6 @@ static int omap_udc_probe(struct platform_device *pdev) udelay(100); } - if (cpu_is_omap7xx()) { - dc_clk = clk_get(&pdev->dev, "usb_dc_ck"); - hhc_clk = clk_get(&pdev->dev, "l3_ocpi_ck"); - BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk)); - /* can't use omap_udc_enable_clock yet */ - clk_prepare_enable(dc_clk); - clk_prepare_enable(hhc_clk); - udelay(100); - } - INFO("OMAP UDC rev %d.%d%s\n", omap_readw(UDC_REV) >> 4, omap_readw(UDC_REV) & 0xf, config->otg ? ", Mini-AB" : ""); @@ -2913,7 +2895,7 @@ bad_on_1710: goto cleanup1; } #endif - if (cpu_is_omap16xx() || cpu_is_omap7xx()) { + if (cpu_is_omap16xx()) { udc->dc_clk = dc_clk; udc->hhc_clk = hhc_clk; clk_disable(hhc_clk); @@ -2932,7 +2914,7 @@ cleanup0: if (!IS_ERR_OR_NULL(xceiv)) usb_put_phy(xceiv); - if (cpu_is_omap16xx() || cpu_is_omap7xx()) { + if (cpu_is_omap16xx()) { clk_disable_unprepare(hhc_clk); clk_disable_unprepare(dc_clk); clk_put(hhc_clk); diff --git a/drivers/usb/gadget/udc/pxa25x_udc.c b/drivers/usb/gadget/udc/pxa25x_udc.c index c593fc383481..e19b84a46a1e 100644 --- a/drivers/usb/gadget/udc/pxa25x_udc.c +++ b/drivers/usb/gadget/udc/pxa25x_udc.c @@ -1561,40 +1561,6 @@ static int pxa25x_udc_stop(struct usb_gadget*g) /*-------------------------------------------------------------------------*/ -#ifdef CONFIG_ARCH_LUBBOCK - -/* Lubbock has separate connect and disconnect irqs. More typical designs - * use one GPIO as the VBUS IRQ, and another to control the D+ pullup. - */ - -static irqreturn_t -lubbock_vbus_irq(int irq, void *_dev) -{ - struct pxa25x_udc *dev = _dev; - int vbus; - - dev->stats.irqs++; - if (irq == dev->usb_irq) { - vbus = 1; - disable_irq(dev->usb_irq); - enable_irq(dev->usb_disc_irq); - } else if (irq == dev->usb_disc_irq) { - vbus = 0; - disable_irq(dev->usb_disc_irq); - enable_irq(dev->usb_irq); - } else { - return IRQ_NONE; - } - - pxa25x_udc_vbus_session(&dev->gadget, vbus); - return IRQ_HANDLED; -} - -#endif - - -/*-------------------------------------------------------------------------*/ - static inline void clear_ep_state (struct pxa25x_udc *dev) { unsigned i; @@ -2413,34 +2379,6 @@ static int pxa25x_udc_probe(struct platform_device *pdev) } dev->got_irq = 1; -#ifdef CONFIG_ARCH_LUBBOCK - if (machine_is_lubbock()) { - dev->usb_irq = platform_get_irq(pdev, 1); - if (dev->usb_irq < 0) - return dev->usb_irq; - - dev->usb_disc_irq = platform_get_irq(pdev, 2); - if (dev->usb_disc_irq < 0) - return dev->usb_disc_irq; - - retval = devm_request_irq(&pdev->dev, dev->usb_disc_irq, - lubbock_vbus_irq, 0, driver_name, - dev); - if (retval != 0) { - pr_err("%s: can't get irq %i, err %d\n", - driver_name, dev->usb_disc_irq, retval); - goto err; - } - retval = devm_request_irq(&pdev->dev, dev->usb_irq, - lubbock_vbus_irq, 0, driver_name, - dev); - if (retval != 0) { - pr_err("%s: can't get irq %i, err %d\n", - driver_name, dev->usb_irq, retval); - goto err; - } - } else -#endif create_debug_files(dev); retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget); diff --git a/drivers/usb/gadget/udc/s3c-hsudc.c b/drivers/usb/gadget/udc/s3c-hsudc.c deleted file mode 100644 index 4b7eb7701470..000000000000 --- a/drivers/usb/gadget/udc/s3c-hsudc.c +++ /dev/null @@ -1,1319 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* linux/drivers/usb/gadget/s3c-hsudc.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S3C24XX USB 2.0 High-speed USB controller gadget driver - * - * The S3C24XX USB 2.0 high-speed USB controller supports upto 9 endpoints. - * Each endpoint can be configured as either in or out endpoint. Endpoints - * can be configured for Bulk or Interrupt transfer mode. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/usb/ch9.h> -#include <linux/usb/gadget.h> -#include <linux/usb/otg.h> -#include <linux/prefetch.h> -#include <linux/platform_data/s3c-hsudc.h> -#include <linux/regulator/consumer.h> -#include <linux/pm_runtime.h> - -#define S3C_HSUDC_REG(x) (x) - -/* Non-Indexed Registers */ -#define S3C_IR S3C_HSUDC_REG(0x00) /* Index Register */ -#define S3C_EIR S3C_HSUDC_REG(0x04) /* EP Intr Status */ -#define S3C_EIR_EP0 (1<<0) -#define S3C_EIER S3C_HSUDC_REG(0x08) /* EP Intr Enable */ -#define S3C_FAR S3C_HSUDC_REG(0x0c) /* Gadget Address */ -#define S3C_FNR S3C_HSUDC_REG(0x10) /* Frame Number */ -#define S3C_EDR S3C_HSUDC_REG(0x14) /* EP Direction */ -#define S3C_TR S3C_HSUDC_REG(0x18) /* Test Register */ -#define S3C_SSR S3C_HSUDC_REG(0x1c) /* System Status */ -#define S3C_SSR_DTZIEN_EN (0xff8f) -#define S3C_SSR_ERR (0xff80) -#define S3C_SSR_VBUSON (1 << 8) -#define S3C_SSR_HSP (1 << 4) -#define S3C_SSR_SDE (1 << 3) -#define S3C_SSR_RESUME (1 << 2) -#define S3C_SSR_SUSPEND (1 << 1) -#define S3C_SSR_RESET (1 << 0) -#define S3C_SCR S3C_HSUDC_REG(0x20) /* System Control */ -#define S3C_SCR_DTZIEN_EN (1 << 14) -#define S3C_SCR_RRD_EN (1 << 5) -#define S3C_SCR_SUS_EN (1 << 1) -#define S3C_SCR_RST_EN (1 << 0) -#define S3C_EP0SR S3C_HSUDC_REG(0x24) /* EP0 Status */ -#define S3C_EP0SR_EP0_LWO (1 << 6) -#define S3C_EP0SR_STALL (1 << 4) -#define S3C_EP0SR_TX_SUCCESS (1 << 1) -#define S3C_EP0SR_RX_SUCCESS (1 << 0) -#define S3C_EP0CR S3C_HSUDC_REG(0x28) /* EP0 Control */ -#define S3C_BR(_x) S3C_HSUDC_REG(0x60 + (_x * 4)) - -/* Indexed Registers */ -#define S3C_ESR S3C_HSUDC_REG(0x2c) /* EPn Status */ -#define S3C_ESR_FLUSH (1 << 6) -#define S3C_ESR_STALL (1 << 5) -#define S3C_ESR_LWO (1 << 4) -#define S3C_ESR_PSIF_ONE (1 << 2) -#define S3C_ESR_PSIF_TWO (2 << 2) -#define S3C_ESR_TX_SUCCESS (1 << 1) -#define S3C_ESR_RX_SUCCESS (1 << 0) -#define S3C_ECR S3C_HSUDC_REG(0x30) /* EPn Control */ -#define S3C_ECR_DUEN (1 << 7) -#define S3C_ECR_FLUSH (1 << 6) -#define S3C_ECR_STALL (1 << 1) -#define S3C_ECR_IEMS (1 << 0) -#define S3C_BRCR S3C_HSUDC_REG(0x34) /* Read Count */ -#define S3C_BWCR S3C_HSUDC_REG(0x38) /* Write Count */ -#define S3C_MPR S3C_HSUDC_REG(0x3c) /* Max Pkt Size */ - -#define WAIT_FOR_SETUP (0) -#define DATA_STATE_XMIT (1) -#define DATA_STATE_RECV (2) - -static const char * const s3c_hsudc_supply_names[] = { - "vdda", /* analog phy supply, 3.3V */ - "vddi", /* digital phy supply, 1.2V */ - "vddosc", /* oscillator supply, 1.8V - 3.3V */ -}; - -/** - * struct s3c_hsudc_ep - Endpoint representation used by driver. - * @ep: USB gadget layer representation of device endpoint. - * @name: Endpoint name (as required by ep autoconfiguration). - * @dev: Reference to the device controller to which this EP belongs. - * @desc: Endpoint descriptor obtained from the gadget driver. - * @queue: Transfer request queue for the endpoint. - * @stopped: Maintains state of endpoint, set if EP is halted. - * @bEndpointAddress: EP address (including direction bit). - * @fifo: Base address of EP FIFO. - */ -struct s3c_hsudc_ep { - struct usb_ep ep; - char name[20]; - struct s3c_hsudc *dev; - struct list_head queue; - u8 stopped; - u8 wedge; - u8 bEndpointAddress; - void __iomem *fifo; -}; - -/** - * struct s3c_hsudc_req - Driver encapsulation of USB gadget transfer request. - * @req: Reference to USB gadget transfer request. - * @queue: Used for inserting this request to the endpoint request queue. - */ -struct s3c_hsudc_req { - struct usb_request req; - struct list_head queue; -}; - -/** - * struct s3c_hsudc - Driver's abstraction of the device controller. - * @gadget: Instance of usb_gadget which is referenced by gadget driver. - * @driver: Reference to currently active gadget driver. - * @dev: The device reference used by probe function. - * @lock: Lock to synchronize the usage of Endpoints (EP's are indexed). - * @regs: Remapped base address of controller's register space. - * irq: IRQ number used by the controller. - * uclk: Reference to the controller clock. - * ep0state: Current state of EP0. - * ep: List of endpoints supported by the controller. - */ -struct s3c_hsudc { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - struct device *dev; - struct s3c24xx_hsudc_platdata *pd; - struct usb_phy *transceiver; - struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsudc_supply_names)]; - spinlock_t lock; - void __iomem *regs; - int irq; - struct clk *uclk; - int ep0state; - struct s3c_hsudc_ep ep[]; -}; - -#define ep_maxpacket(_ep) ((_ep)->ep.maxpacket) -#define ep_is_in(_ep) ((_ep)->bEndpointAddress & USB_DIR_IN) -#define ep_index(_ep) ((_ep)->bEndpointAddress & \ - USB_ENDPOINT_NUMBER_MASK) - -static const char driver_name[] = "s3c-udc"; -static const char ep0name[] = "ep0-control"; - -static inline struct s3c_hsudc_req *our_req(struct usb_request *req) -{ - return container_of(req, struct s3c_hsudc_req, req); -} - -static inline struct s3c_hsudc_ep *our_ep(struct usb_ep *ep) -{ - return container_of(ep, struct s3c_hsudc_ep, ep); -} - -static inline struct s3c_hsudc *to_hsudc(struct usb_gadget *gadget) -{ - return container_of(gadget, struct s3c_hsudc, gadget); -} - -static inline void set_index(struct s3c_hsudc *hsudc, int ep_addr) -{ - ep_addr &= USB_ENDPOINT_NUMBER_MASK; - writel(ep_addr, hsudc->regs + S3C_IR); -} - -static inline void __orr32(void __iomem *ptr, u32 val) -{ - writel(readl(ptr) | val, ptr); -} - -/** - * s3c_hsudc_complete_request - Complete a transfer request. - * @hsep: Endpoint to which the request belongs. - * @hsreq: Transfer request to be completed. - * @status: Transfer completion status for the transfer request. - */ -static void s3c_hsudc_complete_request(struct s3c_hsudc_ep *hsep, - struct s3c_hsudc_req *hsreq, int status) -{ - unsigned int stopped = hsep->stopped; - struct s3c_hsudc *hsudc = hsep->dev; - - list_del_init(&hsreq->queue); - hsreq->req.status = status; - - if (!ep_index(hsep)) { - hsudc->ep0state = WAIT_FOR_SETUP; - hsep->bEndpointAddress &= ~USB_DIR_IN; - } - - hsep->stopped = 1; - spin_unlock(&hsudc->lock); - usb_gadget_giveback_request(&hsep->ep, &hsreq->req); - spin_lock(&hsudc->lock); - hsep->stopped = stopped; -} - -/** - * s3c_hsudc_nuke_ep - Terminate all requests queued for a endpoint. - * @hsep: Endpoint for which queued requests have to be terminated. - * @status: Transfer completion status for the transfer request. - */ -static void s3c_hsudc_nuke_ep(struct s3c_hsudc_ep *hsep, int status) -{ - struct s3c_hsudc_req *hsreq; - - while (!list_empty(&hsep->queue)) { - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - s3c_hsudc_complete_request(hsep, hsreq, status); - } -} - -/** - * s3c_hsudc_stop_activity - Stop activity on all endpoints. - * @hsudc: Device controller for which EP activity is to be stopped. - * - * All the endpoints are stopped and any pending transfer requests if any on - * the endpoint are terminated. - */ -static void s3c_hsudc_stop_activity(struct s3c_hsudc *hsudc) -{ - struct s3c_hsudc_ep *hsep; - int epnum; - - hsudc->gadget.speed = USB_SPEED_UNKNOWN; - - for (epnum = 0; epnum < hsudc->pd->epnum; epnum++) { - hsep = &hsudc->ep[epnum]; - hsep->stopped = 1; - s3c_hsudc_nuke_ep(hsep, -ESHUTDOWN); - } -} - -/** - * s3c_hsudc_read_setup_pkt - Read the received setup packet from EP0 fifo. - * @hsudc: Device controller from which setup packet is to be read. - * @buf: The buffer into which the setup packet is read. - * - * The setup packet received in the EP0 fifo is read and stored into a - * given buffer address. - */ - -static void s3c_hsudc_read_setup_pkt(struct s3c_hsudc *hsudc, u16 *buf) -{ - int count; - - count = readl(hsudc->regs + S3C_BRCR); - while (count--) - *buf++ = (u16)readl(hsudc->regs + S3C_BR(0)); - - writel(S3C_EP0SR_RX_SUCCESS, hsudc->regs + S3C_EP0SR); -} - -/** - * s3c_hsudc_write_fifo - Write next chunk of transfer data to EP fifo. - * @hsep: Endpoint to which the data is to be written. - * @hsreq: Transfer request from which the next chunk of data is written. - * - * Write the next chunk of data from a transfer request to the endpoint FIFO. - * If the transfer request completes, 1 is returned, otherwise 0 is returned. - */ -static int s3c_hsudc_write_fifo(struct s3c_hsudc_ep *hsep, - struct s3c_hsudc_req *hsreq) -{ - u16 *buf; - u32 max = ep_maxpacket(hsep); - u32 count, length; - bool is_last; - void __iomem *fifo = hsep->fifo; - - buf = hsreq->req.buf + hsreq->req.actual; - prefetch(buf); - - length = hsreq->req.length - hsreq->req.actual; - length = min(length, max); - hsreq->req.actual += length; - - writel(length, hsep->dev->regs + S3C_BWCR); - for (count = 0; count < length; count += 2) - writel(*buf++, fifo); - - if (count != max) { - is_last = true; - } else { - if (hsreq->req.length != hsreq->req.actual || hsreq->req.zero) - is_last = false; - else - is_last = true; - } - - if (is_last) { - s3c_hsudc_complete_request(hsep, hsreq, 0); - return 1; - } - - return 0; -} - -/** - * s3c_hsudc_read_fifo - Read the next chunk of data from EP fifo. - * @hsep: Endpoint from which the data is to be read. - * @hsreq: Transfer request to which the next chunk of data read is written. - * - * Read the next chunk of data from the endpoint FIFO and a write it to the - * transfer request buffer. If the transfer request completes, 1 is returned, - * otherwise 0 is returned. - */ -static int s3c_hsudc_read_fifo(struct s3c_hsudc_ep *hsep, - struct s3c_hsudc_req *hsreq) -{ - struct s3c_hsudc *hsudc = hsep->dev; - u32 csr, offset; - u16 *buf, word; - u32 buflen, rcnt, rlen; - void __iomem *fifo = hsep->fifo; - u32 is_short = 0; - - offset = (ep_index(hsep)) ? S3C_ESR : S3C_EP0SR; - csr = readl(hsudc->regs + offset); - if (!(csr & S3C_ESR_RX_SUCCESS)) - return -EINVAL; - - buf = hsreq->req.buf + hsreq->req.actual; - prefetchw(buf); - buflen = hsreq->req.length - hsreq->req.actual; - - rcnt = readl(hsudc->regs + S3C_BRCR); - rlen = (csr & S3C_ESR_LWO) ? (rcnt * 2 - 1) : (rcnt * 2); - - hsreq->req.actual += min(rlen, buflen); - is_short = (rlen < hsep->ep.maxpacket); - - while (rcnt-- != 0) { - word = (u16)readl(fifo); - if (buflen) { - *buf++ = word; - buflen--; - } else { - hsreq->req.status = -EOVERFLOW; - } - } - - writel(S3C_ESR_RX_SUCCESS, hsudc->regs + offset); - - if (is_short || hsreq->req.actual == hsreq->req.length) { - s3c_hsudc_complete_request(hsep, hsreq, 0); - return 1; - } - - return 0; -} - -/** - * s3c_hsudc_epin_intr - Handle in-endpoint interrupt. - * @hsudc - Device controller for which the interrupt is to be handled. - * @ep_idx - Endpoint number on which an interrupt is pending. - * - * Handles interrupt for a in-endpoint. The interrupts that are handled are - * stall and data transmit complete interrupt. - */ -static void s3c_hsudc_epin_intr(struct s3c_hsudc *hsudc, u32 ep_idx) -{ - struct s3c_hsudc_ep *hsep = &hsudc->ep[ep_idx]; - struct s3c_hsudc_req *hsreq; - u32 csr; - - csr = readl(hsudc->regs + S3C_ESR); - if (csr & S3C_ESR_STALL) { - writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR); - return; - } - - if (csr & S3C_ESR_TX_SUCCESS) { - writel(S3C_ESR_TX_SUCCESS, hsudc->regs + S3C_ESR); - if (list_empty(&hsep->queue)) - return; - - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - if ((s3c_hsudc_write_fifo(hsep, hsreq) == 0) && - (csr & S3C_ESR_PSIF_TWO)) - s3c_hsudc_write_fifo(hsep, hsreq); - } -} - -/** - * s3c_hsudc_epout_intr - Handle out-endpoint interrupt. - * @hsudc - Device controller for which the interrupt is to be handled. - * @ep_idx - Endpoint number on which an interrupt is pending. - * - * Handles interrupt for a out-endpoint. The interrupts that are handled are - * stall, flush and data ready interrupt. - */ -static void s3c_hsudc_epout_intr(struct s3c_hsudc *hsudc, u32 ep_idx) -{ - struct s3c_hsudc_ep *hsep = &hsudc->ep[ep_idx]; - struct s3c_hsudc_req *hsreq; - u32 csr; - - csr = readl(hsudc->regs + S3C_ESR); - if (csr & S3C_ESR_STALL) { - writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR); - return; - } - - if (csr & S3C_ESR_FLUSH) { - __orr32(hsudc->regs + S3C_ECR, S3C_ECR_FLUSH); - return; - } - - if (csr & S3C_ESR_RX_SUCCESS) { - if (list_empty(&hsep->queue)) - return; - - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - if (((s3c_hsudc_read_fifo(hsep, hsreq)) == 0) && - (csr & S3C_ESR_PSIF_TWO)) - s3c_hsudc_read_fifo(hsep, hsreq); - } -} - -/** s3c_hsudc_set_halt - Set or clear a endpoint halt. - * @_ep: Endpoint on which halt has to be set or cleared. - * @value: 1 for setting halt on endpoint, 0 to clear halt. - * - * Set or clear endpoint halt. If halt is set, the endpoint is stopped. - * If halt is cleared, for in-endpoints, if there are any pending - * transfer requests, transfers are started. - */ -static int s3c_hsudc_set_halt(struct usb_ep *_ep, int value) -{ - struct s3c_hsudc_ep *hsep = our_ep(_ep); - struct s3c_hsudc *hsudc = hsep->dev; - struct s3c_hsudc_req *hsreq; - unsigned long irqflags; - u32 ecr; - u32 offset; - - if (value && ep_is_in(hsep) && !list_empty(&hsep->queue)) - return -EAGAIN; - - spin_lock_irqsave(&hsudc->lock, irqflags); - set_index(hsudc, ep_index(hsep)); - offset = (ep_index(hsep)) ? S3C_ECR : S3C_EP0CR; - ecr = readl(hsudc->regs + offset); - - if (value) { - ecr |= S3C_ECR_STALL; - if (ep_index(hsep)) - ecr |= S3C_ECR_FLUSH; - hsep->stopped = 1; - } else { - ecr &= ~S3C_ECR_STALL; - hsep->stopped = hsep->wedge = 0; - } - writel(ecr, hsudc->regs + offset); - - if (ep_is_in(hsep) && !list_empty(&hsep->queue) && !value) { - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - if (hsreq) - s3c_hsudc_write_fifo(hsep, hsreq); - } - - spin_unlock_irqrestore(&hsudc->lock, irqflags); - return 0; -} - -/** s3c_hsudc_set_wedge - Sets the halt feature with the clear requests ignored - * @_ep: Endpoint on which wedge has to be set. - * - * Sets the halt feature with the clear requests ignored. - */ -static int s3c_hsudc_set_wedge(struct usb_ep *_ep) -{ - struct s3c_hsudc_ep *hsep = our_ep(_ep); - - if (!hsep) - return -EINVAL; - - hsep->wedge = 1; - return usb_ep_set_halt(_ep); -} - -/** s3c_hsudc_handle_reqfeat - Handle set feature or clear feature requests. - * @_ep: Device controller on which the set/clear feature needs to be handled. - * @ctrl: Control request as received on the endpoint 0. - * - * Handle set feature or clear feature control requests on the control endpoint. - */ -static int s3c_hsudc_handle_reqfeat(struct s3c_hsudc *hsudc, - struct usb_ctrlrequest *ctrl) -{ - struct s3c_hsudc_ep *hsep; - bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE); - u8 ep_num = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK; - - if (ctrl->bRequestType == USB_RECIP_ENDPOINT) { - hsep = &hsudc->ep[ep_num]; - switch (le16_to_cpu(ctrl->wValue)) { - case USB_ENDPOINT_HALT: - if (set || !hsep->wedge) - s3c_hsudc_set_halt(&hsep->ep, set); - return 0; - } - } - - return -ENOENT; -} - -/** - * s3c_hsudc_process_req_status - Handle get status control request. - * @hsudc: Device controller on which get status request has be handled. - * @ctrl: Control request as received on the endpoint 0. - * - * Handle get status control request received on control endpoint. - */ -static void s3c_hsudc_process_req_status(struct s3c_hsudc *hsudc, - struct usb_ctrlrequest *ctrl) -{ - struct s3c_hsudc_ep *hsep0 = &hsudc->ep[0]; - struct s3c_hsudc_req hsreq; - struct s3c_hsudc_ep *hsep; - __le16 reply; - u8 epnum; - - switch (ctrl->bRequestType & USB_RECIP_MASK) { - case USB_RECIP_DEVICE: - reply = cpu_to_le16(0); - break; - - case USB_RECIP_INTERFACE: - reply = cpu_to_le16(0); - break; - - case USB_RECIP_ENDPOINT: - epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; - hsep = &hsudc->ep[epnum]; - reply = cpu_to_le16(hsep->stopped ? 1 : 0); - break; - } - - INIT_LIST_HEAD(&hsreq.queue); - hsreq.req.length = 2; - hsreq.req.buf = &reply; - hsreq.req.actual = 0; - hsreq.req.complete = NULL; - s3c_hsudc_write_fifo(hsep0, &hsreq); -} - -/** - * s3c_hsudc_process_setup - Process control request received on endpoint 0. - * @hsudc: Device controller on which control request has been received. - * - * Read the control request received on endpoint 0, decode it and handle - * the request. - */ -static void s3c_hsudc_process_setup(struct s3c_hsudc *hsudc) -{ - struct s3c_hsudc_ep *hsep = &hsudc->ep[0]; - struct usb_ctrlrequest ctrl = {0}; - int ret; - - s3c_hsudc_nuke_ep(hsep, -EPROTO); - s3c_hsudc_read_setup_pkt(hsudc, (u16 *)&ctrl); - - if (ctrl.bRequestType & USB_DIR_IN) { - hsep->bEndpointAddress |= USB_DIR_IN; - hsudc->ep0state = DATA_STATE_XMIT; - } else { - hsep->bEndpointAddress &= ~USB_DIR_IN; - hsudc->ep0state = DATA_STATE_RECV; - } - - switch (ctrl.bRequest) { - case USB_REQ_SET_ADDRESS: - if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) - break; - hsudc->ep0state = WAIT_FOR_SETUP; - return; - - case USB_REQ_GET_STATUS: - if ((ctrl.bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD) - break; - s3c_hsudc_process_req_status(hsudc, &ctrl); - return; - - case USB_REQ_SET_FEATURE: - case USB_REQ_CLEAR_FEATURE: - if ((ctrl.bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD) - break; - s3c_hsudc_handle_reqfeat(hsudc, &ctrl); - hsudc->ep0state = WAIT_FOR_SETUP; - return; - } - - if (hsudc->driver) { - spin_unlock(&hsudc->lock); - ret = hsudc->driver->setup(&hsudc->gadget, &ctrl); - spin_lock(&hsudc->lock); - - if (ctrl.bRequest == USB_REQ_SET_CONFIGURATION) { - hsep->bEndpointAddress &= ~USB_DIR_IN; - hsudc->ep0state = WAIT_FOR_SETUP; - } - - if (ret < 0) { - dev_err(hsudc->dev, "setup failed, returned %d\n", - ret); - s3c_hsudc_set_halt(&hsep->ep, 1); - hsudc->ep0state = WAIT_FOR_SETUP; - hsep->bEndpointAddress &= ~USB_DIR_IN; - } - } -} - -/** s3c_hsudc_handle_ep0_intr - Handle endpoint 0 interrupt. - * @hsudc: Device controller on which endpoint 0 interrupt has occurred. - * - * Handle endpoint 0 interrupt when it occurs. EP0 interrupt could occur - * when a stall handshake is sent to host or data is sent/received on - * endpoint 0. - */ -static void s3c_hsudc_handle_ep0_intr(struct s3c_hsudc *hsudc) -{ - struct s3c_hsudc_ep *hsep = &hsudc->ep[0]; - struct s3c_hsudc_req *hsreq; - u32 csr = readl(hsudc->regs + S3C_EP0SR); - u32 ecr; - - if (csr & S3C_EP0SR_STALL) { - ecr = readl(hsudc->regs + S3C_EP0CR); - ecr &= ~(S3C_ECR_STALL | S3C_ECR_FLUSH); - writel(ecr, hsudc->regs + S3C_EP0CR); - - writel(S3C_EP0SR_STALL, hsudc->regs + S3C_EP0SR); - hsep->stopped = 0; - - s3c_hsudc_nuke_ep(hsep, -ECONNABORTED); - hsudc->ep0state = WAIT_FOR_SETUP; - hsep->bEndpointAddress &= ~USB_DIR_IN; - return; - } - - if (csr & S3C_EP0SR_TX_SUCCESS) { - writel(S3C_EP0SR_TX_SUCCESS, hsudc->regs + S3C_EP0SR); - if (ep_is_in(hsep)) { - if (list_empty(&hsep->queue)) - return; - - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - s3c_hsudc_write_fifo(hsep, hsreq); - } - } - - if (csr & S3C_EP0SR_RX_SUCCESS) { - if (hsudc->ep0state == WAIT_FOR_SETUP) - s3c_hsudc_process_setup(hsudc); - else { - if (!ep_is_in(hsep)) { - if (list_empty(&hsep->queue)) - return; - hsreq = list_entry(hsep->queue.next, - struct s3c_hsudc_req, queue); - s3c_hsudc_read_fifo(hsep, hsreq); - } - } - } -} - -/** - * s3c_hsudc_ep_enable - Enable a endpoint. - * @_ep: The endpoint to be enabled. - * @desc: Endpoint descriptor. - * - * Enables a endpoint when called from the gadget driver. Endpoint stall if - * any is cleared, transfer type is configured and endpoint interrupt is - * enabled. - */ -static int s3c_hsudc_ep_enable(struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) -{ - struct s3c_hsudc_ep *hsep; - struct s3c_hsudc *hsudc; - unsigned long flags; - u32 ecr = 0; - - hsep = our_ep(_ep); - if (!_ep || !desc || _ep->name == ep0name - || desc->bDescriptorType != USB_DT_ENDPOINT - || hsep->bEndpointAddress != desc->bEndpointAddress - || ep_maxpacket(hsep) < usb_endpoint_maxp(desc)) - return -EINVAL; - - if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK - && usb_endpoint_maxp(desc) != ep_maxpacket(hsep)) - || !desc->wMaxPacketSize) - return -ERANGE; - - hsudc = hsep->dev; - if (!hsudc->driver || hsudc->gadget.speed == USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - spin_lock_irqsave(&hsudc->lock, flags); - - set_index(hsudc, hsep->bEndpointAddress); - ecr |= ((usb_endpoint_xfer_int(desc)) ? S3C_ECR_IEMS : S3C_ECR_DUEN); - writel(ecr, hsudc->regs + S3C_ECR); - - hsep->stopped = hsep->wedge = 0; - hsep->ep.desc = desc; - hsep->ep.maxpacket = usb_endpoint_maxp(desc); - - s3c_hsudc_set_halt(_ep, 0); - __set_bit(ep_index(hsep), hsudc->regs + S3C_EIER); - - spin_unlock_irqrestore(&hsudc->lock, flags); - return 0; -} - -/** - * s3c_hsudc_ep_disable - Disable a endpoint. - * @_ep: The endpoint to be disabled. - * @desc: Endpoint descriptor. - * - * Disables a endpoint when called from the gadget driver. - */ -static int s3c_hsudc_ep_disable(struct usb_ep *_ep) -{ - struct s3c_hsudc_ep *hsep = our_ep(_ep); - struct s3c_hsudc *hsudc = hsep->dev; - unsigned long flags; - - if (!_ep || !hsep->ep.desc) - return -EINVAL; - - spin_lock_irqsave(&hsudc->lock, flags); - - set_index(hsudc, hsep->bEndpointAddress); - __clear_bit(ep_index(hsep), hsudc->regs + S3C_EIER); - - s3c_hsudc_nuke_ep(hsep, -ESHUTDOWN); - - hsep->ep.desc = NULL; - hsep->stopped = 1; - - spin_unlock_irqrestore(&hsudc->lock, flags); - return 0; -} - -/** - * s3c_hsudc_alloc_request - Allocate a new request. - * @_ep: Endpoint for which request is allocated (not used). - * @gfp_flags: Flags used for the allocation. - * - * Allocates a single transfer request structure when called from gadget driver. - */ -static struct usb_request *s3c_hsudc_alloc_request(struct usb_ep *_ep, - gfp_t gfp_flags) -{ - struct s3c_hsudc_req *hsreq; - - hsreq = kzalloc(sizeof(*hsreq), gfp_flags); - if (!hsreq) - return NULL; - - INIT_LIST_HEAD(&hsreq->queue); - return &hsreq->req; -} - -/** - * s3c_hsudc_free_request - Deallocate a request. - * @ep: Endpoint for which request is deallocated (not used). - * @_req: Request to be deallocated. - * - * Allocates a single transfer request structure when called from gadget driver. - */ -static void s3c_hsudc_free_request(struct usb_ep *ep, struct usb_request *_req) -{ - struct s3c_hsudc_req *hsreq; - - hsreq = our_req(_req); - WARN_ON(!list_empty(&hsreq->queue)); - kfree(hsreq); -} - -/** - * s3c_hsudc_queue - Queue a transfer request for the endpoint. - * @_ep: Endpoint for which the request is queued. - * @_req: Request to be queued. - * @gfp_flags: Not used. - * - * Start or enqueue a request for a endpoint when called from gadget driver. - */ -static int s3c_hsudc_queue(struct usb_ep *_ep, struct usb_request *_req, - gfp_t gfp_flags) -{ - struct s3c_hsudc_req *hsreq; - struct s3c_hsudc_ep *hsep; - struct s3c_hsudc *hsudc; - unsigned long flags; - u32 offset; - u32 csr; - - hsreq = our_req(_req); - if ((!_req || !_req->complete || !_req->buf || - !list_empty(&hsreq->queue))) - return -EINVAL; - - hsep = our_ep(_ep); - hsudc = hsep->dev; - if (!hsudc->driver || hsudc->gadget.speed == USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - spin_lock_irqsave(&hsudc->lock, flags); - set_index(hsudc, hsep->bEndpointAddress); - - _req->status = -EINPROGRESS; - _req->actual = 0; - - if (!ep_index(hsep) && _req->length == 0) { - hsudc->ep0state = WAIT_FOR_SETUP; - s3c_hsudc_complete_request(hsep, hsreq, 0); - spin_unlock_irqrestore(&hsudc->lock, flags); - return 0; - } - - if (list_empty(&hsep->queue) && !hsep->stopped) { - offset = (ep_index(hsep)) ? S3C_ESR : S3C_EP0SR; - if (ep_is_in(hsep)) { - csr = readl(hsudc->regs + offset); - if (!(csr & S3C_ESR_TX_SUCCESS) && - (s3c_hsudc_write_fifo(hsep, hsreq) == 1)) - hsreq = NULL; - } else { - csr = readl(hsudc->regs + offset); - if ((csr & S3C_ESR_RX_SUCCESS) - && (s3c_hsudc_read_fifo(hsep, hsreq) == 1)) - hsreq = NULL; - } - } - - if (hsreq) - list_add_tail(&hsreq->queue, &hsep->queue); - - spin_unlock_irqrestore(&hsudc->lock, flags); - return 0; -} - -/** - * s3c_hsudc_dequeue - Dequeue a transfer request from an endpoint. - * @_ep: Endpoint from which the request is dequeued. - * @_req: Request to be dequeued. - * - * Dequeue a request from a endpoint when called from gadget driver. - */ -static int s3c_hsudc_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct s3c_hsudc_ep *hsep = our_ep(_ep); - struct s3c_hsudc *hsudc = hsep->dev; - struct s3c_hsudc_req *hsreq = NULL, *iter; - unsigned long flags; - - hsep = our_ep(_ep); - if (!_ep || hsep->ep.name == ep0name) - return -EINVAL; - - spin_lock_irqsave(&hsudc->lock, flags); - - list_for_each_entry(iter, &hsep->queue, queue) { - if (&iter->req != _req) - continue; - hsreq = iter; - break; - } - if (!hsreq) { - spin_unlock_irqrestore(&hsudc->lock, flags); - return -EINVAL; - } - - set_index(hsudc, hsep->bEndpointAddress); - s3c_hsudc_complete_request(hsep, hsreq, -ECONNRESET); - - spin_unlock_irqrestore(&hsudc->lock, flags); - return 0; -} - -static const struct usb_ep_ops s3c_hsudc_ep_ops = { - .enable = s3c_hsudc_ep_enable, - .disable = s3c_hsudc_ep_disable, - .alloc_request = s3c_hsudc_alloc_request, - .free_request = s3c_hsudc_free_request, - .queue = s3c_hsudc_queue, - .dequeue = s3c_hsudc_dequeue, - .set_halt = s3c_hsudc_set_halt, - .set_wedge = s3c_hsudc_set_wedge, -}; - -/** - * s3c_hsudc_initep - Initialize a endpoint to default state. - * @hsudc - Reference to the device controller. - * @hsep - Endpoint to be initialized. - * @epnum - Address to be assigned to the endpoint. - * - * Initialize a endpoint with default configuration. - */ -static void s3c_hsudc_initep(struct s3c_hsudc *hsudc, - struct s3c_hsudc_ep *hsep, int epnum) -{ - char *dir; - - if ((epnum % 2) == 0) { - dir = "out"; - } else { - dir = "in"; - hsep->bEndpointAddress = USB_DIR_IN; - } - - hsep->bEndpointAddress |= epnum; - if (epnum) - snprintf(hsep->name, sizeof(hsep->name), "ep%d%s", epnum, dir); - else - snprintf(hsep->name, sizeof(hsep->name), "%s", ep0name); - - INIT_LIST_HEAD(&hsep->queue); - INIT_LIST_HEAD(&hsep->ep.ep_list); - if (epnum) - list_add_tail(&hsep->ep.ep_list, &hsudc->gadget.ep_list); - - hsep->dev = hsudc; - hsep->ep.name = hsep->name; - usb_ep_set_maxpacket_limit(&hsep->ep, epnum ? 512 : 64); - hsep->ep.ops = &s3c_hsudc_ep_ops; - hsep->fifo = hsudc->regs + S3C_BR(epnum); - hsep->ep.desc = NULL; - hsep->stopped = 0; - hsep->wedge = 0; - - if (epnum == 0) { - hsep->ep.caps.type_control = true; - hsep->ep.caps.dir_in = true; - hsep->ep.caps.dir_out = true; - } else { - hsep->ep.caps.type_iso = true; - hsep->ep.caps.type_bulk = true; - hsep->ep.caps.type_int = true; - } - - if (epnum & 1) - hsep->ep.caps.dir_in = true; - else - hsep->ep.caps.dir_out = true; - - set_index(hsudc, epnum); - writel(hsep->ep.maxpacket, hsudc->regs + S3C_MPR); -} - -/** - * s3c_hsudc_setup_ep - Configure all endpoints to default state. - * @hsudc: Reference to device controller. - * - * Configures all endpoints to default state. - */ -static void s3c_hsudc_setup_ep(struct s3c_hsudc *hsudc) -{ - int epnum; - - hsudc->ep0state = WAIT_FOR_SETUP; - INIT_LIST_HEAD(&hsudc->gadget.ep_list); - for (epnum = 0; epnum < hsudc->pd->epnum; epnum++) - s3c_hsudc_initep(hsudc, &hsudc->ep[epnum], epnum); -} - -/** - * s3c_hsudc_reconfig - Reconfigure the device controller to default state. - * @hsudc: Reference to device controller. - * - * Reconfigures the device controller registers to a default state. - */ -static void s3c_hsudc_reconfig(struct s3c_hsudc *hsudc) -{ - writel(0xAA, hsudc->regs + S3C_EDR); - writel(1, hsudc->regs + S3C_EIER); - writel(0, hsudc->regs + S3C_TR); - writel(S3C_SCR_DTZIEN_EN | S3C_SCR_RRD_EN | S3C_SCR_SUS_EN | - S3C_SCR_RST_EN, hsudc->regs + S3C_SCR); - writel(0, hsudc->regs + S3C_EP0CR); - - s3c_hsudc_setup_ep(hsudc); -} - -/** - * s3c_hsudc_irq - Interrupt handler for device controller. - * @irq: Not used. - * @_dev: Reference to the device controller. - * - * Interrupt handler for the device controller. This handler handles controller - * interrupts and endpoint interrupts. - */ -static irqreturn_t s3c_hsudc_irq(int irq, void *_dev) -{ - struct s3c_hsudc *hsudc = _dev; - struct s3c_hsudc_ep *hsep; - u32 ep_intr; - u32 sys_status; - u32 ep_idx; - - spin_lock(&hsudc->lock); - - sys_status = readl(hsudc->regs + S3C_SSR); - ep_intr = readl(hsudc->regs + S3C_EIR) & 0x3FF; - - if (!ep_intr && !(sys_status & S3C_SSR_DTZIEN_EN)) { - spin_unlock(&hsudc->lock); - return IRQ_HANDLED; - } - - if (sys_status) { - if (sys_status & S3C_SSR_VBUSON) - writel(S3C_SSR_VBUSON, hsudc->regs + S3C_SSR); - - if (sys_status & S3C_SSR_ERR) - writel(S3C_SSR_ERR, hsudc->regs + S3C_SSR); - - if (sys_status & S3C_SSR_SDE) { - writel(S3C_SSR_SDE, hsudc->regs + S3C_SSR); - hsudc->gadget.speed = (sys_status & S3C_SSR_HSP) ? - USB_SPEED_HIGH : USB_SPEED_FULL; - } - - if (sys_status & S3C_SSR_SUSPEND) { - writel(S3C_SSR_SUSPEND, hsudc->regs + S3C_SSR); - if (hsudc->gadget.speed != USB_SPEED_UNKNOWN - && hsudc->driver && hsudc->driver->suspend) - hsudc->driver->suspend(&hsudc->gadget); - } - - if (sys_status & S3C_SSR_RESUME) { - writel(S3C_SSR_RESUME, hsudc->regs + S3C_SSR); - if (hsudc->gadget.speed != USB_SPEED_UNKNOWN - && hsudc->driver && hsudc->driver->resume) - hsudc->driver->resume(&hsudc->gadget); - } - - if (sys_status & S3C_SSR_RESET) { - writel(S3C_SSR_RESET, hsudc->regs + S3C_SSR); - for (ep_idx = 0; ep_idx < hsudc->pd->epnum; ep_idx++) { - hsep = &hsudc->ep[ep_idx]; - hsep->stopped = 1; - s3c_hsudc_nuke_ep(hsep, -ECONNRESET); - } - s3c_hsudc_reconfig(hsudc); - hsudc->ep0state = WAIT_FOR_SETUP; - } - } - - if (ep_intr & S3C_EIR_EP0) { - writel(S3C_EIR_EP0, hsudc->regs + S3C_EIR); - set_index(hsudc, 0); - s3c_hsudc_handle_ep0_intr(hsudc); - } - - ep_intr >>= 1; - ep_idx = 1; - while (ep_intr) { - if (ep_intr & 1) { - hsep = &hsudc->ep[ep_idx]; - set_index(hsudc, ep_idx); - writel(1 << ep_idx, hsudc->regs + S3C_EIR); - if (ep_is_in(hsep)) - s3c_hsudc_epin_intr(hsudc, ep_idx); - else - s3c_hsudc_epout_intr(hsudc, ep_idx); - } - ep_intr >>= 1; - ep_idx++; - } - - spin_unlock(&hsudc->lock); - return IRQ_HANDLED; -} - -static int s3c_hsudc_start(struct usb_gadget *gadget, - struct usb_gadget_driver *driver) -{ - struct s3c_hsudc *hsudc = to_hsudc(gadget); - int ret; - - if (!driver - || driver->max_speed < USB_SPEED_FULL - || !driver->setup) - return -EINVAL; - - if (!hsudc) - return -ENODEV; - - if (hsudc->driver) - return -EBUSY; - - hsudc->driver = driver; - - ret = regulator_bulk_enable(ARRAY_SIZE(hsudc->supplies), - hsudc->supplies); - if (ret != 0) { - dev_err(hsudc->dev, "failed to enable supplies: %d\n", ret); - goto err_supplies; - } - - /* connect to bus through transceiver */ - if (!IS_ERR_OR_NULL(hsudc->transceiver)) { - ret = otg_set_peripheral(hsudc->transceiver->otg, - &hsudc->gadget); - if (ret) { - dev_err(hsudc->dev, "%s: can't bind to transceiver\n", - hsudc->gadget.name); - goto err_otg; - } - } - - enable_irq(hsudc->irq); - s3c_hsudc_reconfig(hsudc); - - pm_runtime_get_sync(hsudc->dev); - - if (hsudc->pd->phy_init) - hsudc->pd->phy_init(); - if (hsudc->pd->gpio_init) - hsudc->pd->gpio_init(); - - return 0; -err_otg: - regulator_bulk_disable(ARRAY_SIZE(hsudc->supplies), hsudc->supplies); -err_supplies: - hsudc->driver = NULL; - return ret; -} - -static int s3c_hsudc_stop(struct usb_gadget *gadget) -{ - struct s3c_hsudc *hsudc = to_hsudc(gadget); - unsigned long flags; - - if (!hsudc) - return -ENODEV; - - spin_lock_irqsave(&hsudc->lock, flags); - hsudc->gadget.speed = USB_SPEED_UNKNOWN; - if (hsudc->pd->phy_uninit) - hsudc->pd->phy_uninit(); - - pm_runtime_put(hsudc->dev); - - if (hsudc->pd->gpio_uninit) - hsudc->pd->gpio_uninit(); - s3c_hsudc_stop_activity(hsudc); - spin_unlock_irqrestore(&hsudc->lock, flags); - - if (!IS_ERR_OR_NULL(hsudc->transceiver)) - (void) otg_set_peripheral(hsudc->transceiver->otg, NULL); - - disable_irq(hsudc->irq); - - regulator_bulk_disable(ARRAY_SIZE(hsudc->supplies), hsudc->supplies); - hsudc->driver = NULL; - - return 0; -} - -static inline u32 s3c_hsudc_read_frameno(struct s3c_hsudc *hsudc) -{ - return readl(hsudc->regs + S3C_FNR) & 0x3FF; -} - -static int s3c_hsudc_gadget_getframe(struct usb_gadget *gadget) -{ - return s3c_hsudc_read_frameno(to_hsudc(gadget)); -} - -static int s3c_hsudc_vbus_draw(struct usb_gadget *gadget, unsigned mA) -{ - struct s3c_hsudc *hsudc = to_hsudc(gadget); - - if (!hsudc) - return -ENODEV; - - if (!IS_ERR_OR_NULL(hsudc->transceiver)) - return usb_phy_set_power(hsudc->transceiver, mA); - - return -EOPNOTSUPP; -} - -static const struct usb_gadget_ops s3c_hsudc_gadget_ops = { - .get_frame = s3c_hsudc_gadget_getframe, - .udc_start = s3c_hsudc_start, - .udc_stop = s3c_hsudc_stop, - .vbus_draw = s3c_hsudc_vbus_draw, -}; - -static int s3c_hsudc_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct s3c_hsudc *hsudc; - struct s3c24xx_hsudc_platdata *pd = dev_get_platdata(&pdev->dev); - int ret, i; - - hsudc = devm_kzalloc(&pdev->dev, struct_size(hsudc, ep, pd->epnum), - GFP_KERNEL); - if (!hsudc) - return -ENOMEM; - - platform_set_drvdata(pdev, dev); - hsudc->dev = dev; - hsudc->pd = dev_get_platdata(&pdev->dev); - - hsudc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); - - for (i = 0; i < ARRAY_SIZE(hsudc->supplies); i++) - hsudc->supplies[i].supply = s3c_hsudc_supply_names[i]; - - ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(hsudc->supplies), - hsudc->supplies); - if (ret != 0) { - if (ret != -EPROBE_DEFER) - dev_err(dev, "failed to request supplies: %d\n", ret); - goto err_supplies; - } - - hsudc->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(hsudc->regs)) { - ret = PTR_ERR(hsudc->regs); - goto err_res; - } - - spin_lock_init(&hsudc->lock); - - hsudc->gadget.max_speed = USB_SPEED_HIGH; - hsudc->gadget.ops = &s3c_hsudc_gadget_ops; - hsudc->gadget.name = dev_name(dev); - hsudc->gadget.ep0 = &hsudc->ep[0].ep; - hsudc->gadget.is_otg = 0; - hsudc->gadget.is_a_peripheral = 0; - hsudc->gadget.speed = USB_SPEED_UNKNOWN; - - s3c_hsudc_setup_ep(hsudc); - - ret = platform_get_irq(pdev, 0); - if (ret < 0) - goto err_res; - hsudc->irq = ret; - - ret = devm_request_irq(&pdev->dev, hsudc->irq, s3c_hsudc_irq, 0, - driver_name, hsudc); - if (ret < 0) { - dev_err(dev, "irq request failed\n"); - goto err_res; - } - - hsudc->uclk = devm_clk_get(&pdev->dev, "usb-device"); - if (IS_ERR(hsudc->uclk)) { - dev_err(dev, "failed to find usb-device clock source\n"); - ret = PTR_ERR(hsudc->uclk); - goto err_res; - } - clk_enable(hsudc->uclk); - - local_irq_disable(); - - disable_irq(hsudc->irq); - local_irq_enable(); - - ret = usb_add_gadget_udc(&pdev->dev, &hsudc->gadget); - if (ret) - goto err_add_udc; - - pm_runtime_enable(dev); - - return 0; -err_add_udc: - clk_disable(hsudc->uclk); -err_res: - if (!IS_ERR_OR_NULL(hsudc->transceiver)) - usb_put_phy(hsudc->transceiver); - -err_supplies: - return ret; -} - -static struct platform_driver s3c_hsudc_driver = { - .driver = { - .name = "s3c-hsudc", - }, - .probe = s3c_hsudc_probe, -}; - -module_platform_driver(s3c_hsudc_driver); - -MODULE_DESCRIPTION("Samsung S3C24XX USB high-speed controller driver"); -MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:s3c-hsudc"); diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c deleted file mode 100644 index 8c57b191e52b..000000000000 --- a/drivers/usb/gadget/udc/s3c2410_udc.c +++ /dev/null @@ -1,1980 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * linux/drivers/usb/gadget/s3c2410_udc.c - * - * Samsung S3C24xx series on-chip full speed USB device controllers - * - * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard - * Additional cleanups by Ben Dooks <ben-linux@fluff.org> - */ - -#define pr_fmt(fmt) "s3c2410_udc: " fmt - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/ioport.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/timer.h> -#include <linux/list.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/gpio/consumer.h> -#include <linux/prefetch.h> -#include <linux/io.h> - -#include <linux/debugfs.h> -#include <linux/seq_file.h> - -#include <linux/usb.h> -#include <linux/usb/gadget.h> - -#include <asm/byteorder.h> -#include <asm/irq.h> -#include <asm/unaligned.h> - -#include <linux/platform_data/usb-s3c2410_udc.h> - -#include "s3c2410_udc.h" -#include "s3c2410_udc_regs.h" - -#define DRIVER_DESC "S3C2410 USB Device Controller Gadget" -#define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \ - "Arnaud Patard <arnaud.patard@rtp-net.org>" - -static const char gadget_name[] = "s3c2410_udc"; -static const char driver_desc[] = DRIVER_DESC; - -static struct s3c2410_udc *the_controller; -static struct clk *udc_clock; -static struct clk *usb_bus_clock; -static void __iomem *base_addr; -static int irq_usbd; -static struct dentry *s3c2410_udc_debugfs_root; - -static inline u32 udc_read(u32 reg) -{ - return readb(base_addr + reg); -} - -static inline void udc_write(u32 value, u32 reg) -{ - writeb(value, base_addr + reg); -} - -static inline void udc_writeb(void __iomem *base, u32 value, u32 reg) -{ - writeb(value, base + reg); -} - -static struct s3c2410_udc_mach_info *udc_info; - -/*************************** DEBUG FUNCTION ***************************/ -#define DEBUG_NORMAL 1 -#define DEBUG_VERBOSE 2 - -#ifdef CONFIG_USB_S3C2410_DEBUG -#define USB_S3C2410_DEBUG_LEVEL 0 - -static uint32_t s3c2410_ticks = 0; - -__printf(2, 3) -static void dprintk(int level, const char *fmt, ...) -{ - static long prevticks; - static int invocation; - struct va_format vaf; - va_list args; - - if (level > USB_S3C2410_DEBUG_LEVEL) - return; - - va_start(args, fmt); - - vaf.fmt = fmt; - vaf.va = &args; - - if (s3c2410_ticks != prevticks) { - prevticks = s3c2410_ticks; - invocation = 0; - } - - pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf); - - va_end(args); -} -#else -__printf(2, 3) -static void dprintk(int level, const char *fmt, ...) -{ -} -#endif - -static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p) -{ - u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg; - u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; - u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2; - u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2; - - addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG); - pwr_reg = udc_read(S3C2410_UDC_PWR_REG); - ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG); - usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG); - ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); - usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG); - udc_write(0, S3C2410_UDC_INDEX_REG); - ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - udc_write(1, S3C2410_UDC_INDEX_REG); - ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); - ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); - ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); - ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); - udc_write(2, S3C2410_UDC_INDEX_REG); - ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); - ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); - ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); - ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); - - seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n" - "PWR_REG : 0x%04X\n" - "EP_INT_REG : 0x%04X\n" - "USB_INT_REG : 0x%04X\n" - "EP_INT_EN_REG : 0x%04X\n" - "USB_INT_EN_REG : 0x%04X\n" - "EP0_CSR : 0x%04X\n" - "EP1_I_CSR1 : 0x%04X\n" - "EP1_I_CSR2 : 0x%04X\n" - "EP1_O_CSR1 : 0x%04X\n" - "EP1_O_CSR2 : 0x%04X\n" - "EP2_I_CSR1 : 0x%04X\n" - "EP2_I_CSR2 : 0x%04X\n" - "EP2_O_CSR1 : 0x%04X\n" - "EP2_O_CSR2 : 0x%04X\n", - addr_reg, pwr_reg, ep_int_reg, usb_int_reg, - ep_int_en_reg, usb_int_en_reg, ep0_csr, - ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2, - ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2 - ); - - return 0; -} -DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs); - -/* io macros */ - -static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY, - S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_clear_ep0_se(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_set_ep0_de(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_set_ep0_ss(void __iomem *b) -{ - udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - - udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY - | S3C2410_UDC_EP0_CSR_DE), - S3C2410_UDC_EP0_CSR_REG); -} - -static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base) -{ - udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY - | S3C2410_UDC_EP0_CSR_DE), - S3C2410_UDC_EP0_CSR_REG); -} - -/*------------------------- I/O ----------------------------------*/ - -/* - * s3c2410_udc_done - */ -static void s3c2410_udc_done(struct s3c2410_ep *ep, - struct s3c2410_request *req, int status) -{ - unsigned halted = ep->halted; - - list_del_init(&req->queue); - - if (likely(req->req.status == -EINPROGRESS)) - req->req.status = status; - else - status = req->req.status; - - ep->halted = 1; - usb_gadget_giveback_request(&ep->ep, &req->req); - ep->halted = halted; -} - -static void s3c2410_udc_nuke(struct s3c2410_udc *udc, - struct s3c2410_ep *ep, int status) -{ - while (!list_empty(&ep->queue)) { - struct s3c2410_request *req; - req = list_entry(ep->queue.next, struct s3c2410_request, - queue); - s3c2410_udc_done(ep, req, status); - } -} - -static inline int s3c2410_udc_fifo_count_out(void) -{ - int tmp; - - tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8; - tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG); - return tmp; -} - -/* - * s3c2410_udc_write_packet - */ -static inline int s3c2410_udc_write_packet(int fifo, - struct s3c2410_request *req, - unsigned max) -{ - unsigned len = min(req->req.length - req->req.actual, max); - u8 *buf = req->req.buf + req->req.actual; - - prefetch(buf); - - dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__, - req->req.actual, req->req.length, len, req->req.actual + len); - - req->req.actual += len; - - udelay(5); - writesb(base_addr + fifo, buf, len); - return len; -} - -/* - * s3c2410_udc_write_fifo - * - * return: 0 = still running, 1 = completed, negative = errno - */ -static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep, - struct s3c2410_request *req) -{ - unsigned count; - int is_last; - u32 idx; - int fifo_reg; - u32 ep_csr; - - idx = ep->bEndpointAddress & 0x7F; - switch (idx) { - default: - idx = 0; - fallthrough; - case 0: - fifo_reg = S3C2410_UDC_EP0_FIFO_REG; - break; - case 1: - fifo_reg = S3C2410_UDC_EP1_FIFO_REG; - break; - case 2: - fifo_reg = S3C2410_UDC_EP2_FIFO_REG; - break; - case 3: - fifo_reg = S3C2410_UDC_EP3_FIFO_REG; - break; - case 4: - fifo_reg = S3C2410_UDC_EP4_FIFO_REG; - break; - } - - count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket); - - /* last packet is often short (sometimes a zlp) */ - if (count != ep->ep.maxpacket) - is_last = 1; - else if (req->req.length != req->req.actual || req->req.zero) - is_last = 0; - else - is_last = 2; - - /* Only ep0 debug messages are interesting */ - if (idx == 0) - dprintk(DEBUG_NORMAL, - "Written ep%d %d.%d of %d b [last %d,z %d]\n", - idx, count, req->req.actual, req->req.length, - is_last, req->req.zero); - - if (is_last) { - /* The order is important. It prevents sending 2 packets - * at the same time */ - - if (idx == 0) { - /* Reset signal => no need to say 'data sent' */ - if (!(udc_read(S3C2410_UDC_USB_INT_REG) - & S3C2410_UDC_USBINT_RESET)) - s3c2410_udc_set_ep0_de_in(base_addr); - ep->dev->ep0state = EP0_IDLE; - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, - S3C2410_UDC_IN_CSR1_REG); - } - - s3c2410_udc_done(ep, req, 0); - is_last = 1; - } else { - if (idx == 0) { - /* Reset signal => no need to say 'data sent' */ - if (!(udc_read(S3C2410_UDC_USB_INT_REG) - & S3C2410_UDC_USBINT_RESET)) - s3c2410_udc_set_ep0_ipr(base_addr); - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, - S3C2410_UDC_IN_CSR1_REG); - } - } - - return is_last; -} - -static inline int s3c2410_udc_read_packet(int fifo, u8 *buf, - struct s3c2410_request *req, unsigned avail) -{ - unsigned len; - - len = min(req->req.length - req->req.actual, avail); - req->req.actual += len; - - readsb(fifo + base_addr, buf, len); - return len; -} - -/* - * return: 0 = still running, 1 = queue empty, negative = errno - */ -static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep, - struct s3c2410_request *req) -{ - u8 *buf; - u32 ep_csr; - unsigned bufferspace; - int is_last = 1; - unsigned avail; - int fifo_count = 0; - u32 idx; - int fifo_reg; - - idx = ep->bEndpointAddress & 0x7F; - - switch (idx) { - default: - idx = 0; - fallthrough; - case 0: - fifo_reg = S3C2410_UDC_EP0_FIFO_REG; - break; - case 1: - fifo_reg = S3C2410_UDC_EP1_FIFO_REG; - break; - case 2: - fifo_reg = S3C2410_UDC_EP2_FIFO_REG; - break; - case 3: - fifo_reg = S3C2410_UDC_EP3_FIFO_REG; - break; - case 4: - fifo_reg = S3C2410_UDC_EP4_FIFO_REG; - break; - } - - if (!req->req.length) - return 1; - - buf = req->req.buf + req->req.actual; - bufferspace = req->req.length - req->req.actual; - if (!bufferspace) { - dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__); - return -1; - } - - udc_write(idx, S3C2410_UDC_INDEX_REG); - - fifo_count = s3c2410_udc_fifo_count_out(); - dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count); - - if (fifo_count > ep->ep.maxpacket) - avail = ep->ep.maxpacket; - else - avail = fifo_count; - - fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail); - - /* checking this with ep0 is not accurate as we already - * read a control request - **/ - if (idx != 0 && fifo_count < ep->ep.maxpacket) { - is_last = 1; - /* overflowed this request? flush extra data */ - if (fifo_count != avail) - req->req.status = -EOVERFLOW; - } else { - is_last = (req->req.length <= req->req.actual) ? 1 : 0; - } - - udc_write(idx, S3C2410_UDC_INDEX_REG); - fifo_count = s3c2410_udc_fifo_count_out(); - - /* Only ep0 debug messages are interesting */ - if (idx == 0) - dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n", - __func__, fifo_count, is_last); - - if (is_last) { - if (idx == 0) { - s3c2410_udc_set_ep0_de_out(base_addr); - ep->dev->ep0state = EP0_IDLE; - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, - S3C2410_UDC_OUT_CSR1_REG); - } - - s3c2410_udc_done(ep, req, 0); - } else { - if (idx == 0) { - s3c2410_udc_clear_ep0_opr(base_addr); - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, - S3C2410_UDC_OUT_CSR1_REG); - } - } - - return is_last; -} - -static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq) -{ - unsigned char *outbuf = (unsigned char *)crq; - int bytes_read = 0; - - udc_write(0, S3C2410_UDC_INDEX_REG); - - bytes_read = s3c2410_udc_fifo_count_out(); - - dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read); - - if (bytes_read > sizeof(struct usb_ctrlrequest)) - bytes_read = sizeof(struct usb_ctrlrequest); - - readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read); - - dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__, - bytes_read, crq->bRequest, crq->bRequestType, - crq->wValue, crq->wIndex, crq->wLength); - - return bytes_read; -} - -static int s3c2410_udc_get_status(struct s3c2410_udc *dev, - struct usb_ctrlrequest *crq) -{ - u16 status = 0; - u8 ep_num = crq->wIndex & 0x7F; - u8 is_in = crq->wIndex & USB_DIR_IN; - - switch (crq->bRequestType & USB_RECIP_MASK) { - case USB_RECIP_INTERFACE: - break; - - case USB_RECIP_DEVICE: - status = dev->devstatus; - break; - - case USB_RECIP_ENDPOINT: - if (ep_num > 4 || crq->wLength > 2) - return 1; - - if (ep_num == 0) { - udc_write(0, S3C2410_UDC_INDEX_REG); - status = udc_read(S3C2410_UDC_IN_CSR1_REG); - status = status & S3C2410_UDC_EP0_CSR_SENDSTL; - } else { - udc_write(ep_num, S3C2410_UDC_INDEX_REG); - if (is_in) { - status = udc_read(S3C2410_UDC_IN_CSR1_REG); - status = status & S3C2410_UDC_ICSR1_SENDSTL; - } else { - status = udc_read(S3C2410_UDC_OUT_CSR1_REG); - status = status & S3C2410_UDC_OCSR1_SENDSTL; - } - } - - status = status ? 1 : 0; - break; - - default: - return 1; - } - - /* Seems to be needed to get it working. ouch :( */ - udelay(5); - udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG); - udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG); - s3c2410_udc_set_ep0_de_in(base_addr); - - return 0; -} -/*------------------------- usb state machine -------------------------------*/ -static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value); - -static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev, - struct s3c2410_ep *ep, - struct usb_ctrlrequest *crq, - u32 ep0csr) -{ - int len, ret, tmp; - - /* start control request? */ - if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY)) - return; - - s3c2410_udc_nuke(dev, ep, -EPROTO); - - len = s3c2410_udc_read_fifo_crq(crq); - if (len != sizeof(*crq)) { - dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR" - " wanted %d bytes got %d. Stalling out...\n", - sizeof(*crq), len); - s3c2410_udc_set_ep0_ss(base_addr); - return; - } - - dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n", - crq->bRequest, crq->bRequestType, crq->wLength); - - /* cope with automagic for some standard requests. */ - dev->req_std = (crq->bRequestType & USB_TYPE_MASK) - == USB_TYPE_STANDARD; - dev->req_config = 0; - dev->req_pending = 1; - - switch (crq->bRequest) { - case USB_REQ_SET_CONFIGURATION: - dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n"); - - if (crq->bRequestType == USB_RECIP_DEVICE) { - dev->req_config = 1; - s3c2410_udc_set_ep0_de_out(base_addr); - } - break; - - case USB_REQ_SET_INTERFACE: - dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n"); - - if (crq->bRequestType == USB_RECIP_INTERFACE) { - dev->req_config = 1; - s3c2410_udc_set_ep0_de_out(base_addr); - } - break; - - case USB_REQ_SET_ADDRESS: - dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n"); - - if (crq->bRequestType == USB_RECIP_DEVICE) { - tmp = crq->wValue & 0x7F; - dev->address = tmp; - udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE), - S3C2410_UDC_FUNC_ADDR_REG); - s3c2410_udc_set_ep0_de_out(base_addr); - return; - } - break; - - case USB_REQ_GET_STATUS: - dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n"); - s3c2410_udc_clear_ep0_opr(base_addr); - - if (dev->req_std) { - if (!s3c2410_udc_get_status(dev, crq)) - return; - } - break; - - case USB_REQ_CLEAR_FEATURE: - s3c2410_udc_clear_ep0_opr(base_addr); - - if (crq->bRequestType != USB_RECIP_ENDPOINT) - break; - - if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) - break; - - s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0); - s3c2410_udc_set_ep0_de_out(base_addr); - return; - - case USB_REQ_SET_FEATURE: - s3c2410_udc_clear_ep0_opr(base_addr); - - if (crq->bRequestType != USB_RECIP_ENDPOINT) - break; - - if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) - break; - - s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1); - s3c2410_udc_set_ep0_de_out(base_addr); - return; - - default: - s3c2410_udc_clear_ep0_opr(base_addr); - break; - } - - if (crq->bRequestType & USB_DIR_IN) - dev->ep0state = EP0_IN_DATA_PHASE; - else - dev->ep0state = EP0_OUT_DATA_PHASE; - - if (!dev->driver) - return; - - /* deliver the request to the gadget driver */ - ret = dev->driver->setup(&dev->gadget, crq); - if (ret < 0) { - if (dev->req_config) { - dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n", - crq->bRequest, ret); - return; - } - - if (ret == -EOPNOTSUPP) - dprintk(DEBUG_NORMAL, "Operation not supported\n"); - else - dprintk(DEBUG_NORMAL, - "dev->driver->setup failed. (%d)\n", ret); - - udelay(5); - s3c2410_udc_set_ep0_ss(base_addr); - s3c2410_udc_set_ep0_de_out(base_addr); - dev->ep0state = EP0_IDLE; - /* deferred i/o == no response yet */ - } else if (dev->req_pending) { - dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n"); - dev->req_pending = 0; - } - - dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]); -} - -static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev) -{ - u32 ep0csr; - struct s3c2410_ep *ep = &dev->ep[0]; - struct s3c2410_request *req; - struct usb_ctrlrequest crq; - - if (list_empty(&ep->queue)) - req = NULL; - else - req = list_entry(ep->queue.next, struct s3c2410_request, queue); - - /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to - * S3C2410_UDC_EP0_CSR_REG when index is zero */ - - udc_write(0, S3C2410_UDC_INDEX_REG); - ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - - dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n", - ep0csr, ep0states[dev->ep0state]); - - /* clear stall status */ - if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) { - s3c2410_udc_nuke(dev, ep, -EPIPE); - dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n"); - s3c2410_udc_clear_ep0_sst(base_addr); - dev->ep0state = EP0_IDLE; - return; - } - - /* clear setup end */ - if (ep0csr & S3C2410_UDC_EP0_CSR_SE) { - dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n"); - s3c2410_udc_nuke(dev, ep, 0); - s3c2410_udc_clear_ep0_se(base_addr); - dev->ep0state = EP0_IDLE; - } - - switch (dev->ep0state) { - case EP0_IDLE: - s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr); - break; - - case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ - dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n"); - if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) - s3c2410_udc_write_fifo(ep, req); - break; - - case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ - dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n"); - if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req) - s3c2410_udc_read_fifo(ep, req); - break; - - case EP0_END_XFER: - dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n"); - dev->ep0state = EP0_IDLE; - break; - - case EP0_STALL: - dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n"); - dev->ep0state = EP0_IDLE; - break; - } -} - -/* - * handle_ep - Manage I/O endpoints - */ - -static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) -{ - struct s3c2410_request *req; - int is_in = ep->bEndpointAddress & USB_DIR_IN; - u32 ep_csr1; - u32 idx; - - if (likely(!list_empty(&ep->queue))) - req = list_entry(ep->queue.next, - struct s3c2410_request, queue); - else - req = NULL; - - idx = ep->bEndpointAddress & 0x7F; - - if (is_in) { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); - dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n", - idx, ep_csr1, req ? 1 : 0); - - if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) { - dprintk(DEBUG_VERBOSE, "st\n"); - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL, - S3C2410_UDC_IN_CSR1_REG); - return; - } - - if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) - s3c2410_udc_write_fifo(ep, req); - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG); - dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1); - - if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) { - udc_write(idx, S3C2410_UDC_INDEX_REG); - udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL, - S3C2410_UDC_OUT_CSR1_REG); - return; - } - - if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) - s3c2410_udc_read_fifo(ep, req); - } -} - -/* - * s3c2410_udc_irq - interrupt handler - */ -static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev) -{ - struct s3c2410_udc *dev = _dev; - int usb_status; - int usbd_status; - int pwr_reg; - int ep0csr; - int i; - u32 idx, idx2; - unsigned long flags; - - spin_lock_irqsave(&dev->lock, flags); - - /* Driver connected ? */ - if (!dev->driver) { - /* Clear interrupts */ - udc_write(udc_read(S3C2410_UDC_USB_INT_REG), - S3C2410_UDC_USB_INT_REG); - udc_write(udc_read(S3C2410_UDC_EP_INT_REG), - S3C2410_UDC_EP_INT_REG); - } - - /* Save index */ - idx = udc_read(S3C2410_UDC_INDEX_REG); - - /* Read status registers */ - usb_status = udc_read(S3C2410_UDC_USB_INT_REG); - usbd_status = udc_read(S3C2410_UDC_EP_INT_REG); - pwr_reg = udc_read(S3C2410_UDC_PWR_REG); - - udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); - ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - - dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n", - usb_status, usbd_status, pwr_reg, ep0csr); - - /* - * Now, handle interrupts. There's two types : - * - Reset, Resume, Suspend coming -> usb_int_reg - * - EP -> ep_int_reg - */ - - /* RESET */ - if (usb_status & S3C2410_UDC_USBINT_RESET) { - /* two kind of reset : - * - reset start -> pwr reg = 8 - * - reset end -> pwr reg = 0 - **/ - dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n", - ep0csr, pwr_reg); - - dev->gadget.speed = USB_SPEED_UNKNOWN; - udc_write(0x00, S3C2410_UDC_INDEX_REG); - udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3, - S3C2410_UDC_MAXP_REG); - dev->address = 0; - - dev->ep0state = EP0_IDLE; - dev->gadget.speed = USB_SPEED_FULL; - - /* clear interrupt */ - udc_write(S3C2410_UDC_USBINT_RESET, - S3C2410_UDC_USB_INT_REG); - - udc_write(idx, S3C2410_UDC_INDEX_REG); - spin_unlock_irqrestore(&dev->lock, flags); - return IRQ_HANDLED; - } - - /* RESUME */ - if (usb_status & S3C2410_UDC_USBINT_RESUME) { - dprintk(DEBUG_NORMAL, "USB resume\n"); - - /* clear interrupt */ - udc_write(S3C2410_UDC_USBINT_RESUME, - S3C2410_UDC_USB_INT_REG); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver - && dev->driver->resume) - dev->driver->resume(&dev->gadget); - } - - /* SUSPEND */ - if (usb_status & S3C2410_UDC_USBINT_SUSPEND) { - dprintk(DEBUG_NORMAL, "USB suspend\n"); - - /* clear interrupt */ - udc_write(S3C2410_UDC_USBINT_SUSPEND, - S3C2410_UDC_USB_INT_REG); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver - && dev->driver->suspend) - dev->driver->suspend(&dev->gadget); - - dev->ep0state = EP0_IDLE; - } - - /* EP */ - /* control traffic */ - /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready - * generate an interrupt - */ - if (usbd_status & S3C2410_UDC_INT_EP0) { - dprintk(DEBUG_VERBOSE, "USB ep0 irq\n"); - /* Clear the interrupt bit by setting it to 1 */ - udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG); - s3c2410_udc_handle_ep0(dev); - } - - /* endpoint data transfers */ - for (i = 1; i < S3C2410_ENDPOINTS; i++) { - u32 tmp = 1 << i; - if (usbd_status & tmp) { - dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i); - - /* Clear the interrupt bit by setting it to 1 */ - udc_write(tmp, S3C2410_UDC_EP_INT_REG); - s3c2410_udc_handle_ep(&dev->ep[i]); - } - } - - /* what else causes this interrupt? a receive! who is it? */ - if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { - for (i = 1; i < S3C2410_ENDPOINTS; i++) { - idx2 = udc_read(S3C2410_UDC_INDEX_REG); - udc_write(i, S3C2410_UDC_INDEX_REG); - - if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1) - s3c2410_udc_handle_ep(&dev->ep[i]); - - /* restore index */ - udc_write(idx2, S3C2410_UDC_INDEX_REG); - } - } - - dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", irq_usbd); - - /* Restore old index */ - udc_write(idx, S3C2410_UDC_INDEX_REG); - - spin_unlock_irqrestore(&dev->lock, flags); - - return IRQ_HANDLED; -} -/*------------------------- s3c2410_ep_ops ----------------------------------*/ - -static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep) -{ - return container_of(ep, struct s3c2410_ep, ep); -} - -static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget) -{ - return container_of(gadget, struct s3c2410_udc, gadget); -} - -static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req) -{ - return container_of(req, struct s3c2410_request, req); -} - -/* - * s3c2410_udc_ep_enable - */ -static int s3c2410_udc_ep_enable(struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) -{ - struct s3c2410_udc *dev; - struct s3c2410_ep *ep; - u32 max, tmp; - unsigned long flags; - u32 csr1, csr2; - u32 int_en_reg; - - ep = to_s3c2410_ep(_ep); - - if (!_ep || !desc - || _ep->name == ep0name - || desc->bDescriptorType != USB_DT_ENDPOINT) - return -EINVAL; - - dev = ep->dev; - if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) - return -ESHUTDOWN; - - max = usb_endpoint_maxp(desc); - - local_irq_save(flags); - _ep->maxpacket = max; - ep->ep.desc = desc; - ep->halted = 0; - ep->bEndpointAddress = desc->bEndpointAddress; - - /* set max packet */ - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(max >> 3, S3C2410_UDC_MAXP_REG); - - /* set type, direction, address; reset fifo counters */ - if (desc->bEndpointAddress & USB_DIR_IN) { - csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT; - csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN; - - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); - } else { - /* don't flush in fifo or it will cause endpoint interrupt */ - csr1 = S3C2410_UDC_ICSR1_CLRDT; - csr2 = S3C2410_UDC_ICSR2_DMAIEN; - - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); - - csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT; - csr2 = S3C2410_UDC_OCSR2_DMAIEN; - - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG); - udc_write(ep->num, S3C2410_UDC_INDEX_REG); - udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG); - } - - /* enable irqs */ - int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); - udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG); - - /* print some debug message */ - tmp = desc->bEndpointAddress; - dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n", - _ep->name, ep->num, tmp, - desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max); - - local_irq_restore(flags); - s3c2410_udc_set_halt(_ep, 0); - - return 0; -} - -/* - * s3c2410_udc_ep_disable - */ -static int s3c2410_udc_ep_disable(struct usb_ep *_ep) -{ - struct s3c2410_ep *ep = to_s3c2410_ep(_ep); - unsigned long flags; - u32 int_en_reg; - - if (!_ep || !ep->ep.desc) { - dprintk(DEBUG_NORMAL, "%s not enabled\n", - _ep ? ep->ep.name : NULL); - return -EINVAL; - } - - local_irq_save(flags); - - dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name); - - ep->ep.desc = NULL; - ep->halted = 1; - - s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN); - - /* disable irqs */ - int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); - udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG); - - local_irq_restore(flags); - - dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name); - - return 0; -} - -/* - * s3c2410_udc_alloc_request - */ -static struct usb_request * -s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags) -{ - struct s3c2410_request *req; - - dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags); - - if (!_ep) - return NULL; - - req = kzalloc(sizeof(struct s3c2410_request), mem_flags); - if (!req) - return NULL; - - INIT_LIST_HEAD(&req->queue); - return &req->req; -} - -/* - * s3c2410_udc_free_request - */ -static void -s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req) -{ - struct s3c2410_ep *ep = to_s3c2410_ep(_ep); - struct s3c2410_request *req = to_s3c2410_req(_req); - - dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); - - if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name)) - return; - - WARN_ON(!list_empty(&req->queue)); - kfree(req); -} - -/* - * s3c2410_udc_queue - */ -static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, - gfp_t gfp_flags) -{ - struct s3c2410_request *req = to_s3c2410_req(_req); - struct s3c2410_ep *ep = to_s3c2410_ep(_ep); - struct s3c2410_udc *dev; - u32 ep_csr = 0; - int fifo_count = 0; - unsigned long flags; - - if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { - dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__); - return -EINVAL; - } - - dev = ep->dev; - if (unlikely(!dev->driver - || dev->gadget.speed == USB_SPEED_UNKNOWN)) { - return -ESHUTDOWN; - } - - local_irq_save(flags); - - if (unlikely(!_req || !_req->complete - || !_req->buf || !list_empty(&req->queue))) { - if (!_req) - dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__); - else { - dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n", - __func__, !_req->complete, !_req->buf, - !list_empty(&req->queue)); - } - - local_irq_restore(flags); - return -EINVAL; - } - - _req->status = -EINPROGRESS; - _req->actual = 0; - - dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n", - __func__, ep->bEndpointAddress, _req->length); - - if (ep->bEndpointAddress) { - udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG); - - ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) - ? S3C2410_UDC_IN_CSR1_REG - : S3C2410_UDC_OUT_CSR1_REG); - fifo_count = s3c2410_udc_fifo_count_out(); - } else { - udc_write(0, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); - fifo_count = s3c2410_udc_fifo_count_out(); - } - - /* kickstart this i/o queue? */ - if (list_empty(&ep->queue) && !ep->halted) { - if (ep->bEndpointAddress == 0 /* ep0 */) { - switch (dev->ep0state) { - case EP0_IN_DATA_PHASE: - if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY) - && s3c2410_udc_write_fifo(ep, - req)) { - dev->ep0state = EP0_IDLE; - req = NULL; - } - break; - - case EP0_OUT_DATA_PHASE: - if ((!_req->length) - || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) - && s3c2410_udc_read_fifo(ep, - req))) { - dev->ep0state = EP0_IDLE; - req = NULL; - } - break; - - default: - local_irq_restore(flags); - return -EL2HLT; - } - } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0 - && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY)) - && s3c2410_udc_write_fifo(ep, req)) { - req = NULL; - } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) - && fifo_count - && s3c2410_udc_read_fifo(ep, req)) { - req = NULL; - } - } - - /* pio or dma irq handler advances the queue. */ - if (likely(req)) - list_add_tail(&req->queue, &ep->queue); - - local_irq_restore(flags); - - dprintk(DEBUG_VERBOSE, "%s ok\n", __func__); - return 0; -} - -/* - * s3c2410_udc_dequeue - */ -static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct s3c2410_ep *ep = to_s3c2410_ep(_ep); - int retval = -EINVAL; - unsigned long flags; - struct s3c2410_request *req = NULL, *iter; - - dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); - - if (!the_controller->driver) - return -ESHUTDOWN; - - if (!_ep || !_req) - return retval; - - local_irq_save(flags); - - list_for_each_entry(iter, &ep->queue, queue) { - if (&iter->req != _req) - continue; - list_del_init(&iter->queue); - _req->status = -ECONNRESET; - req = iter; - retval = 0; - break; - } - - if (retval == 0) { - dprintk(DEBUG_VERBOSE, - "dequeued req %p from %s, len %d buf %p\n", - req, _ep->name, _req->length, _req->buf); - - s3c2410_udc_done(ep, req, -ECONNRESET); - } - - local_irq_restore(flags); - return retval; -} - -/* - * s3c2410_udc_set_halt - */ -static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value) -{ - struct s3c2410_ep *ep = to_s3c2410_ep(_ep); - u32 ep_csr = 0; - unsigned long flags; - u32 idx; - - if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { - dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__); - return -EINVAL; - } - - local_irq_save(flags); - - idx = ep->bEndpointAddress & 0x7F; - - if (idx == 0) { - s3c2410_udc_set_ep0_ss(base_addr); - s3c2410_udc_set_ep0_de_out(base_addr); - } else { - udc_write(idx, S3C2410_UDC_INDEX_REG); - ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) - ? S3C2410_UDC_IN_CSR1_REG - : S3C2410_UDC_OUT_CSR1_REG); - - if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { - if (value) - udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL, - S3C2410_UDC_IN_CSR1_REG); - else { - ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL; - udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); - ep_csr |= S3C2410_UDC_ICSR1_CLRDT; - udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); - } - } else { - if (value) - udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL, - S3C2410_UDC_OUT_CSR1_REG); - else { - ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL; - udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); - ep_csr |= S3C2410_UDC_OCSR1_CLRDT; - udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); - } - } - } - - ep->halted = value ? 1 : 0; - local_irq_restore(flags); - - return 0; -} - -static const struct usb_ep_ops s3c2410_ep_ops = { - .enable = s3c2410_udc_ep_enable, - .disable = s3c2410_udc_ep_disable, - - .alloc_request = s3c2410_udc_alloc_request, - .free_request = s3c2410_udc_free_request, - - .queue = s3c2410_udc_queue, - .dequeue = s3c2410_udc_dequeue, - - .set_halt = s3c2410_udc_set_halt, -}; - -/*------------------------- usb_gadget_ops ----------------------------------*/ - -/* - * s3c2410_udc_get_frame - */ -static int s3c2410_udc_get_frame(struct usb_gadget *_gadget) -{ - int tmp; - - dprintk(DEBUG_VERBOSE, "%s()\n", __func__); - - tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8; - tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG); - return tmp; -} - -/* - * s3c2410_udc_wakeup - */ -static int s3c2410_udc_wakeup(struct usb_gadget *_gadget) -{ - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - return 0; -} - -/* - * s3c2410_udc_set_selfpowered - */ -static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value) -{ - struct s3c2410_udc *udc = to_s3c2410_udc(gadget); - - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - gadget->is_selfpowered = (value != 0); - if (value) - udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED); - else - udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); - - return 0; -} - -static void s3c2410_udc_disable(struct s3c2410_udc *dev); -static void s3c2410_udc_enable(struct s3c2410_udc *dev); - -static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on) -{ - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - if (udc_info && (udc_info->udc_command || udc->pullup_gpiod)) { - - if (is_on) - s3c2410_udc_enable(udc); - else { - if (udc->gadget.speed != USB_SPEED_UNKNOWN) { - if (udc->driver && udc->driver->disconnect) - udc->driver->disconnect(&udc->gadget); - - } - s3c2410_udc_disable(udc); - } - } else { - return -EOPNOTSUPP; - } - - return 0; -} - -static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active) -{ - struct s3c2410_udc *udc = to_s3c2410_udc(gadget); - - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - udc->vbus = (is_active != 0); - s3c2410_udc_set_pullup(udc, is_active); - return 0; -} - -static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on) -{ - struct s3c2410_udc *udc = to_s3c2410_udc(gadget); - - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - s3c2410_udc_set_pullup(udc, is_on); - return 0; -} - -static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev) -{ - struct s3c2410_udc *dev = _dev; - unsigned int value; - - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - value = gpiod_get_value(dev->vbus_gpiod); - - if (value != dev->vbus) - s3c2410_udc_vbus_session(&dev->gadget, value); - - return IRQ_HANDLED; -} - -static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma) -{ - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - if (udc_info && udc_info->vbus_draw) { - udc_info->vbus_draw(ma); - return 0; - } - - return -ENOTSUPP; -} - -static int s3c2410_udc_start(struct usb_gadget *g, - struct usb_gadget_driver *driver); -static int s3c2410_udc_stop(struct usb_gadget *g); - -static const struct usb_gadget_ops s3c2410_ops = { - .get_frame = s3c2410_udc_get_frame, - .wakeup = s3c2410_udc_wakeup, - .set_selfpowered = s3c2410_udc_set_selfpowered, - .pullup = s3c2410_udc_pullup, - .vbus_session = s3c2410_udc_vbus_session, - .vbus_draw = s3c2410_vbus_draw, - .udc_start = s3c2410_udc_start, - .udc_stop = s3c2410_udc_stop, -}; - -static void s3c2410_udc_command(struct s3c2410_udc *udc, - enum s3c2410_udc_cmd_e cmd) -{ - if (!udc_info) - return; - - if (udc_info->udc_command) { - udc_info->udc_command(cmd); - } else if (udc->pullup_gpiod) { - int value; - - switch (cmd) { - case S3C2410_UDC_P_ENABLE: - value = 1; - break; - case S3C2410_UDC_P_DISABLE: - value = 0; - break; - default: - return; - } - - gpiod_set_value(udc->pullup_gpiod, value); - } -} - -/*------------------------- gadget driver handling---------------------------*/ -/* - * s3c2410_udc_disable - */ -static void s3c2410_udc_disable(struct s3c2410_udc *dev) -{ - dprintk(DEBUG_NORMAL, "%s()\n", __func__); - - /* Disable all interrupts */ - udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG); - udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG); - - /* Clear the interrupt registers */ - udc_write(S3C2410_UDC_USBINT_RESET - | S3C2410_UDC_USBINT_RESUME - | S3C2410_UDC_USBINT_SUSPEND, - S3C2410_UDC_USB_INT_REG); - - udc_write(0x1F, S3C2410_UDC_EP_INT_REG); - - /* Good bye, cruel world */ - s3c2410_udc_command(dev, S3C2410_UDC_P_DISABLE); - - /* Set speed to unknown */ - dev->gadget.speed = USB_SPEED_UNKNOWN; -} - -/* - * s3c2410_udc_reinit - */ -static void s3c2410_udc_reinit(struct s3c2410_udc *dev) -{ - u32 i; - - /* device/ep0 records init */ - INIT_LIST_HEAD(&dev->gadget.ep_list); - INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); - dev->ep0state = EP0_IDLE; - - for (i = 0; i < S3C2410_ENDPOINTS; i++) { - struct s3c2410_ep *ep = &dev->ep[i]; - - if (i != 0) - list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); - - ep->dev = dev; - ep->ep.desc = NULL; - ep->halted = 0; - INIT_LIST_HEAD(&ep->queue); - usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket); - } -} - -/* - * s3c2410_udc_enable - */ -static void s3c2410_udc_enable(struct s3c2410_udc *dev) -{ - int i; - - dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n"); - - /* dev->gadget.speed = USB_SPEED_UNKNOWN; */ - dev->gadget.speed = USB_SPEED_FULL; - - /* Set MAXP for all endpoints */ - for (i = 0; i < S3C2410_ENDPOINTS; i++) { - udc_write(i, S3C2410_UDC_INDEX_REG); - udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3, - S3C2410_UDC_MAXP_REG); - } - - /* Set default power state */ - udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG); - - /* Enable reset and suspend interrupt interrupts */ - udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND, - S3C2410_UDC_USB_INT_EN_REG); - - /* Enable ep0 interrupt */ - udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); - - /* time to say "hello, world" */ - s3c2410_udc_command(dev, S3C2410_UDC_P_ENABLE); -} - -static int s3c2410_udc_start(struct usb_gadget *g, - struct usb_gadget_driver *driver) -{ - struct s3c2410_udc *udc = to_s3c2410(g); - - dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); - - /* Hook the driver */ - udc->driver = driver; - - /* Enable udc */ - s3c2410_udc_enable(udc); - - return 0; -} - -static int s3c2410_udc_stop(struct usb_gadget *g) -{ - struct s3c2410_udc *udc = to_s3c2410(g); - - udc->driver = NULL; - - /* Disable udc */ - s3c2410_udc_disable(udc); - - return 0; -} - -/*---------------------------------------------------------------------------*/ -static struct s3c2410_udc memory = { - .gadget = { - .ops = &s3c2410_ops, - .ep0 = &memory.ep[0].ep, - .name = gadget_name, - .dev = { - .init_name = "gadget", - }, - }, - - /* control endpoint */ - .ep[0] = { - .num = 0, - .ep = { - .name = ep0name, - .ops = &s3c2410_ep_ops, - .maxpacket = EP0_FIFO_SIZE, - .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, - USB_EP_CAPS_DIR_ALL), - }, - .dev = &memory, - }, - - /* first group of endpoints */ - .ep[1] = { - .num = 1, - .ep = { - .name = "ep1-bulk", - .ops = &s3c2410_ep_ops, - .maxpacket = EP_FIFO_SIZE, - .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, - USB_EP_CAPS_DIR_ALL), - }, - .dev = &memory, - .fifo_size = EP_FIFO_SIZE, - .bEndpointAddress = 1, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - }, - .ep[2] = { - .num = 2, - .ep = { - .name = "ep2-bulk", - .ops = &s3c2410_ep_ops, - .maxpacket = EP_FIFO_SIZE, - .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, - USB_EP_CAPS_DIR_ALL), - }, - .dev = &memory, - .fifo_size = EP_FIFO_SIZE, - .bEndpointAddress = 2, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - }, - .ep[3] = { - .num = 3, - .ep = { - .name = "ep3-bulk", - .ops = &s3c2410_ep_ops, - .maxpacket = EP_FIFO_SIZE, - .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, - USB_EP_CAPS_DIR_ALL), - }, - .dev = &memory, - .fifo_size = EP_FIFO_SIZE, - .bEndpointAddress = 3, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - }, - .ep[4] = { - .num = 4, - .ep = { - .name = "ep4-bulk", - .ops = &s3c2410_ep_ops, - .maxpacket = EP_FIFO_SIZE, - .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, - USB_EP_CAPS_DIR_ALL), - }, - .dev = &memory, - .fifo_size = EP_FIFO_SIZE, - .bEndpointAddress = 4, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - } - -}; - -/* - * probe - binds to the platform device - */ -static int s3c2410_udc_probe(struct platform_device *pdev) -{ - struct s3c2410_udc *udc = &memory; - struct device *dev = &pdev->dev; - int retval; - int irq; - - dev_dbg(dev, "%s()\n", __func__); - - usb_bus_clock = clk_get(NULL, "usb-bus-gadget"); - if (IS_ERR(usb_bus_clock)) { - dev_err(dev, "failed to get usb bus clock source\n"); - return PTR_ERR(usb_bus_clock); - } - - clk_prepare_enable(usb_bus_clock); - - udc_clock = clk_get(NULL, "usb-device"); - if (IS_ERR(udc_clock)) { - dev_err(dev, "failed to get udc clock source\n"); - retval = PTR_ERR(udc_clock); - goto err_usb_bus_clk; - } - - clk_prepare_enable(udc_clock); - - mdelay(10); - - dev_dbg(dev, "got and enabled clocks\n"); - - if (strncmp(pdev->name, "s3c2440", 7) == 0) { - dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n"); - memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE; - memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE; - memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE; - memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE; - } - - spin_lock_init(&udc->lock); - udc_info = dev_get_platdata(&pdev->dev); - - base_addr = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base_addr)) { - retval = PTR_ERR(base_addr); - goto err_udc_clk; - } - - the_controller = udc; - platform_set_drvdata(pdev, udc); - - s3c2410_udc_disable(udc); - s3c2410_udc_reinit(udc); - - irq_usbd = platform_get_irq(pdev, 0); - if (irq_usbd < 0) { - retval = irq_usbd; - goto err_udc_clk; - } - - /* irq setup after old hardware state is cleaned up */ - retval = request_irq(irq_usbd, s3c2410_udc_irq, - 0, gadget_name, udc); - - if (retval != 0) { - dev_err(dev, "cannot get irq %i, err %d\n", irq_usbd, retval); - retval = -EBUSY; - goto err_udc_clk; - } - - dev_dbg(dev, "got irq %i\n", irq_usbd); - - udc->vbus_gpiod = gpiod_get_optional(dev, "vbus", GPIOD_IN); - if (IS_ERR(udc->vbus_gpiod)) { - retval = PTR_ERR(udc->vbus_gpiod); - goto err_int; - } - if (udc->vbus_gpiod) { - gpiod_set_consumer_name(udc->vbus_gpiod, "udc vbus"); - - irq = gpiod_to_irq(udc->vbus_gpiod); - if (irq < 0) { - dev_err(dev, "no irq for gpio vbus pin\n"); - retval = irq; - goto err_gpio_claim; - } - - retval = request_irq(irq, s3c2410_udc_vbus_irq, - IRQF_TRIGGER_RISING - | IRQF_TRIGGER_FALLING | IRQF_SHARED, - gadget_name, udc); - - if (retval != 0) { - dev_err(dev, "can't get vbus irq %d, err %d\n", - irq, retval); - retval = -EBUSY; - goto err_gpio_claim; - } - - dev_dbg(dev, "got irq %i\n", irq); - } else { - udc->vbus = 1; - } - - udc->pullup_gpiod = gpiod_get_optional(dev, "pullup", GPIOD_OUT_LOW); - if (IS_ERR(udc->pullup_gpiod)) { - retval = PTR_ERR(udc->pullup_gpiod); - goto err_vbus_irq; - } - gpiod_set_consumer_name(udc->pullup_gpiod, "udc pullup"); - - retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); - if (retval) - goto err_add_udc; - - debugfs_create_file("registers", S_IRUGO, s3c2410_udc_debugfs_root, udc, - &s3c2410_udc_debugfs_fops); - - dev_dbg(dev, "probe ok\n"); - - return 0; - -err_add_udc: -err_vbus_irq: - if (udc->vbus_gpiod) - free_irq(gpiod_to_irq(udc->vbus_gpiod), udc); -err_gpio_claim: -err_int: - free_irq(irq_usbd, udc); -err_udc_clk: - clk_disable_unprepare(udc_clock); - clk_put(udc_clock); - udc_clock = NULL; -err_usb_bus_clk: - clk_disable_unprepare(usb_bus_clock); - clk_put(usb_bus_clock); - usb_bus_clock = NULL; - - return retval; -} - -/* - * s3c2410_udc_remove - */ -static int s3c2410_udc_remove(struct platform_device *pdev) -{ - struct s3c2410_udc *udc = platform_get_drvdata(pdev); - - dev_dbg(&pdev->dev, "%s()\n", __func__); - - if (udc->driver) - return -EBUSY; - - usb_del_gadget_udc(&udc->gadget); - debugfs_remove(debugfs_lookup("registers", s3c2410_udc_debugfs_root)); - - if (udc->vbus_gpiod) - free_irq(gpiod_to_irq(udc->vbus_gpiod), udc); - - free_irq(irq_usbd, udc); - - if (!IS_ERR(udc_clock) && udc_clock != NULL) { - clk_disable_unprepare(udc_clock); - clk_put(udc_clock); - udc_clock = NULL; - } - - if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) { - clk_disable_unprepare(usb_bus_clock); - clk_put(usb_bus_clock); - usb_bus_clock = NULL; - } - - dev_dbg(&pdev->dev, "%s: remove ok\n", __func__); - return 0; -} - -#ifdef CONFIG_PM -static int -s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) -{ - struct s3c2410_udc *udc = platform_get_drvdata(pdev); - - s3c2410_udc_command(udc, S3C2410_UDC_P_DISABLE); - - return 0; -} - -static int s3c2410_udc_resume(struct platform_device *pdev) -{ - struct s3c2410_udc *udc = platform_get_drvdata(pdev); - - s3c2410_udc_command(udc, S3C2410_UDC_P_ENABLE); - - return 0; -} -#else -#define s3c2410_udc_suspend NULL -#define s3c2410_udc_resume NULL -#endif - -static const struct platform_device_id s3c_udc_ids[] = { - { "s3c2410-usbgadget", }, - { "s3c2440-usbgadget", }, - { } -}; -MODULE_DEVICE_TABLE(platform, s3c_udc_ids); - -static struct platform_driver udc_driver_24x0 = { - .driver = { - .name = "s3c24x0-usbgadget", - }, - .probe = s3c2410_udc_probe, - .remove = s3c2410_udc_remove, - .suspend = s3c2410_udc_suspend, - .resume = s3c2410_udc_resume, - .id_table = s3c_udc_ids, -}; - -static int __init udc_init(void) -{ - int retval; - - dprintk(DEBUG_NORMAL, "%s\n", gadget_name); - - s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, - usb_debug_root); - - retval = platform_driver_register(&udc_driver_24x0); - if (retval) - goto err; - - return 0; - -err: - debugfs_remove(s3c2410_udc_debugfs_root); - return retval; -} - -static void __exit udc_exit(void) -{ - platform_driver_unregister(&udc_driver_24x0); - debugfs_remove_recursive(s3c2410_udc_debugfs_root); -} - -module_init(udc_init); -module_exit(udc_exit); - -MODULE_AUTHOR(DRIVER_AUTHOR); -MODULE_DESCRIPTION(DRIVER_DESC); -MODULE_LICENSE("GPL"); diff --git a/drivers/usb/gadget/udc/s3c2410_udc.h b/drivers/usb/gadget/udc/s3c2410_udc.h deleted file mode 100644 index cdbf202e5ee8..000000000000 --- a/drivers/usb/gadget/udc/s3c2410_udc.h +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * linux/drivers/usb/gadget/s3c2410_udc.h - * Samsung on-chip full speed USB device controllers - * - * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard - * Additional cleanups by Ben Dooks <ben-linux@fluff.org> - */ - -#ifndef _S3C2410_UDC_H -#define _S3C2410_UDC_H - -struct s3c2410_ep { - struct list_head queue; - unsigned long last_io; /* jiffies timestamp */ - struct usb_gadget *gadget; - struct s3c2410_udc *dev; - struct usb_ep ep; - u8 num; - - unsigned short fifo_size; - u8 bEndpointAddress; - u8 bmAttributes; - - unsigned halted : 1; - unsigned already_seen : 1; - unsigned setup_stage : 1; -}; - - -/* Warning : ep0 has a fifo of 16 bytes */ -/* Don't try to set 32 or 64 */ -/* also testusb 14 fails wit 16 but is */ -/* fine with 8 */ -#define EP0_FIFO_SIZE 8 -#define EP_FIFO_SIZE 64 -#define DEFAULT_POWER_STATE 0x00 - -#define S3C2440_EP_FIFO_SIZE 128 - -static const char ep0name [] = "ep0"; - -static const char *const ep_name[] = { - ep0name, /* everyone has ep0 */ - /* s3c2410 four bidirectional bulk endpoints */ - "ep1-bulk", "ep2-bulk", "ep3-bulk", "ep4-bulk", -}; - -#define S3C2410_ENDPOINTS ARRAY_SIZE(ep_name) - -struct s3c2410_request { - struct list_head queue; /* ep's requests */ - struct usb_request req; -}; - -enum ep0_state { - EP0_IDLE, - EP0_IN_DATA_PHASE, - EP0_OUT_DATA_PHASE, - EP0_END_XFER, - EP0_STALL, -}; - -static const char *ep0states[]= { - "EP0_IDLE", - "EP0_IN_DATA_PHASE", - "EP0_OUT_DATA_PHASE", - "EP0_END_XFER", - "EP0_STALL", -}; - -struct s3c2410_udc { - spinlock_t lock; - - struct s3c2410_ep ep[S3C2410_ENDPOINTS]; - int address; - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - struct s3c2410_request fifo_req; - u8 fifo_buf[EP_FIFO_SIZE]; - u16 devstatus; - - u32 port_status; - int ep0state; - - struct gpio_desc *vbus_gpiod; - struct gpio_desc *pullup_gpiod; - - unsigned got_irq : 1; - - unsigned req_std : 1; - unsigned req_config : 1; - unsigned req_pending : 1; - u8 vbus; - int irq; -}; -#define to_s3c2410(g) (container_of((g), struct s3c2410_udc, gadget)) - -#endif diff --git a/drivers/usb/gadget/udc/s3c2410_udc_regs.h b/drivers/usb/gadget/udc/s3c2410_udc_regs.h deleted file mode 100644 index d8d2eeaca088..000000000000 --- a/drivers/usb/gadget/udc/s3c2410_udc_regs.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at> - */ - -#ifndef __ASM_ARCH_REGS_UDC_H -#define __ASM_ARCH_REGS_UDC_H - -#define S3C2410_USBDREG(x) (x) - -#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) -#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) -#define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148) - -#define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158) -#define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c) - -#define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c) - -#define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170) -#define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174) - -#define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0) -#define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4) -#define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8) -#define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc) -#define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0) - -#define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200) -#define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204) -#define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208) -#define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c) -#define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210) -#define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214) - -#define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218) -#define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c) -#define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220) -#define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224) -#define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228) -#define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c) - -#define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240) -#define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244) -#define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248) -#define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c) -#define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250) -#define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254) - -#define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258) -#define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c) -#define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260) -#define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264) -#define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268) -#define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c) - -#define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178) - -/* indexed registers */ - -#define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180) - -#define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184) - -#define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184) -#define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188) - -#define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190) -#define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194) -#define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) -#define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) - -#define S3C2410_UDC_FUNCADDR_UPDATE (1 << 7) - -#define S3C2410_UDC_PWR_ISOUP (1 << 7) /* R/W */ -#define S3C2410_UDC_PWR_RESET (1 << 3) /* R */ -#define S3C2410_UDC_PWR_RESUME (1 << 2) /* R/W */ -#define S3C2410_UDC_PWR_SUSPEND (1 << 1) /* R */ -#define S3C2410_UDC_PWR_ENSUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_PWR_DEFAULT (0x00) - -#define S3C2410_UDC_INT_EP4 (1 << 4) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP3 (1 << 3) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP2 (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP1 (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP0 (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_USBINT_RESET (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_RESUME (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_SUSPEND (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_INTE_EP4 (1 << 4) /* R/W */ -#define S3C2410_UDC_INTE_EP3 (1 << 3) /* R/W */ -#define S3C2410_UDC_INTE_EP2 (1 << 2) /* R/W */ -#define S3C2410_UDC_INTE_EP1 (1 << 1) /* R/W */ -#define S3C2410_UDC_INTE_EP0 (1 << 0) /* R/W */ - -#define S3C2410_UDC_USBINTE_RESET (1 << 2) /* R/W */ -#define S3C2410_UDC_USBINTE_SUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_INDEX_EP0 (0x00) -#define S3C2410_UDC_INDEX_EP1 (0x01) -#define S3C2410_UDC_INDEX_EP2 (0x02) -#define S3C2410_UDC_INDEX_EP3 (0x03) -#define S3C2410_UDC_INDEX_EP4 (0x04) - -#define S3C2410_UDC_ICSR1_CLRDT (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR1_SENTSTL (1 << 5) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_SENDSTL (1 << 4) /* R/W */ -#define S3C2410_UDC_ICSR1_FFLUSH (1 << 3) /* W (set only) */ -#define S3C2410_UDC_ICSR1_UNDRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_PKTRDY (1 << 0) /* R/W (set only) */ - -#define S3C2410_UDC_ICSR2_AUTOSET (1 << 7) /* R/W */ -#define S3C2410_UDC_ICSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR2_MODEIN (1 << 5) /* R/W */ -#define S3C2410_UDC_ICSR2_DMAIEN (1 << 4) /* R/W */ - -#define S3C2410_UDC_OCSR1_CLRDT (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR1_SENTSTL (1 << 6) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_SENDSTL (1 << 5) /* R/W */ -#define S3C2410_UDC_OCSR1_FFLUSH (1 << 4) /* R/W */ -#define S3C2410_UDC_OCSR1_DERROR (1 << 3) /* R */ -#define S3C2410_UDC_OCSR1_OVRRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_PKTRDY (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_OCSR2_AUTOCLR (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_OCSR2_DMAIEN (1 << 5) /* R/W */ - -#define S3C2410_UDC_EP0_CSR_OPKRDY (1 << 0) -#define S3C2410_UDC_EP0_CSR_IPKRDY (1 << 1) -#define S3C2410_UDC_EP0_CSR_SENTSTL (1 << 2) -#define S3C2410_UDC_EP0_CSR_DE (1 << 3) -#define S3C2410_UDC_EP0_CSR_SE (1 << 4) -#define S3C2410_UDC_EP0_CSR_SENDSTL (1 << 5) -#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1 << 6) -#define S3C2410_UDC_EP0_CSR_SSE (1 << 7) - -#define S3C2410_UDC_MAXP_8 (1 << 0) -#define S3C2410_UDC_MAXP_16 (1 << 1) -#define S3C2410_UDC_MAXP_32 (1 << 2) -#define S3C2410_UDC_MAXP_64 (1 << 3) - -#endif diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8d799d23c476..a97923897c8e 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -316,18 +316,6 @@ config USB_OCTEON_HCD To compile this driver as a module, choose M here. The module will be called octeon-hcd. -config USB_CNS3XXX_EHCI - bool "Cavium CNS3XXX EHCI Module (DEPRECATED)" - depends on ARCH_CNS3XXX || COMPILE_TEST - select USB_EHCI_HCD_PLATFORM - help - This option is deprecated now and the driver was removed, use - USB_EHCI_HCD_PLATFORM instead. - - Enable support for the CNS3XXX SOC's on-chip EHCI controller. - It is needed for high-speed (480Mbit/sec) USB 2.0 device - support. - config USB_EHCI_HCD_PLATFORM tristate "Generic EHCI driver for a platform device" help @@ -421,7 +409,6 @@ if USB_OHCI_HCD config USB_OHCI_HCD_OMAP1 tristate "OHCI support for OMAP1/2 chips" depends on ARCH_OMAP1 - depends on ISP1301_OMAP || !(MACH_OMAP_H2 || MACH_OMAP_H3) default y help Enables support for the OHCI controller on OMAP1/2 chips. @@ -444,12 +431,12 @@ config USB_OHCI_HCD_STI STMicroelectronics consumer electronics SoC's. config USB_OHCI_HCD_S3C2410 - tristate "OHCI support for Samsung S3C24xx/S3C64xx SoC series" - depends on USB_OHCI_HCD && (ARCH_S3C24XX || ARCH_S3C64XX || COMPILE_TEST) - default y if (ARCH_S3C24XX || ARCH_S3C64XX) + tristate "OHCI support for Samsung S3C64xx SoC series" + depends on USB_OHCI_HCD && (ARCH_S3C64XX || COMPILE_TEST) + default ARCH_S3C64XX help Enables support for the on-chip OHCI controller on - S3C24xx/S3C64xx chips. + S3C64xx chips. config USB_OHCI_HCD_LPC32XX tristate "Support for LPC on-chip OHCI USB controller" @@ -566,17 +553,6 @@ config USB_OHCI_EXYNOS Enable support for the Samsung S5Pv210 and Exynos SOC's on-chip OHCI controller. -config USB_CNS3XXX_OHCI - bool "Cavium CNS3XXX OHCI Module (DEPRECATED)" - depends on ARCH_CNS3XXX || COMPILE_TEST - select USB_OHCI_HCD_PLATFORM - help - This option is deprecated now and the driver was removed, use - USB_OHCI_HCD_PLATFORM instead. - - Enable support for the CNS3XXX SOC's on-chip OHCI controller. - It is needed for low-speed USB 1.0 device support. - config USB_OHCI_HCD_PLATFORM tristate "Generic OHCI driver for a platform device" help diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 0457dd9f6c19..4f9982ecfb58 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1264,11 +1264,6 @@ MODULE_LICENSE ("GPL"); #define SM501_OHCI_DRIVER ohci_hcd_sm501_driver #endif -#ifdef CONFIG_MFD_TC6393XB -#include "ohci-tmio.c" -#define TMIO_OHCI_DRIVER ohci_hcd_tmio_driver -#endif - static int __init ohci_hcd_mod_init(void) { int retval = 0; @@ -1306,19 +1301,9 @@ static int __init ohci_hcd_mod_init(void) goto error_sm501; #endif -#ifdef TMIO_OHCI_DRIVER - retval = platform_driver_register(&TMIO_OHCI_DRIVER); - if (retval < 0) - goto error_tmio; -#endif - return retval; /* Error path */ -#ifdef TMIO_OHCI_DRIVER - platform_driver_unregister(&TMIO_OHCI_DRIVER); - error_tmio: -#endif #ifdef SM501_OHCI_DRIVER platform_driver_unregister(&SM501_OHCI_DRIVER); error_sm501: @@ -1345,9 +1330,6 @@ module_init(ohci_hcd_mod_init); static void __exit ohci_hcd_mod_exit(void) { -#ifdef TMIO_OHCI_DRIVER - platform_driver_unregister(&TMIO_OHCI_DRIVER); -#endif #ifdef SM501_OHCI_DRIVER platform_driver_unregister(&SM501_OHCI_DRIVER); #endif diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index cb29701df911..c82121602511 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -67,8 +67,6 @@ static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on) } } -#ifdef CONFIG_USB_OTG - static void start_hnp(struct ohci_hcd *ohci) { struct usb_hcd *hcd = ohci_to_hcd(ohci); @@ -87,8 +85,6 @@ static void start_hnp(struct ohci_hcd *ohci) local_irq_restore(flags); } -#endif - /*-------------------------------------------------------------------------*/ static int ohci_omap_reset(struct usb_hcd *hcd) @@ -107,16 +103,11 @@ static int ohci_omap_reset(struct usb_hcd *hcd) hcd->power_budget = 8; } - /* boards can use OTG transceivers in non-OTG modes */ - need_transceiver = need_transceiver - || machine_is_omap_h2() || machine_is_omap_h3(); - /* XXX OMAP16xx only */ if (config->ocpi_enable) config->ocpi_enable(); -#ifdef CONFIG_USB_OTG - if (need_transceiver) { + if (IS_ENABLED(CONFIG_USB_OTG) && need_transceiver) { hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2); if (!IS_ERR_OR_NULL(hcd->usb_phy)) { int status = otg_set_host(hcd->usb_phy->otg, @@ -133,7 +124,6 @@ static int ohci_omap_reset(struct usb_hcd *hcd) hcd->skip_phy_initialization = 1; ohci->start_hnp = start_hnp; } -#endif omap_ohci_clock_power(priv, 1); @@ -150,7 +140,7 @@ static int ohci_omap_reset(struct usb_hcd *hcd) } /* board-specific power switching and overcurrent support */ - if (machine_is_omap_osk() || machine_is_omap_innovator()) { + if (machine_is_omap_osk()) { u32 rh = roothub_a (ohci); /* power switching (ganged by default) */ diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index a1dad8745622..0bc7e96bcc93 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c @@ -29,7 +29,6 @@ #include <linux/of_platform.h> #include <linux/of_gpio.h> #include <linux/platform_data/usb-ohci-pxa27x.h> -#include <linux/platform_data/usb-pxa3xx-ulpi.h> #include <linux/platform_device.h> #include <linux/regulator/consumer.h> #include <linux/signal.h> @@ -275,7 +274,6 @@ static int pxa27x_start_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev) int retval; struct pxaohci_platform_data *inf; uint32_t uhchr; - struct usb_hcd *hcd = dev_get_drvdata(dev); inf = dev_get_platdata(dev); @@ -301,9 +299,6 @@ static int pxa27x_start_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev) return retval; } - if (cpu_is_pxa3xx()) - pxa3xx_u2d_start_hc(&hcd->self); - uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) & ~UHCHR_SSE; __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE); @@ -316,14 +311,10 @@ static int pxa27x_start_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev) static void pxa27x_stop_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev) { struct pxaohci_platform_data *inf; - struct usb_hcd *hcd = dev_get_drvdata(dev); uint32_t uhccoms; inf = dev_get_platdata(dev); - if (cpu_is_pxa3xx()) - pxa3xx_u2d_stop_hc(&hcd->self); - if (inf->exit) inf->exit(dev); diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c index 75c2b28b3379..aca0338a2983 100644 --- a/drivers/usb/host/ohci-sa1111.c +++ b/drivers/usb/host/ohci-sa1111.c @@ -125,10 +125,7 @@ static int sa1111_start_hc(struct sa1111_dev *dev) dev_dbg(&dev->dev, "starting SA-1111 OHCI USB Controller\n"); - if (machine_is_xp860() || - machine_is_assabet() || - machine_is_pfs168() || - machine_is_badge4()) + if (machine_is_assabet()) usb_rst = USB_RESET_PWRSENSELOW | USB_RESET_PWRCTRLLOW; /* diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c deleted file mode 100644 index 49539b9f0e94..000000000000 --- a/drivers/usb/host/ohci-tmio.c +++ /dev/null @@ -1,364 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * OHCI HCD(Host Controller Driver) for USB. - * - *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> - *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> - *(C) Copyright 2002 Hewlett-Packard Company - * - * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core - * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com> - * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com> - * - * This is known to work with the following variants: - * TC6393XB revision 3 (32kB SRAM) - * - * The TMIO's OHCI core DMAs through a small internal buffer that - * is directly addressable by the CPU. - * - * Written from sparse documentation from Toshiba and Sharp's driver - * for the 2.4 kernel, - * usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc. - */ - -#include <linux/platform_device.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/dma-mapping.h> - -/*-------------------------------------------------------------------------*/ - -/* - * USB Host Controller Configuration Register - */ -#define CCR_REVID 0x08 /* b Revision ID */ -#define CCR_BASE 0x10 /* l USB Control Register Base Address Low */ -#define CCR_ILME 0x40 /* b Internal Local Memory Enable */ -#define CCR_PM 0x4c /* w Power Management */ -#define CCR_INTC 0x50 /* b INT Control */ -#define CCR_LMW1L 0x54 /* w Local Memory Window 1 LMADRS Low */ -#define CCR_LMW1H 0x56 /* w Local Memory Window 1 LMADRS High */ -#define CCR_LMW1BL 0x58 /* w Local Memory Window 1 Base Address Low */ -#define CCR_LMW1BH 0x5A /* w Local Memory Window 1 Base Address High */ -#define CCR_LMW2L 0x5C /* w Local Memory Window 2 LMADRS Low */ -#define CCR_LMW2H 0x5E /* w Local Memory Window 2 LMADRS High */ -#define CCR_LMW2BL 0x60 /* w Local Memory Window 2 Base Address Low */ -#define CCR_LMW2BH 0x62 /* w Local Memory Window 2 Base Address High */ -#define CCR_MISC 0xFC /* b MISC */ - -#define CCR_PM_GKEN 0x0001 -#define CCR_PM_CKRNEN 0x0002 -#define CCR_PM_USBPW1 0x0004 -#define CCR_PM_USBPW2 0x0008 -#define CCR_PM_USBPW3 0x0010 -#define CCR_PM_PMEE 0x0100 -#define CCR_PM_PMES 0x8000 - -/*-------------------------------------------------------------------------*/ - -struct tmio_hcd { - void __iomem *ccr; - spinlock_t lock; /* protects RMW cycles */ -}; - -#define hcd_to_tmio(hcd) ((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1)) - -/*-------------------------------------------------------------------------*/ - -static void tmio_write_pm(struct platform_device *dev) -{ - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - u16 pm; - unsigned long flags; - - spin_lock_irqsave(&tmio->lock, flags); - - pm = CCR_PM_GKEN | CCR_PM_CKRNEN | - CCR_PM_PMEE | CCR_PM_PMES; - - tmio_iowrite16(pm, tmio->ccr + CCR_PM); - spin_unlock_irqrestore(&tmio->lock, flags); -} - -static void tmio_stop_hc(struct platform_device *dev) -{ - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct ohci_hcd *ohci = hcd_to_ohci(hcd); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - u16 pm; - - pm = CCR_PM_GKEN | CCR_PM_CKRNEN; - switch (ohci->num_ports) { - default: - dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports); - fallthrough; - case 3: - pm |= CCR_PM_USBPW3; - fallthrough; - case 2: - pm |= CCR_PM_USBPW2; - fallthrough; - case 1: - pm |= CCR_PM_USBPW1; - } - tmio_iowrite8(0, tmio->ccr + CCR_INTC); - tmio_iowrite8(0, tmio->ccr + CCR_ILME); - tmio_iowrite16(0, tmio->ccr + CCR_BASE); - tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2); - tmio_iowrite16(pm, tmio->ccr + CCR_PM); -} - -static void tmio_start_hc(struct platform_device *dev) -{ - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - unsigned long base = hcd->rsrc_start; - - tmio_write_pm(dev); - tmio_iowrite16(base, tmio->ccr + CCR_BASE); - tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2); - tmio_iowrite8(1, tmio->ccr + CCR_ILME); - tmio_iowrite8(2, tmio->ccr + CCR_INTC); - - dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n", - tmio_ioread8(tmio->ccr + CCR_REVID), - (u64) hcd->rsrc_start, hcd->irq); -} - -static int ohci_tmio_start(struct usb_hcd *hcd) -{ - struct ohci_hcd *ohci = hcd_to_ohci(hcd); - int ret; - - if ((ret = ohci_init(ohci)) < 0) - return ret; - - if ((ret = ohci_run(ohci)) < 0) { - dev_err(hcd->self.controller, "can't start %s\n", - hcd->self.bus_name); - ohci_stop(hcd); - return ret; - } - - return 0; -} - -static const struct hc_driver ohci_tmio_hc_driver = { - .description = hcd_name, - .product_desc = "TMIO OHCI USB Host Controller", - .hcd_priv_size = sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd), - - /* generic hardware linkage */ - .irq = ohci_irq, - .flags = HCD_USB11 | HCD_MEMORY, - - /* basic lifecycle operations */ - .start = ohci_tmio_start, - .stop = ohci_stop, - .shutdown = ohci_shutdown, - - /* managing i/o requests and associated device resources */ - .urb_enqueue = ohci_urb_enqueue, - .urb_dequeue = ohci_urb_dequeue, - .endpoint_disable = ohci_endpoint_disable, - - /* scheduling support */ - .get_frame_number = ohci_get_frame, - - /* root hub support */ - .hub_status_data = ohci_hub_status_data, - .hub_control = ohci_hub_control, -#ifdef CONFIG_PM - .bus_suspend = ohci_bus_suspend, - .bus_resume = ohci_bus_resume, -#endif - .start_port_reset = ohci_start_port_reset, -}; - -/*-------------------------------------------------------------------------*/ -static struct platform_driver ohci_hcd_tmio_driver; - -static int ohci_hcd_tmio_drv_probe(struct platform_device *dev) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0); - struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1); - struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2); - int irq = platform_get_irq(dev, 0); - struct tmio_hcd *tmio; - struct ohci_hcd *ohci; - struct usb_hcd *hcd; - int ret; - - if (usb_disabled()) - return -ENODEV; - - if (!cell || !regs || !config || !sram) - return -EINVAL; - - if (irq < 0) - return irq; - - hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev)); - if (!hcd) { - ret = -ENOMEM; - goto err_usb_create_hcd; - } - - hcd->rsrc_start = regs->start; - hcd->rsrc_len = resource_size(regs); - - tmio = hcd_to_tmio(hcd); - - spin_lock_init(&tmio->lock); - - tmio->ccr = ioremap(config->start, resource_size(config)); - if (!tmio->ccr) { - ret = -ENOMEM; - goto err_ioremap_ccr; - } - - hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); - if (!hcd->regs) { - ret = -ENOMEM; - goto err_ioremap_regs; - } - - if (cell->enable) { - ret = cell->enable(dev); - if (ret) - goto err_enable; - } - - tmio_start_hc(dev); - ohci = hcd_to_ohci(hcd); - ohci_hcd_init(ohci); - - ret = usb_hcd_setup_local_mem(hcd, sram->start, sram->start, - resource_size(sram)); - if (ret < 0) - goto err_enable; - - ret = usb_add_hcd(hcd, irq, 0); - if (ret) - goto err_add_hcd; - - device_wakeup_enable(hcd->self.controller); - if (ret == 0) - return ret; - - usb_remove_hcd(hcd); - -err_add_hcd: - tmio_stop_hc(dev); - if (cell->disable) - cell->disable(dev); -err_enable: - iounmap(hcd->regs); -err_ioremap_regs: - iounmap(tmio->ccr); -err_ioremap_ccr: - usb_put_hcd(hcd); -err_usb_create_hcd: - - return ret; -} - -static int ohci_hcd_tmio_drv_remove(struct platform_device *dev) -{ - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - const struct mfd_cell *cell = mfd_get_cell(dev); - - usb_remove_hcd(hcd); - tmio_stop_hc(dev); - if (cell->disable) - cell->disable(dev); - iounmap(hcd->regs); - iounmap(tmio->ccr); - usb_put_hcd(hcd); - - return 0; -} - -#ifdef CONFIG_PM -static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct ohci_hcd *ohci = hcd_to_ohci(hcd); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - unsigned long flags; - u8 misc; - int ret; - - if (time_before(jiffies, ohci->next_statechange)) - msleep(5); - ohci->next_statechange = jiffies; - - spin_lock_irqsave(&tmio->lock, flags); - - misc = tmio_ioread8(tmio->ccr + CCR_MISC); - misc |= 1 << 3; /* USSUSP */ - tmio_iowrite8(misc, tmio->ccr + CCR_MISC); - - spin_unlock_irqrestore(&tmio->lock, flags); - - if (cell->suspend) { - ret = cell->suspend(dev); - if (ret) - return ret; - } - return 0; -} - -static int ohci_hcd_tmio_drv_resume(struct platform_device *dev) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct usb_hcd *hcd = platform_get_drvdata(dev); - struct ohci_hcd *ohci = hcd_to_ohci(hcd); - struct tmio_hcd *tmio = hcd_to_tmio(hcd); - unsigned long flags; - u8 misc; - int ret; - - if (time_before(jiffies, ohci->next_statechange)) - msleep(5); - ohci->next_statechange = jiffies; - - if (cell->resume) { - ret = cell->resume(dev); - if (ret) - return ret; - } - - tmio_start_hc(dev); - - spin_lock_irqsave(&tmio->lock, flags); - - misc = tmio_ioread8(tmio->ccr + CCR_MISC); - misc &= ~(1 << 3); /* USSUSP */ - tmio_iowrite8(misc, tmio->ccr + CCR_MISC); - - spin_unlock_irqrestore(&tmio->lock, flags); - - ohci_resume(hcd, false); - - return 0; -} -#else -#define ohci_hcd_tmio_drv_suspend NULL -#define ohci_hcd_tmio_drv_resume NULL -#endif - -static struct platform_driver ohci_hcd_tmio_driver = { - .probe = ohci_hcd_tmio_drv_probe, - .remove = ohci_hcd_tmio_drv_remove, - .shutdown = usb_hcd_platform_shutdown, - .suspend = ohci_hcd_tmio_drv_suspend, - .resume = ohci_hcd_tmio_drv_resume, - .driver = { - .name = "tmio-ohci", - }, -}; diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 915df5726a5c..5f629d7cad64 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -28,23 +28,6 @@ config FSL_USB2_OTG help Enable this to support Freescale USB OTG transceiver. -config ISP1301_OMAP - tristate "Philips ISP1301 with OMAP OTG" - depends on I2C - depends on ARCH_OMAP_OTG || (ARM && COMPILE_TEST) - depends on USB - depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't be 'y' - select USB_PHY - help - If you say yes here you get support for the Philips ISP1301 - USB-On-The-Go transceiver working with the OMAP OTG controller. - The ISP1301 is a full speed USB transceiver which is used in - products including H2, H3, and H4 development boards for Texas - Instruments OMAP processors. - - This driver can also be built as a module. If so, the module - will be called phy-isp1301-omap. - config KEYSTONE_USB_PHY tristate "Keystone USB PHY Driver" depends on ARCH_KEYSTONE || COMPILE_TEST diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index df1d99010079..e5d619b4d8f6 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -9,7 +9,6 @@ obj-$(CONFIG_OF) += of.o obj-$(CONFIG_AB8500_USB) += phy-ab8500-usb.o obj-$(CONFIG_FSL_USB2_OTG) += phy-fsl-usb.o -obj-$(CONFIG_ISP1301_OMAP) += phy-isp1301-omap.o obj-$(CONFIG_NOP_USB_XCEIV) += phy-generic.o obj-$(CONFIG_TAHVO_USB) += phy-tahvo.o obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c deleted file mode 100644 index 931610b76f3d..000000000000 --- a/drivers/usb/phy/phy-isp1301-omap.c +++ /dev/null @@ -1,1639 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * isp1301_omap - ISP 1301 USB transceiver, talking to OMAP OTG controller - * - * Copyright (C) 2004 Texas Instruments - * Copyright (C) 2004 David Brownell - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/gpio/consumer.h> -#include <linux/usb/ch9.h> -#include <linux/usb/gadget.h> -#include <linux/usb.h> -#include <linux/usb/otg.h> -#include <linux/i2c.h> -#include <linux/workqueue.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <linux/soc/ti/omap1-mux.h> -#include <linux/soc/ti/omap1-usb.h> -#include <linux/soc/ti/omap1-io.h> - -#undef VERBOSE - - -#define DRIVER_VERSION "24 August 2004" -#define DRIVER_NAME (isp1301_driver.driver.name) - -MODULE_DESCRIPTION("ISP1301 USB OTG Transceiver Driver"); -MODULE_LICENSE("GPL"); - -struct isp1301 { - struct usb_phy phy; - struct i2c_client *client; - void (*i2c_release)(struct device *dev); - - int irq_type; - - u32 last_otg_ctrl; - unsigned working:1; - - struct timer_list timer; - - /* use keventd context to change the state for us */ - struct work_struct work; - - unsigned long todo; -# define WORK_UPDATE_ISP 0 /* update ISP from OTG */ -# define WORK_UPDATE_OTG 1 /* update OTG from ISP */ -# define WORK_HOST_RESUME 4 /* resume host */ -# define WORK_TIMER 6 /* timer fired */ -# define WORK_STOP 7 /* don't resubmit */ -}; - - -/* bits in OTG_CTRL */ - -#define OTG_XCEIV_OUTPUTS \ - (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID) -#define OTG_XCEIV_INPUTS \ - (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID) -#define OTG_CTRL_BITS \ - (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP) - /* and OTG_PULLUP is sometimes written */ - -#define OTG_CTRL_MASK (OTG_DRIVER_SEL| \ - OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \ - OTG_CTRL_BITS) - - -/*-------------------------------------------------------------------------*/ - -/* board-specific PM hooks */ - -#if defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_MACH_OMAP_H3) - -#if IS_REACHABLE(CONFIG_TPS65010) - -#include <linux/mfd/tps65010.h> - -#else - -static inline int tps65010_set_vbus_draw(unsigned mA) -{ - pr_debug("tps65010: draw %d mA (STUB)\n", mA); - return 0; -} - -#endif - -static void enable_vbus_draw(struct isp1301 *isp, unsigned mA) -{ - int status = tps65010_set_vbus_draw(mA); - if (status < 0) - pr_debug(" VBUS %d mA error %d\n", mA, status); -} - -#else - -static void enable_vbus_draw(struct isp1301 *isp, unsigned mA) -{ - /* H4 controls this by DIP switch S2.4; no soft control. - * ON means the charger is always enabled. Leave it OFF - * unless the OTG port is used only in B-peripheral mode. - */ -} - -#endif - -static void enable_vbus_source(struct isp1301 *isp) -{ - /* this board won't supply more than 8mA vbus power. - * some boards can switch a 100ma "unit load" (or more). - */ -} - - -/* products will deliver OTG messages with LEDs, GUI, etc */ -static inline void notresponding(struct isp1301 *isp) -{ - printk(KERN_NOTICE "OTG device not responding.\n"); -} - - -/*-------------------------------------------------------------------------*/ - -static struct i2c_driver isp1301_driver; - -/* smbus apis are used for portability */ - -static inline u8 -isp1301_get_u8(struct isp1301 *isp, u8 reg) -{ - return i2c_smbus_read_byte_data(isp->client, reg + 0); -} - -static inline int -isp1301_get_u16(struct isp1301 *isp, u8 reg) -{ - return i2c_smbus_read_word_data(isp->client, reg); -} - -static inline int -isp1301_set_bits(struct isp1301 *isp, u8 reg, u8 bits) -{ - return i2c_smbus_write_byte_data(isp->client, reg + 0, bits); -} - -static inline int -isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits) -{ - return i2c_smbus_write_byte_data(isp->client, reg + 1, bits); -} - -/*-------------------------------------------------------------------------*/ - -/* identification */ -#define ISP1301_VENDOR_ID 0x00 /* u16 read */ -#define ISP1301_PRODUCT_ID 0x02 /* u16 read */ -#define ISP1301_BCD_DEVICE 0x14 /* u16 read */ - -#define I2C_VENDOR_ID_PHILIPS 0x04cc -#define I2C_PRODUCT_ID_PHILIPS_1301 0x1301 - -/* operational registers */ -#define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ -# define MC1_SPEED (1 << 0) -# define MC1_SUSPEND (1 << 1) -# define MC1_DAT_SE0 (1 << 2) -# define MC1_TRANSPARENT (1 << 3) -# define MC1_BDIS_ACON_EN (1 << 4) -# define MC1_OE_INT_EN (1 << 5) -# define MC1_UART_EN (1 << 6) -# define MC1_MASK 0x7f -#define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */ -# define MC2_GLOBAL_PWR_DN (1 << 0) -# define MC2_SPD_SUSP_CTRL (1 << 1) -# define MC2_BI_DI (1 << 2) -# define MC2_TRANSP_BDIR0 (1 << 3) -# define MC2_TRANSP_BDIR1 (1 << 4) -# define MC2_AUDIO_EN (1 << 5) -# define MC2_PSW_EN (1 << 6) -# define MC2_EN2V7 (1 << 7) -#define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */ -# define OTG1_DP_PULLUP (1 << 0) -# define OTG1_DM_PULLUP (1 << 1) -# define OTG1_DP_PULLDOWN (1 << 2) -# define OTG1_DM_PULLDOWN (1 << 3) -# define OTG1_ID_PULLDOWN (1 << 4) -# define OTG1_VBUS_DRV (1 << 5) -# define OTG1_VBUS_DISCHRG (1 << 6) -# define OTG1_VBUS_CHRG (1 << 7) -#define ISP1301_OTG_STATUS 0x10 /* u8 readonly */ -# define OTG_B_SESS_END (1 << 6) -# define OTG_B_SESS_VLD (1 << 7) - -#define ISP1301_INTERRUPT_SOURCE 0x08 /* u8 read */ -#define ISP1301_INTERRUPT_LATCH 0x0A /* u8 read, set, +1 clear */ - -#define ISP1301_INTERRUPT_FALLING 0x0C /* u8 read, set, +1 clear */ -#define ISP1301_INTERRUPT_RISING 0x0E /* u8 read, set, +1 clear */ - -/* same bitfields in all interrupt registers */ -# define INTR_VBUS_VLD (1 << 0) -# define INTR_SESS_VLD (1 << 1) -# define INTR_DP_HI (1 << 2) -# define INTR_ID_GND (1 << 3) -# define INTR_DM_HI (1 << 4) -# define INTR_ID_FLOAT (1 << 5) -# define INTR_BDIS_ACON (1 << 6) -# define INTR_CR_INT (1 << 7) - -/*-------------------------------------------------------------------------*/ - -static inline const char *state_name(struct isp1301 *isp) -{ - return usb_otg_state_string(isp->phy.otg->state); -} - -/*-------------------------------------------------------------------------*/ - -/* NOTE: some of this ISP1301 setup is specific to H2 boards; - * not everything is guarded by board-specific checks, or even using - * omap_usb_config data to deduce MC1_DAT_SE0 and MC2_BI_DI. - * - * ALSO: this currently doesn't use ISP1301 low-power modes - * while OTG is running. - */ - -static void power_down(struct isp1301 *isp) -{ - isp->phy.otg->state = OTG_STATE_UNDEFINED; - - // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); - - isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN); - isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); -} - -static void __maybe_unused power_up(struct isp1301 *isp) -{ - // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); - isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); - - /* do this only when cpu is driving transceiver, - * so host won't see a low speed device... - */ - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); -} - -#define NO_HOST_SUSPEND - -static int host_suspend(struct isp1301 *isp) -{ -#ifdef NO_HOST_SUSPEND - return 0; -#else - struct device *dev; - - if (!isp->phy.otg->host) - return -ENODEV; - - /* Currently ASSUMES only the OTG port matters; - * other ports could be active... - */ - dev = isp->phy.otg->host->controller; - return dev->driver->suspend(dev, 3, 0); -#endif -} - -static int host_resume(struct isp1301 *isp) -{ -#ifdef NO_HOST_SUSPEND - return 0; -#else - struct device *dev; - - if (!isp->phy.otg->host) - return -ENODEV; - - dev = isp->phy.otg->host->controller; - return dev->driver->resume(dev, 0); -#endif -} - -static int gadget_suspend(struct isp1301 *isp) -{ - isp->phy.otg->gadget->b_hnp_enable = 0; - isp->phy.otg->gadget->a_hnp_support = 0; - isp->phy.otg->gadget->a_alt_hnp_support = 0; - return usb_gadget_vbus_disconnect(isp->phy.otg->gadget); -} - -/*-------------------------------------------------------------------------*/ - -#define TIMER_MINUTES 10 -#define TIMER_JIFFIES (TIMER_MINUTES * 60 * HZ) - -/* Almost all our I2C messaging comes from a work queue's task context. - * NOTE: guaranteeing certain response times might mean we shouldn't - * share keventd's work queue; a realtime task might be safest. - */ -static void isp1301_defer_work(struct isp1301 *isp, int work) -{ - int status; - - if (isp && !test_and_set_bit(work, &isp->todo)) { - (void) get_device(&isp->client->dev); - status = schedule_work(&isp->work); - if (!status && !isp->working) - dev_vdbg(&isp->client->dev, - "work item %d may be lost\n", work); - } -} - -/* called from irq handlers */ -static void a_idle(struct isp1301 *isp, const char *tag) -{ - u32 l; - - if (isp->phy.otg->state == OTG_STATE_A_IDLE) - return; - - isp->phy.otg->default_a = 1; - if (isp->phy.otg->host) { - isp->phy.otg->host->is_b_host = 0; - host_suspend(isp); - } - if (isp->phy.otg->gadget) { - isp->phy.otg->gadget->is_a_peripheral = 1; - gadget_suspend(isp); - } - isp->phy.otg->state = OTG_STATE_A_IDLE; - l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; - omap_writel(l, OTG_CTRL); - isp->last_otg_ctrl = l; - pr_debug(" --> %s/%s\n", state_name(isp), tag); -} - -/* called from irq handlers */ -static void b_idle(struct isp1301 *isp, const char *tag) -{ - u32 l; - - if (isp->phy.otg->state == OTG_STATE_B_IDLE) - return; - - isp->phy.otg->default_a = 0; - if (isp->phy.otg->host) { - isp->phy.otg->host->is_b_host = 1; - host_suspend(isp); - } - if (isp->phy.otg->gadget) { - isp->phy.otg->gadget->is_a_peripheral = 0; - gadget_suspend(isp); - } - isp->phy.otg->state = OTG_STATE_B_IDLE; - l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; - omap_writel(l, OTG_CTRL); - isp->last_otg_ctrl = l; - pr_debug(" --> %s/%s\n", state_name(isp), tag); -} - -static void -dump_regs(struct isp1301 *isp, const char *label) -{ - u8 ctrl = isp1301_get_u8(isp, ISP1301_OTG_CONTROL_1); - u8 status = isp1301_get_u8(isp, ISP1301_OTG_STATUS); - u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); - - pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n", - omap_readl(OTG_CTRL), label, state_name(isp), - ctrl, status, src); - /* mode control and irq enables don't change much */ -} - -/*-------------------------------------------------------------------------*/ - -#ifdef CONFIG_USB_OTG - -/* - * The OMAP OTG controller handles most of the OTG state transitions. - * - * We translate isp1301 outputs (mostly voltage comparator status) into - * OTG inputs; OTG outputs (mostly pullup/pulldown controls) and HNP state - * flags into isp1301 inputs ... and infer state transitions. - */ - -#ifdef VERBOSE - -static void check_state(struct isp1301 *isp, const char *tag) -{ - enum usb_otg_state state = OTG_STATE_UNDEFINED; - u8 fsm = omap_readw(OTG_TEST) & 0x0ff; - unsigned extra = 0; - - switch (fsm) { - - /* default-b */ - case 0x0: - state = OTG_STATE_B_IDLE; - break; - case 0x3: - case 0x7: - extra = 1; - case 0x1: - state = OTG_STATE_B_PERIPHERAL; - break; - case 0x11: - state = OTG_STATE_B_SRP_INIT; - break; - - /* extra dual-role default-b states */ - case 0x12: - case 0x13: - case 0x16: - extra = 1; - case 0x17: - state = OTG_STATE_B_WAIT_ACON; - break; - case 0x34: - state = OTG_STATE_B_HOST; - break; - - /* default-a */ - case 0x36: - state = OTG_STATE_A_IDLE; - break; - case 0x3c: - state = OTG_STATE_A_WAIT_VFALL; - break; - case 0x7d: - state = OTG_STATE_A_VBUS_ERR; - break; - case 0x9e: - case 0x9f: - extra = 1; - case 0x89: - state = OTG_STATE_A_PERIPHERAL; - break; - case 0xb7: - state = OTG_STATE_A_WAIT_VRISE; - break; - case 0xb8: - state = OTG_STATE_A_WAIT_BCON; - break; - case 0xb9: - state = OTG_STATE_A_HOST; - break; - case 0xba: - state = OTG_STATE_A_SUSPEND; - break; - default: - break; - } - if (isp->phy.otg->state == state && !extra) - return; - pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, - usb_otg_state_string(state), fsm, state_name(isp), - omap_readl(OTG_CTRL)); -} - -#else - -static inline void check_state(struct isp1301 *isp, const char *tag) { } - -#endif - -/* outputs from ISP1301_INTERRUPT_SOURCE */ -static void update_otg1(struct isp1301 *isp, u8 int_src) -{ - u32 otg_ctrl; - - otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; - otg_ctrl &= ~OTG_XCEIV_INPUTS; - otg_ctrl &= ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD); - - if (int_src & INTR_SESS_VLD) - otg_ctrl |= OTG_ASESSVLD; - else if (isp->phy.otg->state == OTG_STATE_A_WAIT_VFALL) { - a_idle(isp, "vfall"); - otg_ctrl &= ~OTG_CTRL_BITS; - } - if (int_src & INTR_VBUS_VLD) - otg_ctrl |= OTG_VBUSVLD; - if (int_src & INTR_ID_GND) { /* default-A */ - if (isp->phy.otg->state == OTG_STATE_B_IDLE - || isp->phy.otg->state - == OTG_STATE_UNDEFINED) { - a_idle(isp, "init"); - return; - } - } else { /* default-B */ - otg_ctrl |= OTG_ID; - if (isp->phy.otg->state == OTG_STATE_A_IDLE - || isp->phy.otg->state == OTG_STATE_UNDEFINED) { - b_idle(isp, "init"); - return; - } - } - omap_writel(otg_ctrl, OTG_CTRL); -} - -/* outputs from ISP1301_OTG_STATUS */ -static void update_otg2(struct isp1301 *isp, u8 otg_status) -{ - u32 otg_ctrl; - - otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; - otg_ctrl &= ~OTG_XCEIV_INPUTS; - otg_ctrl &= ~(OTG_BSESSVLD | OTG_BSESSEND); - if (otg_status & OTG_B_SESS_VLD) - otg_ctrl |= OTG_BSESSVLD; - else if (otg_status & OTG_B_SESS_END) - otg_ctrl |= OTG_BSESSEND; - omap_writel(otg_ctrl, OTG_CTRL); -} - -/* inputs going to ISP1301 */ -static void otg_update_isp(struct isp1301 *isp) -{ - u32 otg_ctrl, otg_change; - u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; - - otg_ctrl = omap_readl(OTG_CTRL); - otg_change = otg_ctrl ^ isp->last_otg_ctrl; - isp->last_otg_ctrl = otg_ctrl; - otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; - - switch (isp->phy.otg->state) { - case OTG_STATE_B_IDLE: - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_B_SRP_INIT: - if (!(otg_ctrl & OTG_PULLUP)) { - // if (otg_ctrl & OTG_B_HNPEN) { - if (isp->phy.otg->gadget->b_hnp_enable) { - isp->phy.otg->state = OTG_STATE_B_WAIT_ACON; - pr_debug(" --> b_wait_acon\n"); - } - goto pulldown; - } -pullup: - set |= OTG1_DP_PULLUP; - clr |= OTG1_DP_PULLDOWN; - break; - case OTG_STATE_A_SUSPEND: - case OTG_STATE_A_PERIPHERAL: - if (otg_ctrl & OTG_PULLUP) - goto pullup; - fallthrough; - // case OTG_STATE_B_WAIT_ACON: - default: -pulldown: - set |= OTG1_DP_PULLDOWN; - clr |= OTG1_DP_PULLUP; - break; - } - -# define toggle(OTG,ISP) do { \ - if (otg_ctrl & OTG) set |= ISP; \ - else clr |= ISP; \ - } while (0) - - if (!(isp->phy.otg->host)) - otg_ctrl &= ~OTG_DRV_VBUS; - - switch (isp->phy.otg->state) { - case OTG_STATE_A_SUSPEND: - if (otg_ctrl & OTG_DRV_VBUS) { - set |= OTG1_VBUS_DRV; - break; - } - /* HNP failed for some reason (A_AIDL_BDIS timeout) */ - notresponding(isp); - - fallthrough; - case OTG_STATE_A_VBUS_ERR: - isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; - pr_debug(" --> a_wait_vfall\n"); - fallthrough; - case OTG_STATE_A_WAIT_VFALL: - /* FIXME usbcore thinks port power is still on ... */ - clr |= OTG1_VBUS_DRV; - break; - case OTG_STATE_A_IDLE: - if (otg_ctrl & OTG_DRV_VBUS) { - isp->phy.otg->state = OTG_STATE_A_WAIT_VRISE; - pr_debug(" --> a_wait_vrise\n"); - } - fallthrough; - default: - toggle(OTG_DRV_VBUS, OTG1_VBUS_DRV); - } - - toggle(OTG_PU_VBUS, OTG1_VBUS_CHRG); - toggle(OTG_PD_VBUS, OTG1_VBUS_DISCHRG); - -# undef toggle - - isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, set); - isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, clr); - - /* HNP switch to host or peripheral; and SRP */ - if (otg_change & OTG_PULLUP) { - u32 l; - - switch (isp->phy.otg->state) { - case OTG_STATE_B_IDLE: - if (clr & OTG1_DP_PULLUP) - break; - isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; - pr_debug(" --> b_peripheral\n"); - break; - case OTG_STATE_A_SUSPEND: - if (clr & OTG1_DP_PULLUP) - break; - isp->phy.otg->state = OTG_STATE_A_PERIPHERAL; - pr_debug(" --> a_peripheral\n"); - break; - default: - break; - } - l = omap_readl(OTG_CTRL); - l |= OTG_PULLUP; - omap_writel(l, OTG_CTRL); - } - - check_state(isp, __func__); - dump_regs(isp, "otg->isp1301"); -} - -static irqreturn_t omap_otg_irq(int irq, void *_isp) -{ - u16 otg_irq = omap_readw(OTG_IRQ_SRC); - u32 otg_ctrl; - int ret = IRQ_NONE; - struct isp1301 *isp = _isp; - struct usb_otg *otg = isp->phy.otg; - - /* update ISP1301 transceiver from OTG controller */ - if (otg_irq & OPRT_CHG) { - omap_writew(OPRT_CHG, OTG_IRQ_SRC); - isp1301_defer_work(isp, WORK_UPDATE_ISP); - ret = IRQ_HANDLED; - - /* SRP to become b_peripheral failed */ - } else if (otg_irq & B_SRP_TMROUT) { - pr_debug("otg: B_SRP_TIMEOUT, %06x\n", omap_readl(OTG_CTRL)); - notresponding(isp); - - /* gadget drivers that care should monitor all kinds of - * remote wakeup (SRP, normal) using their own timer - * to give "check cable and A-device" messages. - */ - if (isp->phy.otg->state == OTG_STATE_B_SRP_INIT) - b_idle(isp, "srp_timeout"); - - omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - /* HNP to become b_host failed */ - } else if (otg_irq & B_HNP_FAIL) { - pr_debug("otg: %s B_HNP_FAIL, %06x\n", - state_name(isp), omap_readl(OTG_CTRL)); - notresponding(isp); - - otg_ctrl = omap_readl(OTG_CTRL); - otg_ctrl |= OTG_BUSDROP; - otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; - omap_writel(otg_ctrl, OTG_CTRL); - - /* subset of b_peripheral()... */ - isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; - pr_debug(" --> b_peripheral\n"); - - omap_writew(B_HNP_FAIL, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - /* detect SRP from B-device ... */ - } else if (otg_irq & A_SRP_DETECT) { - pr_debug("otg: %s SRP_DETECT, %06x\n", - state_name(isp), omap_readl(OTG_CTRL)); - - isp1301_defer_work(isp, WORK_UPDATE_OTG); - switch (isp->phy.otg->state) { - case OTG_STATE_A_IDLE: - if (!otg->host) - break; - isp1301_defer_work(isp, WORK_HOST_RESUME); - otg_ctrl = omap_readl(OTG_CTRL); - otg_ctrl |= OTG_A_BUSREQ; - otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) - & ~OTG_XCEIV_INPUTS - & OTG_CTRL_MASK; - omap_writel(otg_ctrl, OTG_CTRL); - break; - default: - break; - } - - omap_writew(A_SRP_DETECT, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise) - * we don't track them separately - */ - } else if (otg_irq & A_REQ_TMROUT) { - otg_ctrl = omap_readl(OTG_CTRL); - pr_info("otg: BCON_TMOUT from %s, %06x\n", - state_name(isp), otg_ctrl); - notresponding(isp); - - otg_ctrl |= OTG_BUSDROP; - otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; - omap_writel(otg_ctrl, OTG_CTRL); - isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; - - omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - /* A-supplied voltage fell too low; overcurrent */ - } else if (otg_irq & A_VBUS_ERR) { - otg_ctrl = omap_readl(OTG_CTRL); - printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n", - state_name(isp), otg_irq, otg_ctrl); - - otg_ctrl |= OTG_BUSDROP; - otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; - omap_writel(otg_ctrl, OTG_CTRL); - isp->phy.otg->state = OTG_STATE_A_VBUS_ERR; - - omap_writew(A_VBUS_ERR, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - /* switch driver; the transceiver code activates it, - * ungating the udc clock or resuming OHCI. - */ - } else if (otg_irq & DRIVER_SWITCH) { - int kick = 0; - - otg_ctrl = omap_readl(OTG_CTRL); - printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n", - state_name(isp), - (otg_ctrl & OTG_DRIVER_SEL) - ? "gadget" : "host", - otg_ctrl); - isp1301_defer_work(isp, WORK_UPDATE_ISP); - - /* role is peripheral */ - if (otg_ctrl & OTG_DRIVER_SEL) { - switch (isp->phy.otg->state) { - case OTG_STATE_A_IDLE: - b_idle(isp, __func__); - break; - default: - break; - } - isp1301_defer_work(isp, WORK_UPDATE_ISP); - - /* role is host */ - } else { - if (!(otg_ctrl & OTG_ID)) { - otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; - omap_writel(otg_ctrl | OTG_A_BUSREQ, OTG_CTRL); - } - - if (otg->host) { - switch (isp->phy.otg->state) { - case OTG_STATE_B_WAIT_ACON: - isp->phy.otg->state = OTG_STATE_B_HOST; - pr_debug(" --> b_host\n"); - kick = 1; - break; - case OTG_STATE_A_WAIT_BCON: - isp->phy.otg->state = OTG_STATE_A_HOST; - pr_debug(" --> a_host\n"); - break; - case OTG_STATE_A_PERIPHERAL: - isp->phy.otg->state = OTG_STATE_A_WAIT_BCON; - pr_debug(" --> a_wait_bcon\n"); - break; - default: - break; - } - isp1301_defer_work(isp, WORK_HOST_RESUME); - } - } - - omap_writew(DRIVER_SWITCH, OTG_IRQ_SRC); - ret = IRQ_HANDLED; - - if (kick) - usb_bus_start_enum(otg->host, otg->host->otg_port); - } - - check_state(isp, __func__); - return ret; -} - -static struct platform_device *otg_dev; - -static int isp1301_otg_init(struct isp1301 *isp) -{ - u32 l; - - if (!otg_dev) - return -ENODEV; - - dump_regs(isp, __func__); - /* some of these values are board-specific... */ - l = omap_readl(OTG_SYSCON_2); - l |= OTG_EN - /* for B-device: */ - | SRP_GPDATA /* 9msec Bdev D+ pulse */ - | SRP_GPDVBUS /* discharge after VBUS pulse */ - // | (3 << 24) /* 2msec VBUS pulse */ - /* for A-device: */ - | (0 << 20) /* 200ms nominal A_WAIT_VRISE timer */ - | SRP_DPW /* detect 167+ns SRP pulses */ - | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */ - ; - omap_writel(l, OTG_SYSCON_2); - - update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); - update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); - - check_state(isp, __func__); - pr_debug("otg: %s, %s %06x\n", - state_name(isp), __func__, omap_readl(OTG_CTRL)); - - omap_writew(DRIVER_SWITCH | OPRT_CHG - | B_SRP_TMROUT | B_HNP_FAIL - | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT, OTG_IRQ_EN); - - l = omap_readl(OTG_SYSCON_2); - l |= OTG_EN; - omap_writel(l, OTG_SYSCON_2); - - return 0; -} - -static int otg_probe(struct platform_device *dev) -{ - // struct omap_usb_config *config = dev->platform_data; - - otg_dev = dev; - return 0; -} - -static int otg_remove(struct platform_device *dev) -{ - otg_dev = NULL; - return 0; -} - -static struct platform_driver omap_otg_driver = { - .probe = otg_probe, - .remove = otg_remove, - .driver = { - .name = "omap_otg", - }, -}; - -static int otg_bind(struct isp1301 *isp) -{ - int status; - - if (otg_dev) - return -EBUSY; - - status = platform_driver_register(&omap_otg_driver); - if (status < 0) - return status; - - if (otg_dev) - status = request_irq(otg_dev->resource[1].start, omap_otg_irq, - 0, DRIVER_NAME, isp); - else - status = -ENODEV; - - if (status < 0) - platform_driver_unregister(&omap_otg_driver); - return status; -} - -static void otg_unbind(struct isp1301 *isp) -{ - if (!otg_dev) - return; - free_irq(otg_dev->resource[1].start, isp); -} - -#else - -/* OTG controller isn't clocked */ - -#endif /* CONFIG_USB_OTG */ - -/*-------------------------------------------------------------------------*/ - -static void b_peripheral(struct isp1301 *isp) -{ - u32 l; - - l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; - omap_writel(l, OTG_CTRL); - - usb_gadget_vbus_connect(isp->phy.otg->gadget); - -#ifdef CONFIG_USB_OTG - enable_vbus_draw(isp, 8); - otg_update_isp(isp); -#else - enable_vbus_draw(isp, 100); - /* UDC driver just set OTG_BSESSVLD */ - isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLUP); - isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLDOWN); - isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; - pr_debug(" --> b_peripheral\n"); - dump_regs(isp, "2periph"); -#endif -} - -static void isp_update_otg(struct isp1301 *isp, u8 stat) -{ - struct usb_otg *otg = isp->phy.otg; - u8 isp_stat, isp_bstat; - enum usb_otg_state state = isp->phy.otg->state; - - if (stat & INTR_BDIS_ACON) - pr_debug("OTG: BDIS_ACON, %s\n", state_name(isp)); - - /* start certain state transitions right away */ - isp_stat = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); - if (isp_stat & INTR_ID_GND) { - if (otg->default_a) { - switch (state) { - case OTG_STATE_B_IDLE: - a_idle(isp, "idle"); - fallthrough; - case OTG_STATE_A_IDLE: - enable_vbus_source(isp); - fallthrough; - case OTG_STATE_A_WAIT_VRISE: - /* we skip over OTG_STATE_A_WAIT_BCON, since - * the HC will transition to A_HOST (or - * A_SUSPEND!) without our noticing except - * when HNP is used. - */ - if (isp_stat & INTR_VBUS_VLD) - isp->phy.otg->state = OTG_STATE_A_HOST; - break; - case OTG_STATE_A_WAIT_VFALL: - if (!(isp_stat & INTR_SESS_VLD)) - a_idle(isp, "vfell"); - break; - default: - if (!(isp_stat & INTR_VBUS_VLD)) - isp->phy.otg->state = OTG_STATE_A_VBUS_ERR; - break; - } - isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); - } else { - switch (state) { - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_B_HOST: - case OTG_STATE_B_WAIT_ACON: - usb_gadget_vbus_disconnect(otg->gadget); - break; - default: - break; - } - if (state != OTG_STATE_A_IDLE) - a_idle(isp, "id"); - if (otg->host && state == OTG_STATE_A_IDLE) - isp1301_defer_work(isp, WORK_HOST_RESUME); - isp_bstat = 0; - } - } else { - u32 l; - - /* if user unplugged mini-A end of cable, - * don't bypass A_WAIT_VFALL. - */ - if (otg->default_a) { - switch (state) { - default: - isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; - break; - case OTG_STATE_A_WAIT_VFALL: - state = OTG_STATE_A_IDLE; - /* hub_wq may take a while to notice and - * handle this disconnect, so don't go - * to B_IDLE quite yet. - */ - break; - case OTG_STATE_A_IDLE: - host_suspend(isp); - isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, - MC1_BDIS_ACON_EN); - isp->phy.otg->state = OTG_STATE_B_IDLE; - l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; - l &= ~OTG_CTRL_BITS; - omap_writel(l, OTG_CTRL); - break; - case OTG_STATE_B_IDLE: - break; - } - } - isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); - - switch (isp->phy.otg->state) { - case OTG_STATE_B_PERIPHERAL: - case OTG_STATE_B_WAIT_ACON: - case OTG_STATE_B_HOST: - if (likely(isp_bstat & OTG_B_SESS_VLD)) - break; - enable_vbus_draw(isp, 0); -#ifndef CONFIG_USB_OTG - /* UDC driver will clear OTG_BSESSVLD */ - isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, - OTG1_DP_PULLDOWN); - isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, - OTG1_DP_PULLUP); - dump_regs(isp, __func__); -#endif - fallthrough; - case OTG_STATE_B_SRP_INIT: - b_idle(isp, __func__); - l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; - omap_writel(l, OTG_CTRL); - fallthrough; - case OTG_STATE_B_IDLE: - if (otg->gadget && (isp_bstat & OTG_B_SESS_VLD)) { -#ifdef CONFIG_USB_OTG - update_otg1(isp, isp_stat); - update_otg2(isp, isp_bstat); -#endif - b_peripheral(isp); - } else if (!(isp_stat & (INTR_VBUS_VLD|INTR_SESS_VLD))) - isp_bstat |= OTG_B_SESS_END; - break; - case OTG_STATE_A_WAIT_VFALL: - break; - default: - pr_debug("otg: unsupported b-device %s\n", - state_name(isp)); - break; - } - } - - if (state != isp->phy.otg->state) - pr_debug(" isp, %s -> %s\n", - usb_otg_state_string(state), state_name(isp)); - -#ifdef CONFIG_USB_OTG - /* update the OTG controller state to match the isp1301; may - * trigger OPRT_CHG irqs for changes going to the isp1301. - */ - update_otg1(isp, isp_stat); - update_otg2(isp, isp_bstat); - check_state(isp, __func__); -#endif - - dump_regs(isp, "isp1301->otg"); -} - -/*-------------------------------------------------------------------------*/ - -static u8 isp1301_clear_latch(struct isp1301 *isp) -{ - u8 latch = isp1301_get_u8(isp, ISP1301_INTERRUPT_LATCH); - isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, latch); - return latch; -} - -static void -isp1301_work(struct work_struct *work) -{ - struct isp1301 *isp = container_of(work, struct isp1301, work); - int stop; - - /* implicit lock: we're the only task using this device */ - isp->working = 1; - do { - stop = test_bit(WORK_STOP, &isp->todo); - -#ifdef CONFIG_USB_OTG - /* transfer state from otg engine to isp1301 */ - if (test_and_clear_bit(WORK_UPDATE_ISP, &isp->todo)) { - otg_update_isp(isp); - put_device(&isp->client->dev); - } -#endif - /* transfer state from isp1301 to otg engine */ - if (test_and_clear_bit(WORK_UPDATE_OTG, &isp->todo)) { - u8 stat = isp1301_clear_latch(isp); - - isp_update_otg(isp, stat); - put_device(&isp->client->dev); - } - - if (test_and_clear_bit(WORK_HOST_RESUME, &isp->todo)) { - u32 otg_ctrl; - - /* - * skip A_WAIT_VRISE; hc transitions invisibly - * skip A_WAIT_BCON; same. - */ - switch (isp->phy.otg->state) { - case OTG_STATE_A_WAIT_BCON: - case OTG_STATE_A_WAIT_VRISE: - isp->phy.otg->state = OTG_STATE_A_HOST; - pr_debug(" --> a_host\n"); - otg_ctrl = omap_readl(OTG_CTRL); - otg_ctrl |= OTG_A_BUSREQ; - otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) - & OTG_CTRL_MASK; - omap_writel(otg_ctrl, OTG_CTRL); - break; - case OTG_STATE_B_WAIT_ACON: - isp->phy.otg->state = OTG_STATE_B_HOST; - pr_debug(" --> b_host (acon)\n"); - break; - case OTG_STATE_B_HOST: - case OTG_STATE_B_IDLE: - case OTG_STATE_A_IDLE: - break; - default: - pr_debug(" host resume in %s\n", - state_name(isp)); - } - host_resume(isp); - // mdelay(10); - put_device(&isp->client->dev); - } - - if (test_and_clear_bit(WORK_TIMER, &isp->todo)) { -#ifdef VERBOSE - dump_regs(isp, "timer"); - if (!stop) - mod_timer(&isp->timer, jiffies + TIMER_JIFFIES); -#endif - put_device(&isp->client->dev); - } - - if (isp->todo) - dev_vdbg(&isp->client->dev, - "work done, todo = 0x%lx\n", - isp->todo); - if (stop) { - dev_dbg(&isp->client->dev, "stop\n"); - break; - } - } while (isp->todo); - isp->working = 0; -} - -static irqreturn_t isp1301_irq(int irq, void *isp) -{ - isp1301_defer_work(isp, WORK_UPDATE_OTG); - return IRQ_HANDLED; -} - -static void isp1301_timer(struct timer_list *t) -{ - struct isp1301 *isp = from_timer(isp, t, timer); - - isp1301_defer_work(isp, WORK_TIMER); -} - -/*-------------------------------------------------------------------------*/ - -static void isp1301_release(struct device *dev) -{ - struct isp1301 *isp; - - isp = dev_get_drvdata(dev); - - /* FIXME -- not with a "new style" driver, it doesn't!! */ - - /* ugly -- i2c hijacks our memory hook to wait_for_completion() */ - if (isp->i2c_release) - isp->i2c_release(dev); - kfree(isp->phy.otg); - kfree (isp); -} - -static struct isp1301 *the_transceiver; - -static void isp1301_remove(struct i2c_client *i2c) -{ - struct isp1301 *isp; - - isp = i2c_get_clientdata(i2c); - - isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0); - isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0); - free_irq(i2c->irq, isp); -#ifdef CONFIG_USB_OTG - otg_unbind(isp); -#endif - set_bit(WORK_STOP, &isp->todo); - del_timer_sync(&isp->timer); - flush_work(&isp->work); - - put_device(&i2c->dev); - the_transceiver = NULL; -} - -/*-------------------------------------------------------------------------*/ - -/* NOTE: three modes are possible here, only one of which - * will be standards-conformant on any given system: - * - * - OTG mode (dual-role), required if there's a Mini-AB connector - * - HOST mode, for when there's one or more A (host) connectors - * - DEVICE mode, for when there's a B/Mini-B (device) connector - * - * As a rule, you won't have an isp1301 chip unless it's there to - * support the OTG mode. Other modes help testing USB controllers - * in isolation from (full) OTG support, or maybe so later board - * revisions can help to support those feature. - */ - -#ifdef CONFIG_USB_OTG - -static int isp1301_otg_enable(struct isp1301 *isp) -{ - power_up(isp); - isp1301_otg_init(isp); - - /* NOTE: since we don't change this, this provides - * a few more interrupts than are strictly needed. - */ - isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING, - INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND); - isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING, - INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND); - - dev_info(&isp->client->dev, "ready for dual-role USB ...\n"); - - return 0; -} - -#endif - -/* add or disable the host device+driver */ -static int -isp1301_set_host(struct usb_otg *otg, struct usb_bus *host) -{ - struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); - - if (isp != the_transceiver) - return -ENODEV; - - if (!host) { - omap_writew(0, OTG_IRQ_EN); - power_down(isp); - otg->host = NULL; - return 0; - } - -#ifdef CONFIG_USB_OTG - otg->host = host; - dev_dbg(&isp->client->dev, "registered host\n"); - host_suspend(isp); - if (otg->gadget) - return isp1301_otg_enable(isp); - return 0; - -#elif !IS_ENABLED(CONFIG_USB_OMAP) - // FIXME update its refcount - otg->host = host; - - power_up(isp); - - if (machine_is_omap_h2()) - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); - - dev_info(&isp->client->dev, "A-Host sessions ok\n"); - isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING, - INTR_ID_GND); - isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING, - INTR_ID_GND); - - /* If this has a Mini-AB connector, this mode is highly - * nonstandard ... but can be handy for testing, especially with - * the Mini-A end of an OTG cable. (Or something nonstandard - * like MiniB-to-StandardB, maybe built with a gender mender.) - */ - isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV); - - dump_regs(isp, __func__); - - return 0; - -#else - dev_dbg(&isp->client->dev, "host sessions not allowed\n"); - return -EINVAL; -#endif - -} - -static int -isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget) -{ - struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); - - if (isp != the_transceiver) - return -ENODEV; - - if (!gadget) { - omap_writew(0, OTG_IRQ_EN); - if (!otg->default_a) - enable_vbus_draw(isp, 0); - usb_gadget_vbus_disconnect(otg->gadget); - otg->gadget = NULL; - power_down(isp); - return 0; - } - -#ifdef CONFIG_USB_OTG - otg->gadget = gadget; - dev_dbg(&isp->client->dev, "registered gadget\n"); - /* gadget driver may be suspended until vbus_connect () */ - if (otg->host) - return isp1301_otg_enable(isp); - return 0; - -#elif !defined(CONFIG_USB_OHCI_HCD) && !defined(CONFIG_USB_OHCI_HCD_MODULE) - otg->gadget = gadget; - // FIXME update its refcount - - { - u32 l; - - l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; - l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS); - l |= OTG_ID; - omap_writel(l, OTG_CTRL); - } - - power_up(isp); - isp->phy.otg->state = OTG_STATE_B_IDLE; - - if (machine_is_omap_h2() || machine_is_omap_h3()) - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); - - isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING, - INTR_SESS_VLD); - isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING, - INTR_VBUS_VLD); - dev_info(&isp->client->dev, "B-Peripheral sessions ok\n"); - dump_regs(isp, __func__); - - /* If this has a Mini-AB connector, this mode is highly - * nonstandard ... but can be handy for testing, so long - * as you don't plug a Mini-A cable into the jack. - */ - if (isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE) & INTR_VBUS_VLD) - b_peripheral(isp); - - return 0; - -#else - dev_dbg(&isp->client->dev, "peripheral sessions not allowed\n"); - return -EINVAL; -#endif -} - - -/*-------------------------------------------------------------------------*/ - -static int -isp1301_set_power(struct usb_phy *dev, unsigned mA) -{ - if (!the_transceiver) - return -ENODEV; - if (dev->otg->state == OTG_STATE_B_PERIPHERAL) - enable_vbus_draw(the_transceiver, mA); - return 0; -} - -static int -isp1301_start_srp(struct usb_otg *otg) -{ - struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); - u32 otg_ctrl; - - if (isp != the_transceiver || isp->phy.otg->state != OTG_STATE_B_IDLE) - return -ENODEV; - - otg_ctrl = omap_readl(OTG_CTRL); - if (!(otg_ctrl & OTG_BSESSEND)) - return -EINVAL; - - otg_ctrl |= OTG_B_BUSREQ; - otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; - omap_writel(otg_ctrl, OTG_CTRL); - isp->phy.otg->state = OTG_STATE_B_SRP_INIT; - - pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), - omap_readl(OTG_CTRL)); -#ifdef CONFIG_USB_OTG - check_state(isp, __func__); -#endif - return 0; -} - -static int -isp1301_start_hnp(struct usb_otg *otg) -{ -#ifdef CONFIG_USB_OTG - struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); - u32 l; - - if (isp != the_transceiver) - return -ENODEV; - if (otg->default_a && (otg->host == NULL || !otg->host->b_hnp_enable)) - return -ENOTCONN; - if (!otg->default_a && (otg->gadget == NULL - || !otg->gadget->b_hnp_enable)) - return -ENOTCONN; - - /* We want hardware to manage most HNP protocol timings. - * So do this part as early as possible... - */ - switch (isp->phy.otg->state) { - case OTG_STATE_B_HOST: - isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; - /* caller will suspend next */ - break; - case OTG_STATE_A_HOST: -#if 0 - /* autoconnect mode avoids irq latency bugs */ - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, - MC1_BDIS_ACON_EN); -#endif - /* caller must suspend then clear A_BUSREQ */ - usb_gadget_vbus_connect(otg->gadget); - l = omap_readl(OTG_CTRL); - l |= OTG_A_SETB_HNPEN; - omap_writel(l, OTG_CTRL); - - break; - case OTG_STATE_A_PERIPHERAL: - /* initiated by B-Host suspend */ - break; - default: - return -EILSEQ; - } - pr_debug("otg: HNP %s, %06x ...\n", - state_name(isp), omap_readl(OTG_CTRL)); - check_state(isp, __func__); - return 0; -#else - /* srp-only */ - return -EINVAL; -#endif -} - -/*-------------------------------------------------------------------------*/ - -static int -isp1301_probe(struct i2c_client *i2c) -{ - int status; - struct isp1301 *isp; - int irq; - - if (the_transceiver) - return 0; - - isp = kzalloc(sizeof *isp, GFP_KERNEL); - if (!isp) - return 0; - - isp->phy.otg = kzalloc(sizeof *isp->phy.otg, GFP_KERNEL); - if (!isp->phy.otg) { - kfree(isp); - return 0; - } - - INIT_WORK(&isp->work, isp1301_work); - timer_setup(&isp->timer, isp1301_timer, 0); - - i2c_set_clientdata(i2c, isp); - isp->client = i2c; - - /* verify the chip (shouldn't be necessary) */ - status = isp1301_get_u16(isp, ISP1301_VENDOR_ID); - if (status != I2C_VENDOR_ID_PHILIPS) { - dev_dbg(&i2c->dev, "not philips id: %d\n", status); - goto fail; - } - status = isp1301_get_u16(isp, ISP1301_PRODUCT_ID); - if (status != I2C_PRODUCT_ID_PHILIPS_1301) { - dev_dbg(&i2c->dev, "not isp1301, %d\n", status); - goto fail; - } - isp->i2c_release = i2c->dev.release; - i2c->dev.release = isp1301_release; - - /* initial development used chiprev 2.00 */ - status = i2c_smbus_read_word_data(i2c, ISP1301_BCD_DEVICE); - dev_info(&i2c->dev, "chiprev %x.%02x, driver " DRIVER_VERSION "\n", - status >> 8, status & 0xff); - - /* make like power-on reset */ - isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_MASK); - - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_BI_DI); - isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, ~MC2_BI_DI); - - isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, - OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN); - isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, - ~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN)); - - isp1301_clear_bits(isp, ISP1301_INTERRUPT_LATCH, ~0); - isp1301_clear_bits(isp, ISP1301_INTERRUPT_FALLING, ~0); - isp1301_clear_bits(isp, ISP1301_INTERRUPT_RISING, ~0); - -#ifdef CONFIG_USB_OTG - status = otg_bind(isp); - if (status < 0) { - dev_dbg(&i2c->dev, "can't bind OTG\n"); - goto fail; - } -#endif - - if (machine_is_omap_h2()) { - struct gpio_desc *gpiod; - - /* full speed signaling by default */ - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, - MC1_SPEED); - isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, - MC2_SPD_SUSP_CTRL); - - gpiod = devm_gpiod_get(&i2c->dev, NULL, GPIOD_IN); - if (IS_ERR(gpiod)) { - dev_err(&i2c->dev, "cannot obtain H2 GPIO\n"); - goto fail; - } - gpiod_set_consumer_name(gpiod, "isp1301"); - irq = gpiod_to_irq(gpiod); - isp->irq_type = IRQF_TRIGGER_FALLING; - } else { - irq = i2c->irq; - } - - status = request_irq(irq, isp1301_irq, - isp->irq_type, DRIVER_NAME, isp); - if (status < 0) { - dev_dbg(&i2c->dev, "can't get IRQ %d, err %d\n", - i2c->irq, status); - goto fail; - } - - isp->phy.dev = &i2c->dev; - isp->phy.label = DRIVER_NAME; - isp->phy.set_power = isp1301_set_power; - - isp->phy.otg->usb_phy = &isp->phy; - isp->phy.otg->set_host = isp1301_set_host; - isp->phy.otg->set_peripheral = isp1301_set_peripheral; - isp->phy.otg->start_srp = isp1301_start_srp; - isp->phy.otg->start_hnp = isp1301_start_hnp; - - enable_vbus_draw(isp, 0); - power_down(isp); - the_transceiver = isp; - -#ifdef CONFIG_USB_OTG - update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); - update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); -#endif - - dump_regs(isp, __func__); - -#ifdef VERBOSE - mod_timer(&isp->timer, jiffies + TIMER_JIFFIES); - dev_dbg(&i2c->dev, "scheduled timer, %d min\n", TIMER_MINUTES); -#endif - - status = usb_add_phy(&isp->phy, USB_PHY_TYPE_USB2); - if (status < 0) - dev_err(&i2c->dev, "can't register transceiver, %d\n", - status); - - return 0; - -fail: - kfree(isp->phy.otg); - kfree(isp); - return -ENODEV; -} - -static const struct i2c_device_id isp1301_id[] = { - { "isp1301_omap", 0 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, isp1301_id); - -static struct i2c_driver isp1301_driver = { - .driver = { - .name = "isp1301_omap", - }, - .probe_new = isp1301_probe, - .remove = isp1301_remove, - .id_table = isp1301_id, -}; - -/*-------------------------------------------------------------------------*/ - -static int __init isp_init(void) -{ - return i2c_add_driver(&isp1301_driver); -} -subsys_initcall(isp_init); - -static void __exit isp_exit(void) -{ - if (the_transceiver) - usb_remove_phy(&the_transceiver->phy); - i2c_del_driver(&isp1301_driver); -} -module_exit(isp_exit); - diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c index 0468ea82159f..346d3e29a843 100644 --- a/drivers/video/backlight/locomolcd.c +++ b/drivers/video/backlight/locomolcd.c @@ -95,8 +95,6 @@ void locomolcd_power(int on) /* read comadj */ if (comadj == -1 && machine_is_collie()) comadj = 128; - if (comadj == -1 && machine_is_poodle()) - comadj = 118; if (on) locomolcd_on(comadj); @@ -181,14 +179,6 @@ static int locomolcd_probe(struct locomo_dev *ldev) locomo_gpio_set_dir(ldev->dev.parent, LOCOMO_GPIO_FL_VR, 0); - /* - * the poodle_lcd_power function is called for the first time - * from fs_initcall, which is before locomo is activated. - * We need to recall poodle_lcd_power here - */ - if (machine_is_poodle()) - locomolcd_power(1); - local_irq_restore(flags); memset(&props, 0, sizeof(struct backlight_properties)); diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index b2bed599e6c6..ff3646c30d0d 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -1841,23 +1841,6 @@ config FB_FSL_DIU help Framebuffer driver for the Freescale SoC DIU -config FB_W100 - tristate "W100 frame buffer support" - depends on FB && HAS_IOMEM && (ARCH_PXA || COMPILE_TEST) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - Frame buffer driver for the w100 as found on the Sharp SL-Cxx series. - It can also drive the w3220 chip found on iPAQ hx4700. - - This driver is also available as a module ( = code which can be - inserted and removed from the running kernel whenever you want). The - module will be called w100fb. If you want to compile it as a module, - say M here and read <file:Documentation/kbuild/modules.rst>. - - If unsure, say N. - config FB_SH_MOBILE_LCDC tristate "SuperH Mobile LCDC framebuffer support" depends on FB && HAVE_CLK && HAS_IOMEM @@ -1871,44 +1854,20 @@ config FB_SH_MOBILE_LCDC help Frame buffer driver for the on-chip SH-Mobile LCD controller. -config FB_TMIO - tristate "Toshiba Mobile IO FrameBuffer support" - depends on FB && (MFD_TMIO || COMPILE_TEST) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - Frame buffer driver for the Toshiba Mobile IO integrated as found - on the Sharp SL-6000 series - - This driver is also available as a module ( = code which can be - inserted and removed from the running kernel whenever you want). The - module will be called tmiofb. If you want to compile it as a module, - say M here and read <file:Documentation/kbuild/modules.rst>. - - If unsure, say N. - -config FB_TMIO_ACCELL - bool "tmiofb acceleration" - depends on FB_TMIO - default y - config FB_S3C tristate "Samsung S3C framebuffer support" depends on FB && HAVE_CLK && HAS_IOMEM - depends on (CPU_S3C2416 || ARCH_S3C64XX) || COMPILE_TEST + depends on ARCH_S3C64XX || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT help Frame buffer driver for the built-in FB controller in the Samsung - SoC line from the S3C2443 onwards, including the S3C2416, S3C2450, - and the S3C64XX series such as the S3C6400 and S3C6410. + SoC line such as the S3C6400 and S3C6410. These chips all have the same basic framebuffer design with the - actual capabilities depending on the chip. For instance the S3C6400 - and S3C6410 support 4 hardware windows whereas the S3C24XX series - currently only have two. + actual capabilities depending on the chip. The S3C6400 + and S3C6410 support 4 hardware windows. Currently the support is only for the S3C6400 and S3C6410 SoCs. @@ -1918,29 +1877,6 @@ config FB_S3C_DEBUG_REGWRITE help Show all register writes via pr_debug() -config FB_S3C2410 - tristate "S3C2410 LCD framebuffer support" - depends on FB && ARCH_S3C24XX - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - Frame buffer driver for the built-in LCD controller in the Samsung - S3C2410 processor. - - This driver is also available as a module ( = code which can be - inserted and removed from the running kernel whenever you want). The - module will be called s3c2410fb. If you want to compile it as a module, - say M here and read <file:Documentation/kbuild/modules.rst>. - - If unsure, say N. -config FB_S3C2410_DEBUG - bool "S3C2410 lcd debug messages" - depends on FB_S3C2410 - help - Turn on debugging messages. Note that you can set/unset at run time - through sysfs - config FB_SM501 tristate "Silicon Motion SM501 framebuffer support" depends on FB && MFD_SM501 diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index 7795c4126706..e6b0ae094b8b 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -84,8 +84,6 @@ obj-$(CONFIG_FB_PXA) += pxafb.o obj-$(CONFIG_FB_PXA168) += pxa168fb.o obj-$(CONFIG_PXA3XX_GCU) += pxa3xx-gcu.o obj-$(CONFIG_MMP_DISP) += mmp/ -obj-$(CONFIG_FB_W100) += w100fb.o -obj-$(CONFIG_FB_TMIO) += tmiofb.o obj-$(CONFIG_FB_AU1100) += au1100fb.o obj-$(CONFIG_FB_AU1200) += au1200fb.o obj-$(CONFIG_FB_VT8500) += vt8500lcdfb.o @@ -100,7 +98,6 @@ obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o obj-$(CONFIG_FB_SH7760) += sh7760fb.o obj-$(CONFIG_FB_IMX) += imxfb.o obj-$(CONFIG_FB_S3C) += s3c-fb.o -obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o diff --git a/drivers/video/fbdev/omap/Kconfig b/drivers/video/fbdev/omap/Kconfig index b1786cf1b486..a6548283451f 100644 --- a/drivers/video/fbdev/omap/Kconfig +++ b/drivers/video/fbdev/omap/Kconfig @@ -40,15 +40,6 @@ config FB_OMAP_LCD_MIPID the Mobile Industry Processor Interface DBI-C/DCS specification. (Supported LCDs: Philips LPH8923, Sharp LS041Y3) -config FB_OMAP_LCD_H3 - bool "TPS65010 LCD controller on OMAP-H3" - depends on MACH_OMAP_H3 || COMPILE_TEST - depends on TPS65010=y - default y - help - Say Y here if you want to have support for the LCD on the - H3 board. - config FB_OMAP_DMA_TUNE bool "Set DMA SDRAM access priority high" depends on FB_OMAP diff --git a/drivers/video/fbdev/omap/Makefile b/drivers/video/fbdev/omap/Makefile index b88e02f5cb1f..504edb9c09dd 100644 --- a/drivers/video/fbdev/omap/Makefile +++ b/drivers/video/fbdev/omap/Makefile @@ -17,16 +17,10 @@ objs-y$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o objs-y$(CONFIG_FB_OMAP_LCDC_HWA742) += hwa742.o lcds-y$(CONFIG_MACH_AMS_DELTA) += lcd_ams_delta.o -lcds-y$(CONFIG_FB_OMAP_LCD_H3) += lcd_h3.o lcds-y$(CONFIG_MACH_OMAP_PALMTE) += lcd_palmte.o -lcds-y$(CONFIG_MACH_OMAP_PALMTT) += lcd_palmtt.o -lcds-y$(CONFIG_MACH_OMAP_PALMZ71) += lcd_palmz71.o -lcds-$(CONFIG_ARCH_OMAP16XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1610.o -lcds-$(CONFIG_ARCH_OMAP15XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1510.o lcds-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o lcds-y$(CONFIG_FB_OMAP_LCD_MIPID) += lcd_mipid.o -lcds-y$(CONFIG_MACH_HERALD) += lcd_htcherald.o omapfb-objs := $(objs-yy) diff --git a/drivers/video/fbdev/omap/lcd_h3.c b/drivers/video/fbdev/omap/lcd_h3.c deleted file mode 100644 index 1766dff767bb..000000000000 --- a/drivers/video/fbdev/omap/lcd_h3.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * LCD panel support for the TI OMAP H3 board - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak <imre.deak@nokia.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/mfd/tps65010.h> -#include <linux/gpio.h> - -#include "omapfb.h" - -#define MODULE_NAME "omapfb-lcd_h3" - -static int h3_panel_enable(struct lcd_panel *panel) -{ - int r = 0; - - /* GPIO1 and GPIO2 of TPS65010 send LCD_ENBKL and LCD_ENVDD signals */ - r = tps65010_set_gpio_out_value(GPIO1, HIGH); - if (!r) - r = tps65010_set_gpio_out_value(GPIO2, HIGH); - if (r) - pr_err(MODULE_NAME ": Unable to turn on LCD panel\n"); - - return r; -} - -static void h3_panel_disable(struct lcd_panel *panel) -{ - int r = 0; - - /* GPIO1 and GPIO2 of TPS65010 send LCD_ENBKL and LCD_ENVDD signals */ - r = tps65010_set_gpio_out_value(GPIO1, LOW); - if (!r) - tps65010_set_gpio_out_value(GPIO2, LOW); - if (r) - pr_err(MODULE_NAME ": Unable to turn off LCD panel\n"); -} - -static struct lcd_panel h3_panel = { - .name = "h3", - .config = OMAP_LCDC_PANEL_TFT, - - .data_lines = 16, - .bpp = 16, - .x_res = 240, - .y_res = 320, - .pixel_clock = 12000, - .hsw = 12, - .hfp = 14, - .hbp = 72 - 12, - .vsw = 1, - .vfp = 1, - .vbp = 0, - .pcd = 0, - - .enable = h3_panel_enable, - .disable = h3_panel_disable, -}; - -static int h3_panel_probe(struct platform_device *pdev) -{ - omapfb_register_panel(&h3_panel); - return 0; -} - -static struct platform_driver h3_panel_driver = { - .probe = h3_panel_probe, - .driver = { - .name = "lcd_h3", - }, -}; - -module_platform_driver(h3_panel_driver); - -MODULE_AUTHOR("Imre Deak"); -MODULE_DESCRIPTION("LCD panel support for the TI OMAP H3 board"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/omap/lcd_htcherald.c b/drivers/video/fbdev/omap/lcd_htcherald.c deleted file mode 100644 index d1c615c516dd..000000000000 --- a/drivers/video/fbdev/omap/lcd_htcherald.c +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * File: drivers/video/omap/lcd-htcherald.c - * - * LCD panel support for the HTC Herald - * - * Copyright (C) 2009 Cory Maccarrone <darkstar6262@gmail.com> - * Copyright (C) 2009 Wing Linux - * - * Based on the lcd_htcwizard.c file from the linwizard project: - * Copyright (C) linwizard.sourceforge.net - * Author: Angelo Arrifano <miknix@gmail.com> - * Based on lcd_h4 by Imre Deak <imre.deak@nokia.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> - -#include "omapfb.h" - -/* Found on WIZ200 (miknix) and some HERA110 models (darkstar62) */ -static struct lcd_panel htcherald_panel_1 = { - .name = "lcd_herald", - .config = OMAP_LCDC_PANEL_TFT | - OMAP_LCDC_INV_HSYNC | - OMAP_LCDC_INV_VSYNC | - OMAP_LCDC_INV_PIX_CLOCK, - .bpp = 16, - .data_lines = 16, - .x_res = 240, - .y_res = 320, - .pixel_clock = 6093, - .pcd = 0, /* 15 */ - .hsw = 10, - .hfp = 10, - .hbp = 20, - .vsw = 3, - .vfp = 2, - .vbp = 2, -}; - -static int htcherald_panel_probe(struct platform_device *pdev) -{ - omapfb_register_panel(&htcherald_panel_1); - return 0; -} - -static struct platform_driver htcherald_panel_driver = { - .probe = htcherald_panel_probe, - .driver = { - .name = "lcd_htcherald", - }, -}; - -module_platform_driver(htcherald_panel_driver); - -MODULE_AUTHOR("Cory Maccarrone"); -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("LCD panel support for the HTC Herald"); diff --git a/drivers/video/fbdev/omap/lcd_inn1510.c b/drivers/video/fbdev/omap/lcd_inn1510.c deleted file mode 100644 index bb915637e9b6..000000000000 --- a/drivers/video/fbdev/omap/lcd_inn1510.c +++ /dev/null @@ -1,69 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * LCD panel support for the TI OMAP1510 Innovator board - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak <imre.deak@nokia.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/soc/ti/omap1-soc.h> - -#include "omapfb.h" - -static void __iomem *omap1510_fpga_lcd_panel_control; - -static int innovator1510_panel_enable(struct lcd_panel *panel) -{ - __raw_writeb(0x7, omap1510_fpga_lcd_panel_control); - return 0; -} - -static void innovator1510_panel_disable(struct lcd_panel *panel) -{ - __raw_writeb(0x0, omap1510_fpga_lcd_panel_control); -} - -static struct lcd_panel innovator1510_panel = { - .name = "inn1510", - .config = OMAP_LCDC_PANEL_TFT, - - .bpp = 16, - .data_lines = 16, - .x_res = 240, - .y_res = 320, - .pixel_clock = 12500, - .hsw = 40, - .hfp = 40, - .hbp = 72, - .vsw = 1, - .vfp = 1, - .vbp = 0, - .pcd = 12, - - .enable = innovator1510_panel_enable, - .disable = innovator1510_panel_disable, -}; - -static int innovator1510_panel_probe(struct platform_device *pdev) -{ - omap1510_fpga_lcd_panel_control = (void __iomem *)pdev->dev.platform_data; - omapfb_register_panel(&innovator1510_panel); - return 0; -} - -static struct platform_driver innovator1510_panel_driver = { - .probe = innovator1510_panel_probe, - .driver = { - .name = "lcd_inn1510", - }, -}; - -module_platform_driver(innovator1510_panel_driver); - -MODULE_AUTHOR("Imre Deak"); -MODULE_DESCRIPTION("LCD panel support for the TI OMAP1510 Innovator board"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/omap/lcd_inn1610.c b/drivers/video/fbdev/omap/lcd_inn1610.c deleted file mode 100644 index 901b28f35fab..000000000000 --- a/drivers/video/fbdev/omap/lcd_inn1610.c +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * LCD panel support for the TI OMAP1610 Innovator board - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak <imre.deak@nokia.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> - -#include <linux/gpio.h> -#include "omapfb.h" - -#define MODULE_NAME "omapfb-lcd_h3" - -static int innovator1610_panel_init(struct lcd_panel *panel, - struct omapfb_device *fbdev) -{ - int r = 0; - - /* configure GPIO(14, 15) as outputs */ - if (gpio_request_one(14, GPIOF_OUT_INIT_LOW, "lcd_en0")) { - pr_err(MODULE_NAME ": can't request GPIO 14\n"); - r = -1; - goto exit; - } - if (gpio_request_one(15, GPIOF_OUT_INIT_LOW, "lcd_en1")) { - pr_err(MODULE_NAME ": can't request GPIO 15\n"); - gpio_free(14); - r = -1; - goto exit; - } -exit: - return r; -} - -static void innovator1610_panel_cleanup(struct lcd_panel *panel) -{ - gpio_free(15); - gpio_free(14); -} - -static int innovator1610_panel_enable(struct lcd_panel *panel) -{ - /* set GPIO14 and GPIO15 high */ - gpio_set_value(14, 1); - gpio_set_value(15, 1); - return 0; -} - -static void innovator1610_panel_disable(struct lcd_panel *panel) -{ - /* set GPIO13, GPIO14 and GPIO15 low */ - gpio_set_value(14, 0); - gpio_set_value(15, 0); -} - -static struct lcd_panel innovator1610_panel = { - .name = "inn1610", - .config = OMAP_LCDC_PANEL_TFT, - - .bpp = 16, - .data_lines = 16, - .x_res = 320, - .y_res = 240, - .pixel_clock = 12500, - .hsw = 40, - .hfp = 40, - .hbp = 72, - .vsw = 1, - .vfp = 1, - .vbp = 0, - .pcd = 12, - - .init = innovator1610_panel_init, - .cleanup = innovator1610_panel_cleanup, - .enable = innovator1610_panel_enable, - .disable = innovator1610_panel_disable, -}; - -static int innovator1610_panel_probe(struct platform_device *pdev) -{ - omapfb_register_panel(&innovator1610_panel); - return 0; -} - -static struct platform_driver innovator1610_panel_driver = { - .probe = innovator1610_panel_probe, - .driver = { - .name = "lcd_inn1610", - }, -}; - -module_platform_driver(innovator1610_panel_driver); - -MODULE_AUTHOR("Imre Deak"); -MODULE_DESCRIPTION("LCD panel support for the TI OMAP1610 Innovator board"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/omap/lcd_palmtt.c b/drivers/video/fbdev/omap/lcd_palmtt.c deleted file mode 100644 index 703af0bc5c92..000000000000 --- a/drivers/video/fbdev/omap/lcd_palmtt.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * LCD panel support for Palm Tungsten|T - * Current version : Marek Vasut <marek.vasut@gmail.com> - * - * Modified from lcd_inn1510.c - */ - -/* -GPIO11 - backlight -GPIO12 - screen blanking -GPIO13 - screen blanking -*/ - -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/io.h> -#include <linux/gpio.h> - -#include "omapfb.h" - -static unsigned long palmtt_panel_get_caps(struct lcd_panel *panel) -{ - return OMAPFB_CAPS_SET_BACKLIGHT; -} - -static struct lcd_panel palmtt_panel = { - .name = "palmtt", - .config = OMAP_LCDC_PANEL_TFT | OMAP_LCDC_INV_VSYNC | - OMAP_LCDC_INV_HSYNC | OMAP_LCDC_HSVS_RISING_EDGE | - OMAP_LCDC_HSVS_OPPOSITE, - .bpp = 16, - .data_lines = 16, - .x_res = 320, - .y_res = 320, - .pixel_clock = 10000, - .hsw = 4, - .hfp = 8, - .hbp = 28, - .vsw = 1, - .vfp = 8, - .vbp = 7, - .pcd = 0, - - .get_caps = palmtt_panel_get_caps, -}; - -static int palmtt_panel_probe(struct platform_device *pdev) -{ - omapfb_register_panel(&palmtt_panel); - return 0; -} - -static struct platform_driver palmtt_panel_driver = { - .probe = palmtt_panel_probe, - .driver = { - .name = "lcd_palmtt", - }, -}; - -module_platform_driver(palmtt_panel_driver); - -MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); -MODULE_DESCRIPTION("LCD panel support for Palm Tungsten|T"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/omap/lcd_palmz71.c b/drivers/video/fbdev/omap/lcd_palmz71.c deleted file mode 100644 index a955c908ab14..000000000000 --- a/drivers/video/fbdev/omap/lcd_palmz71.c +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * LCD panel support for the Palm Zire71 - * - * Original version : Romain Goyet - * Current version : Laurent Gonzalez - * Modified for zire71 : Marek Vasut - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include "omapfb.h" - -static unsigned long palmz71_panel_get_caps(struct lcd_panel *panel) -{ - return OMAPFB_CAPS_SET_BACKLIGHT; -} - -static struct lcd_panel palmz71_panel = { - .name = "palmz71", - .config = OMAP_LCDC_PANEL_TFT | OMAP_LCDC_INV_VSYNC | - OMAP_LCDC_INV_HSYNC | OMAP_LCDC_HSVS_RISING_EDGE | - OMAP_LCDC_HSVS_OPPOSITE, - .data_lines = 16, - .bpp = 16, - .pixel_clock = 24000, - .x_res = 320, - .y_res = 320, - .hsw = 4, - .hfp = 8, - .hbp = 28, - .vsw = 1, - .vfp = 8, - .vbp = 7, - .pcd = 0, - - .get_caps = palmz71_panel_get_caps, -}; - -static int palmz71_panel_probe(struct platform_device *pdev) -{ - omapfb_register_panel(&palmz71_panel); - return 0; -} - -static struct platform_driver palmz71_panel_driver = { - .probe = palmz71_panel_probe, - .driver = { - .name = "lcd_palmz71", - }, -}; - -module_platform_driver(palmz71_panel_driver); - -MODULE_AUTHOR("Romain Goyet, Laurent Gonzalez, Marek Vasut"); -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("LCD panel support for the Palm Zire71"); diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c index e7ce783e5215..abb8b11464e8 100644 --- a/drivers/video/fbdev/omap/lcdc.c +++ b/drivers/video/fbdev/omap/lcdc.c @@ -706,8 +706,6 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, if (machine_is_ams_delta()) rate /= 4; - if (machine_is_omap_h3()) - rate /= 3; r = clk_set_rate(lcdc.lcd_ck, rate); if (r) { dev_err(fbdev->dev, "failed to adjust LCD rate\n"); diff --git a/drivers/video/fbdev/s3c2410fb-regs-lcd.h b/drivers/video/fbdev/s3c2410fb-regs-lcd.h deleted file mode 100644 index 1e46f7a788e5..000000000000 --- a/drivers/video/fbdev/s3c2410fb-regs-lcd.h +++ /dev/null @@ -1,143 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - */ - -#ifndef ___ASM_ARCH_REGS_LCD_H -#define ___ASM_ARCH_REGS_LCD_H - -/* - * a couple of values are used as platform data in - * include/linux/platform_data/fb-s3c2410.h and not - * duplicated here. - */ -#include <linux/platform_data/fb-s3c2410.h> - -#define S3C2410_LCDREG(x) (x) - -/* LCD control registers */ -#define S3C2410_LCDCON1 S3C2410_LCDREG(0x00) -#define S3C2410_LCDCON2 S3C2410_LCDREG(0x04) -#define S3C2410_LCDCON3 S3C2410_LCDREG(0x08) -#define S3C2410_LCDCON4 S3C2410_LCDREG(0x0C) -#define S3C2410_LCDCON5 S3C2410_LCDREG(0x10) - -#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) -#define S3C2410_LCDCON1_MMODE (1<<7) -#define S3C2410_LCDCON1_DSCAN4 (0<<5) -#define S3C2410_LCDCON1_STN4 (1<<5) -#define S3C2410_LCDCON1_STN8 (2<<5) -#define S3C2410_LCDCON1_TFT (3<<5) - -#define S3C2410_LCDCON1_STN1BPP (0<<1) -#define S3C2410_LCDCON1_STN2GREY (1<<1) -#define S3C2410_LCDCON1_STN4GREY (2<<1) -#define S3C2410_LCDCON1_STN8BPP (3<<1) -#define S3C2410_LCDCON1_STN12BPP (4<<1) - -#define S3C2410_LCDCON1_ENVID (1) - -#define S3C2410_LCDCON1_MODEMASK 0x1E - -#define S3C2410_LCDCON2_VBPD(x) ((x) << 24) -#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) -#define S3C2410_LCDCON2_VFPD(x) ((x) << 6) -#define S3C2410_LCDCON2_VSPW(x) ((x) << 0) - -#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) -#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) -#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) - -#define S3C2410_LCDCON3_HBPD(x) ((x) << 19) -#define S3C2410_LCDCON3_WDLY(x) ((x) << 19) -#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8) -#define S3C2410_LCDCON3_HFPD(x) ((x) << 0) -#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0) - -#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F) -#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF) - -/* LDCCON4 changes for STN mode on the S3C2412 */ - -#define S3C2410_LCDCON4_MVAL(x) ((x) << 8) -#define S3C2410_LCDCON4_HSPW(x) ((x) << 0) -#define S3C2410_LCDCON4_WLH(x) ((x) << 0) - -#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF) - -/* framebuffer start addressed */ -#define S3C2410_LCDSADDR1 S3C2410_LCDREG(0x14) -#define S3C2410_LCDSADDR2 S3C2410_LCDREG(0x18) -#define S3C2410_LCDSADDR3 S3C2410_LCDREG(0x1C) - -#define S3C2410_LCDBANK(x) ((x) << 21) -#define S3C2410_LCDBASEU(x) (x) - -#define S3C2410_OFFSIZE(x) ((x) << 11) -#define S3C2410_PAGEWIDTH(x) (x) - -/* colour lookup and miscellaneous controls */ - -#define S3C2410_REDLUT S3C2410_LCDREG(0x20) -#define S3C2410_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2410_BLUELUT S3C2410_LCDREG(0x28) - -#define S3C2410_DITHMODE S3C2410_LCDREG(0x4C) -#define S3C2410_TPAL S3C2410_LCDREG(0x50) - -#define S3C2410_TPAL_EN (1<<24) - -/* interrupt info */ -#define S3C2410_LCDINTPND S3C2410_LCDREG(0x54) -#define S3C2410_LCDSRCPND S3C2410_LCDREG(0x58) -#define S3C2410_LCDINTMSK S3C2410_LCDREG(0x5C) -#define S3C2410_LCDINT_FIWSEL (1<<2) -#define S3C2410_LCDINT_FRSYNC (1<<1) -#define S3C2410_LCDINT_FICNT (1<<0) - -/* s3c2442 extra stn registers */ - -#define S3C2442_REDLUT S3C2410_LCDREG(0x20) -#define S3C2442_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2442_BLUELUT S3C2410_LCDREG(0x28) -#define S3C2442_DITHMODE S3C2410_LCDREG(0x20) - -#define S3C2410_LPCSEL S3C2410_LCDREG(0x60) - -#define S3C2410_TFTPAL(x) S3C2410_LCDREG((0x400 + (x)*4)) - -/* S3C2412 registers */ - -#define S3C2412_TPAL S3C2410_LCDREG(0x20) - -#define S3C2412_LCDINTPND S3C2410_LCDREG(0x24) -#define S3C2412_LCDSRCPND S3C2410_LCDREG(0x28) -#define S3C2412_LCDINTMSK S3C2410_LCDREG(0x2C) - -#define S3C2412_TCONSEL S3C2410_LCDREG(0x30) - -#define S3C2412_LCDCON6 S3C2410_LCDREG(0x34) -#define S3C2412_LCDCON7 S3C2410_LCDREG(0x38) -#define S3C2412_LCDCON8 S3C2410_LCDREG(0x3C) -#define S3C2412_LCDCON9 S3C2410_LCDREG(0x40) - -#define S3C2412_REDLUT(x) S3C2410_LCDREG(0x44 + ((x)*4)) -#define S3C2412_GREENLUT(x) S3C2410_LCDREG(0x60 + ((x)*4)) -#define S3C2412_BLUELUT(x) S3C2410_LCDREG(0x98 + ((x)*4)) - -#define S3C2412_FRCPAT(x) S3C2410_LCDREG(0xB4 + ((x)*4)) - -/* general registers */ - -/* base of the LCD registers, where INTPND, INTSRC and then INTMSK - * are available. */ - -#define S3C2410_LCDINTBASE S3C2410_LCDREG(0x54) -#define S3C2412_LCDINTBASE S3C2410_LCDREG(0x24) - -#define S3C24XX_LCDINTPND (0x00) -#define S3C24XX_LCDSRCPND (0x04) -#define S3C24XX_LCDINTMSK (0x08) - -#endif /* ___ASM_ARCH_REGS_LCD_H */ diff --git a/drivers/video/fbdev/s3c2410fb.c b/drivers/video/fbdev/s3c2410fb.c deleted file mode 100644 index d8ae5258de46..000000000000 --- a/drivers/video/fbdev/s3c2410fb.c +++ /dev/null @@ -1,1142 +0,0 @@ -/* linux/drivers/video/s3c2410fb.c - * Copyright (c) 2004,2005 Arnaud Patard - * Copyright (c) 2004-2008 Ben Dooks - * - * S3C2410 LCD Framebuffer Driver - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - * - * Driver based on skeletonfb.c, sa1100fb.c and others. -*/ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/err.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <linux/dma-mapping.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/cpufreq.h> -#include <linux/io.h> -#include <linux/platform_data/fb-s3c2410.h> - -#include <asm/div64.h> - -#include <asm/mach/map.h> - -#ifdef CONFIG_PM -#include <linux/pm.h> -#endif - -#include "s3c2410fb.h" -#include "s3c2410fb-regs-lcd.h" - -/* Debugging stuff */ -static int debug = IS_BUILTIN(CONFIG_FB_S3C2410_DEBUG); - -#define dprintk(msg...) \ -do { \ - if (debug) \ - pr_debug(msg); \ -} while (0) - -/* useful functions */ - -static int is_s3c2412(struct s3c2410fb_info *fbi) -{ - return (fbi->drv_type == DRV_S3C2412); -} - -/* s3c2410fb_set_lcdaddr - * - * initialise lcd controller address pointers - */ -static void s3c2410fb_set_lcdaddr(struct fb_info *info) -{ - unsigned long saddr1, saddr2, saddr3; - struct s3c2410fb_info *fbi = info->par; - void __iomem *regs = fbi->io; - - saddr1 = info->fix.smem_start >> 1; - saddr2 = info->fix.smem_start; - saddr2 += info->fix.line_length * info->var.yres; - saddr2 >>= 1; - - saddr3 = S3C2410_OFFSIZE(0) | - S3C2410_PAGEWIDTH((info->fix.line_length / 2) & 0x3ff); - - dprintk("LCDSADDR1 = 0x%08lx\n", saddr1); - dprintk("LCDSADDR2 = 0x%08lx\n", saddr2); - dprintk("LCDSADDR3 = 0x%08lx\n", saddr3); - - writel(saddr1, regs + S3C2410_LCDSADDR1); - writel(saddr2, regs + S3C2410_LCDSADDR2); - writel(saddr3, regs + S3C2410_LCDSADDR3); -} - -/* s3c2410fb_calc_pixclk() - * - * calculate divisor for clk->pixclk - */ -static unsigned int s3c2410fb_calc_pixclk(struct s3c2410fb_info *fbi, - unsigned long pixclk) -{ - unsigned long clk = fbi->clk_rate; - unsigned long long div; - - /* pixclk is in picoseconds, our clock is in Hz - * - * Hz -> picoseconds is / 10^-12 - */ - - div = (unsigned long long)clk * pixclk; - div >>= 12; /* div / 2^12 */ - do_div(div, 625 * 625UL * 625); /* div / 5^12 */ - - dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div); - return div; -} - -/* - * s3c2410fb_check_var(): - * Get the video params out of 'var'. If a value doesn't fit, round it up, - * if it's too big, return -EINVAL. - * - */ -static int s3c2410fb_check_var(struct fb_var_screeninfo *var, - struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = dev_get_platdata(fbi->dev); - struct s3c2410fb_display *display = NULL; - struct s3c2410fb_display *default_display = mach_info->displays + - mach_info->default_display; - int type = default_display->type; - unsigned i; - - dprintk("check_var(var=%p, info=%p)\n", var, info); - - /* validate x/y resolution */ - /* choose default mode if possible */ - if (var->yres == default_display->yres && - var->xres == default_display->xres && - var->bits_per_pixel == default_display->bpp) - display = default_display; - else - for (i = 0; i < mach_info->num_displays; i++) - if (type == mach_info->displays[i].type && - var->yres == mach_info->displays[i].yres && - var->xres == mach_info->displays[i].xres && - var->bits_per_pixel == mach_info->displays[i].bpp) { - display = mach_info->displays + i; - break; - } - - if (!display) { - dprintk("wrong resolution or depth %dx%d at %d bpp\n", - var->xres, var->yres, var->bits_per_pixel); - return -EINVAL; - } - - /* it is always the size as the display */ - var->xres_virtual = display->xres; - var->yres_virtual = display->yres; - var->height = display->height; - var->width = display->width; - - /* copy lcd settings */ - var->pixclock = display->pixclock; - var->left_margin = display->left_margin; - var->right_margin = display->right_margin; - var->upper_margin = display->upper_margin; - var->lower_margin = display->lower_margin; - var->vsync_len = display->vsync_len; - var->hsync_len = display->hsync_len; - - fbi->regs.lcdcon5 = display->lcdcon5; - /* set display type */ - fbi->regs.lcdcon1 = display->type; - - var->transp.offset = 0; - var->transp.length = 0; - /* set r/g/b positions */ - switch (var->bits_per_pixel) { - case 1: - case 2: - case 4: - var->red.offset = 0; - var->red.length = var->bits_per_pixel; - var->green = var->red; - var->blue = var->red; - break; - case 8: - if (display->type != S3C2410_LCDCON1_TFT) { - /* 8 bpp 332 */ - var->red.length = 3; - var->red.offset = 5; - var->green.length = 3; - var->green.offset = 2; - var->blue.length = 2; - var->blue.offset = 0; - } else { - var->red.offset = 0; - var->red.length = 8; - var->green = var->red; - var->blue = var->red; - } - break; - case 12: - /* 12 bpp 444 */ - var->red.length = 4; - var->red.offset = 8; - var->green.length = 4; - var->green.offset = 4; - var->blue.length = 4; - var->blue.offset = 0; - break; - - default: - case 16: - if (display->lcdcon5 & S3C2410_LCDCON5_FRM565) { - /* 16 bpp, 565 format */ - var->red.offset = 11; - var->green.offset = 5; - var->blue.offset = 0; - var->red.length = 5; - var->green.length = 6; - var->blue.length = 5; - } else { - /* 16 bpp, 5551 format */ - var->red.offset = 11; - var->green.offset = 6; - var->blue.offset = 1; - var->red.length = 5; - var->green.length = 5; - var->blue.length = 5; - } - break; - case 32: - /* 24 bpp 888 and 8 dummy */ - var->red.length = 8; - var->red.offset = 16; - var->green.length = 8; - var->green.offset = 8; - var->blue.length = 8; - var->blue.offset = 0; - break; - } - return 0; -} - -/* s3c2410fb_calculate_stn_lcd_regs - * - * calculate register values from var settings - */ -static void s3c2410fb_calculate_stn_lcd_regs(const struct fb_info *info, - struct s3c2410fb_hw *regs) -{ - const struct s3c2410fb_info *fbi = info->par; - const struct fb_var_screeninfo *var = &info->var; - int type = regs->lcdcon1 & ~S3C2410_LCDCON1_TFT; - int hs = var->xres >> 2; - unsigned wdly = (var->left_margin >> 4) - 1; - unsigned wlh = (var->hsync_len >> 4) - 1; - - if (type != S3C2410_LCDCON1_STN4) - hs >>= 1; - - switch (var->bits_per_pixel) { - case 1: - regs->lcdcon1 |= S3C2410_LCDCON1_STN1BPP; - break; - case 2: - regs->lcdcon1 |= S3C2410_LCDCON1_STN2GREY; - break; - case 4: - regs->lcdcon1 |= S3C2410_LCDCON1_STN4GREY; - break; - case 8: - regs->lcdcon1 |= S3C2410_LCDCON1_STN8BPP; - hs *= 3; - break; - case 12: - regs->lcdcon1 |= S3C2410_LCDCON1_STN12BPP; - hs *= 3; - break; - - default: - /* invalid pixel depth */ - dev_err(fbi->dev, "invalid bpp %d\n", - var->bits_per_pixel); - } - /* update X/Y info */ - dprintk("setting horz: lft=%d, rt=%d, sync=%d\n", - var->left_margin, var->right_margin, var->hsync_len); - - regs->lcdcon2 = S3C2410_LCDCON2_LINEVAL(var->yres - 1); - - if (wdly > 3) - wdly = 3; - - if (wlh > 3) - wlh = 3; - - regs->lcdcon3 = S3C2410_LCDCON3_WDLY(wdly) | - S3C2410_LCDCON3_LINEBLANK(var->right_margin / 8) | - S3C2410_LCDCON3_HOZVAL(hs - 1); - - regs->lcdcon4 = S3C2410_LCDCON4_WLH(wlh); -} - -/* s3c2410fb_calculate_tft_lcd_regs - * - * calculate register values from var settings - */ -static void s3c2410fb_calculate_tft_lcd_regs(const struct fb_info *info, - struct s3c2410fb_hw *regs) -{ - const struct s3c2410fb_info *fbi = info->par; - const struct fb_var_screeninfo *var = &info->var; - - switch (var->bits_per_pixel) { - case 1: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT1BPP; - break; - case 2: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT2BPP; - break; - case 4: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT4BPP; - break; - case 8: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT8BPP; - regs->lcdcon5 |= S3C2410_LCDCON5_BSWP | - S3C2410_LCDCON5_FRM565; - regs->lcdcon5 &= ~S3C2410_LCDCON5_HWSWP; - break; - case 16: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT16BPP; - regs->lcdcon5 &= ~S3C2410_LCDCON5_BSWP; - regs->lcdcon5 |= S3C2410_LCDCON5_HWSWP; - break; - case 32: - regs->lcdcon1 |= S3C2410_LCDCON1_TFT24BPP; - regs->lcdcon5 &= ~(S3C2410_LCDCON5_BSWP | - S3C2410_LCDCON5_HWSWP | - S3C2410_LCDCON5_BPP24BL); - break; - default: - /* invalid pixel depth */ - dev_err(fbi->dev, "invalid bpp %d\n", - var->bits_per_pixel); - } - /* update X/Y info */ - dprintk("setting vert: up=%d, low=%d, sync=%d\n", - var->upper_margin, var->lower_margin, var->vsync_len); - - dprintk("setting horz: lft=%d, rt=%d, sync=%d\n", - var->left_margin, var->right_margin, var->hsync_len); - - regs->lcdcon2 = S3C2410_LCDCON2_LINEVAL(var->yres - 1) | - S3C2410_LCDCON2_VBPD(var->upper_margin - 1) | - S3C2410_LCDCON2_VFPD(var->lower_margin - 1) | - S3C2410_LCDCON2_VSPW(var->vsync_len - 1); - - regs->lcdcon3 = S3C2410_LCDCON3_HBPD(var->right_margin - 1) | - S3C2410_LCDCON3_HFPD(var->left_margin - 1) | - S3C2410_LCDCON3_HOZVAL(var->xres - 1); - - regs->lcdcon4 = S3C2410_LCDCON4_HSPW(var->hsync_len - 1); -} - -/* s3c2410fb_activate_var - * - * activate (set) the controller from the given framebuffer - * information - */ -static void s3c2410fb_activate_var(struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - void __iomem *regs = fbi->io; - int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT; - struct fb_var_screeninfo *var = &info->var; - int clkdiv; - - clkdiv = DIV_ROUND_UP(s3c2410fb_calc_pixclk(fbi, var->pixclock), 2); - - dprintk("%s: var->xres = %d\n", __func__, var->xres); - dprintk("%s: var->yres = %d\n", __func__, var->yres); - dprintk("%s: var->bpp = %d\n", __func__, var->bits_per_pixel); - - if (type == S3C2410_LCDCON1_TFT) { - s3c2410fb_calculate_tft_lcd_regs(info, &fbi->regs); - --clkdiv; - if (clkdiv < 0) - clkdiv = 0; - } else { - s3c2410fb_calculate_stn_lcd_regs(info, &fbi->regs); - if (clkdiv < 2) - clkdiv = 2; - } - - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); - - /* write new registers */ - - dprintk("new register set:\n"); - dprintk("lcdcon[1] = 0x%08lx\n", fbi->regs.lcdcon1); - dprintk("lcdcon[2] = 0x%08lx\n", fbi->regs.lcdcon2); - dprintk("lcdcon[3] = 0x%08lx\n", fbi->regs.lcdcon3); - dprintk("lcdcon[4] = 0x%08lx\n", fbi->regs.lcdcon4); - dprintk("lcdcon[5] = 0x%08lx\n", fbi->regs.lcdcon5); - - writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, - regs + S3C2410_LCDCON1); - writel(fbi->regs.lcdcon2, regs + S3C2410_LCDCON2); - writel(fbi->regs.lcdcon3, regs + S3C2410_LCDCON3); - writel(fbi->regs.lcdcon4, regs + S3C2410_LCDCON4); - writel(fbi->regs.lcdcon5, regs + S3C2410_LCDCON5); - - /* set lcd address pointers */ - s3c2410fb_set_lcdaddr(info); - - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID, - writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1); -} - -/* - * s3c2410fb_set_par - Alters the hardware state. - * @info: frame buffer structure that represents a single frame buffer - * - */ -static int s3c2410fb_set_par(struct fb_info *info) -{ - struct fb_var_screeninfo *var = &info->var; - - switch (var->bits_per_pixel) { - case 32: - case 16: - case 12: - info->fix.visual = FB_VISUAL_TRUECOLOR; - break; - case 1: - info->fix.visual = FB_VISUAL_MONO01; - break; - default: - info->fix.visual = FB_VISUAL_PSEUDOCOLOR; - break; - } - - info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8; - - /* activate this new configuration */ - - s3c2410fb_activate_var(info); - return 0; -} - -static void schedule_palette_update(struct s3c2410fb_info *fbi, - unsigned int regno, unsigned int val) -{ - unsigned long flags; - unsigned long irqen; - void __iomem *irq_base = fbi->irq_base; - - local_irq_save(flags); - - fbi->palette_buffer[regno] = val; - - if (!fbi->palette_ready) { - fbi->palette_ready = 1; - - /* enable IRQ */ - irqen = readl(irq_base + S3C24XX_LCDINTMSK); - irqen &= ~S3C2410_LCDINT_FRSYNC; - writel(irqen, irq_base + S3C24XX_LCDINTMSK); - } - - local_irq_restore(flags); -} - -/* from pxafb.c */ -static inline unsigned int chan_to_field(unsigned int chan, - struct fb_bitfield *bf) -{ - chan &= 0xffff; - chan >>= 16 - bf->length; - return chan << bf->offset; -} - -static int s3c2410fb_setcolreg(unsigned regno, - unsigned red, unsigned green, unsigned blue, - unsigned transp, struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - void __iomem *regs = fbi->io; - unsigned int val; - - /* dprintk("setcol: regno=%d, rgb=%d,%d,%d\n", - regno, red, green, blue); */ - - switch (info->fix.visual) { - case FB_VISUAL_TRUECOLOR: - /* true-colour, use pseudo-palette */ - - if (regno < 16) { - u32 *pal = info->pseudo_palette; - - val = chan_to_field(red, &info->var.red); - val |= chan_to_field(green, &info->var.green); - val |= chan_to_field(blue, &info->var.blue); - - pal[regno] = val; - } - break; - - case FB_VISUAL_PSEUDOCOLOR: - if (regno < 256) { - /* currently assume RGB 5-6-5 mode */ - - val = (red >> 0) & 0xf800; - val |= (green >> 5) & 0x07e0; - val |= (blue >> 11) & 0x001f; - - writel(val, regs + S3C2410_TFTPAL(regno)); - schedule_palette_update(fbi, regno, val); - } - - break; - - default: - return 1; /* unknown type */ - } - - return 0; -} - -/* s3c2410fb_lcd_enable - * - * shutdown the lcd controller - */ -static void s3c2410fb_lcd_enable(struct s3c2410fb_info *fbi, int enable) -{ - unsigned long flags; - - local_irq_save(flags); - - if (enable) - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID; - else - fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID; - - writel(fbi->regs.lcdcon1, fbi->io + S3C2410_LCDCON1); - - local_irq_restore(flags); -} - - -/* - * s3c2410fb_blank - * @blank_mode: the blank mode we want. - * @info: frame buffer structure that represents a single frame buffer - * - * Blank the screen if blank_mode != 0, else unblank. Return 0 if - * blanking succeeded, != 0 if un-/blanking failed due to e.g. a - * video mode which doesn't support it. Implements VESA suspend - * and powerdown modes on hardware that supports disabling hsync/vsync: - * - * Returns negative errno on error, or zero on success. - * - */ -static int s3c2410fb_blank(int blank_mode, struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - void __iomem *tpal_reg = fbi->io; - - dprintk("blank(mode=%d, info=%p)\n", blank_mode, info); - - tpal_reg += is_s3c2412(fbi) ? S3C2412_TPAL : S3C2410_TPAL; - - if (blank_mode == FB_BLANK_POWERDOWN) - s3c2410fb_lcd_enable(fbi, 0); - else - s3c2410fb_lcd_enable(fbi, 1); - - if (blank_mode == FB_BLANK_UNBLANK) - writel(0x0, tpal_reg); - else { - dprintk("setting TPAL to output 0x000000\n"); - writel(S3C2410_TPAL_EN, tpal_reg); - } - - return 0; -} - -static int s3c2410fb_debug_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%s\n", debug ? "on" : "off"); -} - -static int s3c2410fb_debug_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - if (len < 1) - return -EINVAL; - - if (strncasecmp(buf, "on", 2) == 0 || - strncasecmp(buf, "1", 1) == 0) { - debug = 1; - dev_dbg(dev, "s3c2410fb: Debug On"); - } else if (strncasecmp(buf, "off", 3) == 0 || - strncasecmp(buf, "0", 1) == 0) { - debug = 0; - dev_dbg(dev, "s3c2410fb: Debug Off"); - } else { - return -EINVAL; - } - - return len; -} - -static DEVICE_ATTR(debug, 0664, s3c2410fb_debug_show, s3c2410fb_debug_store); - -static const struct fb_ops s3c2410fb_ops = { - .owner = THIS_MODULE, - .fb_check_var = s3c2410fb_check_var, - .fb_set_par = s3c2410fb_set_par, - .fb_blank = s3c2410fb_blank, - .fb_setcolreg = s3c2410fb_setcolreg, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; - -/* - * s3c2410fb_map_video_memory(): - * Allocates the DRAM memory for the frame buffer. This buffer is - * remapped into a non-cached, non-buffered, memory region to - * allow palette and pixel writes to occur without flushing the - * cache. Once this area is remapped, all virtual memory - * access to the video memory should occur at the new region. - */ -static int s3c2410fb_map_video_memory(struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - dma_addr_t map_dma; - unsigned map_size = PAGE_ALIGN(info->fix.smem_len); - - dprintk("map_video_memory(fbi=%p) map_size %u\n", fbi, map_size); - - info->screen_base = dma_alloc_wc(fbi->dev, map_size, &map_dma, - GFP_KERNEL); - - if (info->screen_base) { - /* prevent initial garbage on screen */ - dprintk("map_video_memory: clear %p:%08x\n", - info->screen_base, map_size); - memset(info->screen_base, 0x00, map_size); - - info->fix.smem_start = map_dma; - - dprintk("map_video_memory: dma=%08lx cpu=%p size=%08x\n", - info->fix.smem_start, info->screen_base, map_size); - } - - return info->screen_base ? 0 : -ENOMEM; -} - -static inline void s3c2410fb_unmap_video_memory(struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - - dma_free_wc(fbi->dev, PAGE_ALIGN(info->fix.smem_len), - info->screen_base, info->fix.smem_start); -} - -static inline void modify_gpio(void __iomem *reg, - unsigned long set, unsigned long mask) -{ - unsigned long tmp; - - if (!reg) - return; - - tmp = readl(reg) & ~mask; - writel(tmp | set, reg); -} - -/* - * s3c2410fb_init_registers - Initialise all LCD-related registers - */ -static int s3c2410fb_init_registers(struct fb_info *info) -{ - struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = dev_get_platdata(fbi->dev); - unsigned long flags; - void __iomem *regs = fbi->io; - void __iomem *tpal; - void __iomem *lpcsel; - - if (is_s3c2412(fbi)) { - tpal = regs + S3C2412_TPAL; - lpcsel = regs + S3C2412_TCONSEL; - } else { - tpal = regs + S3C2410_TPAL; - lpcsel = regs + S3C2410_LPCSEL; - } - - /* Initialise LCD with values from haret */ - - local_irq_save(flags); - - /* modify the gpio(s) with interrupts set (bjd) */ - - modify_gpio(mach_info->gpcup_reg, mach_info->gpcup, mach_info->gpcup_mask); - modify_gpio(mach_info->gpccon_reg, mach_info->gpccon, mach_info->gpccon_mask); - modify_gpio(mach_info->gpdup_reg, mach_info->gpdup, mach_info->gpdup_mask); - modify_gpio(mach_info->gpdcon_reg, mach_info->gpdcon, mach_info->gpdcon_mask); - - local_irq_restore(flags); - - dprintk("LPCSEL = 0x%08lx\n", mach_info->lpcsel); - writel(mach_info->lpcsel, lpcsel); - - dprintk("replacing TPAL %08x\n", readl(tpal)); - - /* ensure temporary palette disabled */ - writel(0x00, tpal); - - return 0; -} - -static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi) -{ - unsigned int i; - void __iomem *regs = fbi->io; - - fbi->palette_ready = 0; - - for (i = 0; i < 256; i++) { - unsigned long ent = fbi->palette_buffer[i]; - if (ent == PALETTE_BUFF_CLEAR) - continue; - - writel(ent, regs + S3C2410_TFTPAL(i)); - - /* it seems the only way to know exactly - * if the palette wrote ok, is to check - * to see if the value verifies ok - */ - - if (readw(regs + S3C2410_TFTPAL(i)) == ent) - fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR; - else - fbi->palette_ready = 1; /* retry */ - } -} - -static irqreturn_t s3c2410fb_irq(int irq, void *dev_id) -{ - struct s3c2410fb_info *fbi = dev_id; - void __iomem *irq_base = fbi->irq_base; - unsigned long lcdirq = readl(irq_base + S3C24XX_LCDINTPND); - - if (lcdirq & S3C2410_LCDINT_FRSYNC) { - if (fbi->palette_ready) - s3c2410fb_write_palette(fbi); - - writel(S3C2410_LCDINT_FRSYNC, irq_base + S3C24XX_LCDINTPND); - writel(S3C2410_LCDINT_FRSYNC, irq_base + S3C24XX_LCDSRCPND); - } - - return IRQ_HANDLED; -} - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - -static int s3c2410fb_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - struct s3c2410fb_info *info; - struct fb_info *fbinfo; - long delta_f; - - info = container_of(nb, struct s3c2410fb_info, freq_transition); - fbinfo = dev_get_drvdata(info->dev); - - /* work out change, <0 for speed-up */ - delta_f = info->clk_rate - clk_get_rate(info->clk); - - if ((val == CPUFREQ_POSTCHANGE && delta_f > 0) || - (val == CPUFREQ_PRECHANGE && delta_f < 0)) { - info->clk_rate = clk_get_rate(info->clk); - s3c2410fb_activate_var(fbinfo); - } - - return 0; -} - -static inline int s3c2410fb_cpufreq_register(struct s3c2410fb_info *info) -{ - info->freq_transition.notifier_call = s3c2410fb_cpufreq_transition; - - return cpufreq_register_notifier(&info->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void s3c2410fb_cpufreq_deregister(struct s3c2410fb_info *info) -{ - cpufreq_unregister_notifier(&info->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -static inline int s3c2410fb_cpufreq_register(struct s3c2410fb_info *info) -{ - return 0; -} - -static inline void s3c2410fb_cpufreq_deregister(struct s3c2410fb_info *info) -{ -} -#endif - - -static const char driver_name[] = "s3c2410fb"; - -static int s3c24xxfb_probe(struct platform_device *pdev, - enum s3c_drv_type drv_type) -{ - struct s3c2410fb_info *info; - struct s3c2410fb_display *display; - struct fb_info *fbinfo; - struct s3c2410fb_mach_info *mach_info; - struct resource *res; - int ret; - int irq; - int i; - int size; - u32 lcdcon1; - - mach_info = dev_get_platdata(&pdev->dev); - if (mach_info == NULL) { - dev_err(&pdev->dev, - "no platform data for lcd, cannot attach\n"); - return -EINVAL; - } - - if (mach_info->default_display >= mach_info->num_displays) { - dev_err(&pdev->dev, "default is %d but only %d displays\n", - mach_info->default_display, mach_info->num_displays); - return -EINVAL; - } - - display = mach_info->displays + mach_info->default_display; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_err(&pdev->dev, "no irq for device\n"); - return -ENOENT; - } - - fbinfo = framebuffer_alloc(sizeof(struct s3c2410fb_info), &pdev->dev); - if (!fbinfo) - return -ENOMEM; - - platform_set_drvdata(pdev, fbinfo); - - info = fbinfo->par; - info->dev = &pdev->dev; - info->drv_type = drv_type; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res == NULL) { - dev_err(&pdev->dev, "failed to get memory registers\n"); - ret = -ENXIO; - goto dealloc_fb; - } - - size = resource_size(res); - info->mem = request_mem_region(res->start, size, pdev->name); - if (info->mem == NULL) { - dev_err(&pdev->dev, "failed to get memory region\n"); - ret = -ENOENT; - goto dealloc_fb; - } - - info->io = ioremap(res->start, size); - if (info->io == NULL) { - dev_err(&pdev->dev, "ioremap() of registers failed\n"); - ret = -ENXIO; - goto release_mem; - } - - if (drv_type == DRV_S3C2412) - info->irq_base = info->io + S3C2412_LCDINTBASE; - else - info->irq_base = info->io + S3C2410_LCDINTBASE; - - dprintk("devinit\n"); - - strcpy(fbinfo->fix.id, driver_name); - - /* Stop the video */ - lcdcon1 = readl(info->io + S3C2410_LCDCON1); - writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, info->io + S3C2410_LCDCON1); - - fbinfo->fix.type = FB_TYPE_PACKED_PIXELS; - fbinfo->fix.type_aux = 0; - fbinfo->fix.xpanstep = 0; - fbinfo->fix.ypanstep = 0; - fbinfo->fix.ywrapstep = 0; - fbinfo->fix.accel = FB_ACCEL_NONE; - - fbinfo->var.nonstd = 0; - fbinfo->var.activate = FB_ACTIVATE_NOW; - fbinfo->var.accel_flags = 0; - fbinfo->var.vmode = FB_VMODE_NONINTERLACED; - - fbinfo->fbops = &s3c2410fb_ops; - fbinfo->flags = FBINFO_FLAG_DEFAULT; - fbinfo->pseudo_palette = &info->pseudo_pal; - - for (i = 0; i < 256; i++) - info->palette_buffer[i] = PALETTE_BUFF_CLEAR; - - ret = request_irq(irq, s3c2410fb_irq, 0, pdev->name, info); - if (ret) { - dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret); - ret = -EBUSY; - goto release_regs; - } - - info->clk = clk_get(NULL, "lcd"); - if (IS_ERR(info->clk)) { - dev_err(&pdev->dev, "failed to get lcd clock source\n"); - ret = PTR_ERR(info->clk); - goto release_irq; - } - - clk_prepare_enable(info->clk); - dprintk("got and enabled clock\n"); - - usleep_range(1000, 1100); - - info->clk_rate = clk_get_rate(info->clk); - - /* find maximum required memory size for display */ - for (i = 0; i < mach_info->num_displays; i++) { - unsigned long smem_len = mach_info->displays[i].xres; - - smem_len *= mach_info->displays[i].yres; - smem_len *= mach_info->displays[i].bpp; - smem_len >>= 3; - if (fbinfo->fix.smem_len < smem_len) - fbinfo->fix.smem_len = smem_len; - } - - /* Initialize video memory */ - ret = s3c2410fb_map_video_memory(fbinfo); - if (ret) { - dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); - ret = -ENOMEM; - goto release_clock; - } - - dprintk("got video memory\n"); - - fbinfo->var.xres = display->xres; - fbinfo->var.yres = display->yres; - fbinfo->var.bits_per_pixel = display->bpp; - - s3c2410fb_init_registers(fbinfo); - - s3c2410fb_check_var(&fbinfo->var, fbinfo); - - ret = s3c2410fb_cpufreq_register(info); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to register cpufreq\n"); - goto free_video_memory; - } - - ret = register_framebuffer(fbinfo); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to register framebuffer device: %d\n", - ret); - goto free_cpufreq; - } - - /* create device files */ - ret = device_create_file(&pdev->dev, &dev_attr_debug); - if (ret) - dev_err(&pdev->dev, "failed to add debug attribute\n"); - - dev_info(&pdev->dev, "fb%d: %s frame buffer device\n", - fbinfo->node, fbinfo->fix.id); - - return 0; - - free_cpufreq: - s3c2410fb_cpufreq_deregister(info); -free_video_memory: - s3c2410fb_unmap_video_memory(fbinfo); -release_clock: - clk_disable_unprepare(info->clk); - clk_put(info->clk); -release_irq: - free_irq(irq, info); -release_regs: - iounmap(info->io); -release_mem: - release_mem_region(res->start, size); -dealloc_fb: - framebuffer_release(fbinfo); - return ret; -} - -static int s3c2410fb_probe(struct platform_device *pdev) -{ - return s3c24xxfb_probe(pdev, DRV_S3C2410); -} - -static int s3c2412fb_probe(struct platform_device *pdev) -{ - return s3c24xxfb_probe(pdev, DRV_S3C2412); -} - - -/* - * Cleanup - */ -static int s3c2410fb_remove(struct platform_device *pdev) -{ - struct fb_info *fbinfo = platform_get_drvdata(pdev); - struct s3c2410fb_info *info = fbinfo->par; - int irq; - - unregister_framebuffer(fbinfo); - s3c2410fb_cpufreq_deregister(info); - - s3c2410fb_lcd_enable(info, 0); - usleep_range(1000, 1100); - - s3c2410fb_unmap_video_memory(fbinfo); - - if (info->clk) { - clk_disable_unprepare(info->clk); - clk_put(info->clk); - info->clk = NULL; - } - - irq = platform_get_irq(pdev, 0); - free_irq(irq, info); - - iounmap(info->io); - - release_mem_region(info->mem->start, resource_size(info->mem)); - - framebuffer_release(fbinfo); - - return 0; -} - -#ifdef CONFIG_PM - -/* suspend and resume support for the lcd controller */ -static int s3c2410fb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct fb_info *fbinfo = platform_get_drvdata(dev); - struct s3c2410fb_info *info = fbinfo->par; - - s3c2410fb_lcd_enable(info, 0); - - /* sleep before disabling the clock, we need to ensure - * the LCD DMA engine is not going to get back on the bus - * before the clock goes off again (bjd) */ - - usleep_range(1000, 1100); - clk_disable_unprepare(info->clk); - - return 0; -} - -static int s3c2410fb_resume(struct platform_device *dev) -{ - struct fb_info *fbinfo = platform_get_drvdata(dev); - struct s3c2410fb_info *info = fbinfo->par; - - clk_prepare_enable(info->clk); - usleep_range(1000, 1100); - - s3c2410fb_init_registers(fbinfo); - - /* re-activate our display after resume */ - s3c2410fb_activate_var(fbinfo); - s3c2410fb_blank(FB_BLANK_UNBLANK, fbinfo); - - return 0; -} - -#else -#define s3c2410fb_suspend NULL -#define s3c2410fb_resume NULL -#endif - -static struct platform_driver s3c2410fb_driver = { - .probe = s3c2410fb_probe, - .remove = s3c2410fb_remove, - .suspend = s3c2410fb_suspend, - .resume = s3c2410fb_resume, - .driver = { - .name = "s3c2410-lcd", - }, -}; - -static struct platform_driver s3c2412fb_driver = { - .probe = s3c2412fb_probe, - .remove = s3c2410fb_remove, - .suspend = s3c2410fb_suspend, - .resume = s3c2410fb_resume, - .driver = { - .name = "s3c2412-lcd", - }, -}; - -int __init s3c2410fb_init(void) -{ - int ret = platform_driver_register(&s3c2410fb_driver); - - if (ret == 0) - ret = platform_driver_register(&s3c2412fb_driver); - - return ret; -} - -static void __exit s3c2410fb_cleanup(void) -{ - platform_driver_unregister(&s3c2410fb_driver); - platform_driver_unregister(&s3c2412fb_driver); -} - -module_init(s3c2410fb_init); -module_exit(s3c2410fb_cleanup); - -MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); -MODULE_AUTHOR("Ben Dooks <ben-linux@fluff.org>"); -MODULE_DESCRIPTION("Framebuffer driver for the s3c2410"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:s3c2410-lcd"); -MODULE_ALIAS("platform:s3c2412-lcd"); diff --git a/drivers/video/fbdev/s3c2410fb.h b/drivers/video/fbdev/s3c2410fb.h deleted file mode 100644 index cdd11e2f8859..000000000000 --- a/drivers/video/fbdev/s3c2410fb.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/drivers/video/s3c2410fb.h - * Copyright (c) 2004 Arnaud Patard - * - * S3C2410 LCD Framebuffer Driver - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - * -*/ - -#ifndef __S3C2410FB_H -#define __S3C2410FB_H - -enum s3c_drv_type { - DRV_S3C2410, - DRV_S3C2412, -}; - -struct s3c2410fb_info { - struct device *dev; - struct clk *clk; - - struct resource *mem; - void __iomem *io; - void __iomem *irq_base; - - enum s3c_drv_type drv_type; - struct s3c2410fb_hw regs; - - unsigned long clk_rate; - unsigned int palette_ready; - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - struct notifier_block freq_transition; -#endif - - /* keep these registers in case we need to re-write palette */ - u32 palette_buffer[256]; - u32 pseudo_pal[16]; -}; - -#define PALETTE_BUFF_CLEAR (0x80000000) /* entry is clear/invalid */ - -int s3c2410fb_init(void); - -#endif diff --git a/drivers/video/fbdev/sa1100fb.c b/drivers/video/fbdev/sa1100fb.c index 017c8efe8267..b1b8ccdbac4a 100644 --- a/drivers/video/fbdev/sa1100fb.c +++ b/drivers/video/fbdev/sa1100fb.c @@ -184,7 +184,6 @@ #include <mach/hardware.h> #include <asm/mach-types.h> -#include <mach/shannon.h> /* * Complain if VAR is out of range. diff --git a/drivers/video/fbdev/tmiofb.c b/drivers/video/fbdev/tmiofb.c deleted file mode 100644 index 50111966c981..000000000000 --- a/drivers/video/fbdev/tmiofb.c +++ /dev/null @@ -1,1040 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Frame Buffer Device for Toshiba Mobile IO(TMIO) controller - * - * Copyright(C) 2005-2006 Chris Humbert - * Copyright(C) 2005 Dirk Opfer - * Copytight(C) 2007,2008 Dmitry Baryshkov - * - * Based on: - * drivers/video/w100fb.c - * code written by Sharp/Lineo for 2.4 kernels - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/fb.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -/* Why should fb driver call console functions? because console_lock() */ -#include <linux/console.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tmio.h> -#include <linux/uaccess.h> - -/* - * accelerator commands - */ -#define TMIOFB_ACC_CSADR(x) (0x00000000 | ((x) & 0x001ffffe)) -#define TMIOFB_ACC_CHPIX(x) (0x01000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_CVPIX(x) (0x02000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_PSADR(x) (0x03000000 | ((x) & 0x00fffffe)) -#define TMIOFB_ACC_PHPIX(x) (0x04000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_PVPIX(x) (0x05000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_PHOFS(x) (0x06000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_PVOFS(x) (0x07000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_POADR(x) (0x08000000 | ((x) & 0x00fffffe)) -#define TMIOFB_ACC_RSTR(x) (0x09000000 | ((x) & 0x000000ff)) -#define TMIOFB_ACC_TCLOR(x) (0x0A000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_FILL(x) (0x0B000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_DSADR(x) (0x0C000000 | ((x) & 0x00fffffe)) -#define TMIOFB_ACC_SSADR(x) (0x0D000000 | ((x) & 0x00fffffe)) -#define TMIOFB_ACC_DHPIX(x) (0x0E000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_DVPIX(x) (0x0F000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_SHPIX(x) (0x10000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_SVPIX(x) (0x11000000 | ((x) & 0x000003ff)) -#define TMIOFB_ACC_LBINI(x) (0x12000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_LBK2(x) (0x13000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_SHBINI(x) (0x14000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_SHBK2(x) (0x15000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_SVBINI(x) (0x16000000 | ((x) & 0x0000ffff)) -#define TMIOFB_ACC_SVBK2(x) (0x17000000 | ((x) & 0x0000ffff)) - -#define TMIOFB_ACC_CMGO 0x20000000 -#define TMIOFB_ACC_CMGO_CEND 0x00000001 -#define TMIOFB_ACC_CMGO_INT 0x00000002 -#define TMIOFB_ACC_CMGO_CMOD 0x00000010 -#define TMIOFB_ACC_CMGO_CDVRV 0x00000020 -#define TMIOFB_ACC_CMGO_CDHRV 0x00000040 -#define TMIOFB_ACC_CMGO_RUND 0x00008000 -#define TMIOFB_ACC_SCGO 0x21000000 -#define TMIOFB_ACC_SCGO_CEND 0x00000001 -#define TMIOFB_ACC_SCGO_INT 0x00000002 -#define TMIOFB_ACC_SCGO_ROP3 0x00000004 -#define TMIOFB_ACC_SCGO_TRNS 0x00000008 -#define TMIOFB_ACC_SCGO_DVRV 0x00000010 -#define TMIOFB_ACC_SCGO_DHRV 0x00000020 -#define TMIOFB_ACC_SCGO_SVRV 0x00000040 -#define TMIOFB_ACC_SCGO_SHRV 0x00000080 -#define TMIOFB_ACC_SCGO_DSTXY 0x00008000 -#define TMIOFB_ACC_SBGO 0x22000000 -#define TMIOFB_ACC_SBGO_CEND 0x00000001 -#define TMIOFB_ACC_SBGO_INT 0x00000002 -#define TMIOFB_ACC_SBGO_DVRV 0x00000010 -#define TMIOFB_ACC_SBGO_DHRV 0x00000020 -#define TMIOFB_ACC_SBGO_SVRV 0x00000040 -#define TMIOFB_ACC_SBGO_SHRV 0x00000080 -#define TMIOFB_ACC_SBGO_SBMD 0x00000100 -#define TMIOFB_ACC_FLGO 0x23000000 -#define TMIOFB_ACC_FLGO_CEND 0x00000001 -#define TMIOFB_ACC_FLGO_INT 0x00000002 -#define TMIOFB_ACC_FLGO_ROP3 0x00000004 -#define TMIOFB_ACC_LDGO 0x24000000 -#define TMIOFB_ACC_LDGO_CEND 0x00000001 -#define TMIOFB_ACC_LDGO_INT 0x00000002 -#define TMIOFB_ACC_LDGO_ROP3 0x00000004 -#define TMIOFB_ACC_LDGO_ENDPX 0x00000008 -#define TMIOFB_ACC_LDGO_LVRV 0x00000010 -#define TMIOFB_ACC_LDGO_LHRV 0x00000020 -#define TMIOFB_ACC_LDGO_LDMOD 0x00000040 - -/* a FIFO is always allocated, even if acceleration is not used */ -#define TMIOFB_FIFO_SIZE 512 - -/* - * LCD Host Controller Configuration Register - * - * This iomem area supports only 16-bit IO. - */ -#define CCR_CMD 0x04 /* Command */ -#define CCR_REVID 0x08 /* Revision ID */ -#define CCR_BASEL 0x10 /* LCD Control Reg Base Addr Low */ -#define CCR_BASEH 0x12 /* LCD Control Reg Base Addr High */ -#define CCR_UGCC 0x40 /* Unified Gated Clock Control */ -#define CCR_GCC 0x42 /* Gated Clock Control */ -#define CCR_USC 0x50 /* Unified Software Clear */ -#define CCR_VRAMRTC 0x60 /* VRAM Timing Control */ - /* 0x61 VRAM Refresh Control */ -#define CCR_VRAMSAC 0x62 /* VRAM Access Control */ - /* 0x63 VRAM Status */ -#define CCR_VRAMBC 0x64 /* VRAM Block Control */ - -/* - * LCD Control Register - * - * This iomem area supports only 16-bit IO. - */ -#define LCR_UIS 0x000 /* Unified Interrupt Status */ -#define LCR_VHPN 0x008 /* VRAM Horizontal Pixel Number */ -#define LCR_CFSAL 0x00a /* Command FIFO Start Address Low */ -#define LCR_CFSAH 0x00c /* Command FIFO Start Address High */ -#define LCR_CFS 0x00e /* Command FIFO Size */ -#define LCR_CFWS 0x010 /* Command FIFO Writeable Size */ -#define LCR_BBIE 0x012 /* BitBLT Interrupt Enable */ -#define LCR_BBISC 0x014 /* BitBLT Interrupt Status and Clear */ -#define LCR_CCS 0x016 /* Command Count Status */ -#define LCR_BBES 0x018 /* BitBLT Execution Status */ -#define LCR_CMDL 0x01c /* Command Low */ -#define LCR_CMDH 0x01e /* Command High */ -#define LCR_CFC 0x022 /* Command FIFO Clear */ -#define LCR_CCIFC 0x024 /* CMOS Camera IF Control */ -#define LCR_HWT 0x026 /* Hardware Test */ -#define LCR_LCDCCRC 0x100 /* LCDC Clock and Reset Control */ -#define LCR_LCDCC 0x102 /* LCDC Control */ -#define LCR_LCDCOPC 0x104 /* LCDC Output Pin Control */ -#define LCR_LCDIS 0x108 /* LCD Interrupt Status */ -#define LCR_LCDIM 0x10a /* LCD Interrupt Mask */ -#define LCR_LCDIE 0x10c /* LCD Interrupt Enable */ -#define LCR_GDSAL 0x122 /* Graphics Display Start Address Low */ -#define LCR_GDSAH 0x124 /* Graphics Display Start Address High */ -#define LCR_VHPCL 0x12a /* VRAM Horizontal Pixel Count Low */ -#define LCR_VHPCH 0x12c /* VRAM Horizontal Pixel Count High */ -#define LCR_GM 0x12e /* Graphic Mode(VRAM access enable) */ -#define LCR_HT 0x140 /* Horizontal Total */ -#define LCR_HDS 0x142 /* Horizontal Display Start */ -#define LCR_HSS 0x144 /* H-Sync Start */ -#define LCR_HSE 0x146 /* H-Sync End */ -#define LCR_HNP 0x14c /* Horizontal Number of Pixels */ -#define LCR_VT 0x150 /* Vertical Total */ -#define LCR_VDS 0x152 /* Vertical Display Start */ -#define LCR_VSS 0x154 /* V-Sync Start */ -#define LCR_VSE 0x156 /* V-Sync End */ -#define LCR_CDLN 0x160 /* Current Display Line Number */ -#define LCR_ILN 0x162 /* Interrupt Line Number */ -#define LCR_SP 0x164 /* Sync Polarity */ -#define LCR_MISC 0x166 /* MISC(RGB565 mode) */ -#define LCR_VIHSS 0x16a /* Video Interface H-Sync Start */ -#define LCR_VIVS 0x16c /* Video Interface Vertical Start */ -#define LCR_VIVE 0x16e /* Video Interface Vertical End */ -#define LCR_VIVSS 0x170 /* Video Interface V-Sync Start */ -#define LCR_VCCIS 0x17e /* Video / CMOS Camera Interface Select */ -#define LCR_VIDWSAL 0x180 /* VI Data Write Start Address Low */ -#define LCR_VIDWSAH 0x182 /* VI Data Write Start Address High */ -#define LCR_VIDRSAL 0x184 /* VI Data Read Start Address Low */ -#define LCR_VIDRSAH 0x186 /* VI Data Read Start Address High */ -#define LCR_VIPDDST 0x188 /* VI Picture Data Display Start Timing */ -#define LCR_VIPDDET 0x186 /* VI Picture Data Display End Timing */ -#define LCR_VIE 0x18c /* Video Interface Enable */ -#define LCR_VCS 0x18e /* Video/Camera Select */ -#define LCR_VPHWC 0x194 /* Video Picture Horizontal Wait Count */ -#define LCR_VPHS 0x196 /* Video Picture Horizontal Size */ -#define LCR_VPVWC 0x198 /* Video Picture Vertical Wait Count */ -#define LCR_VPVS 0x19a /* Video Picture Vertical Size */ -#define LCR_PLHPIX 0x1a0 /* PLHPIX */ -#define LCR_XS 0x1a2 /* XStart */ -#define LCR_XCKHW 0x1a4 /* XCK High Width */ -#define LCR_STHS 0x1a8 /* STH Start */ -#define LCR_VT2 0x1aa /* Vertical Total */ -#define LCR_YCKSW 0x1ac /* YCK Start Wait */ -#define LCR_YSTS 0x1ae /* YST Start */ -#define LCR_PPOLS 0x1b0 /* #PPOL Start */ -#define LCR_PRECW 0x1b2 /* PREC Width */ -#define LCR_VCLKHW 0x1b4 /* VCLK High Width */ -#define LCR_OC 0x1b6 /* Output Control */ - -static char *mode_option; - -struct tmiofb_par { - u32 pseudo_palette[16]; - -#ifdef CONFIG_FB_TMIO_ACCELL - wait_queue_head_t wait_acc; - bool use_polling; -#endif - - void __iomem *ccr; - void __iomem *lcr; -}; - -/*--------------------------------------------------------------------------*/ - -/* - * reasons for an interrupt: - * uis bbisc lcdis - * 0100 0001 accelerator command completed - * 2000 0001 vsync start - * 2000 0002 display start - * 2000 0004 line number match(0x1ff mask???) - */ -static irqreturn_t tmiofb_irq(int irq, void *__info) -{ - struct fb_info *info = __info; - struct tmiofb_par *par = info->par; - unsigned int bbisc = tmio_ioread16(par->lcr + LCR_BBISC); - - - tmio_iowrite16(bbisc, par->lcr + LCR_BBISC); - -#ifdef CONFIG_FB_TMIO_ACCELL - /* - * We were in polling mode and now we got correct irq. - * Switch back to IRQ-based sync of command FIFO - */ - if (unlikely(par->use_polling && irq != -1)) { - printk(KERN_INFO "tmiofb: switching to waitq\n"); - par->use_polling = false; - } - - if (bbisc & 1) - wake_up(&par->wait_acc); -#endif - - return IRQ_HANDLED; -} - - -/*--------------------------------------------------------------------------*/ - - -/* - * Turns off the LCD controller and LCD host controller. - */ -static int tmiofb_hw_stop(struct platform_device *dev) -{ - struct tmio_fb_data *data = dev_get_platdata(&dev->dev); - struct fb_info *info = platform_get_drvdata(dev); - struct tmiofb_par *par = info->par; - - tmio_iowrite16(0, par->ccr + CCR_UGCC); - tmio_iowrite16(0, par->lcr + LCR_GM); - data->lcd_set_power(dev, 0); - tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); - - return 0; -} - -/* - * Initializes the LCD host controller. - */ -static int tmiofb_hw_init(struct platform_device *dev) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct fb_info *info = platform_get_drvdata(dev); - struct tmiofb_par *par = info->par; - const struct resource *nlcr = &cell->resources[0]; - const struct resource *vram = &cell->resources[2]; - unsigned long base; - - if (nlcr == NULL || vram == NULL) - return -EINVAL; - - base = nlcr->start; - - tmio_iowrite16(0x003a, par->ccr + CCR_UGCC); - tmio_iowrite16(0x003a, par->ccr + CCR_GCC); - tmio_iowrite16(0x3f00, par->ccr + CCR_USC); - - msleep(2); /* wait for device to settle */ - - tmio_iowrite16(0x0000, par->ccr + CCR_USC); - tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH); - tmio_iowrite16(base, par->ccr + CCR_BASEL); - tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */ - tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */ - tmio_iowrite16(0x0018, par->ccr + CCR_VRAMSAC); /* VRAMSTS, VRAMAC */ - tmio_iowrite16(0x0002, par->ccr + CCR_VRAMBC); - msleep(2); /* wait for device to settle */ - tmio_iowrite16(0x000b, par->ccr + CCR_VRAMBC); - - base = vram->start + info->screen_size; - tmio_iowrite16(base >> 16, par->lcr + LCR_CFSAH); - tmio_iowrite16(base, par->lcr + LCR_CFSAL); - tmio_iowrite16(TMIOFB_FIFO_SIZE - 1, par->lcr + LCR_CFS); - tmio_iowrite16(1, par->lcr + LCR_CFC); - tmio_iowrite16(1, par->lcr + LCR_BBIE); - tmio_iowrite16(0, par->lcr + LCR_CFWS); - - return 0; -} - -/* - * Sets the LCD controller's output resolution and pixel clock - */ -static void tmiofb_hw_mode(struct platform_device *dev) -{ - struct tmio_fb_data *data = dev_get_platdata(&dev->dev); - struct fb_info *info = platform_get_drvdata(dev); - struct fb_videomode *mode = info->mode; - struct tmiofb_par *par = info->par; - unsigned int i; - - tmio_iowrite16(0, par->lcr + LCR_GM); - data->lcd_set_power(dev, 0); - tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); - data->lcd_mode(dev, mode); - data->lcd_set_power(dev, 1); - - tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPN); - tmio_iowrite16(0, par->lcr + LCR_GDSAH); - tmio_iowrite16(0, par->lcr + LCR_GDSAL); - tmio_iowrite16(info->fix.line_length >> 16, par->lcr + LCR_VHPCH); - tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPCL); - tmio_iowrite16(i = 0, par->lcr + LCR_HSS); - tmio_iowrite16(i += mode->hsync_len, par->lcr + LCR_HSE); - tmio_iowrite16(i += mode->left_margin, par->lcr + LCR_HDS); - tmio_iowrite16(i += mode->xres + mode->right_margin, par->lcr + LCR_HT); - tmio_iowrite16(mode->xres, par->lcr + LCR_HNP); - tmio_iowrite16(i = 0, par->lcr + LCR_VSS); - tmio_iowrite16(i += mode->vsync_len, par->lcr + LCR_VSE); - tmio_iowrite16(i += mode->upper_margin, par->lcr + LCR_VDS); - tmio_iowrite16(i += mode->yres, par->lcr + LCR_ILN); - tmio_iowrite16(i += mode->lower_margin, par->lcr + LCR_VT); - tmio_iowrite16(3, par->lcr + LCR_MISC); /* RGB565 mode */ - tmio_iowrite16(1, par->lcr + LCR_GM); /* VRAM enable */ - tmio_iowrite16(0x4007, par->lcr + LCR_LCDCC); - tmio_iowrite16(3, par->lcr + LCR_SP); /* sync polarity */ - - tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); - msleep(5); /* wait for device to settle */ - tmio_iowrite16(0x0014, par->lcr + LCR_LCDCCRC); /* STOP_CKP */ - msleep(5); /* wait for device to settle */ - tmio_iowrite16(0x0015, par->lcr + LCR_LCDCCRC); /* STOP_CKP|SOFT_RESET*/ - tmio_iowrite16(0xfffa, par->lcr + LCR_VCS); -} - -/*--------------------------------------------------------------------------*/ - -#ifdef CONFIG_FB_TMIO_ACCELL -static int __must_check -tmiofb_acc_wait(struct fb_info *info, unsigned int ccs) -{ - struct tmiofb_par *par = info->par; - /* - * This code can be called with interrupts disabled. - * So instead of relaying on irq to trigger the event, - * poll the state till the necessary command is executed. - */ - if (irqs_disabled() || par->use_polling) { - int i = 0; - while (tmio_ioread16(par->lcr + LCR_CCS) > ccs) { - udelay(1); - i++; - if (i > 10000) { - pr_err("tmiofb: timeout waiting for %d\n", - ccs); - return -ETIMEDOUT; - } - tmiofb_irq(-1, info); - } - } else { - if (!wait_event_interruptible_timeout(par->wait_acc, - tmio_ioread16(par->lcr + LCR_CCS) <= ccs, - 1000)) { - pr_err("tmiofb: timeout waiting for %d\n", ccs); - return -ETIMEDOUT; - } - } - - return 0; -} - -/* - * Writes an accelerator command to the accelerator's FIFO. - */ -static int -tmiofb_acc_write(struct fb_info *info, const u32 *cmd, unsigned int count) -{ - struct tmiofb_par *par = info->par; - int ret; - - ret = tmiofb_acc_wait(info, TMIOFB_FIFO_SIZE - count); - if (ret) - return ret; - - for (; count; count--, cmd++) { - tmio_iowrite16(*cmd >> 16, par->lcr + LCR_CMDH); - tmio_iowrite16(*cmd, par->lcr + LCR_CMDL); - } - - return ret; -} - -/* - * Wait for the accelerator to finish its operations before writing - * to the framebuffer for consistent display output. - */ -static int tmiofb_sync(struct fb_info *fbi) -{ - struct tmiofb_par *par = fbi->par; - - int ret; - int i = 0; - - ret = tmiofb_acc_wait(fbi, 0); - - while (tmio_ioread16(par->lcr + LCR_BBES) & 2) { /* blit active */ - udelay(1); - i++ ; - if (i > 10000) { - printk(KERN_ERR "timeout waiting for blit to end!\n"); - return -ETIMEDOUT; - } - } - - return ret; -} - -static void -tmiofb_fillrect(struct fb_info *fbi, const struct fb_fillrect *rect) -{ - const u32 cmd[] = { - TMIOFB_ACC_DSADR((rect->dy * fbi->mode->xres + rect->dx) * 2), - TMIOFB_ACC_DHPIX(rect->width - 1), - TMIOFB_ACC_DVPIX(rect->height - 1), - TMIOFB_ACC_FILL(rect->color), - TMIOFB_ACC_FLGO, - }; - - if (fbi->state != FBINFO_STATE_RUNNING || - fbi->flags & FBINFO_HWACCEL_DISABLED) { - cfb_fillrect(fbi, rect); - return; - } - - tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd)); -} - -static void -tmiofb_copyarea(struct fb_info *fbi, const struct fb_copyarea *area) -{ - const u32 cmd[] = { - TMIOFB_ACC_DSADR((area->dy * fbi->mode->xres + area->dx) * 2), - TMIOFB_ACC_DHPIX(area->width - 1), - TMIOFB_ACC_DVPIX(area->height - 1), - TMIOFB_ACC_SSADR((area->sy * fbi->mode->xres + area->sx) * 2), - TMIOFB_ACC_SCGO, - }; - - if (fbi->state != FBINFO_STATE_RUNNING || - fbi->flags & FBINFO_HWACCEL_DISABLED) { - cfb_copyarea(fbi, area); - return; - } - - tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd)); -} -#endif - -static void tmiofb_clearscreen(struct fb_info *info) -{ - const struct fb_fillrect rect = { - .dx = 0, - .dy = 0, - .width = info->mode->xres, - .height = info->mode->yres, - .color = 0, - .rop = ROP_COPY, - }; - - info->fbops->fb_fillrect(info, &rect); -} - -static int tmiofb_vblank(struct fb_info *fbi, struct fb_vblank *vblank) -{ - struct tmiofb_par *par = fbi->par; - struct fb_videomode *mode = fbi->mode; - unsigned int vcount = tmio_ioread16(par->lcr + LCR_CDLN); - unsigned int vds = mode->vsync_len + mode->upper_margin; - - vblank->vcount = vcount; - vblank->flags = FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_VCOUNT - | FB_VBLANK_HAVE_VSYNC; - - if (vcount < mode->vsync_len) - vblank->flags |= FB_VBLANK_VSYNCING; - - if (vcount < vds || vcount > vds + mode->yres) - vblank->flags |= FB_VBLANK_VBLANKING; - - return 0; -} - - -static int tmiofb_ioctl(struct fb_info *fbi, - unsigned int cmd, unsigned long arg) -{ - switch (cmd) { - case FBIOGET_VBLANK: { - struct fb_vblank vblank = {0}; - void __user *argp = (void __user *) arg; - - tmiofb_vblank(fbi, &vblank); - if (copy_to_user(argp, &vblank, sizeof vblank)) - return -EFAULT; - return 0; - } - -#ifdef CONFIG_FB_TMIO_ACCELL - case FBIO_TMIO_ACC_SYNC: - tmiofb_sync(fbi); - return 0; - - case FBIO_TMIO_ACC_WRITE: { - u32 __user *argp = (void __user *) arg; - u32 len; - u32 acc[16]; - - if (get_user(len, argp)) - return -EFAULT; - if (len > ARRAY_SIZE(acc)) - return -EINVAL; - if (copy_from_user(acc, argp + 1, sizeof(u32) * len)) - return -EFAULT; - - return tmiofb_acc_write(fbi, acc, len); - } -#endif - } - - return -ENOTTY; -} - -/*--------------------------------------------------------------------------*/ - -/* Select the smallest mode that allows the desired resolution to be - * displayed. If desired, the x and y parameters can be rounded up to - * match the selected mode. - */ -static struct fb_videomode * -tmiofb_find_mode(struct fb_info *info, struct fb_var_screeninfo *var) -{ - struct tmio_fb_data *data = dev_get_platdata(info->device); - struct fb_videomode *best = NULL; - int i; - - for (i = 0; i < data->num_modes; i++) { - struct fb_videomode *mode = data->modes + i; - - if (mode->xres >= var->xres && mode->yres >= var->yres - && (!best || (mode->xres < best->xres - && mode->yres < best->yres))) - best = mode; - } - - return best; -} - -static int tmiofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - - struct fb_videomode *mode; - struct tmio_fb_data *data = dev_get_platdata(info->device); - - mode = tmiofb_find_mode(info, var); - if (!mode || var->bits_per_pixel > 16) - return -EINVAL; - - fb_videomode_to_var(var, mode); - - var->xres_virtual = mode->xres; - var->yres_virtual = info->screen_size / (mode->xres * 2); - - if (var->yres_virtual < var->yres) - return -EINVAL; - - var->xoffset = 0; - var->yoffset = 0; - var->bits_per_pixel = 16; - var->grayscale = 0; - var->red.offset = 11; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 0; - var->blue.length = 5; - var->transp.offset = 0; - var->transp.length = 0; - var->nonstd = 0; - var->height = data->height; /* mm */ - var->width = data->width; /* mm */ - var->rotate = 0; - return 0; -} - -static int tmiofb_set_par(struct fb_info *info) -{ - struct fb_var_screeninfo *var = &info->var; - struct fb_videomode *mode; - - mode = tmiofb_find_mode(info, var); - if (!mode) - return -EINVAL; - - info->mode = mode; - info->fix.line_length = info->mode->xres * - var->bits_per_pixel / 8; - - tmiofb_hw_mode(to_platform_device(info->device)); - tmiofb_clearscreen(info); - return 0; -} - -static int tmiofb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *info) -{ - struct tmiofb_par *par = info->par; - - if (regno < ARRAY_SIZE(par->pseudo_palette)) { - par->pseudo_palette[regno] = - ((red & 0xf800)) | - ((green & 0xfc00) >> 5) | - ((blue & 0xf800) >> 11); - return 0; - } - - return -EINVAL; -} - -static int tmiofb_blank(int blank, struct fb_info *info) -{ - /* - * everything is done in lcd/bl drivers. - * this is purely to make sysfs happy and work. - */ - return 0; -} - -static const struct fb_ops tmiofb_ops = { - .owner = THIS_MODULE, - - .fb_ioctl = tmiofb_ioctl, - .fb_check_var = tmiofb_check_var, - .fb_set_par = tmiofb_set_par, - .fb_setcolreg = tmiofb_setcolreg, - .fb_blank = tmiofb_blank, - .fb_imageblit = cfb_imageblit, -#ifdef CONFIG_FB_TMIO_ACCELL - .fb_sync = tmiofb_sync, - .fb_fillrect = tmiofb_fillrect, - .fb_copyarea = tmiofb_copyarea, -#else - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, -#endif -}; - -/*--------------------------------------------------------------------------*/ - -static int tmiofb_probe(struct platform_device *dev) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct tmio_fb_data *data = dev_get_platdata(&dev->dev); - struct resource *ccr = platform_get_resource(dev, IORESOURCE_MEM, 1); - struct resource *lcr = platform_get_resource(dev, IORESOURCE_MEM, 0); - struct resource *vram = platform_get_resource(dev, IORESOURCE_MEM, 2); - int irq = platform_get_irq(dev, 0); - struct fb_info *info; - struct tmiofb_par *par; - int retval; - - /* - * This is the only way ATM to disable the fb - */ - if (data == NULL) { - dev_err(&dev->dev, "NULL platform data!\n"); - return -EINVAL; - } - if (ccr == NULL || lcr == NULL || vram == NULL || irq < 0) { - dev_err(&dev->dev, "missing resources\n"); - return -EINVAL; - } - - info = framebuffer_alloc(sizeof(struct tmiofb_par), &dev->dev); - - if (!info) - return -ENOMEM; - - par = info->par; - -#ifdef CONFIG_FB_TMIO_ACCELL - init_waitqueue_head(&par->wait_acc); - - par->use_polling = true; - - info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA - | FBINFO_HWACCEL_FILLRECT; -#else - info->flags = FBINFO_DEFAULT; -#endif - - info->fbops = &tmiofb_ops; - - strcpy(info->fix.id, "tmio-fb"); - info->fix.smem_start = vram->start; - info->fix.smem_len = resource_size(vram); - info->fix.type = FB_TYPE_PACKED_PIXELS; - info->fix.visual = FB_VISUAL_TRUECOLOR; - info->fix.mmio_start = lcr->start; - info->fix.mmio_len = resource_size(lcr); - info->fix.accel = FB_ACCEL_NONE; - info->screen_size = info->fix.smem_len - (4 * TMIOFB_FIFO_SIZE); - info->pseudo_palette = par->pseudo_palette; - - par->ccr = ioremap(ccr->start, resource_size(ccr)); - if (!par->ccr) { - retval = -ENOMEM; - goto err_ioremap_ccr; - } - - par->lcr = ioremap(info->fix.mmio_start, info->fix.mmio_len); - if (!par->lcr) { - retval = -ENOMEM; - goto err_ioremap_lcr; - } - - info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); - if (!info->screen_base) { - retval = -ENOMEM; - goto err_ioremap_vram; - } - - retval = request_irq(irq, &tmiofb_irq, 0, - dev_name(&dev->dev), info); - - if (retval) - goto err_request_irq; - - platform_set_drvdata(dev, info); - - retval = fb_find_mode(&info->var, info, mode_option, - data->modes, data->num_modes, - data->modes, 16); - if (!retval) { - retval = -EINVAL; - goto err_find_mode; - } - - if (cell->enable) { - retval = cell->enable(dev); - if (retval) - goto err_enable; - } - - retval = tmiofb_hw_init(dev); - if (retval) - goto err_hw_init; - - fb_videomode_to_modelist(data->modes, data->num_modes, - &info->modelist); - - retval = register_framebuffer(info); - if (retval < 0) - goto err_register_framebuffer; - - fb_info(info, "%s frame buffer device\n", info->fix.id); - - return 0; - -err_register_framebuffer: -/*err_set_par:*/ - tmiofb_hw_stop(dev); -err_hw_init: - if (cell->disable) - cell->disable(dev); -err_enable: -err_find_mode: - free_irq(irq, info); -err_request_irq: - iounmap(info->screen_base); -err_ioremap_vram: - iounmap(par->lcr); -err_ioremap_lcr: - iounmap(par->ccr); -err_ioremap_ccr: - framebuffer_release(info); - return retval; -} - -static int tmiofb_remove(struct platform_device *dev) -{ - const struct mfd_cell *cell = mfd_get_cell(dev); - struct fb_info *info = platform_get_drvdata(dev); - int irq = platform_get_irq(dev, 0); - struct tmiofb_par *par; - - if (info) { - par = info->par; - unregister_framebuffer(info); - - tmiofb_hw_stop(dev); - - if (cell->disable) - cell->disable(dev); - - free_irq(irq, info); - - iounmap(info->screen_base); - iounmap(par->lcr); - iounmap(par->ccr); - - framebuffer_release(info); - } - - return 0; -} - -#ifdef DEBUG -static void tmiofb_dump_regs(struct platform_device *dev) -{ - struct fb_info *info = platform_get_drvdata(dev); - struct tmiofb_par *par = info->par; - - printk(KERN_DEBUG "lhccr:\n"); -#define CCR_PR(n) printk(KERN_DEBUG "\t" #n " = \t%04x\n",\ - tmio_ioread16(par->ccr + CCR_ ## n)); - CCR_PR(CMD); - CCR_PR(REVID); - CCR_PR(BASEL); - CCR_PR(BASEH); - CCR_PR(UGCC); - CCR_PR(GCC); - CCR_PR(USC); - CCR_PR(VRAMRTC); - CCR_PR(VRAMSAC); - CCR_PR(VRAMBC); -#undef CCR_PR - - printk(KERN_DEBUG "lcr: \n"); -#define LCR_PR(n) printk(KERN_DEBUG "\t" #n " = \t%04x\n",\ - tmio_ioread16(par->lcr + LCR_ ## n)); - LCR_PR(UIS); - LCR_PR(VHPN); - LCR_PR(CFSAL); - LCR_PR(CFSAH); - LCR_PR(CFS); - LCR_PR(CFWS); - LCR_PR(BBIE); - LCR_PR(BBISC); - LCR_PR(CCS); - LCR_PR(BBES); - LCR_PR(CMDL); - LCR_PR(CMDH); - LCR_PR(CFC); - LCR_PR(CCIFC); - LCR_PR(HWT); - LCR_PR(LCDCCRC); - LCR_PR(LCDCC); - LCR_PR(LCDCOPC); - LCR_PR(LCDIS); - LCR_PR(LCDIM); - LCR_PR(LCDIE); - LCR_PR(GDSAL); - LCR_PR(GDSAH); - LCR_PR(VHPCL); - LCR_PR(VHPCH); - LCR_PR(GM); - LCR_PR(HT); - LCR_PR(HDS); - LCR_PR(HSS); - LCR_PR(HSE); - LCR_PR(HNP); - LCR_PR(VT); - LCR_PR(VDS); - LCR_PR(VSS); - LCR_PR(VSE); - LCR_PR(CDLN); - LCR_PR(ILN); - LCR_PR(SP); - LCR_PR(MISC); - LCR_PR(VIHSS); - LCR_PR(VIVS); - LCR_PR(VIVE); - LCR_PR(VIVSS); - LCR_PR(VCCIS); - LCR_PR(VIDWSAL); - LCR_PR(VIDWSAH); - LCR_PR(VIDRSAL); - LCR_PR(VIDRSAH); - LCR_PR(VIPDDST); - LCR_PR(VIPDDET); - LCR_PR(VIE); - LCR_PR(VCS); - LCR_PR(VPHWC); - LCR_PR(VPHS); - LCR_PR(VPVWC); - LCR_PR(VPVS); - LCR_PR(PLHPIX); - LCR_PR(XS); - LCR_PR(XCKHW); - LCR_PR(STHS); - LCR_PR(VT2); - LCR_PR(YCKSW); - LCR_PR(YSTS); - LCR_PR(PPOLS); - LCR_PR(PRECW); - LCR_PR(VCLKHW); - LCR_PR(OC); -#undef LCR_PR -} -#endif - -#ifdef CONFIG_PM -static int tmiofb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct fb_info *info = platform_get_drvdata(dev); -#ifdef CONFIG_FB_TMIO_ACCELL - struct tmiofb_par *par = info->par; -#endif - const struct mfd_cell *cell = mfd_get_cell(dev); - int retval = 0; - - console_lock(); - - fb_set_suspend(info, 1); - - if (info->fbops->fb_sync) - info->fbops->fb_sync(info); - - -#ifdef CONFIG_FB_TMIO_ACCELL - /* - * The fb should be usable even if interrupts are disabled (and they are - * during suspend/resume). Switch temporary to forced polling. - */ - printk(KERN_INFO "tmiofb: switching to polling\n"); - par->use_polling = true; -#endif - tmiofb_hw_stop(dev); - - if (cell->suspend) - retval = cell->suspend(dev); - - console_unlock(); - - return retval; -} - -static int tmiofb_resume(struct platform_device *dev) -{ - struct fb_info *info = platform_get_drvdata(dev); - const struct mfd_cell *cell = mfd_get_cell(dev); - int retval = 0; - - console_lock(); - - if (cell->resume) { - retval = cell->resume(dev); - if (retval) - goto out; - } - - tmiofb_irq(-1, info); - - tmiofb_hw_init(dev); - - tmiofb_hw_mode(dev); - - fb_set_suspend(info, 0); -out: - console_unlock(); - return retval; -} -#else -#define tmiofb_suspend NULL -#define tmiofb_resume NULL -#endif - -static struct platform_driver tmiofb_driver = { - .driver.name = "tmio-fb", - .driver.owner = THIS_MODULE, - .probe = tmiofb_probe, - .remove = tmiofb_remove, - .suspend = tmiofb_suspend, - .resume = tmiofb_resume, -}; - -/*--------------------------------------------------------------------------*/ - -#ifndef MODULE -static void __init tmiofb_setup(char *options) -{ - char *this_opt; - - if (!options || !*options) - return; - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) - continue; - /* - * FIXME - */ - } -} -#endif - -static int __init tmiofb_init(void) -{ -#ifndef MODULE - char *option = NULL; - - if (fb_get_options("tmiofb", &option)) - return -ENODEV; - tmiofb_setup(option); -#endif - return platform_driver_register(&tmiofb_driver); -} - -static void __exit tmiofb_cleanup(void) -{ - platform_driver_unregister(&tmiofb_driver); -} - -module_init(tmiofb_init); -module_exit(tmiofb_cleanup); - -MODULE_DESCRIPTION("TMIO framebuffer driver"); -MODULE_AUTHOR("Chris Humbert, Dirk Opfer, Dmitry Baryshkov"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/w100fb.c b/drivers/video/fbdev/w100fb.c deleted file mode 100644 index 4e641a780726..000000000000 --- a/drivers/video/fbdev/w100fb.c +++ /dev/null @@ -1,1644 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/video/w100fb.c - * - * Frame Buffer Device for ATI Imageon w100 (Wallaby) - * - * Copyright (C) 2002, ATI Corp. - * Copyright (C) 2004-2006 Richard Purdie - * Copyright (c) 2005 Ian Molton - * Copyright (c) 2006 Alberto Mardegan - * - * Rewritten for 2.6 by Richard Purdie <rpurdie@rpsys.net> - * - * Generic platform support by Ian Molton <spyro@f2s.com> - * and Richard Purdie <rpurdie@rpsys.net> - * - * w32xx support by Ian Molton - * - * Hardware acceleration support by Alberto Mardegan - * <mardy@users.sourceforge.net> - */ - -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/string.h> -#include <linux/vmalloc.h> -#include <linux/module.h> -#include <asm/io.h> -#include <linux/uaccess.h> -#include <video/w100fb.h> -#include "w100fb.h" - -/* - * Prototypes - */ -static void w100_suspend(u32 mode); -static void w100_vsync(void); -static void w100_hw_init(struct w100fb_par*); -static void w100_pwm_setup(struct w100fb_par*); -static void w100_init_clocks(struct w100fb_par*); -static void w100_setup_memory(struct w100fb_par*); -static void w100_init_lcd(struct w100fb_par*); -static void w100_set_dispregs(struct w100fb_par*); -static void w100_update_enable(void); -static void w100_update_disable(void); -static void calc_hsync(struct w100fb_par *par); -static void w100_init_graphic_engine(struct w100fb_par *par); -struct w100_pll_info *w100_get_xtal_table(unsigned int freq); - -/* Pseudo palette size */ -#define MAX_PALETTES 16 - -#define W100_SUSPEND_EXTMEM 0 -#define W100_SUSPEND_ALL 1 - -#define BITS_PER_PIXEL 16 - -/* Remapped addresses for base cfg, memmapped regs and the frame buffer itself */ -static void __iomem *remapped_base; -static void __iomem *remapped_regs; -static void __iomem *remapped_fbuf; - -#define REMAPPED_FB_LEN 0x15ffff - -/* This is the offset in the w100's address space we map the current - framebuffer memory to. We use the position of external memory as - we can remap internal memory to there if external isn't present. */ -#define W100_FB_BASE MEM_EXT_BASE_VALUE - - -/* - * Sysfs functions - */ -static ssize_t flip_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - struct fb_info *info = dev_get_drvdata(dev); - struct w100fb_par *par=info->par; - - return sprintf(buf, "%d\n",par->flip); -} - -static ssize_t flip_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -{ - unsigned int flip; - struct fb_info *info = dev_get_drvdata(dev); - struct w100fb_par *par=info->par; - - flip = simple_strtoul(buf, NULL, 10); - - if (flip > 0) - par->flip = 1; - else - par->flip = 0; - - w100_update_disable(); - w100_set_dispregs(par); - w100_update_enable(); - - calc_hsync(par); - - return count; -} - -static DEVICE_ATTR_RW(flip); - -static ssize_t w100fb_reg_read(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -{ - unsigned long regs, param; - regs = simple_strtoul(buf, NULL, 16); - param = readl(remapped_regs + regs); - printk("Read Register 0x%08lX: 0x%08lX\n", regs, param); - return count; -} - -static DEVICE_ATTR(reg_read, 0200, NULL, w100fb_reg_read); - -static ssize_t w100fb_reg_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -{ - unsigned long regs, param; - sscanf(buf, "%lx %lx", ®s, ¶m); - - if (regs <= 0x2000) { - printk("Write Register 0x%08lX: 0x%08lX\n", regs, param); - writel(param, remapped_regs + regs); - } - - return count; -} - -static DEVICE_ATTR(reg_write, 0200, NULL, w100fb_reg_write); - - -static ssize_t fastpllclk_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - struct fb_info *info = dev_get_drvdata(dev); - struct w100fb_par *par=info->par; - - return sprintf(buf, "%d\n",par->fastpll_mode); -} - -static ssize_t fastpllclk_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) -{ - struct fb_info *info = dev_get_drvdata(dev); - struct w100fb_par *par=info->par; - - if (simple_strtoul(buf, NULL, 10) > 0) { - par->fastpll_mode=1; - printk("w100fb: Using fast system clock (if possible)\n"); - } else { - par->fastpll_mode=0; - printk("w100fb: Using normal system clock\n"); - } - - w100_init_clocks(par); - calc_hsync(par); - - return count; -} - -static DEVICE_ATTR_RW(fastpllclk); - -static struct attribute *w100fb_attrs[] = { - &dev_attr_fastpllclk.attr, - &dev_attr_reg_read.attr, - &dev_attr_reg_write.attr, - &dev_attr_flip.attr, - NULL, -}; -ATTRIBUTE_GROUPS(w100fb); - -/* - * Some touchscreens need hsync information from the video driver to - * function correctly. We export it here. - */ -unsigned long w100fb_get_hsynclen(struct device *dev) -{ - struct fb_info *info = dev_get_drvdata(dev); - struct w100fb_par *par=info->par; - - /* If display is blanked/suspended, hsync isn't active */ - if (par->blanked) - return 0; - else - return par->hsync_len; -} -EXPORT_SYMBOL(w100fb_get_hsynclen); - -static void w100fb_clear_screen(struct w100fb_par *par) -{ - memset_io(remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), 0, (par->xres * par->yres * BITS_PER_PIXEL/8)); -} - - -/* - * Set a palette value from rgb components - */ -static int w100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int trans, struct fb_info *info) -{ - unsigned int val; - int ret = 1; - - /* - * If greyscale is true, then we convert the RGB value - * to greyscale no matter what visual we are using. - */ - if (info->var.grayscale) - red = green = blue = (19595 * red + 38470 * green + 7471 * blue) >> 16; - - /* - * 16-bit True Colour. We encode the RGB value - * according to the RGB bitfield information. - */ - if (regno < MAX_PALETTES) { - u32 *pal = info->pseudo_palette; - - val = (red & 0xf800) | ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11); - pal[regno] = val; - ret = 0; - } - return ret; -} - - -/* - * Blank the display based on value in blank_mode - */ -static int w100fb_blank(int blank_mode, struct fb_info *info) -{ - struct w100fb_par *par = info->par; - struct w100_tg_info *tg = par->mach->tg; - - switch(blank_mode) { - - case FB_BLANK_NORMAL: /* Normal blanking */ - case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ - case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ - case FB_BLANK_POWERDOWN: /* Poweroff */ - if (par->blanked == 0) { - if(tg && tg->suspend) - tg->suspend(par); - par->blanked = 1; - } - break; - - case FB_BLANK_UNBLANK: /* Unblanking */ - if (par->blanked != 0) { - if(tg && tg->resume) - tg->resume(par); - par->blanked = 0; - } - break; - } - return 0; -} - - -static void w100_fifo_wait(int entries) -{ - union rbbm_status_u status; - int i; - - for (i = 0; i < 2000000; i++) { - status.val = readl(remapped_regs + mmRBBM_STATUS); - if (status.f.cmdfifo_avail >= entries) - return; - udelay(1); - } - printk(KERN_ERR "w100fb: FIFO Timeout!\n"); -} - - -static int w100fb_sync(struct fb_info *info) -{ - union rbbm_status_u status; - int i; - - for (i = 0; i < 2000000; i++) { - status.val = readl(remapped_regs + mmRBBM_STATUS); - if (!status.f.gui_active) - return 0; - udelay(1); - } - printk(KERN_ERR "w100fb: Graphic engine timeout!\n"); - return -EBUSY; -} - - -static void w100_init_graphic_engine(struct w100fb_par *par) -{ - union dp_gui_master_cntl_u gmc; - union dp_mix_u dp_mix; - union dp_datatype_u dp_datatype; - union dp_cntl_u dp_cntl; - - w100_fifo_wait(4); - writel(W100_FB_BASE, remapped_regs + mmDST_OFFSET); - writel(par->xres, remapped_regs + mmDST_PITCH); - writel(W100_FB_BASE, remapped_regs + mmSRC_OFFSET); - writel(par->xres, remapped_regs + mmSRC_PITCH); - - w100_fifo_wait(3); - writel(0, remapped_regs + mmSC_TOP_LEFT); - writel((par->yres << 16) | par->xres, remapped_regs + mmSC_BOTTOM_RIGHT); - writel(0x1fff1fff, remapped_regs + mmSRC_SC_BOTTOM_RIGHT); - - w100_fifo_wait(4); - dp_cntl.val = 0; - dp_cntl.f.dst_x_dir = 1; - dp_cntl.f.dst_y_dir = 1; - dp_cntl.f.src_x_dir = 1; - dp_cntl.f.src_y_dir = 1; - dp_cntl.f.dst_major_x = 1; - dp_cntl.f.src_major_x = 1; - writel(dp_cntl.val, remapped_regs + mmDP_CNTL); - - gmc.val = 0; - gmc.f.gmc_src_pitch_offset_cntl = 1; - gmc.f.gmc_dst_pitch_offset_cntl = 1; - gmc.f.gmc_src_clipping = 1; - gmc.f.gmc_dst_clipping = 1; - gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; - gmc.f.gmc_dst_datatype = 3; /* from DstType_16Bpp_444 */ - gmc.f.gmc_src_datatype = SRC_DATATYPE_EQU_DST; - gmc.f.gmc_byte_pix_order = 1; - gmc.f.gmc_default_sel = 0; - gmc.f.gmc_rop3 = ROP3_SRCCOPY; - gmc.f.gmc_dp_src_source = DP_SRC_MEM_RECTANGULAR; - gmc.f.gmc_clr_cmp_fcn_dis = 1; - gmc.f.gmc_wr_msk_dis = 1; - gmc.f.gmc_dp_op = DP_OP_ROP; - writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); - - dp_datatype.val = dp_mix.val = 0; - dp_datatype.f.dp_dst_datatype = gmc.f.gmc_dst_datatype; - dp_datatype.f.dp_brush_datatype = gmc.f.gmc_brush_datatype; - dp_datatype.f.dp_src2_type = 0; - dp_datatype.f.dp_src2_datatype = gmc.f.gmc_src_datatype; - dp_datatype.f.dp_src_datatype = gmc.f.gmc_src_datatype; - dp_datatype.f.dp_byte_pix_order = gmc.f.gmc_byte_pix_order; - writel(dp_datatype.val, remapped_regs + mmDP_DATATYPE); - - dp_mix.f.dp_src_source = gmc.f.gmc_dp_src_source; - dp_mix.f.dp_src2_source = 1; - dp_mix.f.dp_rop3 = gmc.f.gmc_rop3; - dp_mix.f.dp_op = gmc.f.gmc_dp_op; - writel(dp_mix.val, remapped_regs + mmDP_MIX); -} - - -static void w100fb_fillrect(struct fb_info *info, - const struct fb_fillrect *rect) -{ - union dp_gui_master_cntl_u gmc; - - if (info->state != FBINFO_STATE_RUNNING) - return; - if (info->flags & FBINFO_HWACCEL_DISABLED) { - cfb_fillrect(info, rect); - return; - } - - gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL); - gmc.f.gmc_rop3 = ROP3_PATCOPY; - gmc.f.gmc_brush_datatype = GMC_BRUSH_SOLID_COLOR; - w100_fifo_wait(2); - writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); - writel(rect->color, remapped_regs + mmDP_BRUSH_FRGD_CLR); - - w100_fifo_wait(2); - writel((rect->dy << 16) | (rect->dx & 0xffff), remapped_regs + mmDST_Y_X); - writel((rect->width << 16) | (rect->height & 0xffff), - remapped_regs + mmDST_WIDTH_HEIGHT); -} - - -static void w100fb_copyarea(struct fb_info *info, - const struct fb_copyarea *area) -{ - u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy; - u32 h = area->height, w = area->width; - union dp_gui_master_cntl_u gmc; - - if (info->state != FBINFO_STATE_RUNNING) - return; - if (info->flags & FBINFO_HWACCEL_DISABLED) { - cfb_copyarea(info, area); - return; - } - - gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL); - gmc.f.gmc_rop3 = ROP3_SRCCOPY; - gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; - w100_fifo_wait(1); - writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); - - w100_fifo_wait(3); - writel((sy << 16) | (sx & 0xffff), remapped_regs + mmSRC_Y_X); - writel((dy << 16) | (dx & 0xffff), remapped_regs + mmDST_Y_X); - writel((w << 16) | (h & 0xffff), remapped_regs + mmDST_WIDTH_HEIGHT); -} - - -/* - * Change the resolution by calling the appropriate hardware functions - */ -static void w100fb_activate_var(struct w100fb_par *par) -{ - struct w100_tg_info *tg = par->mach->tg; - - w100_pwm_setup(par); - w100_setup_memory(par); - w100_init_clocks(par); - w100fb_clear_screen(par); - w100_vsync(); - - w100_update_disable(); - w100_init_lcd(par); - w100_set_dispregs(par); - w100_update_enable(); - w100_init_graphic_engine(par); - - calc_hsync(par); - - if (!par->blanked && tg && tg->change) - tg->change(par); -} - - -/* Select the smallest mode that allows the desired resolution to be - * displayed. If desired, the x and y parameters can be rounded up to - * match the selected mode. - */ -static struct w100_mode *w100fb_get_mode(struct w100fb_par *par, unsigned int *x, unsigned int *y, int saveval) -{ - struct w100_mode *mode = NULL; - struct w100_mode *modelist = par->mach->modelist; - unsigned int best_x = 0xffffffff, best_y = 0xffffffff; - unsigned int i; - - for (i = 0 ; i < par->mach->num_modes ; i++) { - if (modelist[i].xres >= *x && modelist[i].yres >= *y && - modelist[i].xres < best_x && modelist[i].yres < best_y) { - best_x = modelist[i].xres; - best_y = modelist[i].yres; - mode = &modelist[i]; - } else if(modelist[i].xres >= *y && modelist[i].yres >= *x && - modelist[i].xres < best_y && modelist[i].yres < best_x) { - best_x = modelist[i].yres; - best_y = modelist[i].xres; - mode = &modelist[i]; - } - } - - if (mode && saveval) { - *x = best_x; - *y = best_y; - } - - return mode; -} - - -/* - * w100fb_check_var(): - * Get the video params out of 'var'. If a value doesn't fit, round it up, - * if it's too big, return -EINVAL. - */ -static int w100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct w100fb_par *par=info->par; - - if(!w100fb_get_mode(par, &var->xres, &var->yres, 1)) - return -EINVAL; - - if (par->mach->mem && ((var->xres*var->yres*BITS_PER_PIXEL/8) > (par->mach->mem->size+1))) - return -EINVAL; - - if (!par->mach->mem && ((var->xres*var->yres*BITS_PER_PIXEL/8) > (MEM_INT_SIZE+1))) - return -EINVAL; - - var->xres_virtual = max(var->xres_virtual, var->xres); - var->yres_virtual = max(var->yres_virtual, var->yres); - - if (var->bits_per_pixel > BITS_PER_PIXEL) - return -EINVAL; - else - var->bits_per_pixel = BITS_PER_PIXEL; - - var->red.offset = 11; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 0; - var->blue.length = 5; - var->transp.offset = var->transp.length = 0; - - var->nonstd = 0; - var->height = -1; - var->width = -1; - var->vmode = FB_VMODE_NONINTERLACED; - var->sync = 0; - var->pixclock = 0x04; /* 171521; */ - - return 0; -} - - -/* - * w100fb_set_par(): - * Set the user defined part of the display for the specified console - * by looking at the values in info.var - */ -static int w100fb_set_par(struct fb_info *info) -{ - struct w100fb_par *par=info->par; - - if (par->xres != info->var.xres || par->yres != info->var.yres) { - par->xres = info->var.xres; - par->yres = info->var.yres; - par->mode = w100fb_get_mode(par, &par->xres, &par->yres, 0); - - info->fix.visual = FB_VISUAL_TRUECOLOR; - info->fix.ypanstep = 0; - info->fix.ywrapstep = 0; - info->fix.line_length = par->xres * BITS_PER_PIXEL / 8; - - mutex_lock(&info->mm_lock); - if ((par->xres*par->yres*BITS_PER_PIXEL/8) > (MEM_INT_SIZE+1)) { - par->extmem_active = 1; - info->fix.smem_len = par->mach->mem->size+1; - } else { - par->extmem_active = 0; - info->fix.smem_len = MEM_INT_SIZE+1; - } - mutex_unlock(&info->mm_lock); - - w100fb_activate_var(par); - } - return 0; -} - - -/* - * Frame buffer operations - */ -static const struct fb_ops w100fb_ops = { - .owner = THIS_MODULE, - .fb_check_var = w100fb_check_var, - .fb_set_par = w100fb_set_par, - .fb_setcolreg = w100fb_setcolreg, - .fb_blank = w100fb_blank, - .fb_fillrect = w100fb_fillrect, - .fb_copyarea = w100fb_copyarea, - .fb_imageblit = cfb_imageblit, - .fb_sync = w100fb_sync, -}; - -#ifdef CONFIG_PM -static void w100fb_save_vidmem(struct w100fb_par *par) -{ - int memsize; - - if (par->extmem_active) { - memsize=par->mach->mem->size; - par->saved_extmem = vmalloc(memsize); - if (par->saved_extmem) - memcpy_fromio(par->saved_extmem, remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), memsize); - } - memsize=MEM_INT_SIZE; - par->saved_intmem = vmalloc(memsize); - if (par->saved_intmem && par->extmem_active) - memcpy_fromio(par->saved_intmem, remapped_fbuf + (W100_FB_BASE-MEM_INT_BASE_VALUE), memsize); - else if (par->saved_intmem) - memcpy_fromio(par->saved_intmem, remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), memsize); -} - -static void w100fb_restore_vidmem(struct w100fb_par *par) -{ - int memsize; - - if (par->extmem_active && par->saved_extmem) { - memsize=par->mach->mem->size; - memcpy_toio(remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), par->saved_extmem, memsize); - vfree(par->saved_extmem); - par->saved_extmem = NULL; - } - if (par->saved_intmem) { - memsize=MEM_INT_SIZE; - if (par->extmem_active) - memcpy_toio(remapped_fbuf + (W100_FB_BASE-MEM_INT_BASE_VALUE), par->saved_intmem, memsize); - else - memcpy_toio(remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), par->saved_intmem, memsize); - vfree(par->saved_intmem); - par->saved_intmem = NULL; - } -} - -static int w100fb_suspend(struct platform_device *dev, pm_message_t state) -{ - struct fb_info *info = platform_get_drvdata(dev); - struct w100fb_par *par=info->par; - struct w100_tg_info *tg = par->mach->tg; - - w100fb_save_vidmem(par); - if(tg && tg->suspend) - tg->suspend(par); - w100_suspend(W100_SUSPEND_ALL); - par->blanked = 1; - - return 0; -} - -static int w100fb_resume(struct platform_device *dev) -{ - struct fb_info *info = platform_get_drvdata(dev); - struct w100fb_par *par=info->par; - struct w100_tg_info *tg = par->mach->tg; - - w100_hw_init(par); - w100fb_activate_var(par); - w100fb_restore_vidmem(par); - if(tg && tg->resume) - tg->resume(par); - par->blanked = 0; - - return 0; -} -#else -#define w100fb_suspend NULL -#define w100fb_resume NULL -#endif - - -static int w100fb_probe(struct platform_device *pdev) -{ - int err = -EIO; - struct w100fb_mach_info *inf; - struct fb_info *info = NULL; - struct w100fb_par *par; - struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - unsigned int chip_id; - - if (!mem) - return -EINVAL; - - /* Remap the chip base address */ - remapped_base = ioremap(mem->start+W100_CFG_BASE, W100_CFG_LEN); - if (remapped_base == NULL) - goto out; - - /* Map the register space */ - remapped_regs = ioremap(mem->start+W100_REG_BASE, W100_REG_LEN); - if (remapped_regs == NULL) - goto out; - - /* Identify the chip */ - printk("Found "); - chip_id = readl(remapped_regs + mmCHIP_ID); - switch(chip_id) { - case CHIP_ID_W100: printk("w100"); break; - case CHIP_ID_W3200: printk("w3200"); break; - case CHIP_ID_W3220: printk("w3220"); break; - default: - printk("Unknown imageon chip ID\n"); - err = -ENODEV; - goto out; - } - printk(" at 0x%08lx.\n", (unsigned long) mem->start+W100_CFG_BASE); - - /* Remap the framebuffer */ - remapped_fbuf = ioremap(mem->start+MEM_WINDOW_BASE, MEM_WINDOW_SIZE); - if (remapped_fbuf == NULL) - goto out; - - info=framebuffer_alloc(sizeof(struct w100fb_par), &pdev->dev); - if (!info) { - err = -ENOMEM; - goto out; - } - - par = info->par; - platform_set_drvdata(pdev, info); - - inf = dev_get_platdata(&pdev->dev); - par->chip_id = chip_id; - par->mach = inf; - par->fastpll_mode = 0; - par->blanked = 0; - - par->pll_table=w100_get_xtal_table(inf->xtal_freq); - if (!par->pll_table) { - printk(KERN_ERR "No matching Xtal definition found\n"); - err = -EINVAL; - goto out; - } - - info->pseudo_palette = kmalloc_array(MAX_PALETTES, sizeof(u32), - GFP_KERNEL); - if (!info->pseudo_palette) { - err = -ENOMEM; - goto out; - } - - info->fbops = &w100fb_ops; - info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | - FBINFO_HWACCEL_FILLRECT; - info->node = -1; - info->screen_base = remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE); - info->screen_size = REMAPPED_FB_LEN; - - strcpy(info->fix.id, "w100fb"); - info->fix.type = FB_TYPE_PACKED_PIXELS; - info->fix.type_aux = 0; - info->fix.accel = FB_ACCEL_NONE; - info->fix.smem_start = mem->start+W100_FB_BASE; - info->fix.mmio_start = mem->start+W100_REG_BASE; - info->fix.mmio_len = W100_REG_LEN; - - if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { - err = -ENOMEM; - goto out; - } - - par->mode = &inf->modelist[0]; - if(inf->init_mode & INIT_MODE_ROTATED) { - info->var.xres = par->mode->yres; - info->var.yres = par->mode->xres; - } - else { - info->var.xres = par->mode->xres; - info->var.yres = par->mode->yres; - } - - if(inf->init_mode &= INIT_MODE_FLIPPED) - par->flip = 1; - else - par->flip = 0; - - info->var.xres_virtual = info->var.xres; - info->var.yres_virtual = info->var.yres; - info->var.pixclock = 0x04; /* 171521; */ - info->var.sync = 0; - info->var.grayscale = 0; - info->var.xoffset = info->var.yoffset = 0; - info->var.accel_flags = 0; - info->var.activate = FB_ACTIVATE_NOW; - - w100_hw_init(par); - - if (w100fb_check_var(&info->var, info) < 0) { - err = -EINVAL; - goto out; - } - - if (register_framebuffer(info) < 0) { - err = -EINVAL; - goto out; - } - - fb_info(info, "%s frame buffer device\n", info->fix.id); - return 0; -out: - if (info) { - fb_dealloc_cmap(&info->cmap); - kfree(info->pseudo_palette); - } - if (remapped_fbuf != NULL) { - iounmap(remapped_fbuf); - remapped_fbuf = NULL; - } - if (remapped_regs != NULL) { - iounmap(remapped_regs); - remapped_regs = NULL; - } - if (remapped_base != NULL) { - iounmap(remapped_base); - remapped_base = NULL; - } - if (info) - framebuffer_release(info); - return err; -} - - -static int w100fb_remove(struct platform_device *pdev) -{ - struct fb_info *info = platform_get_drvdata(pdev); - struct w100fb_par *par=info->par; - - unregister_framebuffer(info); - - vfree(par->saved_intmem); - vfree(par->saved_extmem); - kfree(info->pseudo_palette); - fb_dealloc_cmap(&info->cmap); - - iounmap(remapped_base); - remapped_base = NULL; - iounmap(remapped_regs); - remapped_regs = NULL; - iounmap(remapped_fbuf); - remapped_fbuf = NULL; - - framebuffer_release(info); - - return 0; -} - - -/* ------------------- chipset specific functions -------------------------- */ - - -static void w100_soft_reset(void) -{ - u16 val = readw((u16 __iomem *)remapped_base + cfgSTATUS); - - writew(val | 0x08, (u16 __iomem *)remapped_base + cfgSTATUS); - udelay(100); - writew(0x00, (u16 __iomem *)remapped_base + cfgSTATUS); - udelay(100); -} - -static void w100_update_disable(void) -{ - union disp_db_buf_cntl_wr_u disp_db_buf_wr_cntl; - - /* Prevent display updates */ - disp_db_buf_wr_cntl.f.db_buf_cntl = 0x1e; - disp_db_buf_wr_cntl.f.update_db_buf = 0; - disp_db_buf_wr_cntl.f.en_db_buf = 0; - writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL); -} - -static void w100_update_enable(void) -{ - union disp_db_buf_cntl_wr_u disp_db_buf_wr_cntl; - - /* Enable display updates */ - disp_db_buf_wr_cntl.f.db_buf_cntl = 0x1e; - disp_db_buf_wr_cntl.f.update_db_buf = 1; - disp_db_buf_wr_cntl.f.en_db_buf = 1; - writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL); -} - -unsigned long w100fb_gpio_read(int port) -{ - unsigned long value; - - if (port==W100_GPIO_PORT_A) - value = readl(remapped_regs + mmGPIO_DATA); - else - value = readl(remapped_regs + mmGPIO_DATA2); - - return value; -} - -void w100fb_gpio_write(int port, unsigned long value) -{ - if (port==W100_GPIO_PORT_A) - writel(value, remapped_regs + mmGPIO_DATA); - else - writel(value, remapped_regs + mmGPIO_DATA2); -} -EXPORT_SYMBOL(w100fb_gpio_read); -EXPORT_SYMBOL(w100fb_gpio_write); - -/* - * Initialization of critical w100 hardware - */ -static void w100_hw_init(struct w100fb_par *par) -{ - u32 temp32; - union cif_cntl_u cif_cntl; - union intf_cntl_u intf_cntl; - union cfgreg_base_u cfgreg_base; - union wrap_top_dir_u wrap_top_dir; - union cif_read_dbg_u cif_read_dbg; - union cpu_defaults_u cpu_default; - union cif_write_dbg_u cif_write_dbg; - union wrap_start_dir_u wrap_start_dir; - union cif_io_u cif_io; - struct w100_gpio_regs *gpio = par->mach->gpio; - - w100_soft_reset(); - - /* This is what the fpga_init code does on reset. May be wrong - but there is little info available */ - writel(0x31, remapped_regs + mmSCRATCH_UMSK); - for (temp32 = 0; temp32 < 10000; temp32++) - readl(remapped_regs + mmSCRATCH_UMSK); - writel(0x30, remapped_regs + mmSCRATCH_UMSK); - - /* Set up CIF */ - cif_io.val = defCIF_IO; - writel((u32)(cif_io.val), remapped_regs + mmCIF_IO); - - cif_write_dbg.val = readl(remapped_regs + mmCIF_WRITE_DBG); - cif_write_dbg.f.dis_packer_ful_during_rbbm_timeout = 0; - cif_write_dbg.f.en_dword_split_to_rbbm = 1; - cif_write_dbg.f.dis_timeout_during_rbbm = 1; - writel((u32) (cif_write_dbg.val), remapped_regs + mmCIF_WRITE_DBG); - - cif_read_dbg.val = readl(remapped_regs + mmCIF_READ_DBG); - cif_read_dbg.f.dis_rd_same_byte_to_trig_fetch = 1; - writel((u32) (cif_read_dbg.val), remapped_regs + mmCIF_READ_DBG); - - cif_cntl.val = readl(remapped_regs + mmCIF_CNTL); - cif_cntl.f.dis_system_bits = 1; - cif_cntl.f.dis_mr = 1; - cif_cntl.f.en_wait_to_compensate_dq_prop_dly = 0; - cif_cntl.f.intb_oe = 1; - cif_cntl.f.interrupt_active_high = 1; - writel((u32) (cif_cntl.val), remapped_regs + mmCIF_CNTL); - - /* Setup cfgINTF_CNTL and cfgCPU defaults */ - intf_cntl.val = defINTF_CNTL; - intf_cntl.f.ad_inc_a = 1; - intf_cntl.f.ad_inc_b = 1; - intf_cntl.f.rd_data_rdy_a = 0; - intf_cntl.f.rd_data_rdy_b = 0; - writeb((u8) (intf_cntl.val), remapped_base + cfgINTF_CNTL); - - cpu_default.val = defCPU_DEFAULTS; - cpu_default.f.access_ind_addr_a = 1; - cpu_default.f.access_ind_addr_b = 1; - cpu_default.f.access_scratch_reg = 1; - cpu_default.f.transition_size = 0; - writeb((u8) (cpu_default.val), remapped_base + cfgCPU_DEFAULTS); - - /* set up the apertures */ - writeb((u8) (W100_REG_BASE >> 16), remapped_base + cfgREG_BASE); - - cfgreg_base.val = defCFGREG_BASE; - cfgreg_base.f.cfgreg_base = W100_CFG_BASE; - writel((u32) (cfgreg_base.val), remapped_regs + mmCFGREG_BASE); - - wrap_start_dir.val = defWRAP_START_DIR; - wrap_start_dir.f.start_addr = WRAP_BUF_BASE_VALUE >> 1; - writel((u32) (wrap_start_dir.val), remapped_regs + mmWRAP_START_DIR); - - wrap_top_dir.val = defWRAP_TOP_DIR; - wrap_top_dir.f.top_addr = WRAP_BUF_TOP_VALUE >> 1; - writel((u32) (wrap_top_dir.val), remapped_regs + mmWRAP_TOP_DIR); - - writel((u32) 0x2440, remapped_regs + mmRBBM_CNTL); - - /* Set the hardware to 565 colour */ - temp32 = readl(remapped_regs + mmDISP_DEBUG2); - temp32 &= 0xff7fffff; - temp32 |= 0x00800000; - writel(temp32, remapped_regs + mmDISP_DEBUG2); - - /* Initialise the GPIO lines */ - if (gpio) { - writel(gpio->init_data1, remapped_regs + mmGPIO_DATA); - writel(gpio->init_data2, remapped_regs + mmGPIO_DATA2); - writel(gpio->gpio_dir1, remapped_regs + mmGPIO_CNTL1); - writel(gpio->gpio_oe1, remapped_regs + mmGPIO_CNTL2); - writel(gpio->gpio_dir2, remapped_regs + mmGPIO_CNTL3); - writel(gpio->gpio_oe2, remapped_regs + mmGPIO_CNTL4); - } -} - - -struct power_state { - union clk_pin_cntl_u clk_pin_cntl; - union pll_ref_fb_div_u pll_ref_fb_div; - union pll_cntl_u pll_cntl; - union sclk_cntl_u sclk_cntl; - union pclk_cntl_u pclk_cntl; - union pwrmgt_cntl_u pwrmgt_cntl; - int auto_mode; /* system clock auto changing? */ -}; - - -static struct power_state w100_pwr_state; - -/* The PLL Fout is determined by (XtalFreq/(M+1)) * ((N_int+1) + (N_fac/8)) */ - -/* 12.5MHz Crystal PLL Table */ -static struct w100_pll_info xtal_12500000[] = { - /*freq M N_int N_fac tfgoal lock_time */ - { 50, 0, 1, 0, 0xe0, 56}, /* 50.00 MHz */ - { 75, 0, 5, 0, 0xde, 37}, /* 75.00 MHz */ - {100, 0, 7, 0, 0xe0, 28}, /* 100.00 MHz */ - {125, 0, 9, 0, 0xe0, 22}, /* 125.00 MHz */ - {150, 0, 11, 0, 0xe0, 17}, /* 150.00 MHz */ - { 0, 0, 0, 0, 0, 0}, /* Terminator */ -}; - -/* 14.318MHz Crystal PLL Table */ -static struct w100_pll_info xtal_14318000[] = { - /*freq M N_int N_fac tfgoal lock_time */ - { 40, 4, 13, 0, 0xe0, 80}, /* tfgoal guessed */ - { 50, 1, 6, 0, 0xe0, 64}, /* 50.05 MHz */ - { 57, 2, 11, 0, 0xe0, 53}, /* tfgoal guessed */ - { 75, 0, 4, 3, 0xe0, 43}, /* 75.08 MHz */ - {100, 0, 6, 0, 0xe0, 32}, /* 100.10 MHz */ - { 0, 0, 0, 0, 0, 0}, -}; - -/* 16MHz Crystal PLL Table */ -static struct w100_pll_info xtal_16000000[] = { - /*freq M N_int N_fac tfgoal lock_time */ - { 72, 1, 8, 0, 0xe0, 48}, /* tfgoal guessed */ - { 80, 1, 9, 0, 0xe0, 13}, /* tfgoal guessed */ - { 95, 1, 10, 7, 0xe0, 38}, /* tfgoal guessed */ - { 96, 1, 11, 0, 0xe0, 36}, /* tfgoal guessed */ - { 0, 0, 0, 0, 0, 0}, -}; - -static struct pll_entries { - int xtal_freq; - struct w100_pll_info *pll_table; -} w100_pll_tables[] = { - { 12500000, &xtal_12500000[0] }, - { 14318000, &xtal_14318000[0] }, - { 16000000, &xtal_16000000[0] }, - { 0 }, -}; - -struct w100_pll_info *w100_get_xtal_table(unsigned int freq) -{ - struct pll_entries *pll_entry = w100_pll_tables; - - do { - if (freq == pll_entry->xtal_freq) - return pll_entry->pll_table; - pll_entry++; - } while (pll_entry->xtal_freq); - - return NULL; -} - - -static unsigned int w100_get_testcount(unsigned int testclk_sel) -{ - union clk_test_cntl_u clk_test_cntl; - - udelay(5); - - /* Select the test clock source and reset */ - clk_test_cntl.f.start_check_freq = 0x0; - clk_test_cntl.f.testclk_sel = testclk_sel; - clk_test_cntl.f.tstcount_rst = 0x1; /* set reset */ - writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); - - clk_test_cntl.f.tstcount_rst = 0x0; /* clear reset */ - writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); - - /* Run clock test */ - clk_test_cntl.f.start_check_freq = 0x1; - writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); - - /* Give the test time to complete */ - udelay(20); - - /* Return the result */ - clk_test_cntl.val = readl(remapped_regs + mmCLK_TEST_CNTL); - clk_test_cntl.f.start_check_freq = 0x0; - writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); - - return clk_test_cntl.f.test_count; -} - - -static int w100_pll_adjust(struct w100_pll_info *pll) -{ - unsigned int tf80; - unsigned int tf20; - - /* Initial Settings */ - w100_pwr_state.pll_cntl.f.pll_pwdn = 0x0; /* power down */ - w100_pwr_state.pll_cntl.f.pll_reset = 0x0; /* not reset */ - w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x1; /* Hi-Z */ - w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; /* VCO gain = 0 */ - w100_pwr_state.pll_cntl.f.pll_vcofr = 0x0; /* VCO frequency range control = off */ - w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; /* current offset inside VCO = 0 */ - w100_pwr_state.pll_cntl.f.pll_ring_off = 0x0; - - /* Wai Ming 80 percent of VDD 1.3V gives 1.04V, minimum operating voltage is 1.08V - * therefore, commented out the following lines - * tf80 meant tf100 - */ - do { - /* set VCO input = 0.8 * VDD */ - w100_pwr_state.pll_cntl.f.pll_dactal = 0xd; - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - tf80 = w100_get_testcount(TESTCLK_SRC_PLL); - if (tf80 >= (pll->tfgoal)) { - /* set VCO input = 0.2 * VDD */ - w100_pwr_state.pll_cntl.f.pll_dactal = 0x7; - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - tf20 = w100_get_testcount(TESTCLK_SRC_PLL); - if (tf20 <= (pll->tfgoal)) - return 1; /* Success */ - - if ((w100_pwr_state.pll_cntl.f.pll_vcofr == 0x0) && - ((w100_pwr_state.pll_cntl.f.pll_pvg == 0x7) || - (w100_pwr_state.pll_cntl.f.pll_ioffset == 0x0))) { - /* slow VCO config */ - w100_pwr_state.pll_cntl.f.pll_vcofr = 0x1; - w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; - w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; - continue; - } - } - if ((w100_pwr_state.pll_cntl.f.pll_ioffset) < 0x3) { - w100_pwr_state.pll_cntl.f.pll_ioffset += 0x1; - } else if ((w100_pwr_state.pll_cntl.f.pll_pvg) < 0x7) { - w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; - w100_pwr_state.pll_cntl.f.pll_pvg += 0x1; - } else { - return 0; /* Error */ - } - } while(1); -} - - -/* - * w100_pll_calibration - */ -static int w100_pll_calibration(struct w100_pll_info *pll) -{ - int status; - - status = w100_pll_adjust(pll); - - /* PLL Reset And Lock */ - /* set VCO input = 0.5 * VDD */ - w100_pwr_state.pll_cntl.f.pll_dactal = 0xa; - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - udelay(1); /* reset time */ - - /* enable charge pump */ - w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x0; /* normal */ - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - /* set VCO input = Hi-Z, disable DAC */ - w100_pwr_state.pll_cntl.f.pll_dactal = 0x0; - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - udelay(400); /* lock time */ - - /* PLL locked */ - - return status; -} - - -static int w100_pll_set_clk(struct w100_pll_info *pll) -{ - int status; - - if (w100_pwr_state.auto_mode == 1) /* auto mode */ - { - w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x0; /* disable fast to normal */ - w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x0; /* disable normal to fast */ - writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); - } - - /* Set system clock source to XTAL whilst adjusting the PLL! */ - w100_pwr_state.sclk_cntl.f.sclk_src_sel = CLK_SRC_XTAL; - writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); - - w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = pll->M; - w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_int = pll->N_int; - w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_frac = pll->N_fac; - w100_pwr_state.pll_ref_fb_div.f.pll_lock_time = pll->lock_time; - writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV); - - w100_pwr_state.pwrmgt_cntl.f.pwm_mode_req = 0; - writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); - - status = w100_pll_calibration(pll); - - if (w100_pwr_state.auto_mode == 1) /* auto mode */ - { - w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x1; /* reenable fast to normal */ - w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x1; /* reenable normal to fast */ - writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); - } - return status; -} - -/* freq = target frequency of the PLL */ -static int w100_set_pll_freq(struct w100fb_par *par, unsigned int freq) -{ - struct w100_pll_info *pll = par->pll_table; - - do { - if (freq == pll->freq) { - return w100_pll_set_clk(pll); - } - pll++; - } while(pll->freq); - return 0; -} - -/* Set up an initial state. Some values/fields set - here will be overwritten. */ -static void w100_pwm_setup(struct w100fb_par *par) -{ - w100_pwr_state.clk_pin_cntl.f.osc_en = 0x1; - w100_pwr_state.clk_pin_cntl.f.osc_gain = 0x1f; - w100_pwr_state.clk_pin_cntl.f.dont_use_xtalin = 0x0; - w100_pwr_state.clk_pin_cntl.f.xtalin_pm_en = 0x0; - w100_pwr_state.clk_pin_cntl.f.xtalin_dbl_en = par->mach->xtal_dbl ? 1 : 0; - w100_pwr_state.clk_pin_cntl.f.cg_debug = 0x0; - writel((u32) (w100_pwr_state.clk_pin_cntl.val), remapped_regs + mmCLK_PIN_CNTL); - - w100_pwr_state.sclk_cntl.f.sclk_src_sel = CLK_SRC_XTAL; - w100_pwr_state.sclk_cntl.f.sclk_post_div_fast = 0x0; /* Pfast = 1 */ - w100_pwr_state.sclk_cntl.f.sclk_clkon_hys = 0x3; - w100_pwr_state.sclk_cntl.f.sclk_post_div_slow = 0x0; /* Pslow = 1 */ - w100_pwr_state.sclk_cntl.f.disp_cg_ok2switch_en = 0x0; - w100_pwr_state.sclk_cntl.f.sclk_force_reg = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_disp = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_mc = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_extmc = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_cp = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_e2 = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_e3 = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_idct = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.sclk_force_bist = 0x0; /* Dynamic */ - w100_pwr_state.sclk_cntl.f.busy_extend_cp = 0x0; - w100_pwr_state.sclk_cntl.f.busy_extend_e2 = 0x0; - w100_pwr_state.sclk_cntl.f.busy_extend_e3 = 0x0; - w100_pwr_state.sclk_cntl.f.busy_extend_idct = 0x0; - writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); - - w100_pwr_state.pclk_cntl.f.pclk_src_sel = CLK_SRC_XTAL; - w100_pwr_state.pclk_cntl.f.pclk_post_div = 0x1; /* P = 2 */ - w100_pwr_state.pclk_cntl.f.pclk_force_disp = 0x0; /* Dynamic */ - writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL); - - w100_pwr_state.pll_ref_fb_div.f.pll_ref_div = 0x0; /* M = 1 */ - w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_int = 0x0; /* N = 1.0 */ - w100_pwr_state.pll_ref_fb_div.f.pll_fb_div_frac = 0x0; - w100_pwr_state.pll_ref_fb_div.f.pll_reset_time = 0x5; - w100_pwr_state.pll_ref_fb_div.f.pll_lock_time = 0xff; - writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV); - - w100_pwr_state.pll_cntl.f.pll_pwdn = 0x1; - w100_pwr_state.pll_cntl.f.pll_reset = 0x1; - w100_pwr_state.pll_cntl.f.pll_pm_en = 0x0; - w100_pwr_state.pll_cntl.f.pll_mode = 0x0; /* uses VCO clock */ - w100_pwr_state.pll_cntl.f.pll_refclk_sel = 0x0; - w100_pwr_state.pll_cntl.f.pll_fbclk_sel = 0x0; - w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x0; - w100_pwr_state.pll_cntl.f.pll_pcp = 0x4; - w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; - w100_pwr_state.pll_cntl.f.pll_vcofr = 0x0; - w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; - w100_pwr_state.pll_cntl.f.pll_pecc_mode = 0x0; - w100_pwr_state.pll_cntl.f.pll_pecc_scon = 0x0; - w100_pwr_state.pll_cntl.f.pll_dactal = 0x0; /* Hi-Z */ - w100_pwr_state.pll_cntl.f.pll_cp_clip = 0x3; - w100_pwr_state.pll_cntl.f.pll_conf = 0x2; - w100_pwr_state.pll_cntl.f.pll_mbctrl = 0x2; - w100_pwr_state.pll_cntl.f.pll_ring_off = 0x0; - writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); - - w100_pwr_state.pwrmgt_cntl.f.pwm_enable = 0x0; - w100_pwr_state.pwrmgt_cntl.f.pwm_mode_req = 0x1; /* normal mode (0, 1, 3) */ - w100_pwr_state.pwrmgt_cntl.f.pwm_wakeup_cond = 0x0; - w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_hw_en = 0x0; - w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_hw_en = 0x0; - w100_pwr_state.pwrmgt_cntl.f.pwm_fast_noml_cond = 0x1; /* PM4,ENG */ - w100_pwr_state.pwrmgt_cntl.f.pwm_noml_fast_cond = 0x1; /* PM4,ENG */ - w100_pwr_state.pwrmgt_cntl.f.pwm_idle_timer = 0xFF; - w100_pwr_state.pwrmgt_cntl.f.pwm_busy_timer = 0xFF; - writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); - - w100_pwr_state.auto_mode = 0; /* manual mode */ -} - - -/* - * Setup the w100 clocks for the specified mode - */ -static void w100_init_clocks(struct w100fb_par *par) -{ - struct w100_mode *mode = par->mode; - - if (mode->pixclk_src == CLK_SRC_PLL || mode->sysclk_src == CLK_SRC_PLL) - w100_set_pll_freq(par, (par->fastpll_mode && mode->fast_pll_freq) ? mode->fast_pll_freq : mode->pll_freq); - - w100_pwr_state.sclk_cntl.f.sclk_src_sel = mode->sysclk_src; - w100_pwr_state.sclk_cntl.f.sclk_post_div_fast = mode->sysclk_divider; - w100_pwr_state.sclk_cntl.f.sclk_post_div_slow = mode->sysclk_divider; - writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); -} - -static void w100_init_lcd(struct w100fb_par *par) -{ - u32 temp32; - struct w100_mode *mode = par->mode; - struct w100_gen_regs *regs = par->mach->regs; - union active_h_disp_u active_h_disp; - union active_v_disp_u active_v_disp; - union graphic_h_disp_u graphic_h_disp; - union graphic_v_disp_u graphic_v_disp; - union crtc_total_u crtc_total; - - /* w3200 doesn't like undefined bits being set so zero register values first */ - - active_h_disp.val = 0; - active_h_disp.f.active_h_start=mode->left_margin; - active_h_disp.f.active_h_end=mode->left_margin + mode->xres; - writel(active_h_disp.val, remapped_regs + mmACTIVE_H_DISP); - - active_v_disp.val = 0; - active_v_disp.f.active_v_start=mode->upper_margin; - active_v_disp.f.active_v_end=mode->upper_margin + mode->yres; - writel(active_v_disp.val, remapped_regs + mmACTIVE_V_DISP); - - graphic_h_disp.val = 0; - graphic_h_disp.f.graphic_h_start=mode->left_margin; - graphic_h_disp.f.graphic_h_end=mode->left_margin + mode->xres; - writel(graphic_h_disp.val, remapped_regs + mmGRAPHIC_H_DISP); - - graphic_v_disp.val = 0; - graphic_v_disp.f.graphic_v_start=mode->upper_margin; - graphic_v_disp.f.graphic_v_end=mode->upper_margin + mode->yres; - writel(graphic_v_disp.val, remapped_regs + mmGRAPHIC_V_DISP); - - crtc_total.val = 0; - crtc_total.f.crtc_h_total=mode->left_margin + mode->xres + mode->right_margin; - crtc_total.f.crtc_v_total=mode->upper_margin + mode->yres + mode->lower_margin; - writel(crtc_total.val, remapped_regs + mmCRTC_TOTAL); - - writel(mode->crtc_ss, remapped_regs + mmCRTC_SS); - writel(mode->crtc_ls, remapped_regs + mmCRTC_LS); - writel(mode->crtc_gs, remapped_regs + mmCRTC_GS); - writel(mode->crtc_vpos_gs, remapped_regs + mmCRTC_VPOS_GS); - writel(mode->crtc_rev, remapped_regs + mmCRTC_REV); - writel(mode->crtc_dclk, remapped_regs + mmCRTC_DCLK); - writel(mode->crtc_gclk, remapped_regs + mmCRTC_GCLK); - writel(mode->crtc_goe, remapped_regs + mmCRTC_GOE); - writel(mode->crtc_ps1_active, remapped_regs + mmCRTC_PS1_ACTIVE); - - writel(regs->lcd_format, remapped_regs + mmLCD_FORMAT); - writel(regs->lcdd_cntl1, remapped_regs + mmLCDD_CNTL1); - writel(regs->lcdd_cntl2, remapped_regs + mmLCDD_CNTL2); - writel(regs->genlcd_cntl1, remapped_regs + mmGENLCD_CNTL1); - writel(regs->genlcd_cntl2, remapped_regs + mmGENLCD_CNTL2); - writel(regs->genlcd_cntl3, remapped_regs + mmGENLCD_CNTL3); - - writel(0x00000000, remapped_regs + mmCRTC_FRAME); - writel(0x00000000, remapped_regs + mmCRTC_FRAME_VPOS); - writel(0x00000000, remapped_regs + mmCRTC_DEFAULT_COUNT); - writel(0x0000FF00, remapped_regs + mmLCD_BACKGROUND_COLOR); - - /* Hack for overlay in ext memory */ - temp32 = readl(remapped_regs + mmDISP_DEBUG2); - temp32 |= 0xc0000000; - writel(temp32, remapped_regs + mmDISP_DEBUG2); -} - - -static void w100_setup_memory(struct w100fb_par *par) -{ - union mc_ext_mem_location_u extmem_location; - union mc_fb_location_u intmem_location; - struct w100_mem_info *mem = par->mach->mem; - struct w100_bm_mem_info *bm_mem = par->mach->bm_mem; - - if (!par->extmem_active) { - w100_suspend(W100_SUSPEND_EXTMEM); - - /* Map Internal Memory at FB Base */ - intmem_location.f.mc_fb_start = W100_FB_BASE >> 8; - intmem_location.f.mc_fb_top = (W100_FB_BASE+MEM_INT_SIZE) >> 8; - writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION); - - /* Unmap External Memory - value is *probably* irrelevant but may have meaning - to acceleration libraries */ - extmem_location.f.mc_ext_mem_start = MEM_EXT_BASE_VALUE >> 8; - extmem_location.f.mc_ext_mem_top = (MEM_EXT_BASE_VALUE-1) >> 8; - writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION); - } else { - /* Map Internal Memory to its default location */ - intmem_location.f.mc_fb_start = MEM_INT_BASE_VALUE >> 8; - intmem_location.f.mc_fb_top = (MEM_INT_BASE_VALUE+MEM_INT_SIZE) >> 8; - writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION); - - /* Map External Memory at FB Base */ - extmem_location.f.mc_ext_mem_start = W100_FB_BASE >> 8; - extmem_location.f.mc_ext_mem_top = (W100_FB_BASE+par->mach->mem->size) >> 8; - writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION); - - writel(0x00007800, remapped_regs + mmMC_BIST_CTRL); - writel(mem->ext_cntl, remapped_regs + mmMEM_EXT_CNTL); - writel(0x00200021, remapped_regs + mmMEM_SDRAM_MODE_REG); - udelay(100); - writel(0x80200021, remapped_regs + mmMEM_SDRAM_MODE_REG); - udelay(100); - writel(mem->sdram_mode_reg, remapped_regs + mmMEM_SDRAM_MODE_REG); - udelay(100); - writel(mem->ext_timing_cntl, remapped_regs + mmMEM_EXT_TIMING_CNTL); - writel(mem->io_cntl, remapped_regs + mmMEM_IO_CNTL); - if (bm_mem) { - writel(bm_mem->ext_mem_bw, remapped_regs + mmBM_EXT_MEM_BANDWIDTH); - writel(bm_mem->offset, remapped_regs + mmBM_OFFSET); - writel(bm_mem->ext_timing_ctl, remapped_regs + mmBM_MEM_EXT_TIMING_CNTL); - writel(bm_mem->ext_cntl, remapped_regs + mmBM_MEM_EXT_CNTL); - writel(bm_mem->mode_reg, remapped_regs + mmBM_MEM_MODE_REG); - writel(bm_mem->io_cntl, remapped_regs + mmBM_MEM_IO_CNTL); - writel(bm_mem->config, remapped_regs + mmBM_CONFIG); - } - } -} - -static void w100_set_dispregs(struct w100fb_par *par) -{ - unsigned long rot=0, divider, offset=0; - union graphic_ctrl_u graphic_ctrl; - - /* See if the mode has been rotated */ - if (par->xres == par->mode->xres) { - if (par->flip) { - rot=3; /* 180 degree */ - offset=(par->xres * par->yres) - 1; - } /* else 0 degree */ - divider = par->mode->pixclk_divider; - } else { - if (par->flip) { - rot=2; /* 270 degree */ - offset=par->xres - 1; - } else { - rot=1; /* 90 degree */ - offset=par->xres * (par->yres - 1); - } - divider = par->mode->pixclk_divider_rotated; - } - - graphic_ctrl.val = 0; /* w32xx doesn't like undefined bits */ - switch (par->chip_id) { - case CHIP_ID_W100: - graphic_ctrl.f_w100.color_depth=6; - graphic_ctrl.f_w100.en_crtc=1; - graphic_ctrl.f_w100.en_graphic_req=1; - graphic_ctrl.f_w100.en_graphic_crtc=1; - graphic_ctrl.f_w100.lcd_pclk_on=1; - graphic_ctrl.f_w100.lcd_sclk_on=1; - graphic_ctrl.f_w100.low_power_on=0; - graphic_ctrl.f_w100.req_freq=0; - graphic_ctrl.f_w100.portrait_mode=rot; - - /* Zaurus needs this */ - switch(par->xres) { - case 240: - case 320: - default: - graphic_ctrl.f_w100.total_req_graphic=0xa0; - break; - case 480: - case 640: - switch(rot) { - case 0: /* 0 */ - case 3: /* 180 */ - graphic_ctrl.f_w100.low_power_on=1; - graphic_ctrl.f_w100.req_freq=5; - break; - case 1: /* 90 */ - case 2: /* 270 */ - graphic_ctrl.f_w100.req_freq=4; - break; - default: - break; - } - graphic_ctrl.f_w100.total_req_graphic=0xf0; - break; - } - break; - case CHIP_ID_W3200: - case CHIP_ID_W3220: - graphic_ctrl.f_w32xx.color_depth=6; - graphic_ctrl.f_w32xx.en_crtc=1; - graphic_ctrl.f_w32xx.en_graphic_req=1; - graphic_ctrl.f_w32xx.en_graphic_crtc=1; - graphic_ctrl.f_w32xx.lcd_pclk_on=1; - graphic_ctrl.f_w32xx.lcd_sclk_on=1; - graphic_ctrl.f_w32xx.low_power_on=0; - graphic_ctrl.f_w32xx.req_freq=0; - graphic_ctrl.f_w32xx.total_req_graphic=par->mode->xres >> 1; /* panel xres, not mode */ - graphic_ctrl.f_w32xx.portrait_mode=rot; - break; - } - - /* Set the pixel clock source and divider */ - w100_pwr_state.pclk_cntl.f.pclk_src_sel = par->mode->pixclk_src; - w100_pwr_state.pclk_cntl.f.pclk_post_div = divider; - writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL); - - writel(graphic_ctrl.val, remapped_regs + mmGRAPHIC_CTRL); - writel(W100_FB_BASE + ((offset * BITS_PER_PIXEL/8)&~0x03UL), remapped_regs + mmGRAPHIC_OFFSET); - writel((par->xres*BITS_PER_PIXEL/8), remapped_regs + mmGRAPHIC_PITCH); -} - - -/* - * Work out how long the sync pulse lasts - * Value is 1/(time in seconds) - */ -static void calc_hsync(struct w100fb_par *par) -{ - unsigned long hsync; - struct w100_mode *mode = par->mode; - union crtc_ss_u crtc_ss; - - if (mode->pixclk_src == CLK_SRC_XTAL) - hsync=par->mach->xtal_freq; - else - hsync=((par->fastpll_mode && mode->fast_pll_freq) ? mode->fast_pll_freq : mode->pll_freq)*100000; - - hsync /= (w100_pwr_state.pclk_cntl.f.pclk_post_div + 1); - - crtc_ss.val = readl(remapped_regs + mmCRTC_SS); - if (crtc_ss.val) - par->hsync_len = hsync / (crtc_ss.f.ss_end-crtc_ss.f.ss_start); - else - par->hsync_len = 0; -} - -static void w100_suspend(u32 mode) -{ - u32 val; - - writel(0x7FFF8000, remapped_regs + mmMC_EXT_MEM_LOCATION); - writel(0x00FF0000, remapped_regs + mmMC_PERF_MON_CNTL); - - val = readl(remapped_regs + mmMEM_EXT_TIMING_CNTL); - val &= ~(0x00100000); /* bit20=0 */ - val |= 0xFF000000; /* bit31:24=0xff */ - writel(val, remapped_regs + mmMEM_EXT_TIMING_CNTL); - - val = readl(remapped_regs + mmMEM_EXT_CNTL); - val &= ~(0x00040000); /* bit18=0 */ - val |= 0x00080000; /* bit19=1 */ - writel(val, remapped_regs + mmMEM_EXT_CNTL); - - udelay(1); /* wait 1us */ - - if (mode == W100_SUSPEND_EXTMEM) { - /* CKE: Tri-State */ - val = readl(remapped_regs + mmMEM_EXT_CNTL); - val |= 0x40000000; /* bit30=1 */ - writel(val, remapped_regs + mmMEM_EXT_CNTL); - - /* CLK: Stop */ - val = readl(remapped_regs + mmMEM_EXT_CNTL); - val &= ~(0x00000001); /* bit0=0 */ - writel(val, remapped_regs + mmMEM_EXT_CNTL); - } else { - writel(0x00000000, remapped_regs + mmSCLK_CNTL); - writel(0x000000BF, remapped_regs + mmCLK_PIN_CNTL); - writel(0x00000015, remapped_regs + mmPWRMGT_CNTL); - - udelay(5); - - val = readl(remapped_regs + mmPLL_CNTL); - val |= 0x00000004; /* bit2=1 */ - writel(val, remapped_regs + mmPLL_CNTL); - - writel(0x00000000, remapped_regs + mmLCDD_CNTL1); - writel(0x00000000, remapped_regs + mmLCDD_CNTL2); - writel(0x00000000, remapped_regs + mmGENLCD_CNTL1); - writel(0x00000000, remapped_regs + mmGENLCD_CNTL2); - writel(0x00000000, remapped_regs + mmGENLCD_CNTL3); - - val = readl(remapped_regs + mmMEM_EXT_CNTL); - val |= 0xF0000000; - val &= ~(0x00000001); - writel(val, remapped_regs + mmMEM_EXT_CNTL); - - writel(0x0000001d, remapped_regs + mmPWRMGT_CNTL); - } -} - -static void w100_vsync(void) -{ - u32 tmp; - int timeout = 30000; /* VSync timeout = 30[ms] > 16.8[ms] */ - - tmp = readl(remapped_regs + mmACTIVE_V_DISP); - - /* set vline pos */ - writel((tmp >> 16) & 0x3ff, remapped_regs + mmDISP_INT_CNTL); - - /* disable vline irq */ - tmp = readl(remapped_regs + mmGEN_INT_CNTL); - - tmp &= ~0x00000002; - writel(tmp, remapped_regs + mmGEN_INT_CNTL); - - /* clear vline irq status */ - writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); - - /* enable vline irq */ - writel((tmp | 0x00000002), remapped_regs + mmGEN_INT_CNTL); - - /* clear vline irq status */ - writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); - - while(timeout > 0) { - if (readl(remapped_regs + mmGEN_INT_STATUS) & 0x00000002) - break; - udelay(1); - timeout--; - } - - /* disable vline irq */ - writel(tmp, remapped_regs + mmGEN_INT_CNTL); - - /* clear vline irq status */ - writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); -} - -static struct platform_driver w100fb_driver = { - .probe = w100fb_probe, - .remove = w100fb_remove, - .suspend = w100fb_suspend, - .resume = w100fb_resume, - .driver = { - .name = "w100fb", - .dev_groups = w100fb_groups, - }, -}; - -module_platform_driver(w100fb_driver); - -MODULE_DESCRIPTION("ATI Imageon w100 framebuffer driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/w100fb.h b/drivers/video/fbdev/w100fb.h deleted file mode 100644 index 52c96d155b4c..000000000000 --- a/drivers/video/fbdev/w100fb.h +++ /dev/null @@ -1,924 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/drivers/video/w100fb.h - * - * Frame Buffer Device for ATI w100 (Wallaby) - * - * Copyright (C) 2002, ATI Corp. - * Copyright (C) 2004-2005 Richard Purdie - * Copyright (c) 2005 Ian Molton <spyro@f2s.com> - * - * Modified to work with 2.6 by Richard Purdie <rpurdie@rpsys.net> - * - * w32xx support by Ian Molton - */ - -#if !defined (_W100FB_H) -#define _W100FB_H - -/* Block CIF Start: */ -#define mmCHIP_ID 0x0000 -#define mmREVISION_ID 0x0004 -#define mmWRAP_BUF_A 0x0008 -#define mmWRAP_BUF_B 0x000C -#define mmWRAP_TOP_DIR 0x0010 -#define mmWRAP_START_DIR 0x0014 -#define mmCIF_CNTL 0x0018 -#define mmCFGREG_BASE 0x001C -#define mmCIF_IO 0x0020 -#define mmCIF_READ_DBG 0x0024 -#define mmCIF_WRITE_DBG 0x0028 -#define cfgIND_ADDR_A_0 0x0000 -#define cfgIND_ADDR_A_1 0x0001 -#define cfgIND_ADDR_A_2 0x0002 -#define cfgIND_DATA_A 0x0003 -#define cfgREG_BASE 0x0004 -#define cfgINTF_CNTL 0x0005 -#define cfgSTATUS 0x0006 -#define cfgCPU_DEFAULTS 0x0007 -#define cfgIND_ADDR_B_0 0x0008 -#define cfgIND_ADDR_B_1 0x0009 -#define cfgIND_ADDR_B_2 0x000A -#define cfgIND_DATA_B 0x000B -#define cfgPM4_RPTR 0x000C -#define cfgSCRATCH 0x000D -#define cfgPM4_WRPTR_0 0x000E -#define cfgPM4_WRPTR_1 0x000F -/* Block CIF End: */ - -/* Block CP Start: */ -#define mmSCRATCH_UMSK 0x0280 -#define mmSCRATCH_ADDR 0x0284 -#define mmGEN_INT_CNTL 0x0200 -#define mmGEN_INT_STATUS 0x0204 -/* Block CP End: */ - -/* Block DISPLAY Start: */ -#define mmLCD_FORMAT 0x0410 -#define mmGRAPHIC_CTRL 0x0414 -#define mmGRAPHIC_OFFSET 0x0418 -#define mmGRAPHIC_PITCH 0x041C -#define mmCRTC_TOTAL 0x0420 -#define mmACTIVE_H_DISP 0x0424 -#define mmACTIVE_V_DISP 0x0428 -#define mmGRAPHIC_H_DISP 0x042C -#define mmGRAPHIC_V_DISP 0x0430 -#define mmVIDEO_CTRL 0x0434 -#define mmGRAPHIC_KEY 0x0438 -#define mmBRIGHTNESS_CNTL 0x045C -#define mmDISP_INT_CNTL 0x0488 -#define mmCRTC_SS 0x048C -#define mmCRTC_LS 0x0490 -#define mmCRTC_REV 0x0494 -#define mmCRTC_DCLK 0x049C -#define mmCRTC_GS 0x04A0 -#define mmCRTC_VPOS_GS 0x04A4 -#define mmCRTC_GCLK 0x04A8 -#define mmCRTC_GOE 0x04AC -#define mmCRTC_FRAME 0x04B0 -#define mmCRTC_FRAME_VPOS 0x04B4 -#define mmGPIO_DATA 0x04B8 -#define mmGPIO_CNTL1 0x04BC -#define mmGPIO_CNTL2 0x04C0 -#define mmLCDD_CNTL1 0x04C4 -#define mmLCDD_CNTL2 0x04C8 -#define mmGENLCD_CNTL1 0x04CC -#define mmGENLCD_CNTL2 0x04D0 -#define mmDISP_DEBUG 0x04D4 -#define mmDISP_DB_BUF_CNTL 0x04D8 -#define mmDISP_CRC_SIG 0x04DC -#define mmCRTC_DEFAULT_COUNT 0x04E0 -#define mmLCD_BACKGROUND_COLOR 0x04E4 -#define mmCRTC_PS2 0x04E8 -#define mmCRTC_PS2_VPOS 0x04EC -#define mmCRTC_PS1_ACTIVE 0x04F0 -#define mmCRTC_PS1_NACTIVE 0x04F4 -#define mmCRTC_GCLK_EXT 0x04F8 -#define mmCRTC_ALW 0x04FC -#define mmCRTC_ALW_VPOS 0x0500 -#define mmCRTC_PSK 0x0504 -#define mmCRTC_PSK_HPOS 0x0508 -#define mmCRTC_CV4_START 0x050C -#define mmCRTC_CV4_END 0x0510 -#define mmCRTC_CV4_HPOS 0x0514 -#define mmCRTC_ECK 0x051C -#define mmREFRESH_CNTL 0x0520 -#define mmGENLCD_CNTL3 0x0524 -#define mmGPIO_DATA2 0x0528 -#define mmGPIO_CNTL3 0x052C -#define mmGPIO_CNTL4 0x0530 -#define mmCHIP_STRAP 0x0534 -#define mmDISP_DEBUG2 0x0538 -#define mmDEBUG_BUS_CNTL 0x053C -#define mmGAMMA_VALUE1 0x0540 -#define mmGAMMA_VALUE2 0x0544 -#define mmGAMMA_SLOPE 0x0548 -#define mmGEN_STATUS 0x054C -#define mmHW_INT 0x0550 -/* Block DISPLAY End: */ - -/* Block GFX Start: */ -#define mmDST_OFFSET 0x1004 -#define mmDST_PITCH 0x1008 -#define mmDST_Y_X 0x1038 -#define mmDST_WIDTH_HEIGHT 0x1198 -#define mmDP_GUI_MASTER_CNTL 0x106C -#define mmBRUSH_OFFSET 0x108C -#define mmBRUSH_Y_X 0x1074 -#define mmDP_BRUSH_FRGD_CLR 0x107C -#define mmSRC_OFFSET 0x11AC -#define mmSRC_PITCH 0x11B0 -#define mmSRC_Y_X 0x1034 -#define mmDEFAULT_PITCH_OFFSET 0x10A0 -#define mmDEFAULT_SC_BOTTOM_RIGHT 0x10A8 -#define mmDEFAULT2_SC_BOTTOM_RIGHT 0x10AC -#define mmSC_TOP_LEFT 0x11BC -#define mmSC_BOTTOM_RIGHT 0x11C0 -#define mmSRC_SC_BOTTOM_RIGHT 0x11C4 -#define mmGLOBAL_ALPHA 0x1210 -#define mmFILTER_COEF 0x1214 -#define mmMVC_CNTL_START 0x11E0 -#define mmE2_ARITHMETIC_CNTL 0x1220 -#define mmDP_CNTL 0x11C8 -#define mmDP_CNTL_DST_DIR 0x11CC -#define mmDP_DATATYPE 0x12C4 -#define mmDP_MIX 0x12C8 -#define mmDP_WRITE_MSK 0x12CC -#define mmENG_CNTL 0x13E8 -#define mmENG_PERF_CNT 0x13F0 -/* Block GFX End: */ - -/* Block IDCT Start: */ -#define mmIDCT_RUNS 0x0C00 -#define mmIDCT_LEVELS 0x0C04 -#define mmIDCT_CONTROL 0x0C3C -#define mmIDCT_AUTH_CONTROL 0x0C08 -#define mmIDCT_AUTH 0x0C0C -/* Block IDCT End: */ - -/* Block MC Start: */ -#define mmMEM_CNTL 0x0180 -#define mmMEM_ARB 0x0184 -#define mmMC_FB_LOCATION 0x0188 -#define mmMEM_EXT_CNTL 0x018C -#define mmMC_EXT_MEM_LOCATION 0x0190 -#define mmMEM_EXT_TIMING_CNTL 0x0194 -#define mmMEM_SDRAM_MODE_REG 0x0198 -#define mmMEM_IO_CNTL 0x019C -#define mmMC_DEBUG 0x01A0 -#define mmMC_BIST_CTRL 0x01A4 -#define mmMC_BIST_COLLAR_READ 0x01A8 -#define mmTC_MISMATCH 0x01AC -#define mmMC_PERF_MON_CNTL 0x01B0 -#define mmMC_PERF_COUNTERS 0x01B4 -/* Block MC End: */ - -/* Block BM Start: */ -#define mmBM_EXT_MEM_BANDWIDTH 0x0A00 -#define mmBM_OFFSET 0x0A04 -#define mmBM_MEM_EXT_TIMING_CNTL 0x0A08 -#define mmBM_MEM_EXT_CNTL 0x0A0C -#define mmBM_MEM_MODE_REG 0x0A10 -#define mmBM_MEM_IO_CNTL 0x0A18 -#define mmBM_CONFIG 0x0A1C -#define mmBM_STATUS 0x0A20 -#define mmBM_DEBUG 0x0A24 -#define mmBM_PERF_MON_CNTL 0x0A28 -#define mmBM_PERF_COUNTERS 0x0A2C -#define mmBM_PERF2_MON_CNTL 0x0A30 -#define mmBM_PERF2_COUNTERS 0x0A34 -/* Block BM End: */ - -/* Block RBBM Start: */ -#define mmWAIT_UNTIL 0x1400 -#define mmISYNC_CNTL 0x1404 -#define mmRBBM_STATUS 0x0140 -#define mmRBBM_CNTL 0x0144 -#define mmNQWAIT_UNTIL 0x0150 -/* Block RBBM End: */ - -/* Block CG Start: */ -#define mmCLK_PIN_CNTL 0x0080 -#define mmPLL_REF_FB_DIV 0x0084 -#define mmPLL_CNTL 0x0088 -#define mmSCLK_CNTL 0x008C -#define mmPCLK_CNTL 0x0090 -#define mmCLK_TEST_CNTL 0x0094 -#define mmPWRMGT_CNTL 0x0098 -#define mmPWRMGT_STATUS 0x009C -/* Block CG End: */ - -/* default value definitions */ -#define defWRAP_TOP_DIR 0x00000000 -#define defWRAP_START_DIR 0x00000000 -#define defCFGREG_BASE 0x00000000 -#define defCIF_IO 0x000C0902 -#define defINTF_CNTL 0x00000011 -#define defCPU_DEFAULTS 0x00000006 -#define defHW_INT 0x00000000 -#define defMC_EXT_MEM_LOCATION 0x07ff0000 -#define defTC_MISMATCH 0x00000000 - -#define W100_CFG_BASE 0x0 -#define W100_CFG_LEN 0x10 -#define W100_REG_BASE 0x10000 -#define W100_REG_LEN 0x2000 -#define MEM_INT_BASE_VALUE 0x100000 -#define MEM_EXT_BASE_VALUE 0x800000 -#define MEM_INT_SIZE 0x05ffff -#define MEM_WINDOW_BASE 0x100000 -#define MEM_WINDOW_SIZE 0xf00000 - -#define WRAP_BUF_BASE_VALUE 0x80000 -#define WRAP_BUF_TOP_VALUE 0xbffff - -#define CHIP_ID_W100 0x57411002 -#define CHIP_ID_W3200 0x56441002 -#define CHIP_ID_W3220 0x57441002 - -/* Register structure definitions */ - -struct wrap_top_dir_t { - u32 top_addr : 23; - u32 : 9; -} __attribute__((packed)); - -union wrap_top_dir_u { - u32 val : 32; - struct wrap_top_dir_t f; -} __attribute__((packed)); - -struct wrap_start_dir_t { - u32 start_addr : 23; - u32 : 9; -} __attribute__((packed)); - -union wrap_start_dir_u { - u32 val : 32; - struct wrap_start_dir_t f; -} __attribute__((packed)); - -struct cif_cntl_t { - u32 swap_reg : 2; - u32 swap_fbuf_1 : 2; - u32 swap_fbuf_2 : 2; - u32 swap_fbuf_3 : 2; - u32 pmi_int_disable : 1; - u32 pmi_schmen_disable : 1; - u32 intb_oe : 1; - u32 en_wait_to_compensate_dq_prop_dly : 1; - u32 compensate_wait_rd_size : 2; - u32 wait_asserted_timeout_val : 2; - u32 wait_masked_val : 2; - u32 en_wait_timeout : 1; - u32 en_one_clk_setup_before_wait : 1; - u32 interrupt_active_high : 1; - u32 en_overwrite_straps : 1; - u32 strap_wait_active_hi : 1; - u32 lat_busy_count : 2; - u32 lat_rd_pm4_sclk_busy : 1; - u32 dis_system_bits : 1; - u32 dis_mr : 1; - u32 cif_spare_1 : 4; -} __attribute__((packed)); - -union cif_cntl_u { - u32 val : 32; - struct cif_cntl_t f; -} __attribute__((packed)); - -struct cfgreg_base_t { - u32 cfgreg_base : 24; - u32 : 8; -} __attribute__((packed)); - -union cfgreg_base_u { - u32 val : 32; - struct cfgreg_base_t f; -} __attribute__((packed)); - -struct cif_io_t { - u32 dq_srp : 1; - u32 dq_srn : 1; - u32 dq_sp : 4; - u32 dq_sn : 4; - u32 waitb_srp : 1; - u32 waitb_srn : 1; - u32 waitb_sp : 4; - u32 waitb_sn : 4; - u32 intb_srp : 1; - u32 intb_srn : 1; - u32 intb_sp : 4; - u32 intb_sn : 4; - u32 : 2; -} __attribute__((packed)); - -union cif_io_u { - u32 val : 32; - struct cif_io_t f; -} __attribute__((packed)); - -struct cif_read_dbg_t { - u32 unpacker_pre_fetch_trig_gen : 2; - u32 dly_second_rd_fetch_trig : 1; - u32 rst_rd_burst_id : 1; - u32 dis_rd_burst_id : 1; - u32 en_block_rd_when_packer_is_not_emp : 1; - u32 dis_pre_fetch_cntl_sm : 1; - u32 rbbm_chrncy_dis : 1; - u32 rbbm_rd_after_wr_lat : 2; - u32 dis_be_during_rd : 1; - u32 one_clk_invalidate_pulse : 1; - u32 dis_chnl_priority : 1; - u32 rst_read_path_a_pls : 1; - u32 rst_read_path_b_pls : 1; - u32 dis_reg_rd_fetch_trig : 1; - u32 dis_rd_fetch_trig_from_ind_addr : 1; - u32 dis_rd_same_byte_to_trig_fetch : 1; - u32 dis_dir_wrap : 1; - u32 dis_ring_buf_to_force_dec : 1; - u32 dis_addr_comp_in_16bit : 1; - u32 clr_w : 1; - u32 err_rd_tag_is_3 : 1; - u32 err_load_when_ful_a : 1; - u32 err_load_when_ful_b : 1; - u32 : 7; -} __attribute__((packed)); - -union cif_read_dbg_u { - u32 val : 32; - struct cif_read_dbg_t f; -} __attribute__((packed)); - -struct cif_write_dbg_t { - u32 packer_timeout_count : 2; - u32 en_upper_load_cond : 1; - u32 en_chnl_change_cond : 1; - u32 dis_addr_comp_cond : 1; - u32 dis_load_same_byte_addr_cond : 1; - u32 dis_timeout_cond : 1; - u32 dis_timeout_during_rbbm : 1; - u32 dis_packer_ful_during_rbbm_timeout : 1; - u32 en_dword_split_to_rbbm : 1; - u32 en_dummy_val : 1; - u32 dummy_val_sel : 1; - u32 mask_pm4_wrptr_dec : 1; - u32 dis_mc_clean_cond : 1; - u32 err_two_reqi_during_ful : 1; - u32 err_reqi_during_idle_clk : 1; - u32 err_global : 1; - u32 en_wr_buf_dbg_load : 1; - u32 en_wr_buf_dbg_path : 1; - u32 sel_wr_buf_byte : 3; - u32 dis_rd_flush_wr : 1; - u32 dis_packer_ful_cond : 1; - u32 dis_invalidate_by_ops_chnl : 1; - u32 en_halt_when_reqi_err : 1; - u32 cif_spare_2 : 5; - u32 : 1; -} __attribute__((packed)); - -union cif_write_dbg_u { - u32 val : 32; - struct cif_write_dbg_t f; -} __attribute__((packed)); - - -struct intf_cntl_t { - unsigned char ad_inc_a : 1; - unsigned char ring_buf_a : 1; - unsigned char rd_fetch_trigger_a : 1; - unsigned char rd_data_rdy_a : 1; - unsigned char ad_inc_b : 1; - unsigned char ring_buf_b : 1; - unsigned char rd_fetch_trigger_b : 1; - unsigned char rd_data_rdy_b : 1; -} __attribute__((packed)); - -union intf_cntl_u { - unsigned char val : 8; - struct intf_cntl_t f; -} __attribute__((packed)); - -struct cpu_defaults_t { - unsigned char unpack_rd_data : 1; - unsigned char access_ind_addr_a : 1; - unsigned char access_ind_addr_b : 1; - unsigned char access_scratch_reg : 1; - unsigned char pack_wr_data : 1; - unsigned char transition_size : 1; - unsigned char en_read_buf_mode : 1; - unsigned char rd_fetch_scratch : 1; -} __attribute__((packed)); - -union cpu_defaults_u { - unsigned char val : 8; - struct cpu_defaults_t f; -} __attribute__((packed)); - -struct crtc_total_t { - u32 crtc_h_total : 10; - u32 : 6; - u32 crtc_v_total : 10; - u32 : 6; -} __attribute__((packed)); - -union crtc_total_u { - u32 val : 32; - struct crtc_total_t f; -} __attribute__((packed)); - -struct crtc_ss_t { - u32 ss_start : 10; - u32 : 6; - u32 ss_end : 10; - u32 : 2; - u32 ss_align : 1; - u32 ss_pol : 1; - u32 ss_run_mode : 1; - u32 ss_en : 1; -} __attribute__((packed)); - -union crtc_ss_u { - u32 val : 32; - struct crtc_ss_t f; -} __attribute__((packed)); - -struct active_h_disp_t { - u32 active_h_start : 10; - u32 : 6; - u32 active_h_end : 10; - u32 : 6; -} __attribute__((packed)); - -union active_h_disp_u { - u32 val : 32; - struct active_h_disp_t f; -} __attribute__((packed)); - -struct active_v_disp_t { - u32 active_v_start : 10; - u32 : 6; - u32 active_v_end : 10; - u32 : 6; -} __attribute__((packed)); - -union active_v_disp_u { - u32 val : 32; - struct active_v_disp_t f; -} __attribute__((packed)); - -struct graphic_h_disp_t { - u32 graphic_h_start : 10; - u32 : 6; - u32 graphic_h_end : 10; - u32 : 6; -} __attribute__((packed)); - -union graphic_h_disp_u { - u32 val : 32; - struct graphic_h_disp_t f; -} __attribute__((packed)); - -struct graphic_v_disp_t { - u32 graphic_v_start : 10; - u32 : 6; - u32 graphic_v_end : 10; - u32 : 6; -} __attribute__((packed)); - -union graphic_v_disp_u{ - u32 val : 32; - struct graphic_v_disp_t f; -} __attribute__((packed)); - -struct graphic_ctrl_t_w100 { - u32 color_depth : 3; - u32 portrait_mode : 2; - u32 low_power_on : 1; - u32 req_freq : 4; - u32 en_crtc : 1; - u32 en_graphic_req : 1; - u32 en_graphic_crtc : 1; - u32 total_req_graphic : 9; - u32 lcd_pclk_on : 1; - u32 lcd_sclk_on : 1; - u32 pclk_running : 1; - u32 sclk_running : 1; - u32 : 6; -} __attribute__((packed)); - -struct graphic_ctrl_t_w32xx { - u32 color_depth : 3; - u32 portrait_mode : 2; - u32 low_power_on : 1; - u32 req_freq : 4; - u32 en_crtc : 1; - u32 en_graphic_req : 1; - u32 en_graphic_crtc : 1; - u32 total_req_graphic : 10; - u32 lcd_pclk_on : 1; - u32 lcd_sclk_on : 1; - u32 pclk_running : 1; - u32 sclk_running : 1; - u32 : 5; -} __attribute__((packed)); - -union graphic_ctrl_u { - u32 val : 32; - struct graphic_ctrl_t_w100 f_w100; - struct graphic_ctrl_t_w32xx f_w32xx; -} __attribute__((packed)); - -struct video_ctrl_t { - u32 video_mode : 1; - u32 keyer_en : 1; - u32 en_video_req : 1; - u32 en_graphic_req_video : 1; - u32 en_video_crtc : 1; - u32 video_hor_exp : 2; - u32 video_ver_exp : 2; - u32 uv_combine : 1; - u32 total_req_video : 9; - u32 video_ch_sel : 1; - u32 video_portrait : 2; - u32 yuv2rgb_en : 1; - u32 yuv2rgb_option : 1; - u32 video_inv_hor : 1; - u32 video_inv_ver : 1; - u32 gamma_sel : 2; - u32 dis_limit : 1; - u32 en_uv_hblend : 1; - u32 rgb_gamma_sel : 2; -} __attribute__((packed)); - -union video_ctrl_u { - u32 val : 32; - struct video_ctrl_t f; -} __attribute__((packed)); - -struct disp_db_buf_cntl_rd_t { - u32 en_db_buf : 1; - u32 update_db_buf_done : 1; - u32 db_buf_cntl : 6; - u32 : 24; -} __attribute__((packed)); - -union disp_db_buf_cntl_rd_u { - u32 val : 32; - struct disp_db_buf_cntl_rd_t f; -} __attribute__((packed)); - -struct disp_db_buf_cntl_wr_t { - u32 en_db_buf : 1; - u32 update_db_buf : 1; - u32 db_buf_cntl : 6; - u32 : 24; -} __attribute__((packed)); - -union disp_db_buf_cntl_wr_u { - u32 val : 32; - struct disp_db_buf_cntl_wr_t f; -} __attribute__((packed)); - -struct gamma_value1_t { - u32 gamma1 : 8; - u32 gamma2 : 8; - u32 gamma3 : 8; - u32 gamma4 : 8; -} __attribute__((packed)); - -union gamma_value1_u { - u32 val : 32; - struct gamma_value1_t f; -} __attribute__((packed)); - -struct gamma_value2_t { - u32 gamma5 : 8; - u32 gamma6 : 8; - u32 gamma7 : 8; - u32 gamma8 : 8; -} __attribute__((packed)); - -union gamma_value2_u { - u32 val : 32; - struct gamma_value2_t f; -} __attribute__((packed)); - -struct gamma_slope_t { - u32 slope1 : 3; - u32 slope2 : 3; - u32 slope3 : 3; - u32 slope4 : 3; - u32 slope5 : 3; - u32 slope6 : 3; - u32 slope7 : 3; - u32 slope8 : 3; - u32 : 8; -} __attribute__((packed)); - -union gamma_slope_u { - u32 val : 32; - struct gamma_slope_t f; -} __attribute__((packed)); - -struct mc_ext_mem_location_t { - u32 mc_ext_mem_start : 16; - u32 mc_ext_mem_top : 16; -} __attribute__((packed)); - -union mc_ext_mem_location_u { - u32 val : 32; - struct mc_ext_mem_location_t f; -} __attribute__((packed)); - -struct mc_fb_location_t { - u32 mc_fb_start : 16; - u32 mc_fb_top : 16; -} __attribute__((packed)); - -union mc_fb_location_u { - u32 val : 32; - struct mc_fb_location_t f; -} __attribute__((packed)); - -struct clk_pin_cntl_t { - u32 osc_en : 1; - u32 osc_gain : 5; - u32 dont_use_xtalin : 1; - u32 xtalin_pm_en : 1; - u32 xtalin_dbl_en : 1; - u32 : 7; - u32 cg_debug : 16; -} __attribute__((packed)); - -union clk_pin_cntl_u { - u32 val : 32; - struct clk_pin_cntl_t f; -} __attribute__((packed)); - -struct pll_ref_fb_div_t { - u32 pll_ref_div : 4; - u32 : 4; - u32 pll_fb_div_int : 6; - u32 : 2; - u32 pll_fb_div_frac : 3; - u32 : 1; - u32 pll_reset_time : 4; - u32 pll_lock_time : 8; -} __attribute__((packed)); - -union pll_ref_fb_div_u { - u32 val : 32; - struct pll_ref_fb_div_t f; -} __attribute__((packed)); - -struct pll_cntl_t { - u32 pll_pwdn : 1; - u32 pll_reset : 1; - u32 pll_pm_en : 1; - u32 pll_mode : 1; - u32 pll_refclk_sel : 1; - u32 pll_fbclk_sel : 1; - u32 pll_tcpoff : 1; - u32 pll_pcp : 3; - u32 pll_pvg : 3; - u32 pll_vcofr : 1; - u32 pll_ioffset : 2; - u32 pll_pecc_mode : 2; - u32 pll_pecc_scon : 2; - u32 pll_dactal : 4; - u32 pll_cp_clip : 2; - u32 pll_conf : 3; - u32 pll_mbctrl : 2; - u32 pll_ring_off : 1; -} __attribute__((packed)); - -union pll_cntl_u { - u32 val : 32; - struct pll_cntl_t f; -} __attribute__((packed)); - -struct sclk_cntl_t { - u32 sclk_src_sel : 2; - u32 : 2; - u32 sclk_post_div_fast : 4; - u32 sclk_clkon_hys : 3; - u32 sclk_post_div_slow : 4; - u32 disp_cg_ok2switch_en : 1; - u32 sclk_force_reg : 1; - u32 sclk_force_disp : 1; - u32 sclk_force_mc : 1; - u32 sclk_force_extmc : 1; - u32 sclk_force_cp : 1; - u32 sclk_force_e2 : 1; - u32 sclk_force_e3 : 1; - u32 sclk_force_idct : 1; - u32 sclk_force_bist : 1; - u32 busy_extend_cp : 1; - u32 busy_extend_e2 : 1; - u32 busy_extend_e3 : 1; - u32 busy_extend_idct : 1; - u32 : 3; -} __attribute__((packed)); - -union sclk_cntl_u { - u32 val : 32; - struct sclk_cntl_t f; -} __attribute__((packed)); - -struct pclk_cntl_t { - u32 pclk_src_sel : 2; - u32 : 2; - u32 pclk_post_div : 4; - u32 : 8; - u32 pclk_force_disp : 1; - u32 : 15; -} __attribute__((packed)); - -union pclk_cntl_u { - u32 val : 32; - struct pclk_cntl_t f; -} __attribute__((packed)); - - -#define TESTCLK_SRC_PLL 0x01 -#define TESTCLK_SRC_SCLK 0x02 -#define TESTCLK_SRC_PCLK 0x03 -/* 4 and 5 seem to by XTAL/M */ -#define TESTCLK_SRC_XTAL 0x06 - -struct clk_test_cntl_t { - u32 testclk_sel : 4; - u32 : 3; - u32 start_check_freq : 1; - u32 tstcount_rst : 1; - u32 : 15; - u32 test_count : 8; -} __attribute__((packed)); - -union clk_test_cntl_u { - u32 val : 32; - struct clk_test_cntl_t f; -} __attribute__((packed)); - -struct pwrmgt_cntl_t { - u32 pwm_enable : 1; - u32 : 1; - u32 pwm_mode_req : 2; - u32 pwm_wakeup_cond : 2; - u32 pwm_fast_noml_hw_en : 1; - u32 pwm_noml_fast_hw_en : 1; - u32 pwm_fast_noml_cond : 4; - u32 pwm_noml_fast_cond : 4; - u32 pwm_idle_timer : 8; - u32 pwm_busy_timer : 8; -} __attribute__((packed)); - -union pwrmgt_cntl_u { - u32 val : 32; - struct pwrmgt_cntl_t f; -} __attribute__((packed)); - -#define SRC_DATATYPE_EQU_DST 3 - -#define ROP3_SRCCOPY 0xcc -#define ROP3_PATCOPY 0xf0 - -#define GMC_BRUSH_SOLID_COLOR 13 -#define GMC_BRUSH_NONE 15 - -#define DP_SRC_MEM_RECTANGULAR 2 - -#define DP_OP_ROP 0 - -struct dp_gui_master_cntl_t { - u32 gmc_src_pitch_offset_cntl : 1; - u32 gmc_dst_pitch_offset_cntl : 1; - u32 gmc_src_clipping : 1; - u32 gmc_dst_clipping : 1; - u32 gmc_brush_datatype : 4; - u32 gmc_dst_datatype : 4; - u32 gmc_src_datatype : 3; - u32 gmc_byte_pix_order : 1; - u32 gmc_default_sel : 1; - u32 gmc_rop3 : 8; - u32 gmc_dp_src_source : 3; - u32 gmc_clr_cmp_fcn_dis : 1; - u32 : 1; - u32 gmc_wr_msk_dis : 1; - u32 gmc_dp_op : 1; -} __attribute__((packed)); - -union dp_gui_master_cntl_u { - u32 val : 32; - struct dp_gui_master_cntl_t f; -} __attribute__((packed)); - -struct rbbm_status_t { - u32 cmdfifo_avail : 7; - u32 : 1; - u32 hirq_on_rbb : 1; - u32 cprq_on_rbb : 1; - u32 cfrq_on_rbb : 1; - u32 hirq_in_rtbuf : 1; - u32 cprq_in_rtbuf : 1; - u32 cfrq_in_rtbuf : 1; - u32 cf_pipe_busy : 1; - u32 eng_ev_busy : 1; - u32 cp_cmdstrm_busy : 1; - u32 e2_busy : 1; - u32 rb2d_busy : 1; - u32 rb3d_busy : 1; - u32 se_busy : 1; - u32 re_busy : 1; - u32 tam_busy : 1; - u32 tdm_busy : 1; - u32 pb_busy : 1; - u32 : 6; - u32 gui_active : 1; -} __attribute__((packed)); - -union rbbm_status_u { - u32 val : 32; - struct rbbm_status_t f; -} __attribute__((packed)); - -struct dp_datatype_t { - u32 dp_dst_datatype : 4; - u32 : 4; - u32 dp_brush_datatype : 4; - u32 dp_src2_type : 1; - u32 dp_src2_datatype : 3; - u32 dp_src_datatype : 3; - u32 : 11; - u32 dp_byte_pix_order : 1; - u32 : 1; -} __attribute__((packed)); - -union dp_datatype_u { - u32 val : 32; - struct dp_datatype_t f; -} __attribute__((packed)); - -struct dp_mix_t { - u32 : 8; - u32 dp_src_source : 3; - u32 dp_src2_source : 3; - u32 : 2; - u32 dp_rop3 : 8; - u32 dp_op : 1; - u32 : 7; -} __attribute__((packed)); - -union dp_mix_u { - u32 val : 32; - struct dp_mix_t f; -} __attribute__((packed)); - -struct eng_cntl_t { - u32 erc_reg_rd_ws : 1; - u32 erc_reg_wr_ws : 1; - u32 erc_idle_reg_wr : 1; - u32 dis_engine_triggers : 1; - u32 dis_rop_src_uses_dst_w_h : 1; - u32 dis_src_uses_dst_dirmaj : 1; - u32 : 6; - u32 force_3dclk_when_2dclk : 1; - u32 : 19; -} __attribute__((packed)); - -union eng_cntl_u { - u32 val : 32; - struct eng_cntl_t f; -} __attribute__((packed)); - -struct dp_cntl_t { - u32 dst_x_dir : 1; - u32 dst_y_dir : 1; - u32 src_x_dir : 1; - u32 src_y_dir : 1; - u32 dst_major_x : 1; - u32 src_major_x : 1; - u32 : 26; -} __attribute__((packed)); - -union dp_cntl_u { - u32 val : 32; - struct dp_cntl_t f; -} __attribute__((packed)); - -struct dp_cntl_dst_dir_t { - u32 : 15; - u32 dst_y_dir : 1; - u32 : 15; - u32 dst_x_dir : 1; -} __attribute__((packed)); - -union dp_cntl_dst_dir_u { - u32 val : 32; - struct dp_cntl_dst_dir_t f; -} __attribute__((packed)); - -#endif - diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig index 24b9a8e05f64..692cac3ff0ee 100644 --- a/drivers/w1/masters/Kconfig +++ b/drivers/w1/masters/Kconfig @@ -41,13 +41,6 @@ config W1_MASTER_MXC help Say Y here to enable MXC 1-wire host -config W1_MASTER_DS1WM - tristate "Maxim DS1WM 1-wire busmaster" - help - Say Y here to enable the DS1WM 1-wire driver, such as that - in HP iPAQ devices like h5xxx, h2200, and ASIC3-based like - hx4700. - config W1_MASTER_GPIO tristate "GPIO 1-wire busmaster" depends on GPIOLIB || COMPILE_TEST diff --git a/drivers/w1/masters/Makefile b/drivers/w1/masters/Makefile index dae629b7ab49..c5d85a827e52 100644 --- a/drivers/w1/masters/Makefile +++ b/drivers/w1/masters/Makefile @@ -8,7 +8,6 @@ obj-$(CONFIG_W1_MASTER_DS2490) += ds2490.o obj-$(CONFIG_W1_MASTER_DS2482) += ds2482.o obj-$(CONFIG_W1_MASTER_MXC) += mxc_w1.o -obj-$(CONFIG_W1_MASTER_DS1WM) += ds1wm.o obj-$(CONFIG_W1_MASTER_GPIO) += w1-gpio.o obj-$(CONFIG_HDQ_MASTER_OMAP) += omap_hdq.o obj-$(CONFIG_W1_MASTER_SGI) += sgi_w1.o diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c deleted file mode 100644 index f661695fb589..000000000000 --- a/drivers/w1/masters/ds1wm.c +++ /dev/null @@ -1,675 +0,0 @@ -/* - * 1-wire busmaster driver for DS1WM and ASICs with embedded DS1WMs - * such as HP iPAQs (including h5xxx, h2200, and devices with ASIC3 - * like hx4700). - * - * Copyright (c) 2004-2005, Szabolcs Gyurko <szabolcs.gyurko@tlt.hu> - * Copyright (c) 2004-2007, Matt Reimer <mreimer@vpop.net> - * - * Use consistent with the GNU GPL is permitted, - * provided that this copyright notice is - * preserved in its entirety in all copies and derived works. - */ - -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/pm.h> -#include <linux/platform_device.h> -#include <linux/err.h> -#include <linux/delay.h> -#include <linux/mfd/core.h> -#include <linux/mfd/ds1wm.h> -#include <linux/slab.h> - -#include <asm/io.h> - -#include <linux/w1.h> - - -#define DS1WM_CMD 0x00 /* R/W 4 bits command */ -#define DS1WM_DATA 0x01 /* R/W 8 bits, transmit/receive buffer */ -#define DS1WM_INT 0x02 /* R/W interrupt status */ -#define DS1WM_INT_EN 0x03 /* R/W interrupt enable */ -#define DS1WM_CLKDIV 0x04 /* R/W 5 bits of divisor and pre-scale */ -#define DS1WM_CNTRL 0x05 /* R/W master control register (not used yet) */ - -#define DS1WM_CMD_1W_RESET (1 << 0) /* force reset on 1-wire bus */ -#define DS1WM_CMD_SRA (1 << 1) /* enable Search ROM accelerator mode */ -#define DS1WM_CMD_DQ_OUTPUT (1 << 2) /* write only - forces bus low */ -#define DS1WM_CMD_DQ_INPUT (1 << 3) /* read only - reflects state of bus */ -#define DS1WM_CMD_RST (1 << 5) /* software reset */ -#define DS1WM_CMD_OD (1 << 7) /* overdrive */ - -#define DS1WM_INT_PD (1 << 0) /* presence detect */ -#define DS1WM_INT_PDR (1 << 1) /* presence detect result */ -#define DS1WM_INT_TBE (1 << 2) /* tx buffer empty */ -#define DS1WM_INT_TSRE (1 << 3) /* tx shift register empty */ -#define DS1WM_INT_RBF (1 << 4) /* rx buffer full */ -#define DS1WM_INT_RSRF (1 << 5) /* rx shift register full */ - -#define DS1WM_INTEN_EPD (1 << 0) /* enable presence detect int */ -#define DS1WM_INTEN_IAS (1 << 1) /* INTR active state */ -#define DS1WM_INTEN_ETBE (1 << 2) /* enable tx buffer empty int */ -#define DS1WM_INTEN_ETMT (1 << 3) /* enable tx shift register empty int */ -#define DS1WM_INTEN_ERBF (1 << 4) /* enable rx buffer full int */ -#define DS1WM_INTEN_ERSRF (1 << 5) /* enable rx shift register full int */ -#define DS1WM_INTEN_DQO (1 << 6) /* enable direct bus driving ops */ - -#define DS1WM_INTEN_NOT_IAS (~DS1WM_INTEN_IAS) /* all but INTR active state */ - -#define DS1WM_TIMEOUT (HZ * 5) - -static struct { - unsigned long freq; - unsigned long divisor; -} freq[] = { - { 1000000, 0x80 }, - { 2000000, 0x84 }, - { 3000000, 0x81 }, - { 4000000, 0x88 }, - { 5000000, 0x82 }, - { 6000000, 0x85 }, - { 7000000, 0x83 }, - { 8000000, 0x8c }, - { 10000000, 0x86 }, - { 12000000, 0x89 }, - { 14000000, 0x87 }, - { 16000000, 0x90 }, - { 20000000, 0x8a }, - { 24000000, 0x8d }, - { 28000000, 0x8b }, - { 32000000, 0x94 }, - { 40000000, 0x8e }, - { 48000000, 0x91 }, - { 56000000, 0x8f }, - { 64000000, 0x98 }, - { 80000000, 0x92 }, - { 96000000, 0x95 }, - { 112000000, 0x93 }, - { 128000000, 0x9c }, -/* you can continue this table, consult the OPERATION - CLOCK DIVISOR - section of the ds1wm spec sheet. */ -}; - -struct ds1wm_data { - void __iomem *map; - unsigned int bus_shift; /* # of shifts to calc register offsets */ - bool is_hw_big_endian; - struct platform_device *pdev; - const struct mfd_cell *cell; - int irq; - int slave_present; - void *reset_complete; - void *read_complete; - void *write_complete; - int read_error; - /* last byte received */ - u8 read_byte; - /* byte to write that makes all intr disabled, */ - /* considering active_state (IAS) (optimization) */ - u8 int_en_reg_none; - unsigned int reset_recover_delay; /* see ds1wm.h */ -}; - -static inline void ds1wm_write_register(struct ds1wm_data *ds1wm_data, u32 reg, - u8 val) -{ - if (ds1wm_data->is_hw_big_endian) { - switch (ds1wm_data->bus_shift) { - case 0: - iowrite8(val, ds1wm_data->map + (reg << 0)); - break; - case 1: - iowrite16be((u16)val, ds1wm_data->map + (reg << 1)); - break; - case 2: - iowrite32be((u32)val, ds1wm_data->map + (reg << 2)); - break; - } - } else { - switch (ds1wm_data->bus_shift) { - case 0: - iowrite8(val, ds1wm_data->map + (reg << 0)); - break; - case 1: - iowrite16((u16)val, ds1wm_data->map + (reg << 1)); - break; - case 2: - iowrite32((u32)val, ds1wm_data->map + (reg << 2)); - break; - } - } -} - -static inline u8 ds1wm_read_register(struct ds1wm_data *ds1wm_data, u32 reg) -{ - u32 val = 0; - - if (ds1wm_data->is_hw_big_endian) { - switch (ds1wm_data->bus_shift) { - case 0: - val = ioread8(ds1wm_data->map + (reg << 0)); - break; - case 1: - val = ioread16be(ds1wm_data->map + (reg << 1)); - break; - case 2: - val = ioread32be(ds1wm_data->map + (reg << 2)); - break; - } - } else { - switch (ds1wm_data->bus_shift) { - case 0: - val = ioread8(ds1wm_data->map + (reg << 0)); - break; - case 1: - val = ioread16(ds1wm_data->map + (reg << 1)); - break; - case 2: - val = ioread32(ds1wm_data->map + (reg << 2)); - break; - } - } - dev_dbg(&ds1wm_data->pdev->dev, - "ds1wm_read_register reg: %d, 32 bit val:%x\n", reg, val); - return (u8)val; -} - - -static irqreturn_t ds1wm_isr(int isr, void *data) -{ - struct ds1wm_data *ds1wm_data = data; - u8 intr; - u8 inten = ds1wm_read_register(ds1wm_data, DS1WM_INT_EN); - /* if no bits are set in int enable register (except the IAS) - than go no further, reading the regs below has side effects */ - if (!(inten & DS1WM_INTEN_NOT_IAS)) - return IRQ_NONE; - - ds1wm_write_register(ds1wm_data, - DS1WM_INT_EN, ds1wm_data->int_en_reg_none); - - /* this read action clears the INTR and certain flags in ds1wm */ - intr = ds1wm_read_register(ds1wm_data, DS1WM_INT); - - ds1wm_data->slave_present = (intr & DS1WM_INT_PDR) ? 0 : 1; - - if ((intr & DS1WM_INT_TSRE) && ds1wm_data->write_complete) { - inten &= ~DS1WM_INTEN_ETMT; - complete(ds1wm_data->write_complete); - } - if (intr & DS1WM_INT_RBF) { - /* this read clears the RBF flag */ - ds1wm_data->read_byte = ds1wm_read_register(ds1wm_data, - DS1WM_DATA); - inten &= ~DS1WM_INTEN_ERBF; - if (ds1wm_data->read_complete) - complete(ds1wm_data->read_complete); - } - if ((intr & DS1WM_INT_PD) && ds1wm_data->reset_complete) { - inten &= ~DS1WM_INTEN_EPD; - complete(ds1wm_data->reset_complete); - } - - ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, inten); - return IRQ_HANDLED; -} - -static int ds1wm_reset(struct ds1wm_data *ds1wm_data) -{ - unsigned long timeleft; - DECLARE_COMPLETION_ONSTACK(reset_done); - - ds1wm_data->reset_complete = &reset_done; - - /* enable Presence detect only */ - ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, DS1WM_INTEN_EPD | - ds1wm_data->int_en_reg_none); - - ds1wm_write_register(ds1wm_data, DS1WM_CMD, DS1WM_CMD_1W_RESET); - - timeleft = wait_for_completion_timeout(&reset_done, DS1WM_TIMEOUT); - ds1wm_data->reset_complete = NULL; - if (!timeleft) { - dev_err(&ds1wm_data->pdev->dev, "reset failed, timed out\n"); - return 1; - } - - if (!ds1wm_data->slave_present) { - dev_dbg(&ds1wm_data->pdev->dev, "reset: no devices found\n"); - return 1; - } - - if (ds1wm_data->reset_recover_delay) - msleep(ds1wm_data->reset_recover_delay); - - return 0; -} - -static int ds1wm_write(struct ds1wm_data *ds1wm_data, u8 data) -{ - unsigned long timeleft; - DECLARE_COMPLETION_ONSTACK(write_done); - ds1wm_data->write_complete = &write_done; - - ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, - ds1wm_data->int_en_reg_none | DS1WM_INTEN_ETMT); - - ds1wm_write_register(ds1wm_data, DS1WM_DATA, data); - - timeleft = wait_for_completion_timeout(&write_done, DS1WM_TIMEOUT); - - ds1wm_data->write_complete = NULL; - if (!timeleft) { - dev_err(&ds1wm_data->pdev->dev, "write failed, timed out\n"); - return -ETIMEDOUT; - } - - return 0; -} - -static u8 ds1wm_read(struct ds1wm_data *ds1wm_data, unsigned char write_data) -{ - unsigned long timeleft; - u8 intEnable = DS1WM_INTEN_ERBF | ds1wm_data->int_en_reg_none; - DECLARE_COMPLETION_ONSTACK(read_done); - - ds1wm_read_register(ds1wm_data, DS1WM_DATA); - - ds1wm_data->read_complete = &read_done; - ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, intEnable); - - ds1wm_write_register(ds1wm_data, DS1WM_DATA, write_data); - timeleft = wait_for_completion_timeout(&read_done, DS1WM_TIMEOUT); - - ds1wm_data->read_complete = NULL; - if (!timeleft) { - dev_err(&ds1wm_data->pdev->dev, "read failed, timed out\n"); - ds1wm_data->read_error = -ETIMEDOUT; - return 0xFF; - } - ds1wm_data->read_error = 0; - return ds1wm_data->read_byte; -} - -static int ds1wm_find_divisor(int gclk) -{ - int i; - - for (i = ARRAY_SIZE(freq)-1; i >= 0; --i) - if (gclk >= freq[i].freq) - return freq[i].divisor; - - return 0; -} - -static void ds1wm_up(struct ds1wm_data *ds1wm_data) -{ - int divisor; - struct device *dev = &ds1wm_data->pdev->dev; - struct ds1wm_driver_data *plat = dev_get_platdata(dev); - - if (ds1wm_data->cell->enable) - ds1wm_data->cell->enable(ds1wm_data->pdev); - - divisor = ds1wm_find_divisor(plat->clock_rate); - dev_dbg(dev, "found divisor 0x%x for clock %d\n", - divisor, plat->clock_rate); - if (divisor == 0) { - dev_err(dev, "no suitable divisor for %dHz clock\n", - plat->clock_rate); - return; - } - ds1wm_write_register(ds1wm_data, DS1WM_CLKDIV, divisor); - - /* Let the w1 clock stabilize. */ - msleep(1); - - ds1wm_reset(ds1wm_data); -} - -static void ds1wm_down(struct ds1wm_data *ds1wm_data) -{ - ds1wm_reset(ds1wm_data); - - /* Disable interrupts. */ - ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, - ds1wm_data->int_en_reg_none); - - if (ds1wm_data->cell->disable) - ds1wm_data->cell->disable(ds1wm_data->pdev); -} - -/* --------------------------------------------------------------------- */ -/* w1 methods */ - -static u8 ds1wm_read_byte(void *data) -{ - struct ds1wm_data *ds1wm_data = data; - - return ds1wm_read(ds1wm_data, 0xff); -} - -static void ds1wm_write_byte(void *data, u8 byte) -{ - struct ds1wm_data *ds1wm_data = data; - - ds1wm_write(ds1wm_data, byte); -} - -static u8 ds1wm_reset_bus(void *data) -{ - struct ds1wm_data *ds1wm_data = data; - - ds1wm_reset(ds1wm_data); - - return 0; -} - -static void ds1wm_search(void *data, struct w1_master *master_dev, - u8 search_type, w1_slave_found_callback slave_found) -{ - struct ds1wm_data *ds1wm_data = data; - int i; - int ms_discrep_bit = -1; - u64 r = 0; /* holds the progress of the search */ - u64 r_prime, d; - unsigned slaves_found = 0; - unsigned int pass = 0; - - dev_dbg(&ds1wm_data->pdev->dev, "search begin\n"); - while (true) { - ++pass; - if (pass > 100) { - dev_dbg(&ds1wm_data->pdev->dev, - "too many attempts (100), search aborted\n"); - return; - } - - mutex_lock(&master_dev->bus_mutex); - if (ds1wm_reset(ds1wm_data)) { - mutex_unlock(&master_dev->bus_mutex); - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d reset error (or no slaves)\n", pass); - break; - } - - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d r : %0#18llx writing SEARCH_ROM\n", pass, r); - ds1wm_write(ds1wm_data, search_type); - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d entering ASM\n", pass); - ds1wm_write_register(ds1wm_data, DS1WM_CMD, DS1WM_CMD_SRA); - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d beginning nibble loop\n", pass); - - r_prime = 0; - d = 0; - /* we work one nibble at a time */ - /* each nibble is interleaved to form a byte */ - for (i = 0; i < 16; i++) { - - unsigned char resp, _r, _r_prime, _d; - - _r = (r >> (4*i)) & 0xf; - _r = ((_r & 0x1) << 1) | - ((_r & 0x2) << 2) | - ((_r & 0x4) << 3) | - ((_r & 0x8) << 4); - - /* writes _r, then reads back: */ - resp = ds1wm_read(ds1wm_data, _r); - - if (ds1wm_data->read_error) { - dev_err(&ds1wm_data->pdev->dev, - "pass: %d nibble: %d read error\n", pass, i); - break; - } - - _r_prime = ((resp & 0x02) >> 1) | - ((resp & 0x08) >> 2) | - ((resp & 0x20) >> 3) | - ((resp & 0x80) >> 4); - - _d = ((resp & 0x01) >> 0) | - ((resp & 0x04) >> 1) | - ((resp & 0x10) >> 2) | - ((resp & 0x40) >> 3); - - r_prime |= (unsigned long long) _r_prime << (i * 4); - d |= (unsigned long long) _d << (i * 4); - - } - if (ds1wm_data->read_error) { - mutex_unlock(&master_dev->bus_mutex); - dev_err(&ds1wm_data->pdev->dev, - "pass: %d read error, retrying\n", pass); - break; - } - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d r\': %0#18llx d:%0#18llx\n", - pass, r_prime, d); - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d nibble loop complete, exiting ASM\n", pass); - ds1wm_write_register(ds1wm_data, DS1WM_CMD, ~DS1WM_CMD_SRA); - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d resetting bus\n", pass); - ds1wm_reset(ds1wm_data); - mutex_unlock(&master_dev->bus_mutex); - if ((r_prime & ((u64)1 << 63)) && (d & ((u64)1 << 63))) { - dev_err(&ds1wm_data->pdev->dev, - "pass: %d bus error, retrying\n", pass); - continue; /* start over */ - } - - - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d found %0#18llx\n", pass, r_prime); - slave_found(master_dev, r_prime); - ++slaves_found; - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d complete, preparing next pass\n", pass); - - /* any discrepency found which we already choose the - '1' branch is now is now irrelevant we reveal the - next branch with this: */ - d &= ~r; - /* find last bit set, i.e. the most signif. bit set */ - ms_discrep_bit = fls64(d) - 1; - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d new d:%0#18llx MS discrep bit:%d\n", - pass, d, ms_discrep_bit); - - /* prev_ms_discrep_bit = ms_discrep_bit; - prepare for next ROM search: */ - if (ms_discrep_bit == -1) - break; - - r = (r & ~(~0ull << (ms_discrep_bit))) | 1 << ms_discrep_bit; - } /* end while true */ - dev_dbg(&ds1wm_data->pdev->dev, - "pass: %d total: %d search done ms d bit pos: %d\n", pass, - slaves_found, ms_discrep_bit); -} - -/* --------------------------------------------------------------------- */ - -static struct w1_bus_master ds1wm_master = { - .read_byte = ds1wm_read_byte, - .write_byte = ds1wm_write_byte, - .reset_bus = ds1wm_reset_bus, - .search = ds1wm_search, -}; - -static int ds1wm_probe(struct platform_device *pdev) -{ - struct ds1wm_data *ds1wm_data; - struct ds1wm_driver_data *plat; - struct resource *res; - int ret; - u8 inten; - - if (!pdev) - return -ENODEV; - - ds1wm_data = devm_kzalloc(&pdev->dev, sizeof(*ds1wm_data), GFP_KERNEL); - if (!ds1wm_data) - return -ENOMEM; - - platform_set_drvdata(pdev, ds1wm_data); - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENXIO; - ds1wm_data->map = devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!ds1wm_data->map) - return -ENOMEM; - - ds1wm_data->pdev = pdev; - ds1wm_data->cell = mfd_get_cell(pdev); - if (!ds1wm_data->cell) - return -ENODEV; - plat = dev_get_platdata(&pdev->dev); - if (!plat) - return -ENODEV; - - /* how many bits to shift register number to get register offset */ - if (plat->bus_shift > 2) { - dev_err(&ds1wm_data->pdev->dev, - "illegal bus shift %d, not written", - ds1wm_data->bus_shift); - return -EINVAL; - } - - ds1wm_data->bus_shift = plat->bus_shift; - /* make sure resource has space for 8 registers */ - if ((8 << ds1wm_data->bus_shift) > resource_size(res)) { - dev_err(&ds1wm_data->pdev->dev, - "memory resource size %d to small, should be %d\n", - (int)resource_size(res), - 8 << ds1wm_data->bus_shift); - return -EINVAL; - } - - ds1wm_data->is_hw_big_endian = plat->is_hw_big_endian; - - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res) - return -ENXIO; - ds1wm_data->irq = res->start; - ds1wm_data->int_en_reg_none = (plat->active_high ? DS1WM_INTEN_IAS : 0); - ds1wm_data->reset_recover_delay = plat->reset_recover_delay; - - /* Mask interrupts, set IAS before claiming interrupt */ - inten = ds1wm_read_register(ds1wm_data, DS1WM_INT_EN); - ds1wm_write_register(ds1wm_data, - DS1WM_INT_EN, ds1wm_data->int_en_reg_none); - - if (res->flags & IORESOURCE_IRQ_HIGHEDGE) - irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); - if (res->flags & IORESOURCE_IRQ_LOWEDGE) - irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_FALLING); - if (res->flags & IORESOURCE_IRQ_HIGHLEVEL) - irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_LEVEL_HIGH); - if (res->flags & IORESOURCE_IRQ_LOWLEVEL) - irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_LEVEL_LOW); - - ret = devm_request_irq(&pdev->dev, ds1wm_data->irq, ds1wm_isr, - IRQF_SHARED, "ds1wm", ds1wm_data); - if (ret) { - dev_err(&ds1wm_data->pdev->dev, - "devm_request_irq %d failed with errno %d\n", - ds1wm_data->irq, - ret); - - return ret; - } - - ds1wm_up(ds1wm_data); - - ds1wm_master.data = (void *)ds1wm_data; - - ret = w1_add_master_device(&ds1wm_master); - if (ret) - goto err; - - dev_dbg(&ds1wm_data->pdev->dev, - "ds1wm: probe successful, IAS: %d, rec.delay: %d, clockrate: %d, bus-shift: %d, is Hw Big Endian: %d\n", - plat->active_high, - plat->reset_recover_delay, - plat->clock_rate, - ds1wm_data->bus_shift, - ds1wm_data->is_hw_big_endian); - return 0; - -err: - ds1wm_down(ds1wm_data); - - return ret; -} - -#ifdef CONFIG_PM -static int ds1wm_suspend(struct platform_device *pdev, pm_message_t state) -{ - struct ds1wm_data *ds1wm_data = platform_get_drvdata(pdev); - - ds1wm_down(ds1wm_data); - - return 0; -} - -static int ds1wm_resume(struct platform_device *pdev) -{ - struct ds1wm_data *ds1wm_data = platform_get_drvdata(pdev); - - ds1wm_up(ds1wm_data); - - return 0; -} -#else -#define ds1wm_suspend NULL -#define ds1wm_resume NULL -#endif - -static int ds1wm_remove(struct platform_device *pdev) -{ - struct ds1wm_data *ds1wm_data = platform_get_drvdata(pdev); - - w1_remove_master_device(&ds1wm_master); - ds1wm_down(ds1wm_data); - - return 0; -} - -static struct platform_driver ds1wm_driver = { - .driver = { - .name = "ds1wm", - }, - .probe = ds1wm_probe, - .remove = ds1wm_remove, - .suspend = ds1wm_suspend, - .resume = ds1wm_resume -}; - -static int __init ds1wm_init(void) -{ - pr_info("DS1WM w1 busmaster driver - (c) 2004 Szabolcs Gyurko\n"); - return platform_driver_register(&ds1wm_driver); -} - -static void __exit ds1wm_exit(void) -{ - platform_driver_unregister(&ds1wm_driver); -} - -module_init(ds1wm_init); -module_exit(ds1wm_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Szabolcs Gyurko <szabolcs.gyurko@tlt.hu>, " - "Matt Reimer <mreimer@vpop.net>," - "Jean-Francois Dagenais <dagenaisj@sonatest.com>"); -MODULE_DESCRIPTION("DS1WM w1 busmaster driver"); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 0bc40b763b06..5de74686f12b 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -491,14 +491,13 @@ config IXP4XX_WATCHDOG Say N if you are unsure. config S3C2410_WATCHDOG - tristate "S3C2410 Watchdog" - depends on ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS || \ - COMPILE_TEST + tristate "S3C6410/S5Pv210/Exynos Watchdog" + depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST select WATCHDOG_CORE select MFD_SYSCON if ARCH_EXYNOS help - Watchdog timer block in the Samsung S3C24xx, S3C64xx, S5Pv210 and - Exynos SoCs. This will reboot the system when the timer expires with + Watchdog timer block in the Samsung S3C64xx, S5Pv210 and Exynos + SoCs. This will reboot the system when the timer expires with the watchdog enabled. The driver is limited by the speed of the system's PCLK diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index d3fc8ed886ff..200ba236a72e 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -562,73 +562,6 @@ static irqreturn_t s3c2410wdt_irq(int irqno, void *param) return IRQ_HANDLED; } -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ - -static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb, - unsigned long val, void *data) -{ - int ret; - struct s3c2410_wdt *wdt = freq_to_wdt(nb); - - if (!s3c2410wdt_is_running(wdt)) - goto done; - - if (val == CPUFREQ_PRECHANGE) { - /* To ensure that over the change we don't cause the - * watchdog to trigger, we perform an keep-alive if - * the watchdog is running. - */ - - s3c2410wdt_keepalive(&wdt->wdt_device); - } else if (val == CPUFREQ_POSTCHANGE) { - s3c2410wdt_stop(&wdt->wdt_device); - - ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device, - wdt->wdt_device.timeout); - - if (ret >= 0) - s3c2410wdt_start(&wdt->wdt_device); - else - goto err; - } - -done: - return 0; - - err: - dev_err(wdt->dev, "cannot set new value for timeout %d\n", - wdt->wdt_device.timeout); - return ret; -} - -static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt) -{ - wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition; - - return cpufreq_register_notifier(&wdt->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) -{ - wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition; - - cpufreq_unregister_notifier(&wdt->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); -} - -#else - -static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt) -{ - return 0; -} - -static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) -{ -} -#endif - static inline unsigned int s3c2410wdt_get_bootstatus(struct s3c2410_wdt *wdt) { unsigned int rst_stat; @@ -761,12 +694,6 @@ static int s3c2410wdt_probe(struct platform_device *pdev) wdt->wdt_device.min_timeout = 1; wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt); - ret = s3c2410wdt_cpufreq_register(wdt); - if (ret < 0) { - dev_err(dev, "failed to register cpufreq\n"); - goto err_src_clk; - } - watchdog_set_drvdata(&wdt->wdt_device, wdt); /* see if we can actually set the requested timer margin, and if @@ -783,7 +710,7 @@ static int s3c2410wdt_probe(struct platform_device *pdev) S3C2410_WATCHDOG_DEFAULT_TIME); } else { dev_err(dev, "failed to use default timeout\n"); - goto err_cpufreq; + goto err_src_clk; } } @@ -791,7 +718,7 @@ static int s3c2410wdt_probe(struct platform_device *pdev) pdev->name, pdev); if (ret != 0) { dev_err(dev, "failed to install irq (%d)\n", ret); - goto err_cpufreq; + goto err_src_clk; } watchdog_set_nowayout(&wdt->wdt_device, nowayout); @@ -817,7 +744,7 @@ static int s3c2410wdt_probe(struct platform_device *pdev) ret = watchdog_register_device(&wdt->wdt_device); if (ret) - goto err_cpufreq; + goto err_src_clk; ret = s3c2410wdt_enable(wdt, true); if (ret < 0) @@ -839,9 +766,6 @@ static int s3c2410wdt_probe(struct platform_device *pdev) err_unregister: watchdog_unregister_device(&wdt->wdt_device); - err_cpufreq: - s3c2410wdt_cpufreq_deregister(wdt); - err_src_clk: clk_disable_unprepare(wdt->src_clk); @@ -862,8 +786,6 @@ static int s3c2410wdt_remove(struct platform_device *dev) watchdog_unregister_device(&wdt->wdt_device); - s3c2410wdt_cpufreq_deregister(wdt); - clk_disable_unprepare(wdt->src_clk); clk_disable_unprepare(wdt->bus_clk); diff --git a/drivers/watchdog/wdt285.c b/drivers/watchdog/wdt285.c index 110249e5f642..5b7be7a62d54 100644 --- a/drivers/watchdog/wdt285.c +++ b/drivers/watchdog/wdt285.c @@ -206,8 +206,6 @@ static int __init footbridge_watchdog_init(void) pr_info("Footbridge Watchdog Timer: 0.01, timer margin: %d sec\n", soft_margin); - if (machine_is_cats()) - pr_warn("Warning: Watchdog reset may not work on this machine\n"); return 0; } |