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authorWim Van Sebroeck <wim@iguana.be>2012-07-08 14:57:09 +0200
committerWim Van Sebroeck <wim@iguana.be>2012-07-23 12:50:30 +0200
commit7732c6b96f127bb5d9474715149b4e94e369412c (patch)
treed7c559fe593843387797360c99a3aad36540ca12 /drivers/watchdog
parent41814eed414ab3cef3d2b857ae3690a2b4888291 (diff)
watchdog: sch311x_wdt: Fix Polarity when starting watchdog
Some motherboards like the Advantech ARK3400 documentation use a non-inverted GPIO pin. We fix this by assuming that the BIOS will set the Polarity bit for the GPIO correctly at startup and we keep the Bit-setting intact when we start and stop the watchdog. Reported-by: Jean-François Deverge <jf.deverge@gmail.com> Signed-off-by: Dave Mueller <d.mueller@elsoft.ch> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/sch311x_wdt.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/watchdog/sch311x_wdt.c b/drivers/watchdog/sch311x_wdt.c
index f8477002b728..9681ada0f252 100644
--- a/drivers/watchdog/sch311x_wdt.c
+++ b/drivers/watchdog/sch311x_wdt.c
@@ -136,6 +136,8 @@ static void sch311x_wdt_set_timeout(int t)
static void sch311x_wdt_start(void)
{
+ unsigned char t;
+
spin_lock(&sch311x_wdt_data.io_lock);
/* set watchdog's timeout */
@@ -149,7 +151,8 @@ static void sch311x_wdt_start(void)
* Bit 4-6 (Reserved)
* Bit 7, Output Type: 0 = Push Pull Bit, 1 = Open Drain
*/
- outb(0x0e, sch311x_wdt_data.runtime_reg + GP60);
+ t = inb(sch311x_wdt_data.runtime_reg + GP60);
+ outb((t & ~0x0d) | 0x0c, sch311x_wdt_data.runtime_reg + GP60);
spin_unlock(&sch311x_wdt_data.io_lock);
@@ -157,10 +160,13 @@ static void sch311x_wdt_start(void)
static void sch311x_wdt_stop(void)
{
+ unsigned char t;
+
spin_lock(&sch311x_wdt_data.io_lock);
/* stop the watchdog */
- outb(0x01, sch311x_wdt_data.runtime_reg + GP60);
+ t = inb(sch311x_wdt_data.runtime_reg + GP60);
+ outb((t & ~0x0d) | 0x01, sch311x_wdt_data.runtime_reg + GP60);
/* disable timeout by setting it to 0 */
sch311x_wdt_set_timeout(0);