diff options
author | Peter Chen <peter.chen@nxp.com> | 2020-09-10 17:11:24 +0800 |
---|---|---|
committer | Felipe Balbi <balbi@kernel.org> | 2020-10-02 09:57:45 +0300 |
commit | 4e218882eb5a967ea042ca68069140d2c969971a (patch) | |
tree | 7beb4ddfda626127bb253ba40e1164c56d9c1cf4 /drivers/usb | |
parent | abc6b579048e2084ea28c677dd11106d67fe8498 (diff) |
usb: cdns3: gadget: improve the dump TRB operation at cdns3_ep_run_transfer
It only dumps the first TRB per request, it is not useful if only dump
the first TRB when there are several TRBs per request. We improve it by
dumpping all TRBs per request in this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/cdns3/gadget.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index caf011f59a4c..d33947d215f9 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -1090,6 +1090,7 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, struct cdns3_device *priv_dev = priv_ep->cdns3_dev; struct cdns3_request *priv_req; struct cdns3_trb *trb; + struct cdns3_trb *link_trb; dma_addr_t trb_dma; u32 togle_pcs = 1; int sg_iter = 0; @@ -1130,7 +1131,6 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, /* prepare ring */ if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) { - struct cdns3_trb *link_trb; int doorbell, dma_index; u32 ch_bit = 0; @@ -1266,7 +1266,22 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, if (priv_dev->dev_ver <= DEV_VER_V2) cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep); - trace_cdns3_prepare_trb(priv_ep, priv_req->trb); + if (num_trb > 1) { + int i = 0; + + while (i < num_trb) { + trace_cdns3_prepare_trb(priv_ep, trb + i); + if (trb + i == link_trb) { + trb = priv_ep->trb_pool; + num_trb = num_trb - i; + i = 0; + } else { + i++; + } + } + } else { + trace_cdns3_prepare_trb(priv_ep, priv_req->trb); + } /* * Memory barrier - Cycle Bit must be set before trb->length and |