diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-01-22 17:59:34 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-01-27 12:04:29 +0000 |
| commit | d9c14743a330315b6e2186cafc4812fe91a1fa8f (patch) | |
| tree | 40622433c4f5fd1676e4ea4917e898f0afc34069 /drivers/spi/spi-dw-pci.c | |
| parent | d58cf5ff6500522880683ce90d9caa79af385ed8 (diff) | |
spi: dw-mid: get a proper clock frequency for SPI2
The clock information is being kept in the custom register on Intel MID
platforms. Each controller has its own dedicated custom register for that.
Thus, to get a proper frequency we have to read value from the specific offset
to the register block. This patch makes this happen.
Fixes: d58cf5ff6500 (spi: dw-pci: describe Intel MID controllers better)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-dw-pci.c')
| -rw-r--r-- | drivers/spi/spi-dw-pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c index 64f3efaf2472..5ba331047cbe 100644 --- a/drivers/spi/spi-dw-pci.c +++ b/drivers/spi/spi-dw-pci.c @@ -82,14 +82,14 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) * clock rate, FIFO depth. */ if (desc) { + dws->num_cs = desc->num_cs; + dws->bus_num = desc->bus_num; + if (desc->setup) { ret = desc->setup(dws); if (ret) return ret; } - - dws->num_cs = desc->num_cs; - dws->bus_num = desc->bus_num; } else { return -ENODEV; } |