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authorLudovic Barre <ludovic.barre@st.com>2018-10-05 09:43:03 +0200
committerMark Brown <broonie@kernel.org>2018-10-19 13:32:56 +0100
commitc530cd1d9d5e7741c641c5c366ddb4e23aa5caec (patch)
treeba9b2e8d4b6b42a1280b51599e789141b9445e90 /drivers/spi/Makefile
parentc3e6845ea0dd52f26675ad32d6a45e3991ba20a6 (diff)
spi: spi-mem: add stm32 qspi controller
The qspi controller is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory tested on: -NOR: mx66l51235l -NAND: MT29F2G01ABAGD Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/Makefile')
-rw-r--r--drivers/spi/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 7e7df53fc73a..df04dfbe7d70 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -94,6 +94,7 @@ obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o
obj-$(CONFIG_SPI_SPRD) += spi-sprd.o
obj-$(CONFIG_SPI_SPRD_ADI) += spi-sprd-adi.o
obj-$(CONFIG_SPI_STM32) += spi-stm32.o
+obj-$(CONFIG_SPI_STM32_QSPI) += spi-stm32-qspi.o
obj-$(CONFIG_SPI_ST_SSC4) += spi-st-ssc4.o
obj-$(CONFIG_SPI_SUN4I) += spi-sun4i.o
obj-$(CONFIG_SPI_SUN6I) += spi-sun6i.o