diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-07-10 10:14:17 +0900 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2018-07-16 12:15:55 +0200 |
| commit | 499fef09a3237497906084da3eede0185fc9abb8 (patch) | |
| tree | 22b2a3dbed0be058e66e3c26c97501c90b049fa8 /drivers/reset/Kconfig | |
| parent | ef8b023b230bfa3cf1f09ea1b8f1e47e37b389f2 (diff) | |
reset: uniphier: add USB3 core reset control
Add a reset line to enable USB3 core implemented in UniPhier SoCs.
This reuses only the reset operations in reset-simple, because
the reset-simple doesn't handle any SoC-dependent clocks and resets.
This reset line is included in the USB3 glue layer, and it's necessary
to enable clocks and deassert resets of the layer before using this
reset line.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/reset/Kconfig')
| -rw-r--r-- | drivers/reset/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 756ad2b27d0f..a70262cb7e56 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -147,6 +147,16 @@ config RESET_UNIPHIER Say Y if you want to control reset signals provided by System Control block, Media I/O block, Peripheral Block. +config RESET_UNIPHIER_USB3 + tristate "USB3 reset driver for UniPhier SoCs" + depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF + default ARCH_UNIPHIER + select RESET_SIMPLE + help + Support for the USB3 core reset on UniPhier SoCs. + Say Y if you want to control reset signals provided by + USB3 glue layer. + config RESET_ZYNQ bool "ZYNQ Reset Driver" if COMPILE_TEST default ARCH_ZYNQ |