diff options
author | Jingoo Han <jg1.han@samsung.com> | 2014-11-12 12:25:38 +0900 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-11-13 10:50:31 -0700 |
commit | bc512c5a8c78db6904de7275bce54ce5b1433893 (patch) | |
tree | 479bbc736d4d26cb7a15f500c179f028ab88e909 /drivers/pci | |
parent | 70b3e89aaf421ad642c4ab0fb196e1c19ea838c5 (diff) |
PCI: exynos: Remove unnecessary return statement
This patch fixes the following checkpatch warning:
WARNING: void function return statements are not generally useful
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/host/pci-exynos.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c index 902d7cd3e760..850c9f951a3f 100644 --- a/drivers/pci/host/pci-exynos.c +++ b/drivers/pci/host/pci-exynos.c @@ -312,7 +312,6 @@ static void exynos_pcie_assert_reset(struct pcie_port *pp) if (exynos_pcie->reset_gpio >= 0) devm_gpio_request_one(pp->dev, exynos_pcie->reset_gpio, GPIOF_OUT_INIT_HIGH, "RESET"); - return; } static int exynos_pcie_establish_link(struct pcie_port *pp) @@ -388,7 +387,6 @@ static void exynos_pcie_clear_irq_pulse(struct pcie_port *pp) val = exynos_elb_readl(exynos_pcie, PCIE_IRQ_PULSE); exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_PULSE); - return; } static void exynos_pcie_enable_irq_pulse(struct pcie_port *pp) @@ -400,7 +398,6 @@ static void exynos_pcie_enable_irq_pulse(struct pcie_port *pp) val = IRQ_INTA_ASSERT | IRQ_INTB_ASSERT | IRQ_INTC_ASSERT | IRQ_INTD_ASSERT, exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_EN_PULSE); - return; } static irqreturn_t exynos_pcie_irq_handler(int irq, void *arg) @@ -429,7 +426,6 @@ static void exynos_pcie_msi_init(struct pcie_port *pp) val = exynos_elb_readl(exynos_pcie, PCIE_IRQ_EN_LEVEL); val |= IRQ_MSI_ENABLE; exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_EN_LEVEL); - return; } static void exynos_pcie_enable_interrupts(struct pcie_port *pp) @@ -438,8 +434,6 @@ static void exynos_pcie_enable_interrupts(struct pcie_port *pp) if (IS_ENABLED(CONFIG_PCI_MSI)) exynos_pcie_msi_init(pp); - - return; } static inline void exynos_pcie_readl_rc(struct pcie_port *pp, @@ -448,7 +442,6 @@ static inline void exynos_pcie_readl_rc(struct pcie_port *pp, exynos_pcie_sideband_dbi_r_mode(pp, true); *val = readl(dbi_base); exynos_pcie_sideband_dbi_r_mode(pp, false); - return; } static inline void exynos_pcie_writel_rc(struct pcie_port *pp, @@ -457,7 +450,6 @@ static inline void exynos_pcie_writel_rc(struct pcie_port *pp, exynos_pcie_sideband_dbi_w_mode(pp, true); writel(val, dbi_base); exynos_pcie_sideband_dbi_w_mode(pp, false); - return; } static int exynos_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, |