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authorTal Gilboa <talgi@mellanox.com>2018-03-30 07:44:05 -0500
committerBjorn Helgaas <bhelgaas@google.com>2018-03-30 15:33:38 -0500
commit6cf57be0f78e289aaf236f8bc55c40ea6c422c75 (patch)
tree6a139948424dfd0d349b2baf06bdcd4370285427 /drivers/pci/pci.h
parent1acfb9b7ee0b1881bb8e875b6757976e48293ec4 (diff)
PCI: Add pcie_get_speed_cap() to find max supported link speed
Add pcie_get_speed_cap() to find the max link speed supported by a device. Change max_link_speed_show() to use pcie_get_speed_cap(). Signed-off-by: Tal Gilboa <talgi@mellanox.com> [bhelgaas: return speed directly instead of error and *speed, don't export outside drivers/pci] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Diffstat (limited to 'drivers/pci/pci.h')
-rw-r--r--drivers/pci/pci.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index fcd81911b127..1186d8be6055 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -253,6 +253,16 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
void pci_reassigndev_resource_alignment(struct pci_dev *dev);
void pci_disable_bridge_window(struct pci_dev *dev);
+/* PCIe link information */
+#define PCIE_SPEED2STR(speed) \
+ ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \
+ (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \
+ (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \
+ (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \
+ "Unknown speed")
+
+enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev);
+
/* Single Root I/O Virtualization */
struct pci_sriov {
int pos; /* Capability position */