diff options
| author | Heiner Kallweit <hkallweit1@gmail.com> | 2019-02-22 23:48:14 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-02-23 14:12:09 -0800 |
| commit | 0974f1f03b07543f3225414118e6e7ff205da96e (patch) | |
| tree | 63702a3f815a0bdbdbf3d80253f46fbc21f18738 /drivers/net/phy | |
| parent | f88d5d684c0289fc7970795848f2ed07ef0b1b57 (diff) | |
net: phy: aquantia: remove false 5G and 10G speed ability for AQCS109
AQCS109 belongs to a family of PHY's where certain members don't
support 5G or 10G. However for all members of the family the chip
reports 10G and 5G capability. Therefore remove the not supported
modes for AQCS109.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
| -rw-r--r-- | drivers/net/phy/aquantia.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index 34be44d00c19..9661ef4b40b0 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -152,6 +152,15 @@ static int aqr_read_status(struct phy_device *phydev) return 0; } +static int aqcs109_config_init(struct phy_device *phydev) +{ + /* AQCS109 belongs to a chip family partially supporting 10G and 5G. + * PMA speed ability bits are the same for all members of the family, + * AQCS109 however supports speeds up to 2.5G only. + */ + return phy_set_max_speed(phydev, SPEED_2500); +} + static struct phy_driver aqr_driver[] = { { PHY_ID_MATCH_MODEL(PHY_ID_AQ1202), @@ -208,6 +217,7 @@ static struct phy_driver aqr_driver[] = { .name = "Aquantia AQCS109", .aneg_done = genphy_c45_aneg_done, .get_features = genphy_c45_pma_read_abilities, + .config_init = aqcs109_config_init, .config_aneg = aqr_config_aneg, .config_intr = aqr_config_intr, .ack_interrupt = aqr_ack_interrupt, |