diff options
| author | Antoine Tenart <antoine.tenart@bootlin.com> | 2020-03-19 15:19:57 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-03-19 21:14:46 -0700 |
| commit | e8e4223046e19d4cced24a4766f3bba78d7af21c (patch) | |
| tree | adcb1b95d4917a5b8eea1c06ab90399e9ac04500 /drivers/net/phy/mscc | |
| parent | 9096a03f3cbbf9eb57b94abbd08f2fa018cedce4 (diff) | |
net: phy: mscc: add support for RGMII MAC mode
This patch adds support for connecting VSC8584 PHYs to the MAC using
RGMII.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/mscc')
| -rw-r--r-- | drivers/net/phy/mscc/mscc.h | 1 | ||||
| -rw-r--r-- | drivers/net/phy/mscc/mscc_main.c | 32 |
2 files changed, 21 insertions, 12 deletions
diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index 29ccb2c9c095..d1b8bbe8acca 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -241,6 +241,7 @@ enum rgmii_rx_clock_delay { #define MAC_CFG_MASK 0xc000 #define MAC_CFG_SGMII 0x0000 #define MAC_CFG_QSGMII 0x4000 +#define MAC_CFG_RGMII 0x8000 /* Test page Registers */ #define MSCC_PHY_TEST_PAGE_5 5 diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index bc6beec8aff0..86bb5c3c911a 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -1360,27 +1360,35 @@ static int vsc8584_config_init(struct phy_device *phydev) val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK); val &= ~MAC_CFG_MASK; - if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) + if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) { val |= MAC_CFG_QSGMII; - else + } else if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { val |= MAC_CFG_SGMII; + } else if (phy_interface_is_rgmii(phydev)) { + val |= MAC_CFG_RGMII; + } else { + ret = -EINVAL; + goto err; + } ret = phy_base_write(phydev, MSCC_PHY_MAC_CFG_FASTLINK, val); if (ret) goto err; - val = PROC_CMD_MCB_ACCESS_MAC_CONF | PROC_CMD_RST_CONF_PORT | - PROC_CMD_READ_MOD_WRITE_PORT; - if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) - val |= PROC_CMD_QSGMII_MAC; - else - val |= PROC_CMD_SGMII_MAC; + if (!phy_interface_is_rgmii(phydev)) { + val = PROC_CMD_MCB_ACCESS_MAC_CONF | PROC_CMD_RST_CONF_PORT | + PROC_CMD_READ_MOD_WRITE_PORT; + if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) + val |= PROC_CMD_QSGMII_MAC; + else + val |= PROC_CMD_SGMII_MAC; - ret = vsc8584_cmd(phydev, val); - if (ret) - goto err; + ret = vsc8584_cmd(phydev, val); + if (ret) + goto err; - usleep_range(10000, 20000); + usleep_range(10000, 20000); + } /* Disable SerDes for 100Base-FX */ ret = vsc8584_cmd(phydev, PROC_CMD_FIBER_MEDIA_CONF | |