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authorJiang Jian <jiangjian@cdjrlc.com>2022-06-22 22:48:41 +0800
committerJakub Kicinski <kuba@kernel.org>2022-06-23 20:55:27 -0700
commit7747de17f7507f26a21b17097862f0da409be111 (patch)
tree4ea9e372511d79595ac6d503fe82653ecde3f50a /drivers/net/ethernet/chelsio/cxgb4vf
parentc909e7ca494f397f51648048252d00d3dd61cefd (diff)
cxgb4/cxgb4vf: Fix typo in comments
Remove the repeated word 'and' from comments Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Link: https://lore.kernel.org/r/20220622144841.21274-1-jiangjian@cdjrlc.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4vf')
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
index d546993bda09..1c52592d3b65 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
@@ -877,7 +877,7 @@ int t4vf_get_sge_params(struct adapter *adapter)
/* T4 uses a single control field to specify both the PCIe Padding and
* Packing Boundary. T5 introduced the ability to specify these
- * separately with the Padding Boundary in SGE_CONTROL and and Packing
+ * separately with the Padding Boundary in SGE_CONTROL and Packing
* Boundary in SGE_CONTROL2. So for T5 and later we need to grab
* SGE_CONTROL in order to determine how ingress packet data will be
* laid out in Packed Buffer Mode. Unfortunately, older versions of