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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-08-25 22:31:23 +0200
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 15:50:48 +0100
commite583e654565fd12e45d8cef64dcdd80e2902ac13 (patch)
tree2b2771fa49931f229865a75060d37d3c0f625fea /drivers/media
parent82ab97c8c77629c4945de24c722cd4955cf70ef2 (diff)
media: ccs-pll: Use explicit 32-bit unsigned type
Use uint32_t instead of unsigned int for a variable that contains explicitly 32-bit numbers. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/i2c/ccs-pll.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index b23e959000a4..d33a2575329c 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -177,7 +177,7 @@ __ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
uint32_t more_mul_factor;
uint32_t min_vt_div, max_vt_div, vt_div;
uint32_t min_sys_div, max_sys_div;
- unsigned int i;
+ uint32_t i;
/*
* Get pre_pll_clk_div so that our pll_op_clk_freq_hz won't be
@@ -406,7 +406,7 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
uint16_t max_op_pre_pll_clk_div;
uint32_t lane_op_clock_ratio;
uint32_t mul, div;
- unsigned int i;
+ uint32_t i;
int rval = -EINVAL;
if (pll->flags & CCS_PLL_FLAG_NO_OP_CLOCKS) {