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authorMartin Bugge <marbugge@cisco.com>2014-02-07 05:11:03 -0300
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-02-28 14:27:57 -0300
commit8a027faf4cb2b071dcb565c94492e143f6786213 (patch)
tree9496dcf7bdb6dc6ce2432f275c12bacca5cc8328 /drivers/media/i2c
parent92cde477c0cb7fc46c4428145d91f53bb5ffc46a (diff)
[media] ths8200: Zero blanking level for RGB
Currently only RGB444 input data is supported so set to zero. Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Martin Bugge <marbugge@cisco.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/i2c')
-rw-r--r--drivers/media/i2c/ths8200.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c
index 04139eec8c4e..5c7dca31de62 100644
--- a/drivers/media/i2c/ths8200.c
+++ b/drivers/media/i2c/ths8200.c
@@ -217,8 +217,8 @@ static void ths8200_core_init(struct v4l2_subdev *sd)
/* Disable embedded syncs on the output by setting
* the amplitude to zero for all channels.
*/
- ths8200_write(sd, THS8200_DTG1_Y_SYNC_MSB, 0x2a);
- ths8200_write(sd, THS8200_DTG1_CBCR_SYNC_MSB, 0x2a);
+ ths8200_write(sd, THS8200_DTG1_Y_SYNC_MSB, 0x00);
+ ths8200_write(sd, THS8200_DTG1_CBCR_SYNC_MSB, 0x00);
}
static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)