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author | Mikko Perttunen <mperttunen@nvidia.com> | 2017-06-15 02:18:42 +0300 |
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committer | Thierry Reding <treding@nvidia.com> | 2017-06-15 14:25:38 +0200 |
commit | 8474b02531c4881a762c52ef869c52429e38633f (patch) | |
tree | 41cdb37fa4e424170bd7670e07ca0981c9f6c81f /drivers/irqchip | |
parent | 03f0de770eda7a3f2e3950ca9f15d73e1dfd4596 (diff) |
gpu: host1x: Refactor channel allocation code
This is largely a rewrite of the Host1x channel allocation code, bringing
several changes:
- The previous code could deadlock due to an interaction
between the 'reflock' mutex and CDMA timeout handling.
This gets rid of the mutex.
- Support for more than 32 channels, required for Tegra186
- General refactoring, including better encapsulation
of channel ownership handling into channel.c
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/irqchip')
0 files changed, 0 insertions, 0 deletions