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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:49 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:18 +0100
commita3e38a557a54df0edea791d7eb623515bb86e39a (patch)
tree1078300a5dc4c828affd4a84fefdb95c2ddf8775 /drivers/iio/frequency
parentb3f3f8d264b9be0cb3e50e89e3f8789a948a43bb (diff)
iio: frequency: admv1014: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: f4eb9ac7842f ("iio: frequency: admv1014: add support for ADMV1014") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Antoniu Miclaus <antoniu.miclaus@analog.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-70-jic23@kernel.org
Diffstat (limited to 'drivers/iio/frequency')
-rw-r--r--drivers/iio/frequency/admv1014.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/frequency/admv1014.c b/drivers/iio/frequency/admv1014.c
index a7994f8e6b9b..d1ccaa7ed5fe 100644
--- a/drivers/iio/frequency/admv1014.c
+++ b/drivers/iio/frequency/admv1014.c
@@ -127,7 +127,7 @@ struct admv1014_state {
unsigned int quad_se_mode;
unsigned int p1db_comp;
bool det_en;
- u8 data[3] ____cacheline_aligned;
+ u8 data[3] __aligned(IIO_DMA_MINALIGN);
};
static const int mixer_vgate_table[] = {106, 107, 108, 110, 111, 112, 113, 114,