Merge branch 'linus' into release

Conflicts:
	arch/x86/kernel/cpu/cpufreq/longhaul.c

Signed-off-by: Len Brown <len.brown@intel.com>

53 files changed, 29784 insertions, 1833 deletions

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 30022c4a5c12..4ec5061fa584 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -10,7 +10,8 @@ drm-y       :=	drm_auth.o drm_bufs.o drm_cache.o \
 		drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
 		drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
 		drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \
-		drm_crtc.o drm_crtc_helper.o drm_modes.o drm_edid.o
+		drm_crtc.o drm_crtc_helper.o drm_modes.o drm_edid.o \
+		drm_info.o drm_debugfs.o
 
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
 
diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c
index c533d0c9ec61..628eae3e9b83 100644
--- a/drivers/gpu/drm/ati_pcigart.c
+++ b/drivers/gpu/drm/ati_pcigart.c
@@ -77,7 +77,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
 			if (!entry->busaddr[i])
 				break;
 			pci_unmap_page(dev->pdev, entry->busaddr[i],
-					 PAGE_SIZE, PCI_DMA_TODEVICE);
+					 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 		}
 
 		if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
@@ -95,13 +95,14 @@ EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
 
 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
 {
+	struct drm_local_map *map = &gart_info->mapping;
 	struct drm_sg_mem *entry = dev->sg;
 	void *address = NULL;
 	unsigned long pages;
-	u32 *pci_gart, page_base;
+	u32 *pci_gart = NULL, page_base, gart_idx;
 	dma_addr_t bus_address = 0;
 	int i, j, ret = 0;
-	int max_pages;
+	int max_ati_pages, max_real_pages;
 
 	if (!entry) {
 		DRM_ERROR("no scatter/gather memory!\n");
@@ -117,6 +118,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
 			goto done;
 		}
 
+		pci_gart = gart_info->table_handle->vaddr;
 		address = gart_info->table_handle->vaddr;
 		bus_address = gart_info->table_handle->busaddr;
 	} else {
@@ -127,18 +129,23 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
 			  (unsigned long)address);
 	}
 
-	pci_gart = (u32 *) address;
 
-	max_pages = (gart_info->table_size / sizeof(u32));
-	pages = (entry->pages <= max_pages)
-	    ? entry->pages : max_pages;
+	max_ati_pages = (gart_info->table_size / sizeof(u32));
+	max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
+	pages = (entry->pages <= max_real_pages)
+	    ? entry->pages : max_real_pages;
 
-	memset(pci_gart, 0, max_pages * sizeof(u32));
+	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
+		memset(pci_gart, 0, max_ati_pages * sizeof(u32));
+	} else {
+		memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
+	}
 
+	gart_idx = 0;
 	for (i = 0; i < pages; i++) {
 		/* we need to support large memory configurations */
 		entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
-						 0, PAGE_SIZE, PCI_DMA_TODEVICE);
+						 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 		if (entry->busaddr[i] == 0) {
 			DRM_ERROR("unable to map PCIGART pages!\n");
 			drm_ati_pcigart_cleanup(dev, gart_info);
@@ -149,19 +156,26 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
 		page_base = (u32) entry->busaddr[i];
 
 		for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
+			u32 val;
+
 			switch(gart_info->gart_reg_if) {
 			case DRM_ATI_GART_IGP:
-				*pci_gart = cpu_to_le32((page_base) | 0xc);
+				val = page_base | 0xc;
 				break;
 			case DRM_ATI_GART_PCIE:
-				*pci_gart = cpu_to_le32((page_base >> 8) | 0xc);
+				val = (page_base >> 8) | 0xc;
 				break;
 			default:
 			case DRM_ATI_GART_PCI:
-				*pci_gart = cpu_to_le32(page_base);
+				val = page_base;
 				break;
 			}
-			pci_gart++;
+			if (gart_info->gart_table_location ==
+			    DRM_ATI_GART_MAIN)
+				pci_gart[gart_idx] = cpu_to_le32(val);
+			else
+				DRM_WRITE32(map, gart_idx * sizeof(u32), val);
+			gart_idx++;
 			page_base += ATI_PCIGART_PAGE_SIZE;
 		}
 	}
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 12715d3c078d..6d80d17f1e96 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -34,15 +34,17 @@
  */
 
 #include <linux/vmalloc.h>
+#include <linux/log2.h>
+#include <asm/shmparam.h>
 #include "drmP.h"
 
-unsigned long drm_get_resource_start(struct drm_device *dev, unsigned int resource)
+resource_size_t drm_get_resource_start(struct drm_device *dev, unsigned int resource)
 {
 	return pci_resource_start(dev->pdev, resource);
 }
 EXPORT_SYMBOL(drm_get_resource_start);
 
-unsigned long drm_get_resource_len(struct drm_device *dev, unsigned int resource)
+resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned int resource)
 {
 	return pci_resource_len(dev->pdev, resource);
 }
@@ -50,24 +52,44 @@ unsigned long drm_get_resource_len(struct drm_device *dev, unsigned int resource
 EXPORT_SYMBOL(drm_get_resource_len);
 
 static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
-					     drm_local_map_t *map)
+						  struct drm_local_map *map)
 {
 	struct drm_map_list *entry;
 	list_for_each_entry(entry, &dev->maplist, head) {
-		if (entry->map && (entry->master == dev->primary->master) && (map->type == entry->map->type) &&
-		    ((entry->map->offset == map->offset) ||
-		     ((map->type == _DRM_SHM) && (map->flags&_DRM_CONTAINS_LOCK)))) {
+		/*
+		 * Because the kernel-userspace ABI is fixed at a 32-bit offset
+		 * while PCI resources may live above that, we ignore the map
+		 * offset for maps of type _DRM_FRAMEBUFFER or _DRM_REGISTERS.
+		 * It is assumed that each driver will have only one resource of
+		 * each type.
+		 */
+		if (!entry->map ||
+		    map->type != entry->map->type ||
+		    entry->master != dev->primary->master)
+			continue;
+		switch (map->type) {
+		case _DRM_SHM:
+			if (map->flags != _DRM_CONTAINS_LOCK)
+				break;
+		case _DRM_REGISTERS:
+		case _DRM_FRAME_BUFFER:
 			return entry;
+		default: /* Make gcc happy */
+			;
 		}
+		if (entry->map->offset == map->offset)
+			return entry;
 	}
 
 	return NULL;
 }
 
 static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash,
-			  unsigned long user_token, int hashed_handle)
+			  unsigned long user_token, int hashed_handle, int shm)
 {
-	int use_hashed_handle;
+	int use_hashed_handle, shift;
+	unsigned long add;
+
 #if (BITS_PER_LONG == 64)
 	use_hashed_handle = ((user_token & 0xFFFFFFFF00000000UL) || hashed_handle);
 #elif (BITS_PER_LONG == 32)
@@ -83,30 +105,47 @@ static int drm_map_handle(struct drm_device *dev, struct drm_hash_item *hash,
 		if (ret != -EINVAL)
 			return ret;
 	}
+
+	shift = 0;
+	add = DRM_MAP_HASH_OFFSET >> PAGE_SHIFT;
+	if (shm && (SHMLBA > PAGE_SIZE)) {
+		int bits = ilog2(SHMLBA >> PAGE_SHIFT) + 1;
+
+		/* For shared memory, we have to preserve the SHMLBA
+		 * bits of the eventual vma->vm_pgoff value during
+		 * mmap().  Otherwise we run into cache aliasing problems
+		 * on some platforms.  On these platforms, the pgoff of
+		 * a mmap() request is used to pick a suitable virtual
+		 * address for the mmap() region such that it will not
+		 * cause cache aliasing problems.
+		 *
+		 * Therefore, make sure the SHMLBA relevant bits of the
+		 * hash value we use are equal to those in the original
+		 * kernel virtual address.
+		 */
+		shift = bits;
+		add |= ((user_token >> PAGE_SHIFT) & ((1UL << bits) - 1UL));
+	}
+
 	return drm_ht_just_insert_please(&dev->map_hash, hash,
 					 user_token, 32 - PAGE_SHIFT - 3,
-					 0, DRM_MAP_HASH_OFFSET >> PAGE_SHIFT);
+					 shift, add);
 }
 
 /**
- * Ioctl to specify a range of memory that is available for mapping by a non-root process.
- *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a drm_map structure.
- * \return zero on success or a negative value on error.
+ * Core function to create a range of memory available for mapping by a
+ * non-root process.
  *
  * Adjusts the memory offset to its absolute value according to the mapping
  * type.  Adds the map to the map list drm_device::maplist. Adds MTRR's where
  * applicable and if supported by the kernel.
  */
-static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
+static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
 			   unsigned int size, enum drm_map_type type,
 			   enum drm_map_flags flags,
 			   struct drm_map_list ** maplist)
 {
-	struct drm_map *map;
+	struct drm_local_map *map;
 	struct drm_map_list *list;
 	drm_dma_handle_t *dmah;
 	unsigned long user_token;
@@ -129,9 +168,9 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
 		drm_free(map, sizeof(*map), DRM_MEM_MAPS);
 		return -EINVAL;
 	}
-	DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n",
-		  map->offset, map->size, map->type);
-	if ((map->offset & (~PAGE_MASK)) || (map->size & (~PAGE_MASK))) {
+	DRM_DEBUG("offset = 0x%08llx, size = 0x%08lx, type = %d\n",
+		  (unsigned long long)map->offset, map->size, map->type);
+	if ((map->offset & (~(resource_size_t)PAGE_MASK)) || (map->size & (~PAGE_MASK))) {
 		drm_free(map, sizeof(*map), DRM_MEM_MAPS);
 		return -EINVAL;
 	}
@@ -259,7 +298,8 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
 			drm_free(map, sizeof(*map), DRM_MEM_MAPS);
 			return -EPERM;
 		}
-		DRM_DEBUG("AGP offset = 0x%08lx, size = 0x%08lx\n", map->offset, map->size);
+		DRM_DEBUG("AGP offset = 0x%08llx, size = 0x%08lx\n",
+			  (unsigned long long)map->offset, map->size);
 
 		break;
 	case _DRM_GEM:
@@ -309,7 +349,8 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
 	/* We do it here so that dev->struct_mutex protects the increment */
 	user_token = (map->type == _DRM_SHM) ? (unsigned long)map->handle :
 		map->offset;
-	ret = drm_map_handle(dev, &list->hash, user_token, 0);
+	ret = drm_map_handle(dev, &list->hash, user_token, 0,
+			     (map->type == _DRM_SHM));
 	if (ret) {
 		if (map->type == _DRM_REGISTERS)
 			iounmap(map->handle);
@@ -327,9 +368,9 @@ static int drm_addmap_core(struct drm_device * dev, unsigned int offset,
 	return 0;
 	}
 
-int drm_addmap(struct drm_device * dev, unsigned int offset,
+int drm_addmap(struct drm_device * dev, resource_size_t offset,
 	       unsigned int size, enum drm_map_type type,
-	       enum drm_map_flags flags, drm_local_map_t ** map_ptr)
+	       enum drm_map_flags flags, struct drm_local_map ** map_ptr)
 {
 	struct drm_map_list *list;
 	int rc;
@@ -342,6 +383,17 @@ int drm_addmap(struct drm_device * dev, unsigned int offset,
 
 EXPORT_SYMBOL(drm_addmap);
 
+/**
+ * Ioctl to specify a range of memory that is available for mapping by a
+ * non-root process.
+ *
+ * \param inode device inode.
+ * \param file_priv DRM file private.
+ * \param cmd command.
+ * \param arg pointer to a drm_map structure.
+ * \return zero on success or a negative value on error.
+ *
+ */
 int drm_addmap_ioctl(struct drm_device *dev, void *data,
 		     struct drm_file *file_priv)
 {
@@ -367,19 +419,13 @@ int drm_addmap_ioctl(struct drm_device *dev, void *data,
  * Remove a map private from list and deallocate resources if the mapping
  * isn't in use.
  *
- * \param inode device inode.
- * \param file_priv DRM file private.
- * \param cmd command.
- * \param arg pointer to a struct drm_map structure.
- * \return zero on success or a negative value on error.
- *
  * Searches the map on drm_device::maplist, removes it from the list, see if
  * its being used, and free any associate resource (such as MTRR's) if it's not
  * being on use.
  *
  * \sa drm_addmap
  */
-int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map)
+int drm_rmmap_locked(struct drm_device *dev, struct drm_local_map *map)
 {
 	struct drm_map_list *r_list = NULL, *list_t;
 	drm_dma_handle_t dmah;
@@ -442,7 +488,7 @@ int drm_rmmap_locked(struct drm_device *dev, drm_local_map_t *map)
 }
 EXPORT_SYMBOL(drm_rmmap_locked);
 
-int drm_rmmap(struct drm_device *dev, drm_local_map_t *map)
+int drm_rmmap(struct drm_device *dev, struct drm_local_map *map)
 {
 	int ret;
 
@@ -462,12 +508,18 @@ EXPORT_SYMBOL(drm_rmmap);
  * One use case might be after addmap is allowed for normal users for SHM and
  * gets used by drivers that the server doesn't need to care about.  This seems
  * unlikely.
+ *
+ * \param inode device inode.
+ * \param file_priv DRM file private.
+ * \param cmd command.
+ * \param arg pointer to a struct drm_map structure.
+ * \return zero on success or a negative value on error.
  */
 int drm_rmmap_ioctl(struct drm_device *dev, void *data,
 		    struct drm_file *file_priv)
 {
 	struct drm_map *request = data;
-	drm_local_map_t *map = NULL;
+	struct drm_local_map *map = NULL;
 	struct drm_map_list *r_list;
 	int ret;
 
@@ -1534,7 +1586,7 @@ int drm_mapbufs(struct drm_device *dev, void *data,
 			&& (dma->flags & _DRM_DMA_USE_SG))
 		    || (drm_core_check_feature(dev, DRIVER_FB_DMA)
 			&& (dma->flags & _DRM_DMA_USE_FB))) {
-			struct drm_map *map = dev->agp_buffer_map;
+			struct drm_local_map *map = dev->agp_buffer_map;
 			unsigned long token = dev->agp_buffer_token;
 
 			if (!map) {
diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c
index 809ec0f03452..7d1e53c10d4b 100644
--- a/drivers/gpu/drm/drm_context.c
+++ b/drivers/gpu/drm/drm_context.c
@@ -143,7 +143,7 @@ int drm_getsareactx(struct drm_device *dev, void *data,
 		    struct drm_file *file_priv)
 {
 	struct drm_ctx_priv_map *request = data;
-	struct drm_map *map;
+	struct drm_local_map *map;
 	struct drm_map_list *_entry;
 
 	mutex_lock(&dev->struct_mutex);
@@ -186,7 +186,7 @@ int drm_setsareactx(struct drm_device *dev, void *data,
 		    struct drm_file *file_priv)
 {
 	struct drm_ctx_priv_map *request = data;
-	struct drm_map *map = NULL;
+	struct drm_local_map *map = NULL;
 	struct drm_map_list *r_list = NULL;
 
 	mutex_lock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 1c3a8c557140..a04639dc633d 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -42,6 +42,26 @@ static struct drm_display_mode std_modes[] = {
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
+static void drm_mode_validate_flag(struct drm_connector *connector,
+				   int flags)
+{
+	struct drm_display_mode *mode, *t;
+
+	if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE))
+		return;
+
+	list_for_each_entry_safe(mode, t, &connector->modes, head) {
+		if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+				!(flags & DRM_MODE_FLAG_INTERLACE))
+			mode->status = MODE_NO_INTERLACE;
+		if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
+				!(flags & DRM_MODE_FLAG_DBLSCAN))
+			mode->status = MODE_NO_DBLESCAN;
+	}
+
+	return;
+}
+
 /**
  * drm_helper_probe_connector_modes - get complete set of display modes
  * @dev: DRM device
@@ -72,6 +92,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
 	struct drm_connector_helper_funcs *connector_funcs =
 		connector->helper_private;
 	int count = 0;
+	int mode_flags = 0;
 
 	DRM_DEBUG("%s\n", drm_get_connector_name(connector));
 	/* set all modes to the unverified state */
@@ -96,6 +117,13 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
 	if (maxX && maxY)
 		drm_mode_validate_size(dev, &connector->modes, maxX,
 				       maxY, 0);
+
+	if (connector->interlace_allowed)
+		mode_flags |= DRM_MODE_FLAG_INTERLACE;
+	if (connector->doublescan_allowed)
+		mode_flags |= DRM_MODE_FLAG_DBLSCAN;
+	drm_mode_validate_flag(connector, mode_flags);
+
 	list_for_each_entry_safe(mode, t, &connector->modes, head) {
 		if (mode->status == MODE_OK)
 			mode->status = connector_funcs->mode_valid(connector,
@@ -885,7 +913,6 @@ bool drm_helper_plugged_event(struct drm_device *dev)
 /**
  * drm_initial_config - setup a sane initial connector configuration
  * @dev: DRM device
- * @can_grow: this configuration is growable
  *
  * LOCKING:
  * Called at init time, must take mode config lock.
@@ -897,7 +924,7 @@ bool drm_helper_plugged_event(struct drm_device *dev)
  * RETURNS:
  * Zero if everything went ok, nonzero otherwise.
  */
-bool drm_helper_initial_config(struct drm_device *dev, bool can_grow)
+bool drm_helper_initial_config(struct drm_device *dev)
 {
 	struct drm_connector *connector;
 	int count = 0;
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
new file mode 100644
index 000000000000..c77c6c6d9d2c
--- /dev/null
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -0,0 +1,235 @@
+/**
+ * \file drm_debugfs.c
+ * debugfs support for DRM
+ *
+ * \author Ben Gamari <bgamari@gmail.com>
+ */
+
+/*
+ * Created: Sun Dec 21 13:08:50 2008 by bgamari@gmail.com
+ *
+ * Copyright 2008 Ben Gamari <bgamari@gmail.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include "drmP.h"
+
+#if defined(CONFIG_DEBUG_FS)
+
+/***************************************************
+ * Initialization, etc.
+ **************************************************/
+
+static struct drm_info_list drm_debugfs_list[] = {
+	{"name", drm_name_info, 0},
+	{"vm", drm_vm_info, 0},
+	{"clients", drm_clients_info, 0},
+	{"queues", drm_queues_info, 0},
+	{"bufs", drm_bufs_info, 0},
+	{"gem_names", drm_gem_name_info, DRIVER_GEM},
+	{"gem_objects", drm_gem_object_info, DRIVER_GEM},
+#if DRM_DEBUG_CODE
+	{"vma", drm_vma_info, 0},
+#endif
+};
+#define DRM_DEBUGFS_ENTRIES ARRAY_SIZE(drm_debugfs_list)
+
+
+static int drm_debugfs_open(struct inode *inode, struct file *file)
+{
+	struct drm_info_node *node = inode->i_private;
+
+	return single_open(file, node->info_ent->show, node);
+}
+
+
+static const struct file_operations drm_debugfs_fops = {
+	.owner = THIS_MODULE,
+	.open = drm_debugfs_open,
+	.read = seq_read,
+	.llseek = seq_lseek,
+	.release = single_release,
+};
+
+
+/**
+ * Initialize a given set of debugfs files for a device
+ *
+ * \param files The array of files to create
+ * \param count The number of files given
+ * \param root DRI debugfs dir entry.
+ * \param minor device minor number
+ * \return Zero on success, non-zero on failure
+ *
+ * Create a given set of debugfs files represented by an array of
+ * gdm_debugfs_lists in the given root directory.
+ */
+int drm_debugfs_create_files(struct drm_info_list *files, int count,
+			     struct dentry *root, struct drm_minor *minor)
+{
+	struct drm_device *dev = minor->dev;
+	struct dentry *ent;
+	struct drm_info_node *tmp;
+	char name[64];
+	int i, ret;
+
+	for (i = 0; i < count; i++) {
+		u32 features = files[i].driver_features;
+
+		if (features != 0 &&
+		    (dev->driver->driver_features & features) != features)
+			continue;
+
+		tmp = drm_alloc(sizeof(struct drm_info_node),
+				_DRM_DRIVER);
+		ent = debugfs_create_file(files[i].name, S_IFREG | S_IRUGO,
+					  root, tmp, &drm_debugfs_fops);
+		if (!ent) {
+			DRM_ERROR("Cannot create /debugfs/dri/%s/%s\n",
+				  name, files[i].name);
+			drm_free(tmp, sizeof(struct drm_info_node),
+				 _DRM_DRIVER);
+			ret = -1;
+			goto fail;
+		}
+
+		tmp->minor = minor;
+		tmp->dent = ent;
+		tmp->info_ent = &files[i];
+		list_add(&(tmp->list), &(minor->debugfs_nodes.list));
+	}
+	return 0;
+
+fail:
+	drm_debugfs_remove_files(files, count, minor);
+	return ret;
+}
+EXPORT_SYMBOL(drm_debugfs_create_files);
+
+/**
+ * Initialize the DRI debugfs filesystem for a device
+ *
+ * \param dev DRM device
+ * \param minor device minor number
+ * \param root DRI debugfs dir entry.
+ *
+ * Create the DRI debugfs root entry "/debugfs/dri", the device debugfs root entry
+ * "/debugfs/dri/%minor%/", and each entry in debugfs_list as
+ * "/debugfs/dri/%minor%/%name%".
+ */
+int drm_debugfs_init(struct drm_minor *minor, int minor_id,
+		     struct dentry *root)
+{
+	struct drm_device *dev = minor->dev;
+	char name[64];
+	int ret;
+
+	INIT_LIST_HEAD(&minor->debugfs_nodes.list);
+	sprintf(name, "%d", minor_id);
+	minor->debugfs_root = debugfs_create_dir(name, root);
+	if (!minor->debugfs_root) {
+		DRM_ERROR("Cannot create /debugfs/dri/%s\n", name);
+		return -1;
+	}
+
+	ret = drm_debugfs_create_files(drm_debugfs_list, DRM_DEBUGFS_ENTRIES,
+				       minor->debugfs_root, minor);
+	if (ret) {
+		debugfs_remove(minor->debugfs_root);
+		minor->debugfs_root = NULL;
+		DRM_ERROR("Failed to create core drm debugfs files\n");
+		return ret;
+	}
+
+	if (dev->driver->debugfs_init) {
+		ret = dev->driver->debugfs_init(minor);
+		if (ret) {
+			DRM_ERROR("DRM: Driver failed to initialize "
+				  "/debugfs/dri.\n");
+			return ret;
+		}
+	}
+	return 0;
+}
+
+
+/**
+ * Remove a list of debugfs files
+ *
+ * \param files The list of files
+ * \param count The number of files
+ * \param minor The minor of which we should remove the files
+ * \return always zero.
+ *
+ * Remove all debugfs entries created by debugfs_init().
+ */
+int drm_debugfs_remove_files(struct drm_info_list *files, int count,
+			     struct drm_minor *minor)
+{
+	struct list_head *pos, *q;
+	struct drm_info_node *tmp;
+	int i;
+
+	for (i = 0; i < count; i++) {
+		list_for_each_safe(pos, q, &minor->debugfs_nodes.list) {
+			tmp = list_entry(pos, struct drm_info_node, list);
+			if (tmp->info_ent == &files[i]) {
+				debugfs_remove(tmp->dent);
+				list_del(pos);
+				drm_free(tmp, sizeof(struct drm_info_node),
+					 _DRM_DRIVER);
+			}
+		}
+	}
+	return 0;
+}
+EXPORT_SYMBOL(drm_debugfs_remove_files);
+
+/**
+ * Cleanup the debugfs filesystem resources.
+ *
+ * \param minor device minor number.
+ * \return always zero.
+ *
+ * Remove all debugfs entries created by debugfs_init().
+ */
+int drm_debugfs_cleanup(struct drm_minor *minor)
+{
+	struct drm_device *dev = minor->dev;
+
+	if (!minor->debugfs_root)
+		return 0;
+
+	if (dev->driver->debugfs_cleanup)
+		dev->driver->debugfs_cleanup(minor);
+
+	drm_debugfs_remove_files(drm_debugfs_list, DRM_DEBUGFS_ENTRIES, minor);
+
+	debugfs_remove(minor->debugfs_root);
+	minor->debugfs_root = NULL;
+
+	return 0;
+}
+
+#endif /* CONFIG_DEBUG_FS */
+
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 14c7a23dc157..c4ada8b6295b 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -46,9 +46,11 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <linux/debugfs.h>
 #include "drmP.h"
 #include "drm_core.h"
 
+
 static int drm_version(struct drm_device *dev, void *data,
 		       struct drm_file *file_priv);
 
@@ -178,7 +180,7 @@ int drm_lastclose(struct drm_device * dev)
 
 	/* Clear AGP information */
 	if (drm_core_has_AGP(dev) && dev->agp &&
-	    !drm_core_check_feature(dev, DRIVER_MODESET)) {
+			!drm_core_check_feature(dev, DRIVER_MODESET)) {
 		struct drm_agp_mem *entry, *tempe;
 
 		/* Remove AGP resources, but leave dev->agp
@@ -252,15 +254,19 @@ int drm_lastclose(struct drm_device * dev)
 int drm_init(struct drm_driver *driver)
 {
 	struct pci_dev *pdev = NULL;
-	struct pci_device_id *pid;
+	const struct pci_device_id *pid;
 	int i;
 
 	DRM_DEBUG("\n");
 
 	INIT_LIST_HEAD(&driver->device_list);
 
+	if (driver->driver_features & DRIVER_MODESET)
+		return pci_register_driver(&driver->pci_driver);
+
+	/* If not using KMS, fall back to stealth mode manual scanning. */
 	for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) {
-		pid = (struct pci_device_id *)&driver->pci_driver.id_table[i];
+		pid = &driver->pci_driver.id_table[i];
 
 		/* Loop around setting up a DRM device for each PCI device
 		 * matching our ID and device class.  If we had the internal
@@ -285,68 +291,17 @@ int drm_init(struct drm_driver *driver)
 
 EXPORT_SYMBOL(drm_init);
 
-/**
- * Called via cleanup_module() at module unload time.
- *
- * Cleans up all DRM device, calling drm_lastclose().
- *
- * \sa drm_init
- */
-static void drm_cleanup(struct drm_device * dev)
-{
-	struct drm_map_list *r_list, *list_temp;
-	DRM_DEBUG("\n");
-
-	if (!dev) {
-		DRM_ERROR("cleanup called no dev\n");
-		return;
-	}
-
-	drm_vblank_cleanup(dev);
-
-	drm_lastclose(dev);
-
-	if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
-	    dev->agp && dev->agp->agp_mtrr >= 0) {
-		int retval;
-		retval = mtrr_del(dev->agp->agp_mtrr,
-				  dev->agp->agp_info.aper_base,
-				  dev->agp->agp_info.aper_size * 1024 * 1024);
-		DRM_DEBUG("mtrr_del=%d\n", retval);
-	}
-
-	if (dev->driver->unload)
-		dev->driver->unload(dev);
-
-	if (drm_core_has_AGP(dev) && dev->agp) {
-		drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
-		dev->agp = NULL;
-	}
-
-	drm_ht_remove(&dev->map_hash);
-	drm_ctxbitmap_cleanup(dev);
-
-	list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head)
-		drm_rmmap(dev, r_list->map);
-
-	if (drm_core_check_feature(dev, DRIVER_MODESET))
-		drm_put_minor(&dev->control);
-
-	if (dev->driver->driver_features & DRIVER_GEM)
-		drm_gem_destroy(dev);
-
-	drm_put_minor(&dev->primary);
-	if (drm_put_dev(dev))
-		DRM_ERROR("Cannot unload module\n");
-}
-
 void drm_exit(struct drm_driver *driver)
 {
 	struct drm_device *dev, *tmp;
 	DRM_DEBUG("\n");
 
-	list_for_each_entry_safe(dev, tmp, &driver->device_list, driver_item)
-		drm_cleanup(dev);
+	if (driver->driver_features & DRIVER_MODESET) {
+		pci_unregister_driver(&driver->pci_driver);
+	} else {
+		list_for_each_entry_safe(dev, tmp, &driver->device_list, driver_item)
+			drm_put_dev(dev);
+	}
 
 	DRM_INFO("Module unloaded\n");
 }
@@ -382,6 +337,13 @@ static int __init drm_core_init(void)
 		goto err_p3;
 	}
 
+	drm_debugfs_root = debugfs_create_dir("dri", NULL);
+	if (!drm_debugfs_root) {
+		DRM_ERROR("Cannot create /debugfs/dri\n");
+		ret = -1;
+		goto err_p3;
+	}
+
 	drm_mem_init();
 
 	DRM_INFO("Initialized %s %d.%d.%d %s\n",
@@ -400,6 +362,7 @@ err_p1:
 static void __exit drm_core_exit(void)
 {
 	remove_proc_entry("dri", NULL);
+	debugfs_remove(drm_debugfs_root);
 	drm_sysfs_destroy();
 
 	unregister_chrdev(DRM_MAJOR, "drm");
@@ -458,6 +421,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
 	drm_ioctl_t *func;
 	unsigned int nr = DRM_IOCTL_NR(cmd);
 	int retcode = -EINVAL;
+	char stack_kdata[128];
 	char *kdata = NULL;
 
 	atomic_inc(&dev->ioctl_count);
@@ -496,10 +460,14 @@ int drm_ioctl(struct inode *inode, struct file *filp,
 		retcode = -EACCES;
 	} else {
 		if (cmd & (IOC_IN | IOC_OUT)) {
-			kdata = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
-			if (!kdata) {
-				retcode = -ENOMEM;
-				goto err_i1;
+			if (_IOC_SIZE(cmd) <= sizeof(stack_kdata)) {
+				kdata = stack_kdata;
+			} else {
+				kdata = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL);
+				if (!kdata) {
+					retcode = -ENOMEM;
+					goto err_i1;
+				}
 			}
 		}
 
@@ -520,7 +488,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
 	}
 
       err_i1:
-	if (kdata)
+	if (kdata != stack_kdata)
 		kfree(kdata);
 	atomic_dec(&dev->ioctl_count);
 	if (retcode)
@@ -530,7 +498,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
 
 EXPORT_SYMBOL(drm_ioctl);
 
-drm_local_map_t *drm_getsarea(struct drm_device *dev)
+struct drm_local_map *drm_getsarea(struct drm_device *dev)
 {
 	struct drm_map_list *entry;
 
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a839a28d8ee6..ca9c61656714 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -125,10 +125,8 @@ static bool edid_is_valid(struct edid *edid)
 		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
 		goto bad;
 	}
-	if (edid->revision > 3) {
-		DRM_ERROR("EDID has minor version %d, which is not between 0-3\n", edid->revision);
-		goto bad;
-	}
+	if (edid->revision > 4)
+		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
 
 	for (i = 0; i < EDID_LENGTH; i++)
 		csum += raw_edid[i];
@@ -162,7 +160,7 @@ static bool edid_vendor(struct edid *edid, char *vendor)
 	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
 	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
 			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
-	edid_vendor[2] = (edid->mfg_id[2] & 0x1f) + '@';
+	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
 
 	return !strncmp(edid_vendor, vendor, 3);
 }
@@ -550,11 +548,20 @@ static int add_detailed_info(struct drm_connector *connector,
 }
 
 #define DDC_ADDR 0x50
-
-unsigned char *drm_do_probe_ddc_edid(struct i2c_adapter *adapter)
+/**
+ * Get EDID information via I2C.
+ *
+ * \param adapter : i2c device adaptor
+ * \param buf     : EDID data buffer to be filled
+ * \param len     : EDID data buffer length
+ * \return 0 on success or -1 on failure.
+ *
+ * Try to fetch EDID information by calling i2c driver function.
+ */
+int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
+			  unsigned char *buf, int len)
 {
 	unsigned char start = 0x0;
-	unsigned char *buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
 	struct i2c_msg msgs[] = {
 		{
 			.addr	= DDC_ADDR,
@@ -564,31 +571,36 @@ unsigned char *drm_do_probe_ddc_edid(struct i2c_adapter *adapter)
 		}, {
 			.addr	= DDC_ADDR,
 			.flags	= I2C_M_RD,
-			.len	= EDID_LENGTH,
+			.len	= len,
 			.buf	= buf,
 		}
 	};
 
-	if (!buf) {
-		dev_warn(&adapter->dev, "unable to allocate memory for EDID "
-			 "block.\n");
-		return NULL;
-	}
-
 	if (i2c_transfer(adapter, msgs, 2) == 2)
-		return buf;
+		return 0;
 
 	dev_info(&adapter->dev, "unable to read EDID block.\n");
-	kfree(buf);
-	return NULL;
+	return -1;
 }
 EXPORT_SYMBOL(drm_do_probe_ddc_edid);
 
-static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
+/**
+ * Get EDID information.
+ *
+ * \param adapter : i2c device adaptor.
+ * \param buf     : EDID data buffer to be filled
+ * \param len     : EDID data buffer length
+ * \return 0 on success or -1 on failure.
+ *
+ * Initialize DDC, then fetch EDID information
+ * by calling drm_do_probe_ddc_edid function.
+ */
+static int drm_ddc_read(struct i2c_adapter *adapter,
+			unsigned char *buf, int len)
 {
 	struct i2c_algo_bit_data *algo_data = adapter->algo_data;
-	unsigned char *edid = NULL;
 	int i, j;
+	int ret = -1;
 
 	algo_data->setscl(algo_data->data, 1);
 
@@ -616,7 +628,7 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
 		msleep(15);
 
 		/* Do the real work */
-		edid = drm_do_probe_ddc_edid(adapter);
+		ret = drm_do_probe_ddc_edid(adapter, buf, len);
 		algo_data->setsda(algo_data->data, 0);
 		algo_data->setscl(algo_data->data, 0);
 		msleep(15);
@@ -632,7 +644,7 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
 		msleep(15);
 		algo_data->setscl(algo_data->data, 0);
 		algo_data->setsda(algo_data->data, 0);
-		if (edid)
+		if (ret == 0)
 			break;
 	}
 	/* Release the DDC lines when done or the Apple Cinema HD display
@@ -641,9 +653,31 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
 	algo_data->setsda(algo_data->data, 1);
 	algo_data->setscl(algo_data->data, 1);
 
-	return edid;
+	return ret;
 }
 
+static int drm_ddc_read_edid(struct drm_connector *connector,
+			     struct i2c_adapter *adapter,
+			     char *buf, int len)
+{
+	int ret;
+
+	ret = drm_ddc_read(adapter, buf, len);
+	if (ret != 0) {
+		dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n",
+			 drm_get_connector_name(connector));
+		goto end;
+	}
+	if (!edid_is_valid((struct edid *)buf)) {
+		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
+			 drm_get_connector_name(connector));
+		ret = -1;
+	}
+end:
+	return ret;
+}
+
+#define MAX_EDID_EXT_NUM 4
 /**
  * drm_get_edid - get EDID data, if available
  * @connector: connector we're probing
@@ -656,27 +690,118 @@ static unsigned char *drm_ddc_read(struct i2c_adapter *adapter)
 struct edid *drm_get_edid(struct drm_connector *connector,
 			  struct i2c_adapter *adapter)
 {
+	int ret;
 	struct edid *edid;
 
-	edid = (struct edid *)drm_ddc_read(adapter);
-	if (!edid) {
-		dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n",
-			 drm_get_connector_name(connector));
-		return NULL;
+	edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
+		       GFP_KERNEL);
+	if (edid == NULL) {
+		dev_warn(&connector->dev->pdev->dev,
+			 "Failed to allocate EDID\n");
+		goto end;
 	}
-	if (!edid_is_valid(edid)) {
-		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
-			 drm_get_connector_name(connector));
-		kfree(edid);
-		return NULL;
+
+	/* Read first EDID block */
+	ret = drm_ddc_read_edid(connector, adapter,
+				(unsigned char *)edid, EDID_LENGTH);
+	if (ret != 0)
+		goto clean_up;
+
+	/* There are EDID extensions to be read */
+	if (edid->extensions != 0) {
+		int edid_ext_num = edid->extensions;
+
+		if (edid_ext_num > MAX_EDID_EXT_NUM) {
+			dev_warn(&connector->dev->pdev->dev,
+				 "The number of extension(%d) is "
+				 "over max (%d), actually read number (%d)\n",
+				 edid_ext_num, MAX_EDID_EXT_NUM,
+				 MAX_EDID_EXT_NUM);
+			/* Reset EDID extension number to be read */
+			edid_ext_num = MAX_EDID_EXT_NUM;
+		}
+		/* Read EDID including extensions too */
+		ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
+					EDID_LENGTH * (edid_ext_num + 1));
+		if (ret != 0)
+			goto clean_up;
+
 	}
 
 	connector->display_info.raw_edid = (char *)edid;
+	goto end;
 
+clean_up:
+	kfree(edid);
+	edid = NULL;
+end:
 	return edid;
+
 }
 EXPORT_SYMBOL(drm_get_edid);
 
+#define HDMI_IDENTIFIER 0x000C03
+#define VENDOR_BLOCK    0x03
+/**
+ * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
+ * @edid: monitor EDID information
+ *
+ * Parse the CEA extension according to CEA-861-B.
+ * Return true if HDMI, false if not or unknown.
+ */
+bool drm_detect_hdmi_monitor(struct edid *edid)
+{
+	char *edid_ext = NULL;
+	int i, hdmi_id, edid_ext_num;
+	int start_offset, end_offset;
+	bool is_hdmi = false;
+
+	/* No EDID or EDID extensions */
+	if (edid == NULL || edid->extensions == 0)
+		goto end;
+
+	/* Chose real EDID extension number */
+	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
+		       MAX_EDID_EXT_NUM : edid->extensions;
+
+	/* Find CEA extension */
+	for (i = 0; i < edid_ext_num; i++) {
+		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
+		/* This block is CEA extension */
+		if (edid_ext[0] == 0x02)
+			break;
+	}
+
+	if (i == edid_ext_num)
+		goto end;
+
+	/* Data block offset in CEA extension block */
+	start_offset = 4;
+	end_offset = edid_ext[2];
+
+	/*
+	 * Because HDMI identifier is in Vendor Specific Block,
+	 * search it from all data blocks of CEA extension.
+	 */
+	for (i = start_offset; i < end_offset;
+		/* Increased by data block len */
+		i += ((edid_ext[i] & 0x1f) + 1)) {
+		/* Find vendor specific block */
+		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
+			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
+				  edid_ext[i + 3] << 16;
+			/* Find HDMI identifier */
+			if (hdmi_id == HDMI_IDENTIFIER)
+				is_hdmi = true;
+			break;
+		}
+	}
+
+end:
+	return is_hdmi;
+}
+EXPORT_SYMBOL(drm_detect_hdmi_monitor);
+
 /**
  * drm_add_edid_modes - add modes from EDID data, if available
  * @connector: connector we're probing
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index f52663ebe016..09a3571c9908 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -274,6 +274,7 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
 		/* create a new master */
 		priv->minor->master = drm_master_create(priv->minor);
 		if (!priv->minor->master) {
+			mutex_unlock(&dev->struct_mutex);
 			ret = -ENOMEM;
 			goto out_free;
 		}
@@ -337,14 +338,10 @@ int drm_fasync(int fd, struct file *filp, int on)
 {
 	struct drm_file *priv = filp->private_data;
 	struct drm_device *dev = priv->minor->dev;
-	int retcode;
 
 	DRM_DEBUG("fd = %d, device = 0x%lx\n", fd,
 		  (long)old_encode_dev(priv->minor->device));
-	retcode = fasync_helper(fd, filp, on, &dev->buf_async);
-	if (retcode < 0)
-		return retcode;
-	return 0;
+	return fasync_helper(fd, filp, on, &dev->buf_async);
 }
 EXPORT_SYMBOL(drm_fasync);
 
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 88d3368ffddd..4984aa89cf3d 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -502,10 +502,9 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	struct drm_file *priv = filp->private_data;
 	struct drm_device *dev = priv->minor->dev;
 	struct drm_gem_mm *mm = dev->mm_private;
-	struct drm_map *map = NULL;
+	struct drm_local_map *map = NULL;
 	struct drm_gem_object *obj;
 	struct drm_hash_item *hash;
-	unsigned long prot;
 	int ret = 0;
 
 	mutex_lock(&dev->struct_mutex);
@@ -538,11 +537,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	vma->vm_ops = obj->dev->driver->gem_vm_ops;
 	vma->vm_private_data = map->handle;
 	/* FIXME: use pgprot_writecombine when available */
-	prot = pgprot_val(vma->vm_page_prot);
-#ifdef CONFIG_X86
-	prot |= _PAGE_CACHE_WC;
-#endif
-	vma->vm_page_prot = __pgprot(prot);
+	vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 
 	/* Take a ref for this mapping of the object, so that the fault
 	 * handler can dereference the mmap offset's pointer to the object.
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
new file mode 100644
index 000000000000..f0f6c6b93f3a
--- /dev/null
+++ b/drivers/gpu/drm/drm_info.c
@@ -0,0 +1,328 @@
+/**
+ * \file drm_info.c
+ * DRM info file implementations
+ *
+ * \author Ben Gamari <bgamari@gmail.com>
+ */
+
+/*
+ * Created: Sun Dec 21 13:09:50 2008 by bgamari@gmail.com
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright 2008 Ben Gamari <bgamari@gmail.com>
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/seq_file.h>
+#include "drmP.h"
+
+/**
+ * Called when "/proc/dri/.../name" is read.
+ *
+ * Prints the device name together with the bus id if available.
+ */
+int drm_name_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_minor *minor = node->minor;
+	struct drm_device *dev = minor->dev;
+	struct drm_master *master = minor->master;
+
+	if (!master)
+		return 0;
+
+	if (master->unique) {
+		seq_printf(m, "%s %s %s\n",
+			   dev->driver->pci_driver.name,
+			   pci_name(dev->pdev), master->unique);
+	} else {
+		seq_printf(m, "%s %s\n", dev->driver->pci_driver.name,
+			   pci_name(dev->pdev));
+	}
+
+	return 0;
+}
+
+/**
+ * Called when "/proc/dri/.../vm" is read.
+ *
+ * Prints information about all mappings in drm_device::maplist.
+ */
+int drm_vm_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_local_map *map;
+	struct drm_map_list *r_list;
+
+	/* Hardcoded from _DRM_FRAME_BUFFER,
+	   _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
+	   _DRM_SCATTER_GATHER and _DRM_CONSISTENT */
+	const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
+	const char *type;
+	int i;
+
+	mutex_lock(&dev->struct_mutex);
+	seq_printf(m, "slot	 offset	      size type flags	 address mtrr\n\n");
+	i = 0;
+	list_for_each_entry(r_list, &dev->maplist, head) {
+		map = r_list->map;
+		if (!map)
+			continue;
+		if (map->type < 0 || map->type > 5)
+			type = "??";
+		else
+			type = types[map->type];
+
+		seq_printf(m, "%4d 0x%016llx 0x%08lx %4.4s  0x%02x 0x%08lx ",
+			   i,
+			   (unsigned long long)map->offset,
+			   map->size, type, map->flags,
+			   (unsigned long) r_list->user_token);
+		if (map->mtrr < 0)
+			seq_printf(m, "none\n");
+		else
+			seq_printf(m, "%4d\n", map->mtrr);
+		i++;
+	}
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+/**
+ * Called when "/proc/dri/.../queues" is read.
+ */
+int drm_queues_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	int i;
+	struct drm_queue *q;
+
+	mutex_lock(&dev->struct_mutex);
+	seq_printf(m, "  ctx/flags   use   fin"
+		   "   blk/rw/rwf  wait    flushed	   queued"
+		   "      locks\n\n");
+	for (i = 0; i < dev->queue_count; i++) {
+		q = dev->queuelist[i];
+		atomic_inc(&q->use_count);
+		seq_printf(m,   "%5d/0x%03x %5d %5d"
+			   " %5d/%c%c/%c%c%c %5Zd\n",
+			   i,
+			   q->flags,
+			   atomic_read(&q->use_count),
+			   atomic_read(&q->finalization),
+			   atomic_read(&q->block_count),
+			   atomic_read(&q->block_read) ? 'r' : '-',
+			   atomic_read(&q->block_write) ? 'w' : '-',
+			   waitqueue_active(&q->read_queue) ? 'r' : '-',
+			   waitqueue_active(&q->write_queue) ? 'w' : '-',
+			   waitqueue_active(&q->flush_queue) ? 'f' : '-',
+			   DRM_BUFCOUNT(&q->waitlist));
+		atomic_dec(&q->use_count);
+	}
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+/**
+ * Called when "/proc/dri/.../bufs" is read.
+ */
+int drm_bufs_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_device_dma *dma;
+	int i, seg_pages;
+
+	mutex_lock(&dev->struct_mutex);
+	dma = dev->dma;
+	if (!dma) {
+		mutex_unlock(&dev->struct_mutex);
+		return 0;
+	}
+
+	seq_printf(m, " o     size count  free	 segs pages    kB\n\n");
+	for (i = 0; i <= DRM_MAX_ORDER; i++) {
+		if (dma->bufs[i].buf_count) {
+			seg_pages = dma->bufs[i].seg_count * (1 << dma->bufs[i].page_order);
+			seq_printf(m, "%2d %8d %5d %5d %5d %5d %5ld\n",
+				   i,
+				   dma->bufs[i].buf_size,
+				   dma->bufs[i].buf_count,
+				   atomic_read(&dma->bufs[i].freelist.count),
+				   dma->bufs[i].seg_count,
+				   seg_pages,
+				   seg_pages * PAGE_SIZE / 1024);
+		}
+	}
+	seq_printf(m, "\n");
+	for (i = 0; i < dma->buf_count; i++) {
+		if (i && !(i % 32))
+			seq_printf(m, "\n");
+		seq_printf(m, " %d", dma->buflist[i]->list);
+	}
+	seq_printf(m, "\n");
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+/**
+ * Called when "/proc/dri/.../vblank" is read.
+ */
+int drm_vblank_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	int crtc;
+
+	mutex_lock(&dev->struct_mutex);
+	for (crtc = 0; crtc < dev->num_crtcs; crtc++) {
+		seq_printf(m, "CRTC %d enable:     %d\n",
+			   crtc, atomic_read(&dev->vblank_refcount[crtc]));
+		seq_printf(m, "CRTC %d counter:    %d\n",
+			   crtc, drm_vblank_count(dev, crtc));
+		seq_printf(m, "CRTC %d last wait:  %d\n",
+			   crtc, dev->last_vblank_wait[crtc]);
+		seq_printf(m, "CRTC %d in modeset: %d\n",
+			   crtc, dev->vblank_inmodeset[crtc]);
+	}
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+/**
+ * Called when "/proc/dri/.../clients" is read.
+ *
+ */
+int drm_clients_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_file *priv;
+
+	mutex_lock(&dev->struct_mutex);
+	seq_printf(m, "a dev	pid    uid	magic	  ioctls\n\n");
+	list_for_each_entry(priv, &dev->filelist, lhead) {
+		seq_printf(m, "%c %3d %5d %5d %10u %10lu\n",
+			   priv->authenticated ? 'y' : 'n',
+			   priv->minor->index,
+			   priv->pid,
+			   priv->uid, priv->magic, priv->ioctl_count);
+	}
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+
+int drm_gem_one_name_info(int id, void *ptr, void *data)
+{
+	struct drm_gem_object *obj = ptr;
+	struct seq_file *m = data;
+
+	seq_printf(m, "name %d size %zd\n", obj->name, obj->size);
+
+	seq_printf(m, "%6d %8zd %7d %8d\n",
+		   obj->name, obj->size,
+		   atomic_read(&obj->handlecount.refcount),
+		   atomic_read(&obj->refcount.refcount));
+	return 0;
+}
+
+int drm_gem_name_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+
+	seq_printf(m, "  name     size handles refcount\n");
+	idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, m);
+	return 0;
+}
+
+int drm_gem_object_info(struct seq_file *m, void* data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+
+	seq_printf(m, "%d objects\n", atomic_read(&dev->object_count));
+	seq_printf(m, "%d object bytes\n", atomic_read(&dev->object_memory));
+	seq_printf(m, "%d pinned\n", atomic_read(&dev->pin_count));
+	seq_printf(m, "%d pin bytes\n", atomic_read(&dev->pin_memory));
+	seq_printf(m, "%d gtt bytes\n", atomic_read(&dev->gtt_memory));
+	seq_printf(m, "%d gtt total\n", dev->gtt_total);
+	return 0;
+}
+
+#if DRM_DEBUG_CODE
+
+int drm_vma_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_vma_entry *pt;
+	struct vm_area_struct *vma;
+#if defined(__i386__)
+	unsigned int pgprot;
+#endif
+
+	mutex_lock(&dev->struct_mutex);
+	seq_printf(m, "vma use count: %d, high_memory = %p, 0x%08llx\n",
+		   atomic_read(&dev->vma_count),
+		   high_memory, (u64)virt_to_phys(high_memory));
+
+	list_for_each_entry(pt, &dev->vmalist, head) {
+		vma = pt->vma;
+		if (!vma)
+			continue;
+		seq_printf(m,
+			   "\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000",
+			   pt->pid, vma->vm_start, vma->vm_end,
+			   vma->vm_flags & VM_READ ? 'r' : '-',
+			   vma->vm_flags & VM_WRITE ? 'w' : '-',
+			   vma->vm_flags & VM_EXEC ? 'x' : '-',
+			   vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
+			   vma->vm_flags & VM_LOCKED ? 'l' : '-',
+			   vma->vm_flags & VM_IO ? 'i' : '-',
+			   vma->vm_pgoff);
+
+#if defined(__i386__)
+		pgprot = pgprot_val(vma->vm_page_prot);
+		seq_printf(m, " %c%c%c%c%c%c%c%c%c",
+			   pgprot & _PAGE_PRESENT ? 'p' : '-',
+			   pgprot & _PAGE_RW ? 'w' : 'r',
+			   pgprot & _PAGE_USER ? 'u' : 's',
+			   pgprot & _PAGE_PWT ? 't' : 'b',
+			   pgprot & _PAGE_PCD ? 'u' : 'c',
+			   pgprot & _PAGE_ACCESSED ? 'a' : '-',
+			   pgprot & _PAGE_DIRTY ? 'd' : '-',
+			   pgprot & _PAGE_PSE ? 'm' : 'k',
+			   pgprot & _PAGE_GLOBAL ? 'g' : 'l');
+#endif
+		seq_printf(m, "\n");
+	}
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+}
+
+#endif
+
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index 920b72fbc958..282d9fdf9f4e 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -954,6 +954,7 @@ static int compat_drm_sg_free(struct file *file, unsigned int cmd,
 			 DRM_IOCTL_SG_FREE, (unsigned long)request);
 }
 
+#if defined(CONFIG_X86) || defined(CONFIG_IA64)
 typedef struct drm_update_draw32 {
 	drm_drawable_t handle;
 	unsigned int type;
@@ -984,6 +985,7 @@ static int compat_drm_update_draw(struct file *file, unsigned int cmd,
 			DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
 	return err;
 }
+#endif
 
 struct drm_wait_vblank_request32 {
 	enum drm_vblank_seq_type type;
@@ -1066,7 +1068,9 @@ drm_ioctl_compat_t *drm_compat_ioctls[] = {
 #endif
 	[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC32)] = compat_drm_sg_alloc,
 	[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE32)] = compat_drm_sg_free,
+#if defined(CONFIG_X86) || defined(CONFIG_IA64)
 	[DRM_IOCTL_NR(DRM_IOCTL_UPDATE_DRAW32)] = compat_drm_update_draw,
+#endif
 	[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK32)] = compat_drm_wait_vblank,
 };
 
diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index bcc869bc4092..0c707f533eab 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -159,7 +159,7 @@ static inline void *agp_remap(unsigned long offset, unsigned long size,
 
 #endif				/* debug_memory */
 
-void drm_core_ioremap(struct drm_map *map, struct drm_device *dev)
+void drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev)
 {
 	if (drm_core_has_AGP(dev) &&
 	    dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
@@ -169,7 +169,7 @@ void drm_core_ioremap(struct drm_map *map, struct drm_device *dev)
 }
 EXPORT_SYMBOL(drm_core_ioremap);
 
-void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev)
+void drm_core_ioremap_wc(struct drm_local_map *map, struct drm_device *dev)
 {
 	if (drm_core_has_AGP(dev) &&
 	    dev->agp && dev->agp->cant_use_aperture && map->type == _DRM_AGP)
@@ -179,7 +179,7 @@ void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev)
 }
 EXPORT_SYMBOL(drm_core_ioremap_wc);
 
-void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev)
+void drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev)
 {
 	if (!map->handle || !map->size)
 		return;
diff --git a/drivers/gpu/drm/drm_proc.c b/drivers/gpu/drm/drm_proc.c
index 8df849f66830..bae5391165ac 100644
--- a/drivers/gpu/drm/drm_proc.c
+++ b/drivers/gpu/drm/drm_proc.c
@@ -37,697 +37,195 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <linux/seq_file.h>
 #include "drmP.h"
 
-static int drm_name_info(char *buf, char **start, off_t offset,
-			 int request, int *eof, void *data);
-static int drm_vm_info(char *buf, char **start, off_t offset,
-		       int request, int *eof, void *data);
-static int drm_clients_info(char *buf, char **start, off_t offset,
-			    int request, int *eof, void *data);
-static int drm_queues_info(char *buf, char **start, off_t offset,
-			   int request, int *eof, void *data);
-static int drm_bufs_info(char *buf, char **start, off_t offset,
-			 int request, int *eof, void *data);
-static int drm_vblank_info(char *buf, char **start, off_t offset,
-			   int request, int *eof, void *data);
-static int drm_gem_name_info(char *buf, char **start, off_t offset,
-			     int request, int *eof, void *data);
-static int drm_gem_object_info(char *buf, char **start, off_t offset,
-			       int request, int *eof, void *data);
-#if DRM_DEBUG_CODE
-static int drm_vma_info(char *buf, char **start, off_t offset,
-			int request, int *eof, void *data);
-#endif
+/***************************************************
+ * Initialization, etc.
+ **************************************************/
 
 /**
  * Proc file list.
  */
-static struct drm_proc_list {
-	const char *name;	/**< file name */
-	int (*f) (char *, char **, off_t, int, int *, void *);		/**< proc callback*/
-	u32 driver_features; /**< Required driver features for this entry */
-} drm_proc_list[] = {
+static struct drm_info_list drm_proc_list[] = {
 	{"name", drm_name_info, 0},
-	{"mem", drm_mem_info, 0},
 	{"vm", drm_vm_info, 0},
 	{"clients", drm_clients_info, 0},
 	{"queues", drm_queues_info, 0},
 	{"bufs", drm_bufs_info, 0},
-	{"vblank", drm_vblank_info, 0},
 	{"gem_names", drm_gem_name_info, DRIVER_GEM},
 	{"gem_objects", drm_gem_object_info, DRIVER_GEM},
 #if DRM_DEBUG_CODE
-	{"vma", drm_vma_info},
+	{"vma", drm_vma_info, 0},
 #endif
 };
-
 #define DRM_PROC_ENTRIES ARRAY_SIZE(drm_proc_list)
 
+static int drm_proc_open(struct inode *inode, struct file *file)
+{
+	struct drm_info_node* node = PDE(inode)->data;
+
+	return single_open(file, node->info_ent->show, node);
+}
+
+static const struct file_operations drm_proc_fops = {
+	.owner = THIS_MODULE,
+	.open = drm_proc_open,
+	.read = seq_read,
+	.llseek = seq_lseek,
+	.release = single_release,
+};
+
+
 /**
- * Initialize the DRI proc filesystem for a device.
+ * Initialize a given set of proc files for a device
  *
- * \param dev DRM device.
- * \param minor device minor number.
+ * \param files The array of files to create
+ * \param count The number of files given
  * \param root DRI proc dir entry.
- * \param dev_root resulting DRI device proc dir entry.
- * \return root entry pointer on success, or NULL on failure.
+ * \param minor device minor number
+ * \return Zero on success, non-zero on failure
  *
- * Create the DRI proc root entry "/proc/dri", the device proc root entry
- * "/proc/dri/%minor%/", and each entry in proc_list as
- * "/proc/dri/%minor%/%name%".
+ * Create a given set of proc files represented by an array of
+ * gdm_proc_lists in the given root directory.
  */
-int drm_proc_init(struct drm_minor *minor, int minor_id,
-		  struct proc_dir_entry *root)
+int drm_proc_create_files(struct drm_info_list *files, int count,
+			  struct proc_dir_entry *root, struct drm_minor *minor)
 {
 	struct drm_device *dev = minor->dev;
 	struct proc_dir_entry *ent;
-	int i, j, ret;
+	struct drm_info_node *tmp;
 	char name[64];
+	int i, ret;
 
-	sprintf(name, "%d", minor_id);
-	minor->dev_root = proc_mkdir(name, root);
-	if (!minor->dev_root) {
-		DRM_ERROR("Cannot create /proc/dri/%s\n", name);
-		return -1;
-	}
-
-	for (i = 0; i < DRM_PROC_ENTRIES; i++) {
-		u32 features = drm_proc_list[i].driver_features;
+	for (i = 0; i < count; i++) {
+		u32 features = files[i].driver_features;
 
 		if (features != 0 &&
 		    (dev->driver->driver_features & features) != features)
 			continue;
 
-		ent = create_proc_entry(drm_proc_list[i].name,
-					S_IFREG | S_IRUGO, minor->dev_root);
+		tmp = drm_alloc(sizeof(struct drm_info_node), _DRM_DRIVER);
+		ent = create_proc_entry(files[i].name, S_IFREG | S_IRUGO, root);
 		if (!ent) {
 			DRM_ERROR("Cannot create /proc/dri/%s/%s\n",
-				  name, drm_proc_list[i].name);
+				  name, files[i].name);
+			drm_free(tmp, sizeof(struct drm_info_node),
+				 _DRM_DRIVER);
 			ret = -1;
 			goto fail;
 		}
-		ent->read_proc = drm_proc_list[i].f;
-		ent->data = minor;
-	}
 
-	if (dev->driver->proc_init) {
-		ret = dev->driver->proc_init(minor);
-		if (ret) {
-			DRM_ERROR("DRM: Driver failed to initialize "
-				  "/proc/dri.\n");
-			goto fail;
-		}
+		ent->proc_fops = &drm_proc_fops;
+		ent->data = tmp;
+		tmp->minor = minor;
+		tmp->info_ent = &files[i];
+		list_add(&(tmp->list), &(minor->proc_nodes.list));
 	}
-
 	return 0;
- fail:
 
-	for (j = 0; j < i; j++)
-		remove_proc_entry(drm_proc_list[i].name,
-				  minor->dev_root);
-	remove_proc_entry(name, root);
-	minor->dev_root = NULL;
+fail:
+	for (i = 0; i < count; i++)
+		remove_proc_entry(drm_proc_list[i].name, minor->proc_root);
 	return ret;
 }
 
 /**
- * Cleanup the proc filesystem resources.
+ * Initialize the DRI proc filesystem for a device
  *
- * \param minor device minor number.
+ * \param dev DRM device
+ * \param minor device minor number
  * \param root DRI proc dir entry.
- * \param dev_root DRI device proc dir entry.
- * \return always zero.
+ * \param dev_root resulting DRI device proc dir entry.
+ * \return root entry pointer on success, or NULL on failure.
  *
- * Remove all proc entries created by proc_init().
+ * Create the DRI proc root entry "/proc/dri", the device proc root entry
+ * "/proc/dri/%minor%/", and each entry in proc_list as
+ * "/proc/dri/%minor%/%name%".
  */
-int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root)
+int drm_proc_init(struct drm_minor *minor, int minor_id,
+		  struct proc_dir_entry *root)
 {
 	struct drm_device *dev = minor->dev;
-	int i;
 	char name[64];
+	int ret;
 
-	if (!root || !minor->dev_root)
-		return 0;
-
-	if (dev->driver->proc_cleanup)
-		dev->driver->proc_cleanup(minor);
-
-	for (i = 0; i < DRM_PROC_ENTRIES; i++)
-		remove_proc_entry(drm_proc_list[i].name, minor->dev_root);
-	sprintf(name, "%d", minor->index);
-	remove_proc_entry(name, root);
-
-	return 0;
-}
-
-/**
- * Called when "/proc/dri/.../name" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints the device name together with the bus id if available.
- */
-static int drm_name_info(char *buf, char **start, off_t offset, int request,
-			 int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_master *master = minor->master;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
+	INIT_LIST_HEAD(&minor->proc_nodes.list);
+	sprintf(name, "%d", minor_id);
+	minor->proc_root = proc_mkdir(name, root);
+	if (!minor->proc_root) {
+		DRM_ERROR("Cannot create /proc/dri/%s\n", name);
+		return -1;
 	}
 
-	if (!master)
-		return 0;
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	if (master->unique) {
-		DRM_PROC_PRINT("%s %s %s\n",
-			       dev->driver->pci_driver.name,
-			       pci_name(dev->pdev), master->unique);
-	} else {
-		DRM_PROC_PRINT("%s %s\n", dev->driver->pci_driver.name,
-			       pci_name(dev->pdev));
+	ret = drm_proc_create_files(drm_proc_list, DRM_PROC_ENTRIES,
+				    minor->proc_root, minor);
+	if (ret) {
+		remove_proc_entry(name, root);
+		minor->proc_root = NULL;
+		DRM_ERROR("Failed to create core drm proc files\n");
+		return ret;
 	}
 
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Called when "/proc/dri/.../vm" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- *
- * Prints information about all mappings in drm_device::maplist.
- */
-static int drm__vm_info(char *buf, char **start, off_t offset, int request,
-			int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-	struct drm_map *map;
-	struct drm_map_list *r_list;
-
-	/* Hardcoded from _DRM_FRAME_BUFFER,
-	   _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
-	   _DRM_SCATTER_GATHER and _DRM_CONSISTENT */
-	const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
-	const char *type;
-	int i;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	DRM_PROC_PRINT("slot	 offset	      size type flags	 "
-		       "address mtrr\n\n");
-	i = 0;
-	list_for_each_entry(r_list, &dev->maplist, head) {
-		map = r_list->map;
-		if (!map)
-			continue;
-		if (map->type < 0 || map->type > 5)
-			type = "??";
-		else
-			type = types[map->type];
-		DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s  0x%02x 0x%08lx ",
-			       i,
-			       map->offset,
-			       map->size, type, map->flags,
-			       (unsigned long) r_list->user_token);
-		if (map->mtrr < 0) {
-			DRM_PROC_PRINT("none\n");
-		} else {
-			DRM_PROC_PRINT("%4d\n", map->mtrr);
+	if (dev->driver->proc_init) {
+		ret = dev->driver->proc_init(minor);
+		if (ret) {
+			DRM_ERROR("DRM: Driver failed to initialize "
+				  "/proc/dri.\n");
+			return ret;
 		}
-		i++;
-	}
-
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Simply calls _vm_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_vm_info(char *buf, char **start, off_t offset, int request,
-		       int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__vm_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
-}
-
-/**
- * Called when "/proc/dri/.../queues" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__queues_info(char *buf, char **start, off_t offset,
-			    int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-	int i;
-	struct drm_queue *q;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
 	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	DRM_PROC_PRINT("  ctx/flags   use   fin"
-		       "   blk/rw/rwf  wait    flushed	   queued"
-		       "      locks\n\n");
-	for (i = 0; i < dev->queue_count; i++) {
-		q = dev->queuelist[i];
-		atomic_inc(&q->use_count);
-		DRM_PROC_PRINT_RET(atomic_dec(&q->use_count),
-				   "%5d/0x%03x %5d %5d"
-				   " %5d/%c%c/%c%c%c %5Zd\n",
-				   i,
-				   q->flags,
-				   atomic_read(&q->use_count),
-				   atomic_read(&q->finalization),
-				   atomic_read(&q->block_count),
-				   atomic_read(&q->block_read) ? 'r' : '-',
-				   atomic_read(&q->block_write) ? 'w' : '-',
-				   waitqueue_active(&q->read_queue) ? 'r' : '-',
-				   waitqueue_active(&q->
-						    write_queue) ? 'w' : '-',
-				   waitqueue_active(&q->
-						    flush_queue) ? 'f' : '-',
-				   DRM_BUFCOUNT(&q->waitlist));
-		atomic_dec(&q->use_count);
-	}
-
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Simply calls _queues_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_queues_info(char *buf, char **start, off_t offset, int request,
-			   int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__queues_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
+	return 0;
 }
 
-/**
- * Called when "/proc/dri/.../bufs" is read.
- *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__bufs_info(char *buf, char **start, off_t offset, int request,
-			  int *eof, void *data)
+int drm_proc_remove_files(struct drm_info_list *files, int count,
+			  struct drm_minor *minor)
 {
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-	struct drm_device_dma *dma = dev->dma;
+	struct list_head *pos, *q;
+	struct drm_info_node *tmp;
 	int i;
 
-	if (!dma || offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	DRM_PROC_PRINT(" o     size count  free	 segs pages    kB\n\n");
-	for (i = 0; i <= DRM_MAX_ORDER; i++) {
-		if (dma->bufs[i].buf_count)
-			DRM_PROC_PRINT("%2d %8d %5d %5d %5d %5d %5ld\n",
-				       i,
-				       dma->bufs[i].buf_size,
-				       dma->bufs[i].buf_count,
-				       atomic_read(&dma->bufs[i]
-						   .freelist.count),
-				       dma->bufs[i].seg_count,
-				       dma->bufs[i].seg_count
-				       * (1 << dma->bufs[i].page_order),
-				       (dma->bufs[i].seg_count
-					* (1 << dma->bufs[i].page_order))
-				       * PAGE_SIZE / 1024);
-	}
-	DRM_PROC_PRINT("\n");
-	for (i = 0; i < dma->buf_count; i++) {
-		if (i && !(i % 32))
-			DRM_PROC_PRINT("\n");
-		DRM_PROC_PRINT(" %d", dma->buflist[i]->list);
+	for (i = 0; i < count; i++) {
+		list_for_each_safe(pos, q, &minor->proc_nodes.list) {
+			tmp = list_entry(pos, struct drm_info_node, list);
+			if (tmp->info_ent == &files[i]) {
+				remove_proc_entry(files[i].name,
+						  minor->proc_root);
+				list_del(pos);
+				drm_free(tmp, sizeof(struct drm_info_node),
+					 _DRM_DRIVER);
+			}
+		}
 	}
-	DRM_PROC_PRINT("\n");
-
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Simply calls _bufs_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_bufs_info(char *buf, char **start, off_t offset, int request,
-			 int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__bufs_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
+	return 0;
 }
 
 /**
- * Called when "/proc/dri/.../vblank" is read.
+ * Cleanup the proc filesystem resources.
  *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
- */
-static int drm__vblank_info(char *buf, char **start, off_t offset, int request,
-			  int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-	int crtc;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	for (crtc = 0; crtc < dev->num_crtcs; crtc++) {
-		DRM_PROC_PRINT("CRTC %d enable:     %d\n",
-			       crtc, atomic_read(&dev->vblank_refcount[crtc]));
-		DRM_PROC_PRINT("CRTC %d counter:    %d\n",
-			       crtc, drm_vblank_count(dev, crtc));
-		DRM_PROC_PRINT("CRTC %d last wait:  %d\n",
-			       crtc, dev->last_vblank_wait[crtc]);
-		DRM_PROC_PRINT("CRTC %d in modeset: %d\n",
-			       crtc, dev->vblank_inmodeset[crtc]);
-	}
-
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Simply calls _vblank_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_vblank_info(char *buf, char **start, off_t offset, int request,
-			 int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__vblank_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
-}
-
-/**
- * Called when "/proc/dri/.../clients" is read.
+ * \param minor device minor number.
+ * \param root DRI proc dir entry.
+ * \param dev_root DRI device proc dir entry.
+ * \return always zero.
  *
- * \param buf output buffer.
- * \param start start of output data.
- * \param offset requested start offset.
- * \param request requested number of bytes.
- * \param eof whether there is no more data to return.
- * \param data private data.
- * \return number of written bytes.
+ * Remove all proc entries created by proc_init().
  */
-static int drm__clients_info(char *buf, char **start, off_t offset,
-			     int request, int *eof, void *data)
+int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root)
 {
-	struct drm_minor *minor = (struct drm_minor *) data;
 	struct drm_device *dev = minor->dev;
-	int len = 0;
-	struct drm_file *priv;
+	char name[64];
 
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
+	if (!root || !minor->proc_root)
 		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	DRM_PROC_PRINT("a dev	pid    uid	magic	  ioctls\n\n");
-	list_for_each_entry(priv, &dev->filelist, lhead) {
-		DRM_PROC_PRINT("%c %3d %5d %5d %10u %10lu\n",
-			       priv->authenticated ? 'y' : 'n',
-			       priv->minor->index,
-			       priv->pid,
-			       priv->uid, priv->magic, priv->ioctl_count);
-	}
 
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-/**
- * Simply calls _clients_info() while holding the drm_device::struct_mutex lock.
- */
-static int drm_clients_info(char *buf, char **start, off_t offset,
-			    int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__clients_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
-}
-
-struct drm_gem_name_info_data {
-       int                     len;
-       char                    *buf;
-       int                     eof;
-};
+	if (dev->driver->proc_cleanup)
+		dev->driver->proc_cleanup(minor);
 
-static int drm_gem_one_name_info(int id, void *ptr, void *data)
-{
-	struct drm_gem_object *obj = ptr;
-	struct drm_gem_name_info_data   *nid = data;
+	drm_proc_remove_files(drm_proc_list, DRM_PROC_ENTRIES, minor);
 
-	DRM_INFO("name %d size %zd\n", obj->name, obj->size);
-	if (nid->eof)
-		return 0;
+	sprintf(name, "%d", minor->index);
+	remove_proc_entry(name, root);
 
-	nid->len += sprintf(&nid->buf[nid->len],
-			    "%6d %8zd %7d %8d\n",
-			    obj->name, obj->size,
-			    atomic_read(&obj->handlecount.refcount),
-			    atomic_read(&obj->refcount.refcount));
-	if (nid->len > DRM_PROC_LIMIT) {
-		nid->eof = 1;
-		return 0;
-	}
 	return 0;
 }
 
-static int drm_gem_name_info(char *buf, char **start, off_t offset,
-			     int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	struct drm_gem_name_info_data nid;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	nid.len = sprintf(buf, "  name     size handles refcount\n");
-	nid.buf = buf;
-	nid.eof = 0;
-	idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, &nid);
-
-	*start = &buf[offset];
-	*eof = 0;
-	if (nid.len > request + offset)
-		return request;
-	*eof = 1;
-	return nid.len - offset;
-}
-
-static int drm_gem_object_info(char *buf, char **start, off_t offset,
-			       int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("%d objects\n", atomic_read(&dev->object_count));
-	DRM_PROC_PRINT("%d object bytes\n", atomic_read(&dev->object_memory));
-	DRM_PROC_PRINT("%d pinned\n", atomic_read(&dev->pin_count));
-	DRM_PROC_PRINT("%d pin bytes\n", atomic_read(&dev->pin_memory));
-	DRM_PROC_PRINT("%d gtt bytes\n", atomic_read(&dev->gtt_memory));
-	DRM_PROC_PRINT("%d gtt total\n", dev->gtt_total);
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-#if DRM_DEBUG_CODE
-
-static int drm__vma_info(char *buf, char **start, off_t offset, int request,
-			 int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int len = 0;
-	struct drm_vma_entry *pt;
-	struct vm_area_struct *vma;
-#if defined(__i386__)
-	unsigned int pgprot;
-#endif
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-
-	DRM_PROC_PRINT("vma use count: %d, high_memory = %p, 0x%08lx\n",
-		       atomic_read(&dev->vma_count),
-		       high_memory, virt_to_phys(high_memory));
-	list_for_each_entry(pt, &dev->vmalist, head) {
-		if (!(vma = pt->vma))
-			continue;
-		DRM_PROC_PRINT("\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000",
-			       pt->pid,
-			       vma->vm_start,
-			       vma->vm_end,
-			       vma->vm_flags & VM_READ ? 'r' : '-',
-			       vma->vm_flags & VM_WRITE ? 'w' : '-',
-			       vma->vm_flags & VM_EXEC ? 'x' : '-',
-			       vma->vm_flags & VM_MAYSHARE ? 's' : 'p',
-			       vma->vm_flags & VM_LOCKED ? 'l' : '-',
-			       vma->vm_flags & VM_IO ? 'i' : '-',
-			       vma->vm_pgoff);
-
-#if defined(__i386__)
-		pgprot = pgprot_val(vma->vm_page_prot);
-		DRM_PROC_PRINT(" %c%c%c%c%c%c%c%c%c",
-			       pgprot & _PAGE_PRESENT ? 'p' : '-',
-			       pgprot & _PAGE_RW ? 'w' : 'r',
-			       pgprot & _PAGE_USER ? 'u' : 's',
-			       pgprot & _PAGE_PWT ? 't' : 'b',
-			       pgprot & _PAGE_PCD ? 'u' : 'c',
-			       pgprot & _PAGE_ACCESSED ? 'a' : '-',
-			       pgprot & _PAGE_DIRTY ? 'd' : '-',
-			       pgprot & _PAGE_PSE ? 'm' : 'k',
-			       pgprot & _PAGE_GLOBAL ? 'g' : 'l');
-#endif
-		DRM_PROC_PRINT("\n");
-	}
-
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int drm_vma_info(char *buf, char **start, off_t offset, int request,
-			int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	int ret;
-
-	mutex_lock(&dev->struct_mutex);
-	ret = drm__vma_info(buf, start, offset, request, eof, data);
-	mutex_unlock(&dev->struct_mutex);
-	return ret;
-}
-#endif
diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index 7c8b15b22bf2..d009661781bc 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -50,6 +50,7 @@ struct idr drm_minors_idr;
 
 struct class *drm_class;
 struct proc_dir_entry *drm_proc_root;
+struct dentry *drm_debugfs_root;
 
 static int drm_minor_get_id(struct drm_device *dev, int type)
 {
@@ -313,7 +314,15 @@ static int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int t
 			goto err_mem;
 		}
 	} else
-		new_minor->dev_root = NULL;
+		new_minor->proc_root = NULL;
+
+#if defined(CONFIG_DEBUG_FS)
+	ret = drm_debugfs_init(new_minor, minor_id, drm_debugfs_root);
+	if (ret) {
+		DRM_ERROR("DRM: Failed to initialize /debugfs/dri.\n");
+		goto err_g2;
+	}
+#endif
 
 	ret = drm_sysfs_device_add(new_minor);
 	if (ret) {
@@ -372,6 +381,7 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
 	}
 
 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		pci_set_drvdata(pdev, dev);
 		ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
 		if (ret)
 			goto err_g2;
@@ -395,9 +405,9 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
 
 	list_add_tail(&dev->driver_item, &driver->device_list);
 
-	DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
+	DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
 		 driver->name, driver->major, driver->minor, driver->patchlevel,
-		 driver->date, dev->primary->index);
+		 driver->date, pci_name(pdev), dev->primary->index);
 
 	return 0;
 
@@ -409,29 +419,7 @@ err_g1:
 	drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
 	return ret;
 }
-
-/**
- * Put a device minor number.
- *
- * \param dev device data structure
- * \return always zero
- *
- * Cleans up the proc resources. If it is the last minor then release the foreign
- * "drm" data, otherwise unregisters the "drm" data, frees the dev list and
- * unregisters the character device.
- */
-int drm_put_dev(struct drm_device * dev)
-{
-	DRM_DEBUG("release primary %s\n", dev->driver->pci_driver.name);
-
-	if (dev->devname) {
-		drm_free(dev->devname, strlen(dev->devname) + 1,
-			 DRM_MEM_DRIVER);
-		dev->devname = NULL;
-	}
-	drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
-	return 0;
-}
+EXPORT_SYMBOL(drm_get_dev);
 
 /**
  * Put a secondary minor number.
@@ -451,6 +439,10 @@ int drm_put_minor(struct drm_minor **minor_p)
 
 	if (minor->type == DRM_MINOR_LEGACY)
 		drm_proc_cleanup(minor, drm_proc_root);
+#if defined(CONFIG_DEBUG_FS)
+	drm_debugfs_cleanup(minor);
+#endif
+
 	drm_sysfs_device_remove(minor);
 
 	idr_remove(&drm_minors_idr, minor->index);
@@ -459,3 +451,67 @@ int drm_put_minor(struct drm_minor **minor_p)
 	*minor_p = NULL;
 	return 0;
 }
+
+/**
+ * Called via drm_exit() at module unload time or when pci device is
+ * unplugged.
+ *
+ * Cleans up all DRM device, calling drm_lastclose().
+ *
+ * \sa drm_init
+ */
+void drm_put_dev(struct drm_device *dev)
+{
+	struct drm_driver *driver = dev->driver;
+	struct drm_map_list *r_list, *list_temp;
+
+	DRM_DEBUG("\n");
+
+	if (!dev) {
+		DRM_ERROR("cleanup called no dev\n");
+		return;
+	}
+
+	drm_vblank_cleanup(dev);
+
+	drm_lastclose(dev);
+
+	if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
+	    dev->agp && dev->agp->agp_mtrr >= 0) {
+		int retval;
+		retval = mtrr_del(dev->agp->agp_mtrr,
+				  dev->agp->agp_info.aper_base,
+				  dev->agp->agp_info.aper_size * 1024 * 1024);
+		DRM_DEBUG("mtrr_del=%d\n", retval);
+	}
+
+	if (dev->driver->unload)
+		dev->driver->unload(dev);
+
+	if (drm_core_has_AGP(dev) && dev->agp) {
+		drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS);
+		dev->agp = NULL;
+	}
+
+	drm_ht_remove(&dev->map_hash);
+	drm_ctxbitmap_cleanup(dev);
+
+	list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head)
+		drm_rmmap(dev, r_list->map);
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET))
+		drm_put_minor(&dev->control);
+
+	if (driver->driver_features & DRIVER_GEM)
+		drm_gem_destroy(dev);
+
+	drm_put_minor(&dev->primary);
+
+	if (dev->devname) {
+		drm_free(dev->devname, strlen(dev->devname) + 1,
+			 DRM_MEM_DRIVER);
+		dev->devname = NULL;
+	}
+	drm_free(dev, sizeof(*dev), DRM_MEM_STUB);
+}
+EXPORT_SYMBOL(drm_put_dev);
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 5aa6780652aa..bc0c6849360c 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -35,7 +35,9 @@ static int drm_sysfs_suspend(struct device *dev, pm_message_t state)
 	struct drm_minor *drm_minor = to_drm_minor(dev);
 	struct drm_device *drm_dev = drm_minor->dev;
 
-	if (drm_minor->type == DRM_MINOR_LEGACY && drm_dev->driver->suspend)
+	if (drm_minor->type == DRM_MINOR_LEGACY &&
+	    !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
+	    drm_dev->driver->suspend)
 		return drm_dev->driver->suspend(drm_dev, state);
 
 	return 0;
@@ -53,7 +55,9 @@ static int drm_sysfs_resume(struct device *dev)
 	struct drm_minor *drm_minor = to_drm_minor(dev);
 	struct drm_device *drm_dev = drm_minor->dev;
 
-	if (drm_minor->type == DRM_MINOR_LEGACY && drm_dev->driver->resume)
+	if (drm_minor->type == DRM_MINOR_LEGACY &&
+	    !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
+	    drm_dev->driver->resume)
 		return drm_dev->driver->resume(drm_dev);
 
 	return 0;
@@ -118,20 +122,6 @@ void drm_sysfs_destroy(void)
 	class_destroy(drm_class);
 }
 
-static ssize_t show_dri(struct device *device, struct device_attribute *attr,
-			char *buf)
-{
-	struct drm_minor *drm_minor = to_drm_minor(device);
-	struct drm_device *drm_dev = drm_minor->dev;
-	if (drm_dev->driver->dri_library_name)
-		return drm_dev->driver->dri_library_name(drm_dev, buf);
-	return snprintf(buf, PAGE_SIZE, "%s\n", drm_dev->driver->pci_driver.name);
-}
-
-static struct device_attribute device_attrs[] = {
-	__ATTR(dri_library_name, S_IRUGO, show_dri, NULL),
-};
-
 /**
  * drm_sysfs_device_release - do nothing
  * @dev: Linux device
@@ -359,8 +349,8 @@ int drm_sysfs_connector_add(struct drm_connector *connector)
 	DRM_DEBUG("adding \"%s\" to sysfs\n",
 		  drm_get_connector_name(connector));
 
-	snprintf(connector->kdev.bus_id, BUS_ID_SIZE, "card%d-%s",
-		 dev->primary->index, drm_get_connector_name(connector));
+	dev_set_name(&connector->kdev, "card%d-%s",
+		     dev->primary->index, drm_get_connector_name(connector));
 	ret = device_register(&connector->kdev);
 
 	if (ret) {
@@ -461,6 +451,7 @@ void drm_sysfs_hotplug_event(struct drm_device *dev)
 
 	kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp);
 }
+EXPORT_SYMBOL(drm_sysfs_hotplug_event);
 
 /**
  * drm_sysfs_device_add - adds a class device to sysfs for a character driver
@@ -474,7 +465,6 @@ void drm_sysfs_hotplug_event(struct drm_device *dev)
 int drm_sysfs_device_add(struct drm_minor *minor)
 {
 	int err;
-	int i, j;
 	char *minor_str;
 
 	minor->kdev.parent = &minor->dev->pdev->dev;
@@ -496,18 +486,8 @@ int drm_sysfs_device_add(struct drm_minor *minor)
 		goto err_out;
 	}
 
-	for (i = 0; i < ARRAY_SIZE(device_attrs); i++) {
-		err = device_create_file(&minor->kdev, &device_attrs[i]);
-		if (err)
-			goto err_out_files;
-	}
-
 	return 0;
 
-err_out_files:
-	if (i > 0)
-		for (j = 0; j < i; j++)
-			device_remove_file(&minor->kdev, &device_attrs[j]);
 	device_unregister(&minor->kdev);
 err_out:
 
@@ -523,9 +503,5 @@ err_out:
  */
 void drm_sysfs_device_remove(struct drm_minor *minor)
 {
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(device_attrs); i++)
-		device_remove_file(&minor->kdev, &device_attrs[i]);
 	device_unregister(&minor->kdev);
 }
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index 3ffae021d280..22f76567ac7d 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -91,7 +91,7 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 {
 	struct drm_file *priv = vma->vm_file->private_data;
 	struct drm_device *dev = priv->minor->dev;
-	struct drm_map *map = NULL;
+	struct drm_local_map *map = NULL;
 	struct drm_map_list *r_list;
 	struct drm_hash_item *hash;
 
@@ -115,9 +115,9 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 		 * Using vm_pgoff as a selector forces us to use this unusual
 		 * addressing scheme.
 		 */
-		unsigned long offset = (unsigned long)vmf->virtual_address -
-								vma->vm_start;
-		unsigned long baddr = map->offset + offset;
+		resource_size_t offset = (unsigned long)vmf->virtual_address -
+			vma->vm_start;
+		resource_size_t baddr = map->offset + offset;
 		struct drm_agp_mem *agpmem;
 		struct page *page;
 
@@ -149,8 +149,10 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 		vmf->page = page;
 
 		DRM_DEBUG
-		    ("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n",
-		     baddr, __va(agpmem->memory->memory[offset]), offset,
+		    ("baddr = 0x%llx page = 0x%p, offset = 0x%llx, count=%d\n",
+		     (unsigned long long)baddr,
+		     __va(agpmem->memory->memory[offset]),
+		     (unsigned long long)offset,
 		     page_count(page));
 		return 0;
 	}
@@ -176,7 +178,7 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  */
 static int drm_do_vm_shm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 {
-	struct drm_map *map = (struct drm_map *) vma->vm_private_data;
+	struct drm_local_map *map = vma->vm_private_data;
 	unsigned long offset;
 	unsigned long i;
 	struct page *page;
@@ -209,7 +211,7 @@ static void drm_vm_shm_close(struct vm_area_struct *vma)
 	struct drm_file *priv = vma->vm_file->private_data;
 	struct drm_device *dev = priv->minor->dev;
 	struct drm_vma_entry *pt, *temp;
-	struct drm_map *map;
+	struct drm_local_map *map;
 	struct drm_map_list *r_list;
 	int found_maps = 0;
 
@@ -322,7 +324,7 @@ static int drm_do_vm_dma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  */
 static int drm_do_vm_sg_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 {
-	struct drm_map *map = (struct drm_map *) vma->vm_private_data;
+	struct drm_local_map *map = vma->vm_private_data;
 	struct drm_file *priv = vma->vm_file->private_data;
 	struct drm_device *dev = priv->minor->dev;
 	struct drm_sg_mem *entry = dev->sg;
@@ -512,14 +514,14 @@ static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
 	return 0;
 }
 
-unsigned long drm_core_get_map_ofs(struct drm_map * map)
+resource_size_t drm_core_get_map_ofs(struct drm_local_map * map)
 {
 	return map->offset;
 }
 
 EXPORT_SYMBOL(drm_core_get_map_ofs);
 
-unsigned long drm_core_get_reg_ofs(struct drm_device *dev)
+resource_size_t drm_core_get_reg_ofs(struct drm_device *dev)
 {
 #ifdef __alpha__
 	return dev->hose->dense_mem_base - dev->hose->mem_space->start;
@@ -547,8 +549,8 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
 {
 	struct drm_file *priv = filp->private_data;
 	struct drm_device *dev = priv->minor->dev;
-	struct drm_map *map = NULL;
-	unsigned long offset = 0;
+	struct drm_local_map *map = NULL;
+	resource_size_t offset = 0;
 	struct drm_hash_item *hash;
 
 	DRM_DEBUG("start = 0x%lx, end = 0x%lx, page offset = 0x%lx\n",
@@ -623,9 +625,9 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
 				       vma->vm_page_prot))
 			return -EAGAIN;
 		DRM_DEBUG("   Type = %d; start = 0x%lx, end = 0x%lx,"
-			  " offset = 0x%lx\n",
+			  " offset = 0x%llx\n",
 			  map->type,
-			  vma->vm_start, vma->vm_end, map->offset + offset);
+			  vma->vm_start, vma->vm_end, (unsigned long long)(map->offset + offset));
 		vma->vm_ops = &drm_vm_ops;
 		break;
 	case _DRM_CONSISTENT:
diff --git a/drivers/gpu/drm/i810/i810_drv.h b/drivers/gpu/drm/i810/i810_drv.h
index 0118849a5672..21e2691f28f9 100644
--- a/drivers/gpu/drm/i810/i810_drv.h
+++ b/drivers/gpu/drm/i810/i810_drv.h
@@ -77,8 +77,8 @@ typedef struct _drm_i810_ring_buffer {
 } drm_i810_ring_buffer_t;
 
 typedef struct drm_i810_private {
-	struct drm_map *sarea_map;
-	struct drm_map *mmio_map;
+	struct drm_local_map *sarea_map;
+	struct drm_local_map *mmio_map;
 
 	drm_i810_sarea_t *sarea_priv;
 	drm_i810_ring_buffer_t ring;
diff --git a/drivers/gpu/drm/i830/i830_drv.h b/drivers/gpu/drm/i830/i830_drv.h
index b5bf8cc0fdaa..da82afe4ded5 100644
--- a/drivers/gpu/drm/i830/i830_drv.h
+++ b/drivers/gpu/drm/i830/i830_drv.h
@@ -84,8 +84,8 @@ typedef struct _drm_i830_ring_buffer {
 } drm_i830_ring_buffer_t;
 
 typedef struct drm_i830_private {
-	struct drm_map *sarea_map;
-	struct drm_map *mmio_map;
+	struct drm_local_map *sarea_map;
+	struct drm_local_map *mmio_map;
 
 	drm_i830_sarea_t *sarea_priv;
 	drm_i830_ring_buffer_t ring;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 793cba39d832..51c5a050aa73 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -7,7 +7,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
           i915_suspend.o \
 	  i915_gem.o \
 	  i915_gem_debug.o \
-	  i915_gem_proc.o \
+	  i915_gem_debugfs.o \
 	  i915_gem_tiling.o \
 	  intel_display.o \
 	  intel_crt.o \
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 638686904e06..a000cf028826 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -41,7 +41,6 @@
 int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
 	u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD;
 	u32 last_acthd = I915_READ(acthd_reg);
@@ -58,8 +57,12 @@ int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
 		if (ring->space >= n)
 			return 0;
 
-		if (master_priv->sarea_priv)
-			master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
+		if (dev->primary->master) {
+			struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
+			if (master_priv->sarea_priv)
+				master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
+		}
+
 
 		if (ring->head != last_head)
 			i = 0;
@@ -356,7 +359,7 @@ static int validate_cmd(int cmd)
 	return ret;
 }
 
-static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwords)
+static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	int i;
@@ -370,8 +373,7 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
 	for (i = 0; i < dwords;) {
 		int cmd, sz;
 
-		if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
-			return -EINVAL;
+		cmd = buffer[i];
 
 		if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 			return -EINVAL;
@@ -379,11 +381,7 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
 		OUT_RING(cmd);
 
 		while (++i, --sz) {
-			if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
-							 sizeof(cmd))) {
-				return -EINVAL;
-			}
-			OUT_RING(cmd);
+			OUT_RING(buffer[i]);
 		}
 	}
 
@@ -397,17 +395,13 @@ static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, int dwor
 
 int
 i915_emit_box(struct drm_device *dev,
-	      struct drm_clip_rect __user *boxes,
+	      struct drm_clip_rect *boxes,
 	      int i, int DR1, int DR4)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_clip_rect box;
+	struct drm_clip_rect box = boxes[i];
 	RING_LOCALS;
 
-	if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
-		return -EFAULT;
-	}
-
 	if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 		DRM_ERROR("Bad box %d,%d..%d,%d\n",
 			  box.x1, box.y1, box.x2, box.y2);
@@ -460,7 +454,9 @@ static void i915_emit_breadcrumb(struct drm_device *dev)
 }
 
 static int i915_dispatch_cmdbuffer(struct drm_device * dev,
-				   drm_i915_cmdbuffer_t * cmd)
+				   drm_i915_cmdbuffer_t *cmd,
+				   struct drm_clip_rect *cliprects,
+				   void *cmdbuf)
 {
 	int nbox = cmd->num_cliprects;
 	int i = 0, count, ret;
@@ -476,13 +472,13 @@ static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 
 	for (i = 0; i < count; i++) {
 		if (i < nbox) {
-			ret = i915_emit_box(dev, cmd->cliprects, i,
+			ret = i915_emit_box(dev, cliprects, i,
 					    cmd->DR1, cmd->DR4);
 			if (ret)
 				return ret;
 		}
 
-		ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
+		ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
 		if (ret)
 			return ret;
 	}
@@ -492,10 +488,10 @@ static int i915_dispatch_cmdbuffer(struct drm_device * dev,
 }
 
 static int i915_dispatch_batchbuffer(struct drm_device * dev,
-				     drm_i915_batchbuffer_t * batch)
+				     drm_i915_batchbuffer_t * batch,
+				     struct drm_clip_rect *cliprects)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_clip_rect __user *boxes = batch->cliprects;
 	int nbox = batch->num_cliprects;
 	int i = 0, count;
 	RING_LOCALS;
@@ -511,7 +507,7 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev,
 
 	for (i = 0; i < count; i++) {
 		if (i < nbox) {
-			int ret = i915_emit_box(dev, boxes, i,
+			int ret = i915_emit_box(dev, cliprects, i,
 						batch->DR1, batch->DR4);
 			if (ret)
 				return ret;
@@ -626,6 +622,7 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,
 	    master_priv->sarea_priv;
 	drm_i915_batchbuffer_t *batch = data;
 	int ret;
+	struct drm_clip_rect *cliprects = NULL;
 
 	if (!dev_priv->allow_batchbuffer) {
 		DRM_ERROR("Batchbuffer ioctl disabled\n");
@@ -637,17 +634,35 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,
 
 	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
 
-	if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
-						       batch->num_cliprects *
-						       sizeof(struct drm_clip_rect)))
-		return -EFAULT;
+	if (batch->num_cliprects < 0)
+		return -EINVAL;
+
+	if (batch->num_cliprects) {
+		cliprects = drm_calloc(batch->num_cliprects,
+				       sizeof(struct drm_clip_rect),
+				       DRM_MEM_DRIVER);
+		if (cliprects == NULL)
+			return -ENOMEM;
+
+		ret = copy_from_user(cliprects, batch->cliprects,
+				     batch->num_cliprects *
+				     sizeof(struct drm_clip_rect));
+		if (ret != 0)
+			goto fail_free;
+	}
 
 	mutex_lock(&dev->struct_mutex);
-	ret = i915_dispatch_batchbuffer(dev, batch);
+	ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
 	mutex_unlock(&dev->struct_mutex);
 
 	if (sarea_priv)
 		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
+
+fail_free:
+	drm_free(cliprects,
+		 batch->num_cliprects * sizeof(struct drm_clip_rect),
+		 DRM_MEM_DRIVER);
+
 	return ret;
 }
 
@@ -659,6 +674,8 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
 	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 	    master_priv->sarea_priv;
 	drm_i915_cmdbuffer_t *cmdbuf = data;
+	struct drm_clip_rect *cliprects = NULL;
+	void *batch_data;
 	int ret;
 
 	DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
@@ -666,25 +683,50 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
 
 	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
 
-	if (cmdbuf->num_cliprects &&
-	    DRM_VERIFYAREA_READ(cmdbuf->cliprects,
-				cmdbuf->num_cliprects *
-				sizeof(struct drm_clip_rect))) {
-		DRM_ERROR("Fault accessing cliprects\n");
-		return -EFAULT;
+	if (cmdbuf->num_cliprects < 0)
+		return -EINVAL;
+
+	batch_data = drm_alloc(cmdbuf->sz, DRM_MEM_DRIVER);
+	if (batch_data == NULL)
+		return -ENOMEM;
+
+	ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
+	if (ret != 0)
+		goto fail_batch_free;
+
+	if (cmdbuf->num_cliprects) {
+		cliprects = drm_calloc(cmdbuf->num_cliprects,
+				       sizeof(struct drm_clip_rect),
+				       DRM_MEM_DRIVER);
+		if (cliprects == NULL)
+			goto fail_batch_free;
+
+		ret = copy_from_user(cliprects, cmdbuf->cliprects,
+				     cmdbuf->num_cliprects *
+				     sizeof(struct drm_clip_rect));
+		if (ret != 0)
+			goto fail_clip_free;
 	}
 
 	mutex_lock(&dev->struct_mutex);
-	ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
+	ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
 	mutex_unlock(&dev->struct_mutex);
 	if (ret) {
 		DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
-		return ret;
+		goto fail_batch_free;
 	}
 
 	if (sarea_priv)
 		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
-	return 0;
+
+fail_batch_free:
+	drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
+fail_clip_free:
+	drm_free(cliprects,
+		 cmdbuf->num_cliprects * sizeof(struct drm_clip_rect),
+		 DRM_MEM_DRIVER);
+
+	return ret;
 }
 
 static int i915_flip_bufs(struct drm_device *dev, void *data,
@@ -880,7 +922,7 @@ static int i915_probe_agp(struct drm_device *dev, unsigned long *aperture_size,
 	 * Some of the preallocated space is taken by the GTT
 	 * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
 	 */
-	if (IS_G4X(dev))
+	if (IS_G4X(dev) || IS_IGD(dev))
 		overhead = 4096;
 	else
 		overhead = (*aperture_size / 1024) + 4096;
@@ -988,13 +1030,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	if (ret)
 		goto destroy_ringbuffer;
 
-	/* FIXME: re-add hotplug support */
-#if 0
-	ret = drm_hotplug_init(dev);
-	if (ret)
-		goto destroy_ringbuffer;
-#endif
-
 	/* Always safe in the mode setting case. */
 	/* FIXME: do pre/post-mode set stuff in core KMS code */
 	dev->vblank_disable_allowed = 1;
@@ -1007,7 +1042,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
 
 	intel_modeset_init(dev);
 
-	drm_helper_initial_config(dev, false);
+	drm_helper_initial_config(dev);
 
 	return 0;
 
@@ -1057,7 +1092,7 @@ void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
 int i915_driver_load(struct drm_device *dev, unsigned long flags)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	unsigned long base, size;
+	resource_size_t base, size;
 	int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
 
 	/* i915 has 4 more counters */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 209592fdb7e7..6503e2210f65 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -42,6 +42,8 @@ module_param_named(modeset, i915_modeset, int, 0400);
 unsigned int i915_fbpercrtc = 0;
 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
 
+static struct drm_driver driver;
+
 static struct pci_device_id pciidlist[] = {
 	i915_PCI_IDS
 };
@@ -117,6 +119,36 @@ static int i915_resume(struct drm_device *dev)
 	return ret;
 }
 
+static int __devinit
+i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	return drm_get_dev(pdev, ent, &driver);
+}
+
+static void
+i915_pci_remove(struct pci_dev *pdev)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+
+	drm_put_dev(dev);
+}
+
+static int
+i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+
+	return i915_suspend(dev, state);
+}
+
+static int
+i915_pci_resume(struct pci_dev *pdev)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+
+	return i915_resume(dev);
+}
+
 static struct vm_operations_struct i915_gem_vm_ops = {
 	.fault = i915_gem_fault,
 	.open = drm_gem_vm_open,
@@ -150,8 +182,10 @@ static struct drm_driver driver = {
 	.get_reg_ofs = drm_core_get_reg_ofs,
 	.master_create = i915_master_create,
 	.master_destroy = i915_master_destroy,
-	.proc_init = i915_gem_proc_init,
-	.proc_cleanup = i915_gem_proc_cleanup,
+#if defined(CONFIG_DEBUG_FS)
+	.debugfs_init = i915_gem_debugfs_init,
+	.debugfs_cleanup = i915_gem_debugfs_cleanup,
+#endif
 	.gem_init_object = i915_gem_init_object,
 	.gem_free_object = i915_gem_free_object,
 	.gem_vm_ops = &i915_gem_vm_ops,
@@ -172,6 +206,12 @@ static struct drm_driver driver = {
 	.pci_driver = {
 		 .name = DRIVER_NAME,
 		 .id_table = pciidlist,
+		 .probe = i915_pci_probe,
+		 .remove = i915_pci_remove,
+#ifdef CONFIG_PM
+		 .resume = i915_pci_resume,
+		 .suspend = i915_pci_suspend,
+#endif
 	},
 
 	.name = DRIVER_NAME,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b9a92c250b91..3750d8003048 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -159,6 +159,9 @@ typedef struct drm_i915_private {
 	u32 irq_mask_reg;
 	u32 pipestat[2];
 
+	u32 hotplug_supported_mask;
+	struct work_struct hotplug_work;
+
 	int tex_lru_log_granularity;
 	int allow_batchbuffer;
 	struct mem_block *agp_heap;
@@ -297,6 +300,7 @@ typedef struct drm_i915_private {
 		 *
 		 * A reference is held on the buffer while on this list.
 		 */
+		spinlock_t active_list_lock;
 		struct list_head active_list;
 
 		/**
@@ -404,7 +408,8 @@ struct drm_i915_gem_object {
 	/** AGP memory structure for our GTT binding. */
 	DRM_AGP_MEM *agp_mem;
 
-	struct page **page_list;
+	struct page **pages;
+	int pages_refcount;
 
 	/**
 	 * Current offset of the object in GTT space.
@@ -519,7 +524,7 @@ extern int i915_driver_device_is_agp(struct drm_device * dev);
 extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
 			      unsigned long arg);
 extern int i915_emit_box(struct drm_device *dev,
-			 struct drm_clip_rect __user *boxes,
+			 struct drm_clip_rect *boxes,
 			 int i, int DR1, int DR4);
 
 /* i915_irq.c */
@@ -604,8 +609,6 @@ int i915_gem_get_tiling(struct drm_device *dev, void *data,
 int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
 				struct drm_file *file_priv);
 void i915_gem_load(struct drm_device *dev);
-int i915_gem_proc_init(struct drm_minor *minor);
-void i915_gem_proc_cleanup(struct drm_minor *minor);
 int i915_gem_init_object(struct drm_gem_object *obj);
 void i915_gem_free_object(struct drm_gem_object *obj);
 int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
@@ -649,6 +652,10 @@ void i915_gem_dump_object(struct drm_gem_object *obj, int len,
 			  const char *where, uint32_t mark);
 void i915_dump_lru(struct drm_device *dev, const char *where);
 
+/* i915_debugfs.c */
+int i915_gem_debugfs_init(struct drm_minor *minor);
+void i915_gem_debugfs_cleanup(struct drm_minor *minor);
+
 /* i915_suspend.c */
 extern int i915_save_state(struct drm_device *dev);
 extern int i915_restore_state(struct drm_device *dev);
@@ -784,15 +791,21 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 		     (dev)->pci_device == 0x2E22 || \
 		     IS_GM45(dev))
 
+#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
+#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
+#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
+
 #define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||	\
 			(dev)->pci_device == 0x29B2 ||	\
-			(dev)->pci_device == 0x29D2)
+			(dev)->pci_device == 0x29D2 ||  \
+			(IS_IGD(dev)))
 
 #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
 		      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
 
 #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
-			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
+			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
+			IS_IGD(dev))
 
 #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
@@ -801,6 +814,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
 						      IS_I915GM(dev)))
 #define SUPPORTS_INTEGRATED_HDMI(dev)	(IS_G4X(dev))
+#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 37427e4016cb..1449b452cc63 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -43,8 +43,8 @@ static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
 						     uint64_t offset,
 						     uint64_t size);
 static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj);
-static int i915_gem_object_get_page_list(struct drm_gem_object *obj);
-static void i915_gem_object_free_page_list(struct drm_gem_object *obj);
+static int i915_gem_object_get_pages(struct drm_gem_object *obj);
+static void i915_gem_object_put_pages(struct drm_gem_object *obj);
 static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
 static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
 					   unsigned alignment);
@@ -136,6 +136,224 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
 	return 0;
 }
 
+static inline int
+fast_shmem_read(struct page **pages,
+		loff_t page_base, int page_offset,
+		char __user *data,
+		int length)
+{
+	char __iomem *vaddr;
+	int ret;
+
+	vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
+	if (vaddr == NULL)
+		return -ENOMEM;
+	ret = __copy_to_user_inatomic(data, vaddr + page_offset, length);
+	kunmap_atomic(vaddr, KM_USER0);
+
+	return ret;
+}
+
+static inline int
+slow_shmem_copy(struct page *dst_page,
+		int dst_offset,
+		struct page *src_page,
+		int src_offset,
+		int length)
+{
+	char *dst_vaddr, *src_vaddr;
+
+	dst_vaddr = kmap_atomic(dst_page, KM_USER0);
+	if (dst_vaddr == NULL)
+		return -ENOMEM;
+
+	src_vaddr = kmap_atomic(src_page, KM_USER1);
+	if (src_vaddr == NULL) {
+		kunmap_atomic(dst_vaddr, KM_USER0);
+		return -ENOMEM;
+	}
+
+	memcpy(dst_vaddr + dst_offset, src_vaddr + src_offset, length);
+
+	kunmap_atomic(src_vaddr, KM_USER1);
+	kunmap_atomic(dst_vaddr, KM_USER0);
+
+	return 0;
+}
+
+/**
+ * This is the fast shmem pread path, which attempts to copy_from_user directly
+ * from the backing pages of the object to the user's address space.  On a
+ * fault, it fails so we can fall back to i915_gem_shmem_pwrite_slow().
+ */
+static int
+i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj,
+			  struct drm_i915_gem_pread *args,
+			  struct drm_file *file_priv)
+{
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	ssize_t remain;
+	loff_t offset, page_base;
+	char __user *user_data;
+	int page_offset, page_length;
+	int ret;
+
+	user_data = (char __user *) (uintptr_t) args->data_ptr;
+	remain = args->size;
+
+	mutex_lock(&dev->struct_mutex);
+
+	ret = i915_gem_object_get_pages(obj);
+	if (ret != 0)
+		goto fail_unlock;
+
+	ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
+							args->size);
+	if (ret != 0)
+		goto fail_put_pages;
+
+	obj_priv = obj->driver_private;
+	offset = args->offset;
+
+	while (remain > 0) {
+		/* Operation in this page
+		 *
+		 * page_base = page offset within aperture
+		 * page_offset = offset within page
+		 * page_length = bytes to copy for this page
+		 */
+		page_base = (offset & ~(PAGE_SIZE-1));
+		page_offset = offset & (PAGE_SIZE-1);
+		page_length = remain;
+		if ((page_offset + remain) > PAGE_SIZE)
+			page_length = PAGE_SIZE - page_offset;
+
+		ret = fast_shmem_read(obj_priv->pages,
+				      page_base, page_offset,
+				      user_data, page_length);
+		if (ret)
+			goto fail_put_pages;
+
+		remain -= page_length;
+		user_data += page_length;
+		offset += page_length;
+	}
+
+fail_put_pages:
+	i915_gem_object_put_pages(obj);
+fail_unlock:
+	mutex_unlock(&dev->struct_mutex);
+
+	return ret;
+}
+
+/**
+ * This is the fallback shmem pread path, which allocates temporary storage
+ * in kernel space to copy_to_user into outside of the struct_mutex, so we
+ * can copy out of the object's backing pages while holding the struct mutex
+ * and not take page faults.
+ */
+static int
+i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
+			  struct drm_i915_gem_pread *args,
+			  struct drm_file *file_priv)
+{
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	struct mm_struct *mm = current->mm;
+	struct page **user_pages;
+	ssize_t remain;
+	loff_t offset, pinned_pages, i;
+	loff_t first_data_page, last_data_page, num_pages;
+	int shmem_page_index, shmem_page_offset;
+	int data_page_index,  data_page_offset;
+	int page_length;
+	int ret;
+	uint64_t data_ptr = args->data_ptr;
+
+	remain = args->size;
+
+	/* Pin the user pages containing the data.  We can't fault while
+	 * holding the struct mutex, yet we want to hold it while
+	 * dereferencing the user data.
+	 */
+	first_data_page = data_ptr / PAGE_SIZE;
+	last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
+	num_pages = last_data_page - first_data_page + 1;
+
+	user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
+	if (user_pages == NULL)
+		return -ENOMEM;
+
+	down_read(&mm->mmap_sem);
+	pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
+				      num_pages, 0, 0, user_pages, NULL);
+	up_read(&mm->mmap_sem);
+	if (pinned_pages < num_pages) {
+		ret = -EFAULT;
+		goto fail_put_user_pages;
+	}
+
+	mutex_lock(&dev->struct_mutex);
+
+	ret = i915_gem_object_get_pages(obj);
+	if (ret != 0)
+		goto fail_unlock;
+
+	ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
+							args->size);
+	if (ret != 0)
+		goto fail_put_pages;
+
+	obj_priv = obj->driver_private;
+	offset = args->offset;
+
+	while (remain > 0) {
+		/* Operation in this page
+		 *
+		 * shmem_page_index = page number within shmem file
+		 * shmem_page_offset = offset within page in shmem file
+		 * data_page_index = page number in get_user_pages return
+		 * data_page_offset = offset with data_page_index page.
+		 * page_length = bytes to copy for this page
+		 */
+		shmem_page_index = offset / PAGE_SIZE;
+		shmem_page_offset = offset & ~PAGE_MASK;
+		data_page_index = data_ptr / PAGE_SIZE - first_data_page;
+		data_page_offset = data_ptr & ~PAGE_MASK;
+
+		page_length = remain;
+		if ((shmem_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - shmem_page_offset;
+		if ((data_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - data_page_offset;
+
+		ret = slow_shmem_copy(user_pages[data_page_index],
+				      data_page_offset,
+				      obj_priv->pages[shmem_page_index],
+				      shmem_page_offset,
+				      page_length);
+		if (ret)
+			goto fail_put_pages;
+
+		remain -= page_length;
+		data_ptr += page_length;
+		offset += page_length;
+	}
+
+fail_put_pages:
+	i915_gem_object_put_pages(obj);
+fail_unlock:
+	mutex_unlock(&dev->struct_mutex);
+fail_put_user_pages:
+	for (i = 0; i < pinned_pages; i++) {
+		SetPageDirty(user_pages[i]);
+		page_cache_release(user_pages[i]);
+	}
+	kfree(user_pages);
+
+	return ret;
+}
+
 /**
  * Reads data from the object referenced by handle.
  *
@@ -148,8 +366,6 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
 	struct drm_i915_gem_pread *args = data;
 	struct drm_gem_object *obj;
 	struct drm_i915_gem_object *obj_priv;
-	ssize_t read;
-	loff_t offset;
 	int ret;
 
 	obj = drm_gem_object_lookup(dev, file_priv, args->handle);
@@ -167,33 +383,13 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
 		return -EINVAL;
 	}
 
-	mutex_lock(&dev->struct_mutex);
-
-	ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
-							args->size);
-	if (ret != 0) {
-		drm_gem_object_unreference(obj);
-		mutex_unlock(&dev->struct_mutex);
-		return ret;
-	}
-
-	offset = args->offset;
-
-	read = vfs_read(obj->filp, (char __user *)(uintptr_t)args->data_ptr,
-			args->size, &offset);
-	if (read != args->size) {
-		drm_gem_object_unreference(obj);
-		mutex_unlock(&dev->struct_mutex);
-		if (read < 0)
-			return read;
-		else
-			return -EINVAL;
-	}
+	ret = i915_gem_shmem_pread_fast(dev, obj, args, file_priv);
+	if (ret != 0)
+		ret = i915_gem_shmem_pread_slow(dev, obj, args, file_priv);
 
 	drm_gem_object_unreference(obj);
-	mutex_unlock(&dev->struct_mutex);
 
-	return 0;
+	return ret;
 }
 
 /* This is the fast write path which cannot handle
@@ -223,29 +419,54 @@ fast_user_write(struct io_mapping *mapping,
  */
 
 static inline int
-slow_user_write(struct io_mapping *mapping,
-		loff_t page_base, int page_offset,
-		char __user *user_data,
-		int length)
+slow_kernel_write(struct io_mapping *mapping,
+		  loff_t gtt_base, int gtt_offset,
+		  struct page *user_page, int user_offset,
+		  int length)
+{
+	char *src_vaddr, *dst_vaddr;
+	unsigned long unwritten;
+
+	dst_vaddr = io_mapping_map_atomic_wc(mapping, gtt_base);
+	src_vaddr = kmap_atomic(user_page, KM_USER1);
+	unwritten = __copy_from_user_inatomic_nocache(dst_vaddr + gtt_offset,
+						      src_vaddr + user_offset,
+						      length);
+	kunmap_atomic(src_vaddr, KM_USER1);
+	io_mapping_unmap_atomic(dst_vaddr);
+	if (unwritten)
+		return -EFAULT;
+	return 0;
+}
+
+static inline int
+fast_shmem_write(struct page **pages,
+		 loff_t page_base, int page_offset,
+		 char __user *data,
+		 int length)
 {
 	char __iomem *vaddr;
 	unsigned long unwritten;
 
-	vaddr = io_mapping_map_wc(mapping, page_base);
+	vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
 	if (vaddr == NULL)
-		return -EFAULT;
-	unwritten = __copy_from_user(vaddr + page_offset,
-				     user_data, length);
-	io_mapping_unmap(vaddr);
+		return -ENOMEM;
+	unwritten = __copy_from_user_inatomic(vaddr + page_offset, data, length);
+	kunmap_atomic(vaddr, KM_USER0);
+
 	if (unwritten)
 		return -EFAULT;
 	return 0;
 }
 
+/**
+ * This is the fast pwrite path, where we copy the data directly from the
+ * user into the GTT, uncached.
+ */
 static int
-i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
-		    struct drm_i915_gem_pwrite *args,
-		    struct drm_file *file_priv)
+i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
+			 struct drm_i915_gem_pwrite *args,
+			 struct drm_file *file_priv)
 {
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	drm_i915_private_t *dev_priv = dev->dev_private;
@@ -273,7 +494,6 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
 
 	obj_priv = obj->driver_private;
 	offset = obj_priv->gtt_offset + args->offset;
-	obj_priv->dirty = 1;
 
 	while (remain > 0) {
 		/* Operation in this page
@@ -292,16 +512,11 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
 				       page_offset, user_data, page_length);
 
 		/* If we get a fault while copying data, then (presumably) our
-		 * source page isn't available. In this case, use the
-		 * non-atomic function
+		 * source page isn't available.  Return the error and we'll
+		 * retry in the slow path.
 		 */
-		if (ret) {
-			ret = slow_user_write (dev_priv->mm.gtt_mapping,
-					       page_base, page_offset,
-					       user_data, page_length);
-			if (ret)
-				goto fail;
-		}
+		if (ret)
+			goto fail;
 
 		remain -= page_length;
 		user_data += page_length;
@@ -315,39 +530,284 @@ fail:
 	return ret;
 }
 
+/**
+ * This is the fallback GTT pwrite path, which uses get_user_pages to pin
+ * the memory and maps it using kmap_atomic for copying.
+ *
+ * This code resulted in x11perf -rgb10text consuming about 10% more CPU
+ * than using i915_gem_gtt_pwrite_fast on a G45 (32-bit).
+ */
 static int
-i915_gem_shmem_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
-		      struct drm_i915_gem_pwrite *args,
-		      struct drm_file *file_priv)
+i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
+			 struct drm_i915_gem_pwrite *args,
+			 struct drm_file *file_priv)
 {
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	ssize_t remain;
+	loff_t gtt_page_base, offset;
+	loff_t first_data_page, last_data_page, num_pages;
+	loff_t pinned_pages, i;
+	struct page **user_pages;
+	struct mm_struct *mm = current->mm;
+	int gtt_page_offset, data_page_offset, data_page_index, page_length;
 	int ret;
-	loff_t offset;
-	ssize_t written;
+	uint64_t data_ptr = args->data_ptr;
+
+	remain = args->size;
+
+	/* Pin the user pages containing the data.  We can't fault while
+	 * holding the struct mutex, and all of the pwrite implementations
+	 * want to hold it while dereferencing the user data.
+	 */
+	first_data_page = data_ptr / PAGE_SIZE;
+	last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
+	num_pages = last_data_page - first_data_page + 1;
+
+	user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
+	if (user_pages == NULL)
+		return -ENOMEM;
+
+	down_read(&mm->mmap_sem);
+	pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
+				      num_pages, 0, 0, user_pages, NULL);
+	up_read(&mm->mmap_sem);
+	if (pinned_pages < num_pages) {
+		ret = -EFAULT;
+		goto out_unpin_pages;
+	}
+
+	mutex_lock(&dev->struct_mutex);
+	ret = i915_gem_object_pin(obj, 0);
+	if (ret)
+		goto out_unlock;
+
+	ret = i915_gem_object_set_to_gtt_domain(obj, 1);
+	if (ret)
+		goto out_unpin_object;
+
+	obj_priv = obj->driver_private;
+	offset = obj_priv->gtt_offset + args->offset;
+
+	while (remain > 0) {
+		/* Operation in this page
+		 *
+		 * gtt_page_base = page offset within aperture
+		 * gtt_page_offset = offset within page in aperture
+		 * data_page_index = page number in get_user_pages return
+		 * data_page_offset = offset with data_page_index page.
+		 * page_length = bytes to copy for this page
+		 */
+		gtt_page_base = offset & PAGE_MASK;
+		gtt_page_offset = offset & ~PAGE_MASK;
+		data_page_index = data_ptr / PAGE_SIZE - first_data_page;
+		data_page_offset = data_ptr & ~PAGE_MASK;
+
+		page_length = remain;
+		if ((gtt_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - gtt_page_offset;
+		if ((data_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - data_page_offset;
+
+		ret = slow_kernel_write(dev_priv->mm.gtt_mapping,
+					gtt_page_base, gtt_page_offset,
+					user_pages[data_page_index],
+					data_page_offset,
+					page_length);
+
+		/* If we get a fault while copying data, then (presumably) our
+		 * source page isn't available.  Return the error and we'll
+		 * retry in the slow path.
+		 */
+		if (ret)
+			goto out_unpin_object;
+
+		remain -= page_length;
+		offset += page_length;
+		data_ptr += page_length;
+	}
+
+out_unpin_object:
+	i915_gem_object_unpin(obj);
+out_unlock:
+	mutex_unlock(&dev->struct_mutex);
+out_unpin_pages:
+	for (i = 0; i < pinned_pages; i++)
+		page_cache_release(user_pages[i]);
+	kfree(user_pages);
+
+	return ret;
+}
+
+/**
+ * This is the fast shmem pwrite path, which attempts to directly
+ * copy_from_user into the kmapped pages backing the object.
+ */
+static int
+i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
+			   struct drm_i915_gem_pwrite *args,
+			   struct drm_file *file_priv)
+{
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	ssize_t remain;
+	loff_t offset, page_base;
+	char __user *user_data;
+	int page_offset, page_length;
+	int ret;
+
+	user_data = (char __user *) (uintptr_t) args->data_ptr;
+	remain = args->size;
 
 	mutex_lock(&dev->struct_mutex);
 
+	ret = i915_gem_object_get_pages(obj);
+	if (ret != 0)
+		goto fail_unlock;
+
 	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
-	if (ret) {
-		mutex_unlock(&dev->struct_mutex);
-		return ret;
+	if (ret != 0)
+		goto fail_put_pages;
+
+	obj_priv = obj->driver_private;
+	offset = args->offset;
+	obj_priv->dirty = 1;
+
+	while (remain > 0) {
+		/* Operation in this page
+		 *
+		 * page_base = page offset within aperture
+		 * page_offset = offset within page
+		 * page_length = bytes to copy for this page
+		 */
+		page_base = (offset & ~(PAGE_SIZE-1));
+		page_offset = offset & (PAGE_SIZE-1);
+		page_length = remain;
+		if ((page_offset + remain) > PAGE_SIZE)
+			page_length = PAGE_SIZE - page_offset;
+
+		ret = fast_shmem_write(obj_priv->pages,
+				       page_base, page_offset,
+				       user_data, page_length);
+		if (ret)
+			goto fail_put_pages;
+
+		remain -= page_length;
+		user_data += page_length;
+		offset += page_length;
+	}
+
+fail_put_pages:
+	i915_gem_object_put_pages(obj);
+fail_unlock:
+	mutex_unlock(&dev->struct_mutex);
+
+	return ret;
+}
+
+/**
+ * This is the fallback shmem pwrite path, which uses get_user_pages to pin
+ * the memory and maps it using kmap_atomic for copying.
+ *
+ * This avoids taking mmap_sem for faulting on the user's address while the
+ * struct_mutex is held.
+ */
+static int
+i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
+			   struct drm_i915_gem_pwrite *args,
+			   struct drm_file *file_priv)
+{
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	struct mm_struct *mm = current->mm;
+	struct page **user_pages;
+	ssize_t remain;
+	loff_t offset, pinned_pages, i;
+	loff_t first_data_page, last_data_page, num_pages;
+	int shmem_page_index, shmem_page_offset;
+	int data_page_index,  data_page_offset;
+	int page_length;
+	int ret;
+	uint64_t data_ptr = args->data_ptr;
+
+	remain = args->size;
+
+	/* Pin the user pages containing the data.  We can't fault while
+	 * holding the struct mutex, and all of the pwrite implementations
+	 * want to hold it while dereferencing the user data.
+	 */
+	first_data_page = data_ptr / PAGE_SIZE;
+	last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
+	num_pages = last_data_page - first_data_page + 1;
+
+	user_pages = kcalloc(num_pages, sizeof(struct page *), GFP_KERNEL);
+	if (user_pages == NULL)
+		return -ENOMEM;
+
+	down_read(&mm->mmap_sem);
+	pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
+				      num_pages, 0, 0, user_pages, NULL);
+	up_read(&mm->mmap_sem);
+	if (pinned_pages < num_pages) {
+		ret = -EFAULT;
+		goto fail_put_user_pages;
 	}
 
+	mutex_lock(&dev->struct_mutex);
+
+	ret = i915_gem_object_get_pages(obj);
+	if (ret != 0)
+		goto fail_unlock;
+
+	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
+	if (ret != 0)
+		goto fail_put_pages;
+
+	obj_priv = obj->driver_private;
 	offset = args->offset;
+	obj_priv->dirty = 1;
 
-	written = vfs_write(obj->filp,
-			    (char __user *)(uintptr_t) args->data_ptr,
-			    args->size, &offset);
-	if (written != args->size) {
-		mutex_unlock(&dev->struct_mutex);
-		if (written < 0)
-			return written;
-		else
-			return -EINVAL;
+	while (remain > 0) {
+		/* Operation in this page
+		 *
+		 * shmem_page_index = page number within shmem file
+		 * shmem_page_offset = offset within page in shmem file
+		 * data_page_index = page number in get_user_pages return
+		 * data_page_offset = offset with data_page_index page.
+		 * page_length = bytes to copy for this page
+		 */
+		shmem_page_index = offset / PAGE_SIZE;
+		shmem_page_offset = offset & ~PAGE_MASK;
+		data_page_index = data_ptr / PAGE_SIZE - first_data_page;
+		data_page_offset = data_ptr & ~PAGE_MASK;
+
+		page_length = remain;
+		if ((shmem_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - shmem_page_offset;
+		if ((data_page_offset + page_length) > PAGE_SIZE)
+			page_length = PAGE_SIZE - data_page_offset;
+
+		ret = slow_shmem_copy(obj_priv->pages[shmem_page_index],
+				      shmem_page_offset,
+				      user_pages[data_page_index],
+				      data_page_offset,
+				      page_length);
+		if (ret)
+			goto fail_put_pages;
+
+		remain -= page_length;
+		data_ptr += page_length;
+		offset += page_length;
 	}
 
+fail_put_pages:
+	i915_gem_object_put_pages(obj);
+fail_unlock:
 	mutex_unlock(&dev->struct_mutex);
+fail_put_user_pages:
+	for (i = 0; i < pinned_pages; i++)
+		page_cache_release(user_pages[i]);
+	kfree(user_pages);
 
-	return 0;
+	return ret;
 }
 
 /**
@@ -388,10 +848,19 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 	if (obj_priv->phys_obj)
 		ret = i915_gem_phys_pwrite(dev, obj, args, file_priv);
 	else if (obj_priv->tiling_mode == I915_TILING_NONE &&
-		 dev->gtt_total != 0)
-		ret = i915_gem_gtt_pwrite(dev, obj, args, file_priv);
-	else
-		ret = i915_gem_shmem_pwrite(dev, obj, args, file_priv);
+		 dev->gtt_total != 0) {
+		ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file_priv);
+		if (ret == -EFAULT) {
+			ret = i915_gem_gtt_pwrite_slow(dev, obj, args,
+						       file_priv);
+		}
+	} else {
+		ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file_priv);
+		if (ret == -EFAULT) {
+			ret = i915_gem_shmem_pwrite_slow(dev, obj, args,
+							 file_priv);
+		}
+	}
 
 #if WATCH_PWRITE
 	if (ret)
@@ -603,6 +1072,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 	case -EAGAIN:
 		return VM_FAULT_OOM;
 	case -EFAULT:
+	case -EINVAL:
 		return VM_FAULT_SIGBUS;
 	default:
 		return VM_FAULT_NOPAGE;
@@ -627,7 +1097,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj)
 	struct drm_gem_mm *mm = dev->mm_private;
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	struct drm_map_list *list;
-	struct drm_map *map;
+	struct drm_local_map *map;
 	int ret = 0;
 
 	/* Set the object up for mmap'ing */
@@ -816,29 +1286,30 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
 }
 
 static void
-i915_gem_object_free_page_list(struct drm_gem_object *obj)
+i915_gem_object_put_pages(struct drm_gem_object *obj)
 {
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	int page_count = obj->size / PAGE_SIZE;
 	int i;
 
-	if (obj_priv->page_list == NULL)
-		return;
+	BUG_ON(obj_priv->pages_refcount == 0);
 
+	if (--obj_priv->pages_refcount != 0)
+		return;
 
 	for (i = 0; i < page_count; i++)
-		if (obj_priv->page_list[i] != NULL) {
+		if (obj_priv->pages[i] != NULL) {
 			if (obj_priv->dirty)
-				set_page_dirty(obj_priv->page_list[i]);
-			mark_page_accessed(obj_priv->page_list[i]);
-			page_cache_release(obj_priv->page_list[i]);
+				set_page_dirty(obj_priv->pages[i]);
+			mark_page_accessed(obj_priv->pages[i]);
+			page_cache_release(obj_priv->pages[i]);
 		}
 	obj_priv->dirty = 0;
 
-	drm_free(obj_priv->page_list,
+	drm_free(obj_priv->pages,
 		 page_count * sizeof(struct page *),
 		 DRM_MEM_DRIVER);
-	obj_priv->page_list = NULL;
+	obj_priv->pages = NULL;
 }
 
 static void
@@ -854,8 +1325,10 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno)
 		obj_priv->active = 1;
 	}
 	/* Move from whatever list we were on to the tail of execution. */
+	spin_lock(&dev_priv->mm.active_list_lock);
 	list_move_tail(&obj_priv->list,
 		       &dev_priv->mm.active_list);
+	spin_unlock(&dev_priv->mm.active_list_lock);
 	obj_priv->last_rendering_seqno = seqno;
 }
 
@@ -997,6 +1470,7 @@ i915_gem_retire_request(struct drm_device *dev,
 	/* Move any buffers on the active list that are no longer referenced
 	 * by the ringbuffer to the flushing/inactive lists as appropriate.
 	 */
+	spin_lock(&dev_priv->mm.active_list_lock);
 	while (!list_empty(&dev_priv->mm.active_list)) {
 		struct drm_gem_object *obj;
 		struct drm_i915_gem_object *obj_priv;
@@ -1011,7 +1485,7 @@ i915_gem_retire_request(struct drm_device *dev,
 		 * this seqno.
 		 */
 		if (obj_priv->last_rendering_seqno != request->seqno)
-			return;
+			goto out;
 
 #if WATCH_LRU
 		DRM_INFO("%s: retire %d moves to inactive list %p\n",
@@ -1023,6 +1497,8 @@ i915_gem_retire_request(struct drm_device *dev,
 		else
 			i915_gem_object_move_to_inactive(obj);
 	}
+out:
+	spin_unlock(&dev_priv->mm.active_list_lock);
 }
 
 /**
@@ -1290,7 +1766,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
 	if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
 		i915_gem_clear_fence_reg(obj);
 
-	i915_gem_object_free_page_list(obj);
+	i915_gem_object_put_pages(obj);
 
 	if (obj_priv->gtt_space) {
 		atomic_dec(&dev->gtt_count);
@@ -1409,7 +1885,7 @@ i915_gem_evict_everything(struct drm_device *dev)
 }
 
 static int
-i915_gem_object_get_page_list(struct drm_gem_object *obj)
+i915_gem_object_get_pages(struct drm_gem_object *obj)
 {
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	int page_count, i;
@@ -1418,18 +1894,19 @@ i915_gem_object_get_page_list(struct drm_gem_object *obj)
 	struct page *page;
 	int ret;
 
-	if (obj_priv->page_list)
+	if (obj_priv->pages_refcount++ != 0)
 		return 0;
 
 	/* Get the list of pages out of our struct file.  They'll be pinned
 	 * at this point until we release them.
 	 */
 	page_count = obj->size / PAGE_SIZE;
-	BUG_ON(obj_priv->page_list != NULL);
-	obj_priv->page_list = drm_calloc(page_count, sizeof(struct page *),
-					 DRM_MEM_DRIVER);
-	if (obj_priv->page_list == NULL) {
+	BUG_ON(obj_priv->pages != NULL);
+	obj_priv->pages = drm_calloc(page_count, sizeof(struct page *),
+				     DRM_MEM_DRIVER);
+	if (obj_priv->pages == NULL) {
 		DRM_ERROR("Faled to allocate page list\n");
+		obj_priv->pages_refcount--;
 		return -ENOMEM;
 	}
 
@@ -1440,10 +1917,10 @@ i915_gem_object_get_page_list(struct drm_gem_object *obj)
 		if (IS_ERR(page)) {
 			ret = PTR_ERR(page);
 			DRM_ERROR("read_mapping_page failed: %d\n", ret);
-			i915_gem_object_free_page_list(obj);
+			i915_gem_object_put_pages(obj);
 			return ret;
 		}
-		obj_priv->page_list[i] = page;
+		obj_priv->pages[i] = page;
 	}
 	return 0;
 }
@@ -1519,20 +1996,23 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
 	int regnum = obj_priv->fence_reg;
 	uint32_t val;
 	uint32_t pitch_val;
+	uint32_t fence_size_bits;
 
-	if ((obj_priv->gtt_offset & ~I915_FENCE_START_MASK) ||
+	if ((obj_priv->gtt_offset & ~I830_FENCE_START_MASK) ||
 	    (obj_priv->gtt_offset & (obj->size - 1))) {
-		WARN(1, "%s: object 0x%08x not 1M or size aligned\n",
+		WARN(1, "%s: object 0x%08x not 512K or size aligned\n",
 		     __func__, obj_priv->gtt_offset);
 		return;
 	}
 
 	pitch_val = (obj_priv->stride / 128) - 1;
-
+	WARN_ON(pitch_val & ~0x0000000f);
 	val = obj_priv->gtt_offset;
 	if (obj_priv->tiling_mode == I915_TILING_Y)
 		val |= 1 << I830_FENCE_TILING_Y_SHIFT;
-	val |= I830_FENCE_SIZE_BITS(obj->size);
+	fence_size_bits = I830_FENCE_SIZE_BITS(obj->size);
+	WARN_ON(fence_size_bits & ~0x00000f00);
+	val |= fence_size_bits;
 	val |= pitch_val << I830_FENCE_PITCH_SHIFT;
 	val |= I830_FENCE_REG_VALID;
 
@@ -1723,7 +2203,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
 		return -EBUSY;
 	if (alignment == 0)
 		alignment = i915_gem_get_gtt_alignment(obj);
-	if (alignment & (PAGE_SIZE - 1)) {
+	if (alignment & (i915_gem_get_gtt_alignment(obj) - 1)) {
 		DRM_ERROR("Invalid object alignment requested %u\n", alignment);
 		return -EINVAL;
 	}
@@ -1740,15 +2220,20 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
 		}
 	}
 	if (obj_priv->gtt_space == NULL) {
+		bool lists_empty;
+
 		/* If the gtt is empty and we're still having trouble
 		 * fitting our object in, we're out of memory.
 		 */
 #if WATCH_LRU
 		DRM_INFO("%s: GTT full, evicting something\n", __func__);
 #endif
-		if (list_empty(&dev_priv->mm.inactive_list) &&
-		    list_empty(&dev_priv->mm.flushing_list) &&
-		    list_empty(&dev_priv->mm.active_list)) {
+		spin_lock(&dev_priv->mm.active_list_lock);
+		lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
+			       list_empty(&dev_priv->mm.flushing_list) &&
+			       list_empty(&dev_priv->mm.active_list));
+		spin_unlock(&dev_priv->mm.active_list_lock);
+		if (lists_empty) {
 			DRM_ERROR("GTT full, but LRU list empty\n");
 			return -ENOMEM;
 		}
@@ -1766,7 +2251,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
 	DRM_INFO("Binding object of size %d at 0x%08x\n",
 		 obj->size, obj_priv->gtt_offset);
 #endif
-	ret = i915_gem_object_get_page_list(obj);
+	ret = i915_gem_object_get_pages(obj);
 	if (ret) {
 		drm_mm_put_block(obj_priv->gtt_space);
 		obj_priv->gtt_space = NULL;
@@ -1778,12 +2263,12 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
 	 * into the GTT.
 	 */
 	obj_priv->agp_mem = drm_agp_bind_pages(dev,
-					       obj_priv->page_list,
+					       obj_priv->pages,
 					       page_count,
 					       obj_priv->gtt_offset,
 					       obj_priv->agp_type);
 	if (obj_priv->agp_mem == NULL) {
-		i915_gem_object_free_page_list(obj);
+		i915_gem_object_put_pages(obj);
 		drm_mm_put_block(obj_priv->gtt_space);
 		obj_priv->gtt_space = NULL;
 		return -ENOMEM;
@@ -1810,10 +2295,10 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
 	 * to GPU, and we can ignore the cache flush because it'll happen
 	 * again at bind time.
 	 */
-	if (obj_priv->page_list == NULL)
+	if (obj_priv->pages == NULL)
 		return;
 
-	drm_clflush_pages(obj_priv->page_list, obj->size / PAGE_SIZE);
+	drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
 }
 
 /** Flushes any GPU write domain for the object if it's dirty. */
@@ -1913,7 +2398,6 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
 static int
 i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
 {
-	struct drm_device *dev = obj->dev;
 	int ret;
 
 	i915_gem_object_flush_gpu_write_domain(obj);
@@ -1932,7 +2416,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
 	/* Flush the CPU cache if it's still invalid. */
 	if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) {
 		i915_gem_clflush_object(obj);
-		drm_agp_chipset_flush(dev);
 
 		obj->read_domains |= I915_GEM_DOMAIN_CPU;
 	}
@@ -2144,7 +2627,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj)
 static void
 i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj)
 {
-	struct drm_device *dev = obj->dev;
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 
 	if (!obj_priv->page_cpu_valid)
@@ -2158,9 +2640,8 @@ i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj)
 		for (i = 0; i <= (obj->size - 1) / PAGE_SIZE; i++) {
 			if (obj_priv->page_cpu_valid[i])
 				continue;
-			drm_clflush_pages(obj_priv->page_list + i, 1);
+			drm_clflush_pages(obj_priv->pages + i, 1);
 		}
-		drm_agp_chipset_flush(dev);
 	}
 
 	/* Free the page_cpu_valid mappings which are now stale, whether
@@ -2224,7 +2705,7 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
 		if (obj_priv->page_cpu_valid[i])
 			continue;
 
-		drm_clflush_pages(obj_priv->page_list + i, 1);
+		drm_clflush_pages(obj_priv->pages + i, 1);
 
 		obj_priv->page_cpu_valid[i] = 1;
 	}
@@ -2245,12 +2726,11 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
 static int
 i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 				 struct drm_file *file_priv,
-				 struct drm_i915_gem_exec_object *entry)
+				 struct drm_i915_gem_exec_object *entry,
+				 struct drm_i915_gem_relocation_entry *relocs)
 {
 	struct drm_device *dev = obj->dev;
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_relocation_entry reloc;
-	struct drm_i915_gem_relocation_entry __user *relocs;
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	int i, ret;
 	void __iomem *reloc_page;
@@ -2262,25 +2742,18 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 
 	entry->offset = obj_priv->gtt_offset;
 
-	relocs = (struct drm_i915_gem_relocation_entry __user *)
-		 (uintptr_t) entry->relocs_ptr;
 	/* Apply the relocations, using the GTT aperture to avoid cache
 	 * flushing requirements.
 	 */
 	for (i = 0; i < entry->relocation_count; i++) {
+		struct drm_i915_gem_relocation_entry *reloc= &relocs[i];
 		struct drm_gem_object *target_obj;
 		struct drm_i915_gem_object *target_obj_priv;
 		uint32_t reloc_val, reloc_offset;
 		uint32_t __iomem *reloc_entry;
 
-		ret = copy_from_user(&reloc, relocs + i, sizeof(reloc));
-		if (ret != 0) {
-			i915_gem_object_unpin(obj);
-			return ret;
-		}
-
 		target_obj = drm_gem_object_lookup(obj->dev, file_priv,
-						   reloc.target_handle);
+						   reloc->target_handle);
 		if (target_obj == NULL) {
 			i915_gem_object_unpin(obj);
 			return -EBADF;
@@ -2292,53 +2765,53 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 		 */
 		if (target_obj_priv->gtt_space == NULL) {
 			DRM_ERROR("No GTT space found for object %d\n",
-				  reloc.target_handle);
+				  reloc->target_handle);
 			drm_gem_object_unreference(target_obj);
 			i915_gem_object_unpin(obj);
 			return -EINVAL;
 		}
 
-		if (reloc.offset > obj->size - 4) {
+		if (reloc->offset > obj->size - 4) {
 			DRM_ERROR("Relocation beyond object bounds: "
 				  "obj %p target %d offset %d size %d.\n",
-				  obj, reloc.target_handle,
-				  (int) reloc.offset, (int) obj->size);
+				  obj, reloc->target_handle,
+				  (int) reloc->offset, (int) obj->size);
 			drm_gem_object_unreference(target_obj);
 			i915_gem_object_unpin(obj);
 			return -EINVAL;
 		}
-		if (reloc.offset & 3) {
+		if (reloc->offset & 3) {
 			DRM_ERROR("Relocation not 4-byte aligned: "
 				  "obj %p target %d offset %d.\n",
-				  obj, reloc.target_handle,
-				  (int) reloc.offset);
+				  obj, reloc->target_handle,
+				  (int) reloc->offset);
 			drm_gem_object_unreference(target_obj);
 			i915_gem_object_unpin(obj);
 			return -EINVAL;
 		}
 
-		if (reloc.write_domain & I915_GEM_DOMAIN_CPU ||
-		    reloc.read_domains & I915_GEM_DOMAIN_CPU) {
+		if (reloc->write_domain & I915_GEM_DOMAIN_CPU ||
+		    reloc->read_domains & I915_GEM_DOMAIN_CPU) {
 			DRM_ERROR("reloc with read/write CPU domains: "
 				  "obj %p target %d offset %d "
 				  "read %08x write %08x",
-				  obj, reloc.target_handle,
-				  (int) reloc.offset,
-				  reloc.read_domains,
-				  reloc.write_domain);
+				  obj, reloc->target_handle,
+				  (int) reloc->offset,
+				  reloc->read_domains,
+				  reloc->write_domain);
 			drm_gem_object_unreference(target_obj);
 			i915_gem_object_unpin(obj);
 			return -EINVAL;
 		}
 
-		if (reloc.write_domain && target_obj->pending_write_domain &&
-		    reloc.write_domain != target_obj->pending_write_domain) {
+		if (reloc->write_domain && target_obj->pending_write_domain &&
+		    reloc->write_domain != target_obj->pending_write_domain) {
 			DRM_ERROR("Write domain conflict: "
 				  "obj %p target %d offset %d "
 				  "new %08x old %08x\n",
-				  obj, reloc.target_handle,
-				  (int) reloc.offset,
-				  reloc.write_domain,
+				  obj, reloc->target_handle,
+				  (int) reloc->offset,
+				  reloc->write_domain,
 				  target_obj->pending_write_domain);
 			drm_gem_object_unreference(target_obj);
 			i915_gem_object_unpin(obj);
@@ -2351,22 +2824,22 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 			 "presumed %08x delta %08x\n",
 			 __func__,
 			 obj,
-			 (int) reloc.offset,
-			 (int) reloc.target_handle,
-			 (int) reloc.read_domains,
-			 (int) reloc.write_domain,
+			 (int) reloc->offset,
+			 (int) reloc->target_handle,
+			 (int) reloc->read_domains,
+			 (int) reloc->write_domain,
 			 (int) target_obj_priv->gtt_offset,
-			 (int) reloc.presumed_offset,
-			 reloc.delta);
+			 (int) reloc->presumed_offset,
+			 reloc->delta);
 #endif
 
-		target_obj->pending_read_domains |= reloc.read_domains;
-		target_obj->pending_write_domain |= reloc.write_domain;
+		target_obj->pending_read_domains |= reloc->read_domains;
+		target_obj->pending_write_domain |= reloc->write_domain;
 
 		/* If the relocation already has the right value in it, no
 		 * more work needs to be done.
 		 */
-		if (target_obj_priv->gtt_offset == reloc.presumed_offset) {
+		if (target_obj_priv->gtt_offset == reloc->presumed_offset) {
 			drm_gem_object_unreference(target_obj);
 			continue;
 		}
@@ -2381,32 +2854,26 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 		/* Map the page containing the relocation we're going to
 		 * perform.
 		 */
-		reloc_offset = obj_priv->gtt_offset + reloc.offset;
+		reloc_offset = obj_priv->gtt_offset + reloc->offset;
 		reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
 						      (reloc_offset &
 						       ~(PAGE_SIZE - 1)));
 		reloc_entry = (uint32_t __iomem *)(reloc_page +
 						   (reloc_offset & (PAGE_SIZE - 1)));
-		reloc_val = target_obj_priv->gtt_offset + reloc.delta;
+		reloc_val = target_obj_priv->gtt_offset + reloc->delta;
 
 #if WATCH_BUF
 		DRM_INFO("Applied relocation: %p@0x%08x %08x -> %08x\n",
-			  obj, (unsigned int) reloc.offset,
+			  obj, (unsigned int) reloc->offset,
 			  readl(reloc_entry), reloc_val);
 #endif
 		writel(reloc_val, reloc_entry);
 		io_mapping_unmap_atomic(reloc_page);
 
-		/* Write the updated presumed offset for this entry back out
-		 * to the user.
+		/* The updated presumed offset for this entry will be
+		 * copied back out to the user.
 		 */
-		reloc.presumed_offset = target_obj_priv->gtt_offset;
-		ret = copy_to_user(relocs + i, &reloc, sizeof(reloc));
-		if (ret != 0) {
-			drm_gem_object_unreference(target_obj);
-			i915_gem_object_unpin(obj);
-			return ret;
-		}
+		reloc->presumed_offset = target_obj_priv->gtt_offset;
 
 		drm_gem_object_unreference(target_obj);
 	}
@@ -2423,11 +2890,10 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 static int
 i915_dispatch_gem_execbuffer(struct drm_device *dev,
 			      struct drm_i915_gem_execbuffer *exec,
+			      struct drm_clip_rect *cliprects,
 			      uint64_t exec_offset)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_clip_rect __user *boxes = (struct drm_clip_rect __user *)
-					     (uintptr_t) exec->cliprects_ptr;
 	int nbox = exec->num_cliprects;
 	int i = 0, count;
 	uint32_t	exec_start, exec_len;
@@ -2448,7 +2914,7 @@ i915_dispatch_gem_execbuffer(struct drm_device *dev,
 
 	for (i = 0; i < count; i++) {
 		if (i < nbox) {
-			int ret = i915_emit_box(dev, boxes, i,
+			int ret = i915_emit_box(dev, cliprects, i,
 						exec->DR1, exec->DR4);
 			if (ret)
 				return ret;
@@ -2504,6 +2970,75 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file_priv)
 	return ret;
 }
 
+static int
+i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
+			      uint32_t buffer_count,
+			      struct drm_i915_gem_relocation_entry **relocs)
+{
+	uint32_t reloc_count = 0, reloc_index = 0, i;
+	int ret;
+
+	*relocs = NULL;
+	for (i = 0; i < buffer_count; i++) {
+		if (reloc_count + exec_list[i].relocation_count < reloc_count)
+			return -EINVAL;
+		reloc_count += exec_list[i].relocation_count;
+	}
+
+	*relocs = drm_calloc(reloc_count, sizeof(**relocs), DRM_MEM_DRIVER);
+	if (*relocs == NULL)
+		return -ENOMEM;
+
+	for (i = 0; i < buffer_count; i++) {
+		struct drm_i915_gem_relocation_entry __user *user_relocs;
+
+		user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr;
+
+		ret = copy_from_user(&(*relocs)[reloc_index],
+				     user_relocs,
+				     exec_list[i].relocation_count *
+				     sizeof(**relocs));
+		if (ret != 0) {
+			drm_free(*relocs, reloc_count * sizeof(**relocs),
+				 DRM_MEM_DRIVER);
+			*relocs = NULL;
+			return ret;
+		}
+
+		reloc_index += exec_list[i].relocation_count;
+	}
+
+	return ret;
+}
+
+static int
+i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
+			    uint32_t buffer_count,
+			    struct drm_i915_gem_relocation_entry *relocs)
+{
+	uint32_t reloc_count = 0, i;
+	int ret;
+
+	for (i = 0; i < buffer_count; i++) {
+		struct drm_i915_gem_relocation_entry __user *user_relocs;
+
+		user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr;
+
+		if (ret == 0) {
+			ret = copy_to_user(user_relocs,
+					   &relocs[reloc_count],
+					   exec_list[i].relocation_count *
+					   sizeof(*relocs));
+		}
+
+		reloc_count += exec_list[i].relocation_count;
+	}
+
+	drm_free(relocs, reloc_count * sizeof(*relocs), DRM_MEM_DRIVER);
+
+	return ret;
+}
+
 int
 i915_gem_execbuffer(struct drm_device *dev, void *data,
 		    struct drm_file *file_priv)
@@ -2515,9 +3050,11 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
 	struct drm_gem_object **object_list = NULL;
 	struct drm_gem_object *batch_obj;
 	struct drm_i915_gem_object *obj_priv;
-	int ret, i, pinned = 0;
+	struct drm_clip_rect *cliprects = NULL;
+	struct drm_i915_gem_relocation_entry *relocs;
+	int ret, ret2, i, pinned = 0;
 	uint64_t exec_offset;
-	uint32_t seqno, flush_domains;
+	uint32_t seqno, flush_domains, reloc_index;
 	int pin_tries;
 
 #if WATCH_EXEC
@@ -2551,6 +3088,28 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
 		goto pre_mutex_err;
 	}
 
+	if (args->num_cliprects != 0) {
+		cliprects = drm_calloc(args->num_cliprects, sizeof(*cliprects),
+				       DRM_MEM_DRIVER);
+		if (cliprects == NULL)
+			goto pre_mutex_err;
+
+		ret = copy_from_user(cliprects,
+				     (struct drm_clip_rect __user *)
+				     (uintptr_t) args->cliprects_ptr,
+				     sizeof(*cliprects) * args->num_cliprects);
+		if (ret != 0) {
+			DRM_ERROR("copy %d cliprects failed: %d\n",
+				  args->num_cliprects, ret);
+			goto pre_mutex_err;
+		}
+	}
+
+	ret = i915_gem_get_relocs_from_user(exec_list, args->buffer_count,
+					    &relocs);
+	if (ret != 0)
+		goto pre_mutex_err;
+
 	mutex_lock(&dev->struct_mutex);
 
 	i915_verify_inactive(dev, __FILE__, __LINE__);
@@ -2593,15 +3152,19 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
 	/* Pin and relocate */
 	for (pin_tries = 0; ; pin_tries++) {
 		ret = 0;
+		reloc_index = 0;
+
 		for (i = 0; i < args->buffer_count; i++) {
 			object_list[i]->pending_read_domains = 0;
 			object_list[i]->pending_write_domain = 0;
 			ret = i915_gem_object_pin_and_relocate(object_list[i],
 							       file_priv,
-							       &exec_list[i]);
+							       &exec_list[i],
+							       &relocs[reloc_index]);
 			if (ret)
 				break;
 			pinned = i + 1;
+			reloc_index += exec_list[i].relocation_count;
 		}
 		/* success */
 		if (ret == 0)
@@ -2687,7 +3250,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
 #endif
 
 	/* Exec the batchbuffer */
-	ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset);
+	ret = i915_dispatch_gem_execbuffer(dev, args, cliprects, exec_offset);
 	if (ret) {
 		DRM_ERROR("dispatch failed %d\n", ret);
 		goto err;
@@ -2751,11 +3314,27 @@ err:
 				  args->buffer_count, ret);
 	}
 
+	/* Copy the updated relocations out regardless of current error
+	 * state.  Failure to update the relocs would mean that the next
+	 * time userland calls execbuf, it would do so with presumed offset
+	 * state that didn't match the actual object state.
+	 */
+	ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
+					   relocs);
+	if (ret2 != 0) {
+		DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
+
+		if (ret == 0)
+			ret = ret2;
+	}
+
 pre_mutex_err:
 	drm_free(object_list, sizeof(*object_list) * args->buffer_count,
 		 DRM_MEM_DRIVER);
 	drm_free(exec_list, sizeof(*exec_list) * args->buffer_count,
 		 DRM_MEM_DRIVER);
+	drm_free(cliprects, sizeof(*cliprects) * args->num_cliprects,
+		 DRM_MEM_DRIVER);
 
 	return ret;
 }
@@ -3110,6 +3689,7 @@ i915_gem_idle(struct drm_device *dev)
 
 	i915_gem_retire_requests(dev);
 
+	spin_lock(&dev_priv->mm.active_list_lock);
 	if (!dev_priv->mm.wedged) {
 		/* Active and flushing should now be empty as we've
 		 * waited for a sequence higher than any pending execbuffer
@@ -3136,6 +3716,7 @@ i915_gem_idle(struct drm_device *dev)
 		obj_priv->obj->write_domain &= ~I915_GEM_GPU_DOMAINS;
 		i915_gem_object_move_to_inactive(obj_priv->obj);
 	}
+	spin_unlock(&dev_priv->mm.active_list_lock);
 
 	while (!list_empty(&dev_priv->mm.flushing_list)) {
 		struct drm_i915_gem_object *obj_priv;
@@ -3192,7 +3773,7 @@ i915_gem_init_hws(struct drm_device *dev)
 
 	dev_priv->status_gfx_addr = obj_priv->gtt_offset;
 
-	dev_priv->hw_status_page = kmap(obj_priv->page_list[0]);
+	dev_priv->hw_status_page = kmap(obj_priv->pages[0]);
 	if (dev_priv->hw_status_page == NULL) {
 		DRM_ERROR("Failed to map status page.\n");
 		memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
@@ -3222,7 +3803,7 @@ i915_gem_cleanup_hws(struct drm_device *dev)
 	obj = dev_priv->hws_obj;
 	obj_priv = obj->driver_private;
 
-	kunmap(obj_priv->page_list[0]);
+	kunmap(obj_priv->pages[0]);
 	i915_gem_object_unpin(obj);
 	drm_gem_object_unreference(obj);
 	dev_priv->hws_obj = NULL;
@@ -3384,7 +3965,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
 	if (ret != 0)
 		return ret;
 
+	spin_lock(&dev_priv->mm.active_list_lock);
 	BUG_ON(!list_empty(&dev_priv->mm.active_list));
+	spin_unlock(&dev_priv->mm.active_list_lock);
+
 	BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
 	BUG_ON(!list_empty(&dev_priv->mm.inactive_list));
 	BUG_ON(!list_empty(&dev_priv->mm.request_list));
@@ -3428,6 +4012,7 @@ i915_gem_load(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 
+	spin_lock_init(&dev_priv->mm.active_list_lock);
 	INIT_LIST_HEAD(&dev_priv->mm.active_list);
 	INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
 	INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
@@ -3525,20 +4110,20 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
 	if (!obj_priv->phys_obj)
 		return;
 
-	ret = i915_gem_object_get_page_list(obj);
+	ret = i915_gem_object_get_pages(obj);
 	if (ret)
 		goto out;
 
 	page_count = obj->size / PAGE_SIZE;
 
 	for (i = 0; i < page_count; i++) {
-		char *dst = kmap_atomic(obj_priv->page_list[i], KM_USER0);
+		char *dst = kmap_atomic(obj_priv->pages[i], KM_USER0);
 		char *src = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE);
 
 		memcpy(dst, src, PAGE_SIZE);
 		kunmap_atomic(dst, KM_USER0);
 	}
-	drm_clflush_pages(obj_priv->page_list, page_count);
+	drm_clflush_pages(obj_priv->pages, page_count);
 	drm_agp_chipset_flush(dev);
 out:
 	obj_priv->phys_obj->cur_obj = NULL;
@@ -3581,7 +4166,7 @@ i915_gem_attach_phys_object(struct drm_device *dev,
 	obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1];
 	obj_priv->phys_obj->cur_obj = obj;
 
-	ret = i915_gem_object_get_page_list(obj);
+	ret = i915_gem_object_get_pages(obj);
 	if (ret) {
 		DRM_ERROR("failed to get page list\n");
 		goto out;
@@ -3590,7 +4175,7 @@ i915_gem_attach_phys_object(struct drm_device *dev,
 	page_count = obj->size / PAGE_SIZE;
 
 	for (i = 0; i < page_count; i++) {
-		char *src = kmap_atomic(obj_priv->page_list[i], KM_USER0);
+		char *src = kmap_atomic(obj_priv->pages[i], KM_USER0);
 		char *dst = obj_priv->phys_obj->handle->vaddr + (i * PAGE_SIZE);
 
 		memcpy(dst, src, PAGE_SIZE);
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index 131c088f8c8a..8d0b943e2c5a 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -105,12 +105,14 @@ i915_dump_lru(struct drm_device *dev, const char *where)
 	struct drm_i915_gem_object	*obj_priv;
 
 	DRM_INFO("active list %s {\n", where);
+	spin_lock(&dev_priv->mm.active_list_lock);
 	list_for_each_entry(obj_priv, &dev_priv->mm.active_list,
 			    list)
 	{
 		DRM_INFO("    %p: %08x\n", obj_priv,
 			 obj_priv->last_rendering_seqno);
 	}
+	spin_unlock(&dev_priv->mm.active_list_lock);
 	DRM_INFO("}\n");
 	DRM_INFO("flushing list %s {\n", where);
 	list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list,
diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
new file mode 100644
index 000000000000..a1ac0c5e7307
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
@@ -0,0 +1,263 @@
+/*
+ * Copyright © 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *    Keith Packard <keithp@keithp.com>
+ *
+ */
+
+#include <linux/seq_file.h>
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+#define DRM_I915_RING_DEBUG 1
+
+
+#if defined(CONFIG_DEBUG_FS)
+
+#define ACTIVE_LIST	1
+#define FLUSHING_LIST	2
+#define INACTIVE_LIST	3
+
+static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
+{
+	if (obj_priv->user_pin_count > 0)
+		return "P";
+	else if (obj_priv->pin_count > 0)
+		return "p";
+	else
+		return " ";
+}
+
+static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
+{
+    switch (obj_priv->tiling_mode) {
+    default:
+    case I915_TILING_NONE: return " ";
+    case I915_TILING_X: return "X";
+    case I915_TILING_Y: return "Y";
+    }
+}
+
+static int i915_gem_object_list_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	uintptr_t list = (uintptr_t) node->info_ent->data;
+	struct list_head *head;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj_priv;
+	spinlock_t *lock = NULL;
+
+	switch (list) {
+	case ACTIVE_LIST:
+		seq_printf(m, "Active:\n");
+		lock = &dev_priv->mm.active_list_lock;
+		spin_lock(lock);
+		head = &dev_priv->mm.active_list;
+		break;
+	case INACTIVE_LIST:
+		seq_printf(m, "Inctive:\n");
+		head = &dev_priv->mm.inactive_list;
+		break;
+	case FLUSHING_LIST:
+		seq_printf(m, "Flushing:\n");
+		head = &dev_priv->mm.flushing_list;
+		break;
+	default:
+		DRM_INFO("Ooops, unexpected list\n");
+		return 0;
+	}
+
+	list_for_each_entry(obj_priv, head, list)
+	{
+		struct drm_gem_object *obj = obj_priv->obj;
+
+		seq_printf(m, "    %p: %s %08x %08x %d",
+			   obj,
+			   get_pin_flag(obj_priv),
+			   obj->read_domains, obj->write_domain,
+			   obj_priv->last_rendering_seqno);
+
+		if (obj->name)
+			seq_printf(m, " (name: %d)", obj->name);
+		if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
+			seq_printf(m, " (fence: %d\n", obj_priv->fence_reg);
+		seq_printf(m, "\n");
+	}
+
+	if (lock)
+	    spin_unlock(lock);
+	return 0;
+}
+
+static int i915_gem_request_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_i915_gem_request *gem_request;
+
+	seq_printf(m, "Request:\n");
+	list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
+		seq_printf(m, "    %d @ %d\n",
+			   gem_request->seqno,
+			   (int) (jiffies - gem_request->emitted_jiffies));
+	}
+	return 0;
+}
+
+static int i915_gem_seqno_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	if (dev_priv->hw_status_page != NULL) {
+		seq_printf(m, "Current sequence: %d\n",
+			   i915_get_gem_seqno(dev));
+	} else {
+		seq_printf(m, "Current sequence: hws uninitialized\n");
+	}
+	seq_printf(m, "Waiter sequence:  %d\n",
+			dev_priv->mm.waiting_gem_seqno);
+	seq_printf(m, "IRQ sequence:     %d\n", dev_priv->mm.irq_gem_seqno);
+	return 0;
+}
+
+
+static int i915_interrupt_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	seq_printf(m, "Interrupt enable:    %08x\n",
+		   I915_READ(IER));
+	seq_printf(m, "Interrupt identity:  %08x\n",
+		   I915_READ(IIR));
+	seq_printf(m, "Interrupt mask:      %08x\n",
+		   I915_READ(IMR));
+	seq_printf(m, "Pipe A stat:         %08x\n",
+		   I915_READ(PIPEASTAT));
+	seq_printf(m, "Pipe B stat:         %08x\n",
+		   I915_READ(PIPEBSTAT));
+	seq_printf(m, "Interrupts received: %d\n",
+		   atomic_read(&dev_priv->irq_received));
+	if (dev_priv->hw_status_page != NULL) {
+		seq_printf(m, "Current sequence:    %d\n",
+			   i915_get_gem_seqno(dev));
+	} else {
+		seq_printf(m, "Current sequence:    hws uninitialized\n");
+	}
+	seq_printf(m, "Waiter sequence:     %d\n",
+		   dev_priv->mm.waiting_gem_seqno);
+	seq_printf(m, "IRQ sequence:        %d\n",
+		   dev_priv->mm.irq_gem_seqno);
+	return 0;
+}
+
+static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	int i;
+
+	seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
+	seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
+	for (i = 0; i < dev_priv->num_fence_regs; i++) {
+		struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
+
+		if (obj == NULL) {
+			seq_printf(m, "Fenced object[%2d] = unused\n", i);
+		} else {
+			struct drm_i915_gem_object *obj_priv;
+
+			obj_priv = obj->driver_private;
+			seq_printf(m, "Fenced object[%2d] = %p: %s "
+				   "%08x %08zx %08x %s %08x %08x %d",
+				   i, obj, get_pin_flag(obj_priv),
+				   obj_priv->gtt_offset,
+				   obj->size, obj_priv->stride,
+				   get_tiling_flag(obj_priv),
+				   obj->read_domains, obj->write_domain,
+				   obj_priv->last_rendering_seqno);
+			if (obj->name)
+				seq_printf(m, " (name: %d)", obj->name);
+			seq_printf(m, "\n");
+		}
+	}
+
+	return 0;
+}
+
+static int i915_hws_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	int i;
+	volatile u32 *hws;
+
+	hws = (volatile u32 *)dev_priv->hw_status_page;
+	if (hws == NULL)
+		return 0;
+
+	for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
+		seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
+			   i * 4,
+			   hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
+	}
+	return 0;
+}
+
+static struct drm_info_list i915_gem_debugfs_list[] = {
+	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
+	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
+	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
+	{"i915_gem_request", i915_gem_request_info, 0},
+	{"i915_gem_seqno", i915_gem_seqno_info, 0},
+	{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
+	{"i915_gem_interrupt", i915_interrupt_info, 0},
+	{"i915_gem_hws", i915_hws_info, 0},
+};
+#define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list)
+
+int i915_gem_debugfs_init(struct drm_minor *minor)
+{
+	return drm_debugfs_create_files(i915_gem_debugfs_list,
+					I915_GEM_DEBUGFS_ENTRIES,
+					minor->debugfs_root, minor);
+}
+
+void i915_gem_debugfs_cleanup(struct drm_minor *minor)
+{
+	drm_debugfs_remove_files(i915_gem_debugfs_list,
+				 I915_GEM_DEBUGFS_ENTRIES, minor);
+}
+
+#endif /* CONFIG_DEBUG_FS */
+
diff --git a/drivers/gpu/drm/i915/i915_gem_proc.c b/drivers/gpu/drm/i915/i915_gem_proc.c
deleted file mode 100644
index 4d1b9de0cd8b..000000000000
--- a/drivers/gpu/drm/i915/i915_gem_proc.c
+++ /dev/null
@@ -1,334 +0,0 @@
-/*
- * Copyright © 2008 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Eric Anholt <eric@anholt.net>
- *    Keith Packard <keithp@keithp.com>
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-static int i915_gem_active_info(char *buf, char **start, off_t offset,
-				int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_object *obj_priv;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("Active:\n");
-	list_for_each_entry(obj_priv, &dev_priv->mm.active_list,
-			    list)
-	{
-		struct drm_gem_object *obj = obj_priv->obj;
-		if (obj->name) {
-			DRM_PROC_PRINT("    %p(%d): %08x %08x %d\n",
-				       obj, obj->name,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		} else {
-			DRM_PROC_PRINT("       %p: %08x %08x %d\n",
-				       obj,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		}
-	}
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int i915_gem_flushing_info(char *buf, char **start, off_t offset,
-				  int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_object *obj_priv;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("Flushing:\n");
-	list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list,
-			    list)
-	{
-		struct drm_gem_object *obj = obj_priv->obj;
-		if (obj->name) {
-			DRM_PROC_PRINT("    %p(%d): %08x %08x %d\n",
-				       obj, obj->name,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		} else {
-			DRM_PROC_PRINT("       %p: %08x %08x %d\n", obj,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		}
-	}
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int i915_gem_inactive_info(char *buf, char **start, off_t offset,
-				  int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_object *obj_priv;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("Inactive:\n");
-	list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list,
-			    list)
-	{
-		struct drm_gem_object *obj = obj_priv->obj;
-		if (obj->name) {
-			DRM_PROC_PRINT("    %p(%d): %08x %08x %d\n",
-				       obj, obj->name,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		} else {
-			DRM_PROC_PRINT("       %p: %08x %08x %d\n", obj,
-				       obj->read_domains, obj->write_domain,
-				       obj_priv->last_rendering_seqno);
-		}
-	}
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int i915_gem_request_info(char *buf, char **start, off_t offset,
-				 int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_request *gem_request;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("Request:\n");
-	list_for_each_entry(gem_request, &dev_priv->mm.request_list,
-			    list)
-	{
-		DRM_PROC_PRINT("    %d @ %d\n",
-			       gem_request->seqno,
-			       (int) (jiffies - gem_request->emitted_jiffies));
-	}
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int i915_gem_seqno_info(char *buf, char **start, off_t offset,
-			       int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	if (dev_priv->hw_status_page != NULL) {
-		DRM_PROC_PRINT("Current sequence: %d\n",
-			       i915_get_gem_seqno(dev));
-	} else {
-		DRM_PROC_PRINT("Current sequence: hws uninitialized\n");
-	}
-	DRM_PROC_PRINT("Waiter sequence:  %d\n",
-		       dev_priv->mm.waiting_gem_seqno);
-	DRM_PROC_PRINT("IRQ sequence:     %d\n", dev_priv->mm.irq_gem_seqno);
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-
-static int i915_interrupt_info(char *buf, char **start, off_t offset,
-			       int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	int len = 0;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	DRM_PROC_PRINT("Interrupt enable:    %08x\n",
-		       I915_READ(IER));
-	DRM_PROC_PRINT("Interrupt identity:  %08x\n",
-		       I915_READ(IIR));
-	DRM_PROC_PRINT("Interrupt mask:      %08x\n",
-		       I915_READ(IMR));
-	DRM_PROC_PRINT("Pipe A stat:         %08x\n",
-		       I915_READ(PIPEASTAT));
-	DRM_PROC_PRINT("Pipe B stat:         %08x\n",
-		       I915_READ(PIPEBSTAT));
-	DRM_PROC_PRINT("Interrupts received: %d\n",
-		       atomic_read(&dev_priv->irq_received));
-	if (dev_priv->hw_status_page != NULL) {
-		DRM_PROC_PRINT("Current sequence:    %d\n",
-			       i915_get_gem_seqno(dev));
-	} else {
-		DRM_PROC_PRINT("Current sequence:    hws uninitialized\n");
-	}
-	DRM_PROC_PRINT("Waiter sequence:     %d\n",
-		       dev_priv->mm.waiting_gem_seqno);
-	DRM_PROC_PRINT("IRQ sequence:        %d\n",
-		       dev_priv->mm.irq_gem_seqno);
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static int i915_hws_info(char *buf, char **start, off_t offset,
-			 int request, int *eof, void *data)
-{
-	struct drm_minor *minor = (struct drm_minor *) data;
-	struct drm_device *dev = minor->dev;
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	int len = 0, i;
-	volatile u32 *hws;
-
-	if (offset > DRM_PROC_LIMIT) {
-		*eof = 1;
-		return 0;
-	}
-
-	hws = (volatile u32 *)dev_priv->hw_status_page;
-	if (hws == NULL) {
-		*eof = 1;
-		return 0;
-	}
-
-	*start = &buf[offset];
-	*eof = 0;
-	for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
-		DRM_PROC_PRINT("0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
-			       i * 4,
-			       hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
-	}
-	if (len > request + offset)
-		return request;
-	*eof = 1;
-	return len - offset;
-}
-
-static struct drm_proc_list {
-	/** file name */
-	const char *name;
-	/** proc callback*/
-	int (*f) (char *, char **, off_t, int, int *, void *);
-} i915_gem_proc_list[] = {
-	{"i915_gem_active", i915_gem_active_info},
-	{"i915_gem_flushing", i915_gem_flushing_info},
-	{"i915_gem_inactive", i915_gem_inactive_info},
-	{"i915_gem_request", i915_gem_request_info},
-	{"i915_gem_seqno", i915_gem_seqno_info},
-	{"i915_gem_interrupt", i915_interrupt_info},
-	{"i915_gem_hws", i915_hws_info},
-};
-
-#define I915_GEM_PROC_ENTRIES ARRAY_SIZE(i915_gem_proc_list)
-
-int i915_gem_proc_init(struct drm_minor *minor)
-{
-	struct proc_dir_entry *ent;
-	int i, j;
-
-	for (i = 0; i < I915_GEM_PROC_ENTRIES; i++) {
-		ent = create_proc_entry(i915_gem_proc_list[i].name,
-					S_IFREG | S_IRUGO, minor->dev_root);
-		if (!ent) {
-			DRM_ERROR("Cannot create /proc/dri/.../%s\n",
-				  i915_gem_proc_list[i].name);
-			for (j = 0; j < i; j++)
-				remove_proc_entry(i915_gem_proc_list[i].name,
-						  minor->dev_root);
-			return -1;
-		}
-		ent->read_proc = i915_gem_proc_list[i].f;
-		ent->data = minor;
-	}
-	return 0;
-}
-
-void i915_gem_proc_cleanup(struct drm_minor *minor)
-{
-	int i;
-
-	if (!minor->dev_root)
-		return;
-
-	for (i = 0; i < I915_GEM_PROC_ENTRIES; i++)
-		remove_proc_entry(i915_gem_proc_list[i].name, minor->dev_root);
-}
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 7fb4191ef934..6be3f927c86a 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -96,16 +96,16 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
 		 */
 		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
 		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
-	} else if ((!IS_I965G(dev) && !IS_G33(dev)) || IS_I965GM(dev) ||
-		   IS_GM45(dev)) {
+	} else if (IS_MOBILE(dev)) {
 		uint32_t dcc;
 
-		/* On 915-945 and GM965, channel interleave by the CPU is
-		 * determined by DCC.  The CPU will alternate based on bit 6
-		 * in interleaved mode, and the GPU will then also alternate
-		 * on bit 6, 9, and 10 for X, but the CPU may also optionally
-		 * alternate based on bit 17 (XOR not disabled and XOR
-		 * bit == 17).
+		/* On mobile 9xx chipsets, channel interleave by the CPU is
+		 * determined by DCC.  For single-channel, neither the CPU
+		 * nor the GPU do swizzling.  For dual channel interleaved,
+		 * the GPU's interleave is bit 9 and 10 for X tiled, and bit
+		 * 9 for Y tiled.  The CPU's interleave is independent, and
+		 * can be based on either bit 11 (haven't seen this yet) or
+		 * bit 17 (common).
 		 */
 		dcc = I915_READ(DCC);
 		switch (dcc & DCC_ADDRESSING_MODE_MASK) {
@@ -115,19 +115,18 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
 			swizzle_y = I915_BIT_6_SWIZZLE_NONE;
 			break;
 		case DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED:
-			if (IS_I915G(dev) || IS_I915GM(dev) ||
-			    dcc & DCC_CHANNEL_XOR_DISABLE) {
+			if (dcc & DCC_CHANNEL_XOR_DISABLE) {
+				/* This is the base swizzling by the GPU for
+				 * tiled buffers.
+				 */
 				swizzle_x = I915_BIT_6_SWIZZLE_9_10;
 				swizzle_y = I915_BIT_6_SWIZZLE_9;
-			} else if ((IS_I965GM(dev) || IS_GM45(dev)) &&
-				   (dcc & DCC_CHANNEL_XOR_BIT_17) == 0) {
-				/* GM965/GM45 does either bit 11 or bit 17
-				 * swizzling.
-				 */
+			} else if ((dcc & DCC_CHANNEL_XOR_BIT_17) == 0) {
+				/* Bit 11 swizzling by the CPU in addition. */
 				swizzle_x = I915_BIT_6_SWIZZLE_9_10_11;
 				swizzle_y = I915_BIT_6_SWIZZLE_9_11;
 			} else {
-				/* Bit 17 or perhaps other swizzling */
+				/* Bit 17 swizzling by the CPU in addition. */
 				swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
 				swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
 			}
@@ -217,6 +216,22 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 	else
 		tile_width = 512;
 
+	/* check maximum stride & object size */
+	if (IS_I965G(dev)) {
+		/* i965 stores the end address of the gtt mapping in the fence
+		 * reg, so dont bother to check the size */
+		if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
+			return false;
+	} else if (IS_I9XX(dev)) {
+		if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL ||
+		    size > (I830_FENCE_MAX_SIZE_VAL << 20))
+			return false;
+	} else {
+		if (stride / 128 > I830_FENCE_MAX_PITCH_VAL ||
+		    size > (I830_FENCE_MAX_SIZE_VAL << 19))
+			return false;
+	}
+
 	/* 965+ just needs multiples of tile width */
 	if (IS_I965G(dev)) {
 		if (stride & (tile_width - 1))
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 87b6b603469e..ee7ce7b78cf7 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -48,10 +48,6 @@
 /** Interrupts that we mask and unmask at runtime. */
 #define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
 
-/** These are all of the interrupts used by the driver */
-#define I915_INTERRUPT_ENABLE_MASK (I915_INTERRUPT_ENABLE_FIX | \
-				    I915_INTERRUPT_ENABLE_VAR)
-
 #define I915_PIPE_VBLANK_STATUS	(PIPE_START_VBLANK_INTERRUPT_STATUS |\
 				 PIPE_VBLANK_INTERRUPT_STATUS)
 
@@ -187,6 +183,19 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
 	return I915_READ(reg);
 }
 
+/*
+ * Handle hotplug events outside the interrupt handler proper.
+ */
+static void i915_hotplug_work_func(struct work_struct *work)
+{
+	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
+						    hotplug_work);
+	struct drm_device *dev = dev_priv->dev;
+
+	/* Just fire off a uevent and let userspace tell us what to do */
+	drm_sysfs_hotplug_event(dev);
+}
+
 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	struct drm_device *dev = (struct drm_device *) arg;
@@ -244,6 +253,20 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
 
 		ret = IRQ_HANDLED;
 
+		/* Consume port.  Then clear IIR or we'll miss events */
+		if ((I915_HAS_HOTPLUG(dev)) &&
+		    (iir & I915_DISPLAY_PORT_INTERRUPT)) {
+			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
+
+			DRM_DEBUG("hotplug event received, stat 0x%08x\n",
+				  hotplug_status);
+			if (hotplug_status & dev_priv->hotplug_supported_mask)
+				schedule_work(&dev_priv->hotplug_work);
+
+			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
+			I915_READ(PORT_HOTPLUG_STAT);
+		}
+
 		I915_WRITE(IIR, iir);
 		new_iir = I915_READ(IIR); /* Flush posted writes */
 
@@ -528,17 +551,24 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
 
 	atomic_set(&dev_priv->irq_received, 0);
 
+	if (I915_HAS_HOTPLUG(dev)) {
+		I915_WRITE(PORT_HOTPLUG_EN, 0);
+		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
+	}
+
 	I915_WRITE(HWSTAM, 0xeffe);
 	I915_WRITE(PIPEASTAT, 0);
 	I915_WRITE(PIPEBSTAT, 0);
 	I915_WRITE(IMR, 0xffffffff);
 	I915_WRITE(IER, 0x0);
 	(void) I915_READ(IER);
+	INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
 }
 
 int i915_driver_irq_postinstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR;
 
 	dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
 
@@ -550,13 +580,35 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
 	dev_priv->pipestat[0] = 0;
 	dev_priv->pipestat[1] = 0;
 
+	if (I915_HAS_HOTPLUG(dev)) {
+		u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
+
+		/* Leave other bits alone */
+		hotplug_en |= HOTPLUG_EN_MASK;
+		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
+
+		dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
+			TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
+			SDVOB_HOTPLUG_INT_STATUS;
+		if (IS_G4X(dev)) {
+			dev_priv->hotplug_supported_mask |=
+				HDMIB_HOTPLUG_INT_STATUS |
+				HDMIC_HOTPLUG_INT_STATUS |
+				HDMID_HOTPLUG_INT_STATUS;
+		}
+		/* Enable in IER... */
+		enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
+		/* and unmask in IMR */
+		i915_enable_irq(dev_priv, I915_DISPLAY_PORT_INTERRUPT);
+	}
+
 	/* Disable pipe interrupt enables, clear pending pipe status */
 	I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
 	I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
 	/* Clear pending interrupt status */
 	I915_WRITE(IIR, I915_READ(IIR));
 
-	I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
+	I915_WRITE(IER, enable_mask);
 	I915_WRITE(IMR, dev_priv->irq_mask_reg);
 	(void) I915_READ(IER);
 
@@ -575,6 +627,11 @@ void i915_driver_irq_uninstall(struct drm_device * dev)
 
 	dev_priv->vblank_pipe = 0;
 
+	if (I915_HAS_HOTPLUG(dev)) {
+		I915_WRITE(PORT_HOTPLUG_EN, 0);
+		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
+	}
+
 	I915_WRITE(HWSTAM, 0xffffffff);
 	I915_WRITE(PIPEASTAT, 0);
 	I915_WRITE(PIPEBSTAT, 0);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 90600d899413..e805b590ae71 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -190,6 +190,8 @@
 #define   I830_FENCE_SIZE_BITS(size)	((ffs((size) >> 19) - 1) << 8)
 #define   I830_FENCE_PITCH_SHIFT	4
 #define   I830_FENCE_REG_VALID		(1<<0)
+#define   I830_FENCE_MAX_PITCH_VAL	0x10
+#define   I830_FENCE_MAX_SIZE_VAL	(1<<8)
 
 #define   I915_FENCE_START_MASK		0x0ff00000
 #define   I915_FENCE_SIZE_BITS(size)	((ffs((size) >> 20) - 1) << 8)
@@ -198,6 +200,7 @@
 #define   I965_FENCE_PITCH_SHIFT	2
 #define   I965_FENCE_TILING_Y_SHIFT	1
 #define   I965_FENCE_REG_VALID		(1<<0)
+#define   I965_FENCE_MAX_PITCH_VAL	0x0400
 
 /*
  * Instruction and interrupt control regs
@@ -359,6 +362,7 @@
 #define   DPLLB_LVDS_P2_CLOCK_DIV_7	(1 << 24) /* i915 */
 #define   DPLL_P2_CLOCK_DIV_MASK	0x03000000 /* i915 */
 #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */
+#define   DPLL_FPA01_P1_POST_DIV_MASK_IGD	0x00ff8000 /* IGD */
 
 #define I915_FIFO_UNDERRUN_STATUS		(1UL<<31)
 #define I915_CRC_ERROR_ENABLE			(1UL<<29)
@@ -435,6 +439,7 @@
  */
 #define   DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS	0x003f0000
 #define   DPLL_FPA01_P1_POST_DIV_SHIFT	16
+#define   DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15
 /* i830, required in DVO non-gang */
 #define   PLL_P2_DIVIDE_BY_4		(1 << 23)
 #define   PLL_P1_DIVIDE_BY_TWO		(1 << 21) /* i830 */
@@ -501,10 +506,12 @@
 #define FPB0	0x06048
 #define FPB1	0x0604c
 #define   FP_N_DIV_MASK		0x003f0000
+#define   FP_N_IGD_DIV_MASK	0x00ff0000
 #define   FP_N_DIV_SHIFT		16
 #define   FP_M1_DIV_MASK	0x00003f00
 #define   FP_M1_DIV_SHIFT		 8
 #define   FP_M2_DIV_MASK	0x0000003f
+#define   FP_M2_IGD_DIV_MASK	0x000000ff
 #define   FP_M2_DIV_SHIFT		 0
 #define DPLL_TEST	0x606c
 #define   DPLLB_TEST_SDVO_DIV_1		(0 << 22)
@@ -629,6 +636,30 @@
 #define   TV_HOTPLUG_INT_EN			(1 << 18)
 #define   CRT_HOTPLUG_INT_EN			(1 << 9)
 #define   CRT_HOTPLUG_FORCE_DETECT		(1 << 3)
+#define CRT_HOTPLUG_ACTIVATION_PERIOD_32	(0 << 8)
+/* must use period 64 on GM45 according to docs */
+#define CRT_HOTPLUG_ACTIVATION_PERIOD_64	(1 << 8)
+#define CRT_HOTPLUG_DAC_ON_TIME_2M		(0 << 7)
+#define CRT_HOTPLUG_DAC_ON_TIME_4M		(1 << 7)
+#define CRT_HOTPLUG_VOLTAGE_COMPARE_40		(0 << 5)
+#define CRT_HOTPLUG_VOLTAGE_COMPARE_50		(1 << 5)
+#define CRT_HOTPLUG_VOLTAGE_COMPARE_60		(2 << 5)
+#define CRT_HOTPLUG_VOLTAGE_COMPARE_70		(3 << 5)
+#define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK	(3 << 5)
+#define CRT_HOTPLUG_DETECT_DELAY_1G		(0 << 4)
+#define CRT_HOTPLUG_DETECT_DELAY_2G		(1 << 4)
+#define CRT_HOTPLUG_DETECT_VOLTAGE_325MV	(0 << 2)
+#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV	(1 << 2)
+#define CRT_HOTPLUG_MASK			(0x3fc) /* Bits 9-2 */
+#define CRT_FORCE_HOTPLUG_MASK			0xfffffe1f
+#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
+			 HDMIC_HOTPLUG_INT_EN |	  \
+			 HDMID_HOTPLUG_INT_EN |	  \
+			 SDVOB_HOTPLUG_INT_EN |	  \
+			 SDVOC_HOTPLUG_INT_EN |	  \
+			 TV_HOTPLUG_INT_EN |	  \
+			 CRT_HOTPLUG_INT_EN)
+
 
 #define PORT_HOTPLUG_STAT	0x61114
 #define   HDMIB_HOTPLUG_INT_STATUS		(1 << 29)
@@ -856,7 +887,7 @@
  */
 # define TV_ENC_C0_FIX			(1 << 10)
 /** Bits that must be preserved by software */
-# define TV_CTL_SAVE			((3 << 8) | (3 << 6))
+# define TV_CTL_SAVE			((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
 # define TV_FUSE_STATE_MASK		(3 << 4)
 /** Read-only state that reports all features enabled */
 # define TV_FUSE_STATE_ENABLED		(0 << 4)
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 5ea715ace3a0..de621aad85b5 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -162,13 +162,13 @@ struct bdb_lvds_options {
 	u8 panel_type;
 	u8 rsvd1;
 	/* LVDS capabilities, stored in a dword */
-	u8 rsvd2:1;
-	u8 lvds_edid:1;
-	u8 pixel_dither:1;
-	u8 pfit_ratio_auto:1;
-	u8 pfit_gfx_mode_enhanced:1;
-	u8 pfit_text_mode_enhanced:1;
 	u8 pfit_mode:2;
+	u8 pfit_text_mode_enhanced:1;
+	u8 pfit_gfx_mode_enhanced:1;
+	u8 pfit_ratio_auto:1;
+	u8 pixel_dither:1;
+	u8 lvds_edid:1;
+	u8 rsvd2:1;
 	u8 rsvd4;
 } __attribute__((packed));
 
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index dcaed3466e83..9bdd959260a5 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -41,7 +41,7 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
 
 	temp = I915_READ(ADPA);
 	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
-	temp &= ~ADPA_DAC_ENABLE;
+	temp |= ADPA_DAC_ENABLE;
 
 	switch(mode) {
 	case DRM_MODE_DPMS_ON:
@@ -64,11 +64,21 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
 static int intel_crt_mode_valid(struct drm_connector *connector,
 				struct drm_display_mode *mode)
 {
+	struct drm_device *dev = connector->dev;
+
+	int max_clock = 0;
 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return MODE_NO_DBLESCAN;
 
-	if (mode->clock > 400000 || mode->clock < 25000)
-		return MODE_CLOCK_RANGE;
+	if (mode->clock < 25000)
+		return MODE_CLOCK_LOW;
+
+	if (!IS_I9XX(dev))
+		max_clock = 350000;
+	else
+		max_clock = 400000;
+	if (mode->clock > max_clock)
+		return MODE_CLOCK_HIGH;
 
 	return MODE_OK;
 }
@@ -113,10 +123,13 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 
-	if (intel_crtc->pipe == 0)
+	if (intel_crtc->pipe == 0) {
 		adpa |= ADPA_PIPE_A_SELECT;
-	else
+		I915_WRITE(BCLRPAT_A, 0);
+	} else {
 		adpa |= ADPA_PIPE_B_SELECT;
+		I915_WRITE(BCLRPAT_B, 0);
+	}
 
 	I915_WRITE(ADPA, adpa);
 }
@@ -133,20 +146,39 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 temp;
-
-	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
-
-	temp = I915_READ(PORT_HOTPLUG_EN);
-
-	I915_WRITE(PORT_HOTPLUG_EN,
-		   temp | CRT_HOTPLUG_FORCE_DETECT | (1 << 5));
+	u32 hotplug_en;
+	int i, tries = 0;
+	/*
+	 * On 4 series desktop, CRT detect sequence need to be done twice
+	 * to get a reliable result.
+	 */
 
-	do {
-		if (!(I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT))
-			break;
-		msleep(1);
-	} while (time_after(timeout, jiffies));
+	if (IS_G4X(dev) && !IS_GM45(dev))
+		tries = 2;
+	else
+		tries = 1;
+	hotplug_en = I915_READ(PORT_HOTPLUG_EN);
+	hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
+	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
+
+	if (IS_GM45(dev))
+		hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
+
+	hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
+
+	for (i = 0; i < tries ; i++) {
+		unsigned long timeout;
+		/* turn on the FORCE_DETECT */
+		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
+		timeout = jiffies + msecs_to_jiffies(1000);
+		/* wait for FORCE_DETECT to go off */
+		do {
+			if (!(I915_READ(PORT_HOTPLUG_EN) &
+					CRT_HOTPLUG_FORCE_DETECT))
+				break;
+			msleep(1);
+		} while (time_after(timeout, jiffies));
+	}
 
 	if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
 	    CRT_HOTPLUG_MONITOR_COLOR)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a2834276cb38..64773ce52964 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -56,11 +56,13 @@ typedef struct {
 } intel_p2_t;
 
 #define INTEL_P2_NUM		      2
-
-typedef struct {
+typedef struct intel_limit intel_limit_t;
+struct intel_limit {
     intel_range_t   dot, vco, n, m, m1, m2, p, p1;
     intel_p2_t	    p2;
-} intel_limit_t;
+    bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
+		      int, int, intel_clock_t *);
+};
 
 #define I8XX_DOT_MIN		  25000
 #define I8XX_DOT_MAX		 350000
@@ -90,18 +92,32 @@ typedef struct {
 #define I9XX_DOT_MAX		 400000
 #define I9XX_VCO_MIN		1400000
 #define I9XX_VCO_MAX		2800000
+#define IGD_VCO_MIN		1700000
+#define IGD_VCO_MAX		3500000
 #define I9XX_N_MIN		      1
 #define I9XX_N_MAX		      6
+/* IGD's Ncounter is a ring counter */
+#define IGD_N_MIN		      3
+#define IGD_N_MAX		      6
 #define I9XX_M_MIN		     70
 #define I9XX_M_MAX		    120
+#define IGD_M_MIN		      2
+#define IGD_M_MAX		    256
 #define I9XX_M1_MIN		     10
 #define I9XX_M1_MAX		     22
 #define I9XX_M2_MIN		      5
 #define I9XX_M2_MAX		      9
+/* IGD M1 is reserved, and must be 0 */
+#define IGD_M1_MIN		      0
+#define IGD_M1_MAX		      0
+#define IGD_M2_MIN		      0
+#define IGD_M2_MAX		      254
 #define I9XX_P_SDVO_DAC_MIN	      5
 #define I9XX_P_SDVO_DAC_MAX	     80
 #define I9XX_P_LVDS_MIN		      7
 #define I9XX_P_LVDS_MAX		     98
+#define IGD_P_LVDS_MIN		      7
+#define IGD_P_LVDS_MAX		     112
 #define I9XX_P1_MIN		      1
 #define I9XX_P1_MAX		      8
 #define I9XX_P2_SDVO_DAC_SLOW		     10
@@ -115,6 +131,97 @@ typedef struct {
 #define INTEL_LIMIT_I8XX_LVDS	    1
 #define INTEL_LIMIT_I9XX_SDVO_DAC   2
 #define INTEL_LIMIT_I9XX_LVDS	    3
+#define INTEL_LIMIT_G4X_SDVO	    4
+#define INTEL_LIMIT_G4X_HDMI_DAC   5
+#define INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS   6
+#define INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS   7
+#define INTEL_LIMIT_IGD_SDVO_DAC    8
+#define INTEL_LIMIT_IGD_LVDS	    9
+
+/*The parameter is for SDVO on G4x platform*/
+#define G4X_DOT_SDVO_MIN           25000
+#define G4X_DOT_SDVO_MAX           270000
+#define G4X_VCO_MIN                1750000
+#define G4X_VCO_MAX                3500000
+#define G4X_N_SDVO_MIN             1
+#define G4X_N_SDVO_MAX             4
+#define G4X_M_SDVO_MIN             104
+#define G4X_M_SDVO_MAX             138
+#define G4X_M1_SDVO_MIN            17
+#define G4X_M1_SDVO_MAX            23
+#define G4X_M2_SDVO_MIN            5
+#define G4X_M2_SDVO_MAX            11
+#define G4X_P_SDVO_MIN             10
+#define G4X_P_SDVO_MAX             30
+#define G4X_P1_SDVO_MIN            1
+#define G4X_P1_SDVO_MAX            3
+#define G4X_P2_SDVO_SLOW           10
+#define G4X_P2_SDVO_FAST           10
+#define G4X_P2_SDVO_LIMIT          270000
+
+/*The parameter is for HDMI_DAC on G4x platform*/
+#define G4X_DOT_HDMI_DAC_MIN           22000
+#define G4X_DOT_HDMI_DAC_MAX           400000
+#define G4X_N_HDMI_DAC_MIN             1
+#define G4X_N_HDMI_DAC_MAX             4
+#define G4X_M_HDMI_DAC_MIN             104
+#define G4X_M_HDMI_DAC_MAX             138
+#define G4X_M1_HDMI_DAC_MIN            16
+#define G4X_M1_HDMI_DAC_MAX            23
+#define G4X_M2_HDMI_DAC_MIN            5
+#define G4X_M2_HDMI_DAC_MAX            11
+#define G4X_P_HDMI_DAC_MIN             5
+#define G4X_P_HDMI_DAC_MAX             80
+#define G4X_P1_HDMI_DAC_MIN            1
+#define G4X_P1_HDMI_DAC_MAX            8
+#define G4X_P2_HDMI_DAC_SLOW           10
+#define G4X_P2_HDMI_DAC_FAST           5
+#define G4X_P2_HDMI_DAC_LIMIT          165000
+
+/*The parameter is for SINGLE_CHANNEL_LVDS on G4x platform*/
+#define G4X_DOT_SINGLE_CHANNEL_LVDS_MIN           20000
+#define G4X_DOT_SINGLE_CHANNEL_LVDS_MAX           115000
+#define G4X_N_SINGLE_CHANNEL_LVDS_MIN             1
+#define G4X_N_SINGLE_CHANNEL_LVDS_MAX             3
+#define G4X_M_SINGLE_CHANNEL_LVDS_MIN             104
+#define G4X_M_SINGLE_CHANNEL_LVDS_MAX             138
+#define G4X_M1_SINGLE_CHANNEL_LVDS_MIN            17
+#define G4X_M1_SINGLE_CHANNEL_LVDS_MAX            23
+#define G4X_M2_SINGLE_CHANNEL_LVDS_MIN            5
+#define G4X_M2_SINGLE_CHANNEL_LVDS_MAX            11
+#define G4X_P_SINGLE_CHANNEL_LVDS_MIN             28
+#define G4X_P_SINGLE_CHANNEL_LVDS_MAX             112
+#define G4X_P1_SINGLE_CHANNEL_LVDS_MIN            2
+#define G4X_P1_SINGLE_CHANNEL_LVDS_MAX            8
+#define G4X_P2_SINGLE_CHANNEL_LVDS_SLOW           14
+#define G4X_P2_SINGLE_CHANNEL_LVDS_FAST           14
+#define G4X_P2_SINGLE_CHANNEL_LVDS_LIMIT          0
+
+/*The parameter is for DUAL_CHANNEL_LVDS on G4x platform*/
+#define G4X_DOT_DUAL_CHANNEL_LVDS_MIN           80000
+#define G4X_DOT_DUAL_CHANNEL_LVDS_MAX           224000
+#define G4X_N_DUAL_CHANNEL_LVDS_MIN             1
+#define G4X_N_DUAL_CHANNEL_LVDS_MAX             3
+#define G4X_M_DUAL_CHANNEL_LVDS_MIN             104
+#define G4X_M_DUAL_CHANNEL_LVDS_MAX             138
+#define G4X_M1_DUAL_CHANNEL_LVDS_MIN            17
+#define G4X_M1_DUAL_CHANNEL_LVDS_MAX            23
+#define G4X_M2_DUAL_CHANNEL_LVDS_MIN            5
+#define G4X_M2_DUAL_CHANNEL_LVDS_MAX            11
+#define G4X_P_DUAL_CHANNEL_LVDS_MIN             14
+#define G4X_P_DUAL_CHANNEL_LVDS_MAX             42
+#define G4X_P1_DUAL_CHANNEL_LVDS_MIN            2
+#define G4X_P1_DUAL_CHANNEL_LVDS_MAX            6
+#define G4X_P2_DUAL_CHANNEL_LVDS_SLOW           7
+#define G4X_P2_DUAL_CHANNEL_LVDS_FAST           7
+#define G4X_P2_DUAL_CHANNEL_LVDS_LIMIT          0
+
+static bool
+intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+		    int target, int refclk, intel_clock_t *best_clock);
+static bool
+intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+			int target, int refclk, intel_clock_t *best_clock);
 
 static const intel_limit_t intel_limits[] = {
     { /* INTEL_LIMIT_I8XX_DVO_DAC */
@@ -128,6 +235,7 @@ static const intel_limit_t intel_limits[] = {
         .p1  = { .min = I8XX_P1_MIN,		.max = I8XX_P1_MAX },
 	.p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
 		 .p2_slow = I8XX_P2_SLOW,	.p2_fast = I8XX_P2_FAST },
+	.find_pll = intel_find_best_PLL,
     },
     { /* INTEL_LIMIT_I8XX_LVDS */
         .dot = { .min = I8XX_DOT_MIN,		.max = I8XX_DOT_MAX },
@@ -140,6 +248,7 @@ static const intel_limit_t intel_limits[] = {
         .p1  = { .min = I8XX_P1_LVDS_MIN,	.max = I8XX_P1_LVDS_MAX },
 	.p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
 		 .p2_slow = I8XX_P2_LVDS_SLOW,	.p2_fast = I8XX_P2_LVDS_FAST },
+	.find_pll = intel_find_best_PLL,
     },
     { /* INTEL_LIMIT_I9XX_SDVO_DAC */
         .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX },
@@ -152,6 +261,7 @@ static const intel_limit_t intel_limits[] = {
         .p1  = { .min = I9XX_P1_MIN,		.max = I9XX_P1_MAX },
 	.p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,	.p2_fast = I9XX_P2_SDVO_DAC_FAST },
+	.find_pll = intel_find_best_PLL,
     },
     { /* INTEL_LIMIT_I9XX_LVDS */
         .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX },
@@ -167,19 +277,157 @@ static const intel_limit_t intel_limits[] = {
 	 */
 	.p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_LVDS_SLOW,	.p2_fast = I9XX_P2_LVDS_FAST },
+	.find_pll = intel_find_best_PLL,
+    },
+    /* below parameter and function is for G4X Chipset Family*/
+    { /* INTEL_LIMIT_G4X_SDVO */
+	.dot = { .min = G4X_DOT_SDVO_MIN,	.max = G4X_DOT_SDVO_MAX },
+	.vco = { .min = G4X_VCO_MIN,	        .max = G4X_VCO_MAX},
+	.n   = { .min = G4X_N_SDVO_MIN,	        .max = G4X_N_SDVO_MAX },
+	.m   = { .min = G4X_M_SDVO_MIN,         .max = G4X_M_SDVO_MAX },
+	.m1  = { .min = G4X_M1_SDVO_MIN,	.max = G4X_M1_SDVO_MAX },
+	.m2  = { .min = G4X_M2_SDVO_MIN,	.max = G4X_M2_SDVO_MAX },
+	.p   = { .min = G4X_P_SDVO_MIN,         .max = G4X_P_SDVO_MAX },
+	.p1  = { .min = G4X_P1_SDVO_MIN,	.max = G4X_P1_SDVO_MAX},
+	.p2  = { .dot_limit = G4X_P2_SDVO_LIMIT,
+		 .p2_slow = G4X_P2_SDVO_SLOW,
+		 .p2_fast = G4X_P2_SDVO_FAST
+	},
+	.find_pll = intel_g4x_find_best_PLL,
+    },
+    { /* INTEL_LIMIT_G4X_HDMI_DAC */
+	.dot = { .min = G4X_DOT_HDMI_DAC_MIN,	.max = G4X_DOT_HDMI_DAC_MAX },
+	.vco = { .min = G4X_VCO_MIN,	        .max = G4X_VCO_MAX},
+	.n   = { .min = G4X_N_HDMI_DAC_MIN,	.max = G4X_N_HDMI_DAC_MAX },
+	.m   = { .min = G4X_M_HDMI_DAC_MIN,	.max = G4X_M_HDMI_DAC_MAX },
+	.m1  = { .min = G4X_M1_HDMI_DAC_MIN,	.max = G4X_M1_HDMI_DAC_MAX },
+	.m2  = { .min = G4X_M2_HDMI_DAC_MIN,	.max = G4X_M2_HDMI_DAC_MAX },
+	.p   = { .min = G4X_P_HDMI_DAC_MIN,	.max = G4X_P_HDMI_DAC_MAX },
+	.p1  = { .min = G4X_P1_HDMI_DAC_MIN,	.max = G4X_P1_HDMI_DAC_MAX},
+	.p2  = { .dot_limit = G4X_P2_HDMI_DAC_LIMIT,
+		 .p2_slow = G4X_P2_HDMI_DAC_SLOW,
+		 .p2_fast = G4X_P2_HDMI_DAC_FAST
+	},
+	.find_pll = intel_g4x_find_best_PLL,
+    },
+    { /* INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS */
+	.dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX },
+	.vco = { .min = G4X_VCO_MIN,
+		 .max = G4X_VCO_MAX },
+	.n   = { .min = G4X_N_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_N_SINGLE_CHANNEL_LVDS_MAX },
+	.m   = { .min = G4X_M_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_M_SINGLE_CHANNEL_LVDS_MAX },
+	.m1  = { .min = G4X_M1_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_M1_SINGLE_CHANNEL_LVDS_MAX },
+	.m2  = { .min = G4X_M2_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_M2_SINGLE_CHANNEL_LVDS_MAX },
+	.p   = { .min = G4X_P_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_P_SINGLE_CHANNEL_LVDS_MAX },
+	.p1  = { .min = G4X_P1_SINGLE_CHANNEL_LVDS_MIN,
+		 .max = G4X_P1_SINGLE_CHANNEL_LVDS_MAX },
+	.p2  = { .dot_limit = G4X_P2_SINGLE_CHANNEL_LVDS_LIMIT,
+		 .p2_slow = G4X_P2_SINGLE_CHANNEL_LVDS_SLOW,
+		 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
+	},
+	.find_pll = intel_g4x_find_best_PLL,
+    },
+    { /* INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS */
+	.dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX },
+	.vco = { .min = G4X_VCO_MIN,
+		 .max = G4X_VCO_MAX },
+	.n   = { .min = G4X_N_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_N_DUAL_CHANNEL_LVDS_MAX },
+	.m   = { .min = G4X_M_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_M_DUAL_CHANNEL_LVDS_MAX },
+	.m1  = { .min = G4X_M1_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_M1_DUAL_CHANNEL_LVDS_MAX },
+	.m2  = { .min = G4X_M2_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_M2_DUAL_CHANNEL_LVDS_MAX },
+	.p   = { .min = G4X_P_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_P_DUAL_CHANNEL_LVDS_MAX },
+	.p1  = { .min = G4X_P1_DUAL_CHANNEL_LVDS_MIN,
+		 .max = G4X_P1_DUAL_CHANNEL_LVDS_MAX },
+	.p2  = { .dot_limit = G4X_P2_DUAL_CHANNEL_LVDS_LIMIT,
+		 .p2_slow = G4X_P2_DUAL_CHANNEL_LVDS_SLOW,
+		 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
+	},
+	.find_pll = intel_g4x_find_best_PLL,
+    },
+    { /* INTEL_LIMIT_IGD_SDVO */
+        .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX},
+        .vco = { .min = IGD_VCO_MIN,		.max = IGD_VCO_MAX },
+        .n   = { .min = IGD_N_MIN,		.max = IGD_N_MAX },
+        .m   = { .min = IGD_M_MIN,		.max = IGD_M_MAX },
+        .m1  = { .min = IGD_M1_MIN,		.max = IGD_M1_MAX },
+        .m2  = { .min = IGD_M2_MIN,		.max = IGD_M2_MAX },
+        .p   = { .min = I9XX_P_SDVO_DAC_MIN,    .max = I9XX_P_SDVO_DAC_MAX },
+        .p1  = { .min = I9XX_P1_MIN,		.max = I9XX_P1_MAX },
+	.p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
+		 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,	.p2_fast = I9XX_P2_SDVO_DAC_FAST },
     },
+    { /* INTEL_LIMIT_IGD_LVDS */
+        .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX },
+        .vco = { .min = IGD_VCO_MIN,		.max = IGD_VCO_MAX },
+        .n   = { .min = IGD_N_MIN,		.max = IGD_N_MAX },
+        .m   = { .min = IGD_M_MIN,		.max = IGD_M_MAX },
+        .m1  = { .min = IGD_M1_MIN,		.max = IGD_M1_MAX },
+        .m2  = { .min = IGD_M2_MIN,		.max = IGD_M2_MAX },
+        .p   = { .min = IGD_P_LVDS_MIN,	.max = IGD_P_LVDS_MAX },
+        .p1  = { .min = I9XX_P1_MIN,		.max = I9XX_P1_MAX },
+	/* IGD only supports single-channel mode. */
+	.p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
+		 .p2_slow = I9XX_P2_LVDS_SLOW,	.p2_fast = I9XX_P2_LVDS_SLOW },
+    },
+
 };
 
+static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	const intel_limit_t *limit;
+
+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+		if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+		    LVDS_CLKB_POWER_UP)
+			/* LVDS with dual channel */
+			limit = &intel_limits
+					[INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS];
+		else
+			/* LVDS with dual channel */
+			limit = &intel_limits
+					[INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS];
+	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
+		   intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
+		limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC];
+	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
+		limit = &intel_limits[INTEL_LIMIT_G4X_SDVO];
+	} else /* The option is for other outputs */
+		limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
+
+	return limit;
+}
+
 static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
 {
 	struct drm_device *dev = crtc->dev;
 	const intel_limit_t *limit;
 
-	if (IS_I9XX(dev)) {
+	if (IS_G4X(dev)) {
+		limit = intel_g4x_limit(crtc);
+	} else if (IS_I9XX(dev) && !IS_IGD(dev)) {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
 			limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS];
 		else
 			limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
+	} else if (IS_IGD(dev)) {
+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
+			limit = &intel_limits[INTEL_LIMIT_IGD_LVDS];
+		else
+			limit = &intel_limits[INTEL_LIMIT_IGD_SDVO_DAC];
 	} else {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
 			limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS];
@@ -189,8 +437,21 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
 	return limit;
 }
 
-static void intel_clock(int refclk, intel_clock_t *clock)
+/* m1 is reserved as 0 in IGD, n is a ring counter */
+static void igd_clock(int refclk, intel_clock_t *clock)
+{
+	clock->m = clock->m2 + 2;
+	clock->p = clock->p1 * clock->p2;
+	clock->vco = refclk * clock->m / clock->n;
+	clock->dot = clock->vco / clock->p;
+}
+
+static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
 {
+	if (IS_IGD(dev)) {
+		igd_clock(refclk, clock);
+		return;
+	}
 	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
 	clock->p = clock->p1 * clock->p2;
 	clock->vco = refclk * clock->m / (clock->n + 2);
@@ -226,6 +487,7 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type)
 static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
 {
 	const intel_limit_t *limit = intel_limit (crtc);
+	struct drm_device *dev = crtc->dev;
 
 	if (clock->p1  < limit->p1.min  || limit->p1.max  < clock->p1)
 		INTELPllInvalid ("p1 out of range\n");
@@ -235,7 +497,7 @@ static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
 		INTELPllInvalid ("m2 out of range\n");
 	if (clock->m1  < limit->m1.min  || limit->m1.max  < clock->m1)
 		INTELPllInvalid ("m1 out of range\n");
-	if (clock->m1 <= clock->m2)
+	if (clock->m1 <= clock->m2 && !IS_IGD(dev))
 		INTELPllInvalid ("m1 <= m2\n");
 	if (clock->m   < limit->m.min   || limit->m.max   < clock->m)
 		INTELPllInvalid ("m out of range\n");
@@ -252,18 +514,14 @@ static bool intel_PLL_is_valid(struct drm_crtc *crtc, intel_clock_t *clock)
 	return true;
 }
 
-/**
- * Returns a set of divisors for the desired target clock with the given
- * refclk, or FALSE.  The returned values represent the clock equation:
- * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- */
-static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
-				int refclk, intel_clock_t *best_clock)
+static bool
+intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+		    int target, int refclk, intel_clock_t *best_clock)
+
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	intel_clock_t clock;
-	const intel_limit_t *limit = intel_limit(crtc);
 	int err = target;
 
 	if (IS_I9XX(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
@@ -289,15 +547,17 @@ static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
 	memset (best_clock, 0, sizeof (*best_clock));
 
 	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
-		for (clock.m2 = limit->m2.min; clock.m2 < clock.m1 &&
-			     clock.m2 <= limit->m2.max; clock.m2++) {
+		for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
+			/* m1 is always 0 in IGD */
+			if (clock.m2 >= clock.m1 && !IS_IGD(dev))
+				break;
 			for (clock.n = limit->n.min; clock.n <= limit->n.max;
 			     clock.n++) {
 				for (clock.p1 = limit->p1.min;
 				     clock.p1 <= limit->p1.max; clock.p1++) {
 					int this_err;
 
-					intel_clock(refclk, &clock);
+					intel_clock(dev, refclk, &clock);
 
 					if (!intel_PLL_is_valid(crtc, &clock))
 						continue;
@@ -315,11 +575,68 @@ static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
 	return (err != target);
 }
 
+static bool
+intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+			int target, int refclk, intel_clock_t *best_clock)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	intel_clock_t clock;
+	int max_n;
+	bool found;
+	/* approximately equals target * 0.00488 */
+	int err_most = (target >> 8) + (target >> 10);
+	found = false;
+
+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+		if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+		    LVDS_CLKB_POWER_UP)
+			clock.p2 = limit->p2.p2_fast;
+		else
+			clock.p2 = limit->p2.p2_slow;
+	} else {
+		if (target < limit->p2.dot_limit)
+			clock.p2 = limit->p2.p2_slow;
+		else
+			clock.p2 = limit->p2.p2_fast;
+	}
+
+	memset(best_clock, 0, sizeof(*best_clock));
+	max_n = limit->n.max;
+	/* based on hardware requriment prefer smaller n to precision */
+	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
+		/* based on hardware requirment prefere larger m1,m2, p1 */
+		for (clock.m1 = limit->m1.max;
+		     clock.m1 >= limit->m1.min; clock.m1--) {
+			for (clock.m2 = limit->m2.max;
+			     clock.m2 >= limit->m2.min; clock.m2--) {
+				for (clock.p1 = limit->p1.max;
+				     clock.p1 >= limit->p1.min; clock.p1--) {
+					int this_err;
+
+					intel_clock(dev, refclk, &clock);
+					if (!intel_PLL_is_valid(crtc, &clock))
+						continue;
+					this_err = abs(clock.dot - target) ;
+					if (this_err < err_most) {
+						*best_clock = clock;
+						err_most = this_err;
+						max_n = clock.n;
+						found = true;
+					}
+				}
+			}
+		}
+	}
+
+	return found;
+}
+
 void
 intel_wait_for_vblank(struct drm_device *dev)
 {
 	/* Wait for 20ms, i.e. one cycle at 50hz. */
-	udelay(20000);
+	mdelay(20);
 }
 
 static int
@@ -634,7 +951,7 @@ static int intel_get_core_clock_speed(struct drm_device *dev)
 		return 400000;
 	else if (IS_I915G(dev))
 		return 333000;
-	else if (IS_I945GM(dev) || IS_845G(dev))
+	else if (IS_I945GM(dev) || IS_845G(dev) || IS_IGDGM(dev))
 		return 200000;
 	else if (IS_I915GM(dev)) {
 		u16 gcfgc = 0;
@@ -733,6 +1050,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 	bool is_crt = false, is_lvds = false, is_tv = false;
 	struct drm_mode_config *mode_config = &dev->mode_config;
 	struct drm_connector *connector;
+	const intel_limit_t *limit;
 	int ret;
 
 	drm_vblank_pre_modeset(dev, pipe);
@@ -776,13 +1094,42 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 		refclk = 48000;
 	}
 
-	ok = intel_find_best_PLL(crtc, adjusted_mode->clock, refclk, &clock);
+	/*
+	 * Returns a set of divisors for the desired target clock with the given
+	 * refclk, or FALSE.  The returned values represent the clock equation:
+	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
+	 */
+	limit = intel_limit(crtc);
+	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock);
 	if (!ok) {
 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
 		return -EINVAL;
 	}
 
-	fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
+	/* SDVO TV has fixed PLL values depend on its clock range,
+	   this mirrors vbios setting. */
+	if (is_sdvo && is_tv) {
+		if (adjusted_mode->clock >= 100000
+				&& adjusted_mode->clock < 140500) {
+			clock.p1 = 2;
+			clock.p2 = 10;
+			clock.n = 3;
+			clock.m1 = 16;
+			clock.m2 = 8;
+		} else if (adjusted_mode->clock >= 140500
+				&& adjusted_mode->clock <= 200000) {
+			clock.p1 = 1;
+			clock.p2 = 10;
+			clock.n = 6;
+			clock.m1 = 12;
+			clock.m2 = 8;
+		}
+	}
+
+	if (IS_IGD(dev))
+		fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
+	else
+		fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
 
 	dpll = DPLL_VGA_MODE_DIS;
 	if (IS_I9XX(dev)) {
@@ -799,7 +1146,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 		}
 
 		/* compute bitmask from p1 value */
-		dpll |= (1 << (clock.p1 - 1)) << 16;
+		if (IS_IGD(dev))
+			dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_IGD;
+		else
+			dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
 		switch (clock.p2) {
 		case 5:
 			dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;
@@ -1279,10 +1629,20 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
 		fp = I915_READ((pipe == 0) ? FPA1 : FPB1);
 
 	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
-	clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
-	clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
+	if (IS_IGD(dev)) {
+		clock.n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
+		clock.m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT;
+	} else {
+		clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
+		clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
+	}
+
 	if (IS_I9XX(dev)) {
-		clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
+		if (IS_IGD(dev))
+			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
+				DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
+		else
+			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
 			       DPLL_FPA01_P1_POST_DIV_SHIFT);
 
 		switch (dpll & DPLL_MODE_MASK) {
@@ -1301,7 +1661,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
 		}
 
 		/* XXX: Handle the 100Mhz refclk */
-		intel_clock(96000, &clock);
+		intel_clock(dev, 96000, &clock);
 	} else {
 		bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN);
 
@@ -1313,9 +1673,9 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
 			if ((dpll & PLL_REF_INPUT_MASK) ==
 			    PLLB_REF_INPUT_SPREADSPECTRUMIN) {
 				/* XXX: might not be 66MHz */
-				intel_clock(66000, &clock);
+				intel_clock(dev, 66000, &clock);
 			} else
-				intel_clock(48000, &clock);
+				intel_clock(dev, 48000, &clock);
 		} else {
 			if (dpll & PLL_P1_DIVIDE_BY_TWO)
 				clock.p1 = 2;
@@ -1328,7 +1688,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
 			else
 				clock.p2 = 2;
 
-			intel_clock(48000, &clock);
+			intel_clock(dev, 48000, &clock);
 		}
 	}
 
@@ -1474,13 +1834,21 @@ static void intel_setup_outputs(struct drm_device *dev)
 
 	if (IS_I9XX(dev)) {
 		int found;
+		u32 reg;
 
 		if (I915_READ(SDVOB) & SDVO_DETECTED) {
 			found = intel_sdvo_init(dev, SDVOB);
 			if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
 				intel_hdmi_init(dev, SDVOB);
 		}
-		if (!IS_G4X(dev) || (I915_READ(SDVOB) & SDVO_DETECTED)) {
+
+		/* Before G4X SDVOC doesn't have its own detect register */
+		if (IS_G4X(dev))
+			reg = SDVOC;
+		else
+			reg = SDVOB;
+
+		if (I915_READ(reg) & SDVO_DETECTED) {
 			found = intel_sdvo_init(dev, SDVOC);
 			if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
 				intel_hdmi_init(dev, SDVOC);
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 0d211af98854..6619f26e46a5 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -265,7 +265,7 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
 		pfit_control = 0;
 
 	if (!IS_I965G(dev)) {
-		if (dev_priv->panel_wants_dither)
+		if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 			pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 	}
 	else
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index e42019e5d661..07d7ec976168 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -76,6 +76,7 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
 		drm_mode_connector_update_edid_property(&intel_output->base,
 							edid);
 		ret = drm_add_edid_modes(&intel_output->base, edid);
+		intel_output->base.display_info.raw_edid = NULL;
 		kfree(edid);
 	}
 
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index fbe6f3931b1b..7b31f55f55c8 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -273,20 +273,20 @@ static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd,
 	struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
 	int i;
 
-	DRM_DEBUG("%s: W: %02X ", SDVO_NAME(sdvo_priv), cmd);
+	printk(KERN_DEBUG "%s: W: %02X ", SDVO_NAME(sdvo_priv), cmd);
 	for (i = 0; i < args_len; i++)
-		printk("%02X ", ((u8 *)args)[i]);
+		printk(KERN_DEBUG "%02X ", ((u8 *)args)[i]);
 	for (; i < 8; i++)
-		printk("   ");
+		printk(KERN_DEBUG "   ");
 	for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) {
 		if (cmd == sdvo_cmd_names[i].cmd) {
-			printk("(%s)", sdvo_cmd_names[i].name);
+			printk(KERN_DEBUG "(%s)", sdvo_cmd_names[i].name);
 			break;
 		}
 	}
 	if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0]))
-		printk("(%02X)",cmd);
-	printk("\n");
+		printk(KERN_DEBUG "(%02X)", cmd);
+	printk(KERN_DEBUG "\n");
 }
 #else
 #define intel_sdvo_debug_write(o, c, a, l)
@@ -323,17 +323,18 @@ static void intel_sdvo_debug_response(struct intel_output *intel_output,
 				      u8 status)
 {
 	struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
+	int i;
 
-	DRM_DEBUG("%s: R: ", SDVO_NAME(sdvo_priv));
+	printk(KERN_DEBUG "%s: R: ", SDVO_NAME(sdvo_priv));
 	for (i = 0; i < response_len; i++)
-		printk("%02X ", ((u8 *)response)[i]);
+		printk(KERN_DEBUG "%02X ", ((u8 *)response)[i]);
 	for (; i < 8; i++)
-		printk("   ");
+		printk(KERN_DEBUG "   ");
 	if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
-		printk("(%s)", cmd_status_names[status]);
+		printk(KERN_DEBUG "(%s)", cmd_status_names[status]);
 	else
-		printk("(??? %d)", status);
-	printk("\n");
+		printk(KERN_DEBUG "(??? %d)", status);
+	printk(KERN_DEBUG "\n");
 }
 #else
 #define intel_sdvo_debug_response(o, r, l, s)
@@ -588,9 +589,12 @@ intel_sdvo_create_preferred_input_timing(struct intel_output *output,
 	struct intel_sdvo_preferred_input_timing_args args;
 	uint8_t status;
 
+	memset(&args, 0, sizeof(args));
 	args.clock = clock;
 	args.width = width;
 	args.height = height;
+	args.interlace = 0;
+	args.scaled = 0;
 	intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 			     &args, sizeof(args));
 	status = intel_sdvo_read_response(output, NULL, 0);
@@ -683,7 +687,7 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 		((v_blank_len >> 8) & 0xf);
 
-	dtd->part2.h_sync_off = h_sync_offset;
+	dtd->part2.h_sync_off = h_sync_offset & 0xff;
 	dtd->part2.h_sync_width = h_sync_len & 0xff;
 	dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 		(v_sync_len & 0xf);
@@ -705,27 +709,10 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 					 struct intel_sdvo_dtd *dtd)
 {
-	uint16_t width, height;
-	uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
-	uint16_t h_sync_offset, v_sync_offset;
-
-	width = mode->crtc_hdisplay;
-	height = mode->crtc_vdisplay;
-
-	/* do some mode translations */
-	h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
-	h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
-
-	v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
-	v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
-
-	h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
-	v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
-
 	mode->hdisplay = dtd->part1.h_active;
 	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 	mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
-	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xa0) << 2;
+	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 	mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 	mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
@@ -735,7 +722,7 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 	mode->vsync_start = mode->vdisplay;
 	mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
-	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0a) << 2;
+	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 	mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 	mode->vsync_end = mode->vsync_start +
 		(dtd->part2.v_sync_off_width & 0xf);
@@ -745,7 +732,7 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 
 	mode->clock = dtd->part1.clock * 10;
 
-	mode->flags &= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
+	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 	if (dtd->part2.dtd_flags & 0x2)
 		mode->flags |= DRM_MODE_FLAG_PHSYNC;
 	if (dtd->part2.dtd_flags & 0x4)
@@ -924,6 +911,27 @@ static void intel_sdvo_set_avi_infoframe(struct intel_output *output,
 				SDVO_HBUF_TX_VSYNC);
 }
 
+static void intel_sdvo_set_tv_format(struct intel_output *output)
+{
+	struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
+	struct intel_sdvo_tv_format *format, unset;
+	u8 status;
+
+	format = &sdvo_priv->tv_format;
+	memset(&unset, 0, sizeof(unset));
+	if (memcmp(format, &unset, sizeof(*format))) {
+		DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
+				SDVO_NAME(sdvo_priv));
+		format->ntsc_m = 1;
+		intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, format,
+				sizeof(*format));
+		status = intel_sdvo_read_response(output, NULL, 0);
+		if (status != SDVO_CMD_STATUS_SUCCESS)
+			DRM_DEBUG("%s: Failed to set TV format\n",
+					SDVO_NAME(sdvo_priv));
+	}
+}
+
 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 				  struct drm_display_mode *mode,
 				  struct drm_display_mode *adjusted_mode)
@@ -968,6 +976,12 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 							     &input_dtd);
 			intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
 
+			drm_mode_set_crtcinfo(adjusted_mode, 0);
+
+			mode->clock = adjusted_mode->clock;
+
+			adjusted_mode->clock *=
+				intel_sdvo_get_pixel_multiplier(mode);
 		} else {
 			return false;
 		}
@@ -1012,7 +1026,12 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
 		sdvox |= SDVO_AUDIO_ENABLE;
 	}
 
-	intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
+	/* We have tried to get input timing in mode_fixup, and filled into
+	   adjusted_mode */
+	if (sdvo_priv->is_tv)
+		intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
+	else
+		intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
 
 	/* If it's a TV, we already set the output timing in mode_fixup.
 	 * Otherwise, the output timing is equal to the input timing.
@@ -1027,6 +1046,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
 	/* Set the input timing to the screen. Assume always input 0. */
 	intel_sdvo_set_target_input(output, true, false);
 
+	if (sdvo_priv->is_tv)
+		intel_sdvo_set_tv_format(output);
+
 	/* We would like to use intel_sdvo_create_preferred_input_timing() to
 	 * provide the device with a timing it can support, if it supports that
 	 * feature.  However, presumably we would need to adjust the CRTC to
@@ -1395,7 +1417,7 @@ static void
 intel_sdvo_check_tv_format(struct intel_output *output)
 {
 	struct intel_sdvo_priv *dev_priv = output->dev_priv;
-	struct intel_sdvo_tv_format format, unset;
+	struct intel_sdvo_tv_format format;
 	uint8_t status;
 
 	intel_sdvo_write_cmd(output, SDVO_CMD_GET_TV_FORMAT, NULL, 0);
@@ -1403,15 +1425,7 @@ intel_sdvo_check_tv_format(struct intel_output *output)
 	if (status != SDVO_CMD_STATUS_SUCCESS)
 		return;
 
-	memset(&unset, 0, sizeof(unset));
-	if (memcmp(&format, &unset, sizeof(format))) {
-		DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
-			  SDVO_NAME(dev_priv));
-
-		format.ntsc_m = true;
-		intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, NULL, 0);
-		status = intel_sdvo_read_response(output, NULL, 0);
-	}
+	memcpy(&dev_priv->tv_format, &format, sizeof(format));
 }
 
 /*
@@ -1420,68 +1434,70 @@ intel_sdvo_check_tv_format(struct intel_output *output)
  * XXX: all 60Hz refresh?
  */
 struct drm_display_mode sdvo_tv_modes[] = {
-	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815680, 321, 384, 416,
-		   200, 0, 232, 201, 233, 4196112, 0,
+	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
+		   416, 0, 200, 201, 232, 233, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814080, 321, 384, 416,
-		   240, 0, 272, 241, 273, 4196112, 0,
+	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
+		   416, 0, 240, 241, 272, 273, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910080, 401, 464, 496,
-		   300, 0, 332, 301, 333, 4196112, 0,
+	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
+		   496, 0, 300, 301, 332, 333, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913280, 641, 704, 736,
-		   350, 0, 382, 351, 383, 4196112, 0,
+	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
+		   736, 0, 350, 351, 382, 383, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121280, 641, 704, 736,
-		   400, 0, 432, 401, 433, 4196112, 0,
+	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
+		   736, 0, 400, 401, 432, 433, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121280, 641, 704, 736,
-		   400, 0, 432, 401, 433, 4196112, 0,
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
+		   736, 0, 480, 481, 512, 513, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624000, 705, 768, 800,
-		   480, 0, 512, 481, 513, 4196112, 0,
+	{ DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
+		   800, 0, 480, 481, 512, 513, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232000, 705, 768, 800,
-		   576, 0, 608, 577, 609, 4196112, 0,
+	{ DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
+		   800, 0, 576, 577, 608, 609, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751680, 721, 784, 816,
-		   350, 0, 382, 351, 383, 4196112, 0,
+	{ DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
+		   816, 0, 350, 351, 382, 383, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199680, 721, 784, 816,
-		   400, 0, 432, 401, 433, 4196112, 0,
+	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
+		   816, 0, 400, 401, 432, 433, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116480, 721, 784, 816,
-		   480, 0, 512, 481, 513, 4196112, 0,
+	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
+		   816, 0, 480, 481, 512, 513, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054080, 721, 784, 816,
-		   540, 0, 572, 541, 573, 4196112, 0,
+	{ DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
+		   816, 0, 540, 541, 572, 573, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816640, 721, 784, 816,
-		   576, 0, 608, 577, 609, 4196112, 0,
+	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
+		   816, 0, 576, 577, 608, 609, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570560, 769, 832, 864,
-		   576, 0, 608, 577, 609, 4196112, 0,
+	{ DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
+		   864, 0, 576, 577, 608, 609, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030080, 801, 864, 896,
-		   600, 0, 632, 601, 633, 4196112, 0,
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
+		   896, 0, 600, 601, 632, 633, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581760, 833, 896, 928,
-		   624, 0, 656, 625, 657, 4196112, 0,
+	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
+		   928, 0, 624, 625, 656, 657, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707040, 921, 984, 1016,
-		   766, 0, 798, 767, 799, 4196112, 0,
+	{ DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
+		   1016, 0, 766, 767, 798, 799, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827200, 1025, 1088, 1120,
-		   768, 0, 800, 769, 801, 4196112, 0,
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
+		   1120, 0, 768, 769, 800, 801, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265920, 1281, 1344, 1376,
-		   1024, 0, 1056, 1025, 1057, 4196112, 0,
+	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
+		   1376, 0, 1024, 1025, 1056, 1057, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
 {
 	struct intel_output *output = to_intel_output(connector);
+	struct intel_sdvo_priv *sdvo_priv = output->dev_priv;
+	struct intel_sdvo_sdtv_resolution_request tv_res;
 	uint32_t reply = 0;
 	uint8_t status;
 	int i = 0;
@@ -1491,15 +1507,22 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
 	/* Read the list of supported input resolutions for the selected TV
 	 * format.
 	 */
+	memset(&tv_res, 0, sizeof(tv_res));
+	memcpy(&tv_res, &sdvo_priv->tv_format, sizeof(tv_res));
 	intel_sdvo_write_cmd(output, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
-			     NULL, 0);
+			     &tv_res, sizeof(tv_res));
 	status = intel_sdvo_read_response(output, &reply, 3);
 	if (status != SDVO_CMD_STATUS_SUCCESS)
 		return;
 
 	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
-		if (reply & (1 << i))
-			drm_mode_probed_add(connector, &sdvo_tv_modes[i]);
+		if (reply & (1 << i)) {
+			struct drm_display_mode *nmode;
+			nmode = drm_mode_duplicate(connector->dev,
+					&sdvo_tv_modes[i]);
+			if (nmode)
+				drm_mode_probed_add(connector, nmode);
+		}
 }
 
 static int intel_sdvo_get_modes(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
index 1117b9c151a6..193938b7d7f9 100644
--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
@@ -100,6 +100,9 @@ struct intel_sdvo_preferred_input_timing_args {
     u16 clock;
     u16 width;
     u16 height;
+    u8	interlace:1;
+    u8	scaled:1;
+    u8	pad:6;
 } __attribute__((packed));
 
 /* I2C registers for SDVO */
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 56485d67369b..d2c32983242d 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -217,8 +217,8 @@ static const u32 filter_table[] = {
  */
 static const struct color_conversion ntsc_m_csc_composite = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
-	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00,
-	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00,
+	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
+	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
 };
 
 static const struct video_levels ntsc_m_levels_composite = {
@@ -226,9 +226,9 @@ static const struct video_levels ntsc_m_levels_composite = {
 };
 
 static const struct color_conversion ntsc_m_csc_svideo = {
-	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134,
-	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00,
-	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00,
+	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
+	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
+	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
 };
 
 static const struct video_levels ntsc_m_levels_svideo = {
@@ -237,8 +237,8 @@ static const struct video_levels ntsc_m_levels_svideo = {
 
 static const struct color_conversion ntsc_j_csc_composite = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0119,
-	.ru = 0x074c, .gu = 0x0546, .bu = 0x05ec, .au = 0x0f00,
-	.rv = 0x035a, .gv = 0x0322, .bv = 0x06e1, .av = 0x0f00,
+	.ru = 0x074c, .gu = 0x0546, .bu = 0x05ec, .au = 0x0200,
+	.rv = 0x035a, .gv = 0x0322, .bv = 0x06e1, .av = 0x0200,
 };
 
 static const struct video_levels ntsc_j_levels_composite = {
@@ -247,8 +247,8 @@ static const struct video_levels ntsc_j_levels_composite = {
 
 static const struct color_conversion ntsc_j_csc_svideo = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x014c,
-	.ru = 0x0788, .gu = 0x0581, .bu = 0x0322, .au = 0x0f00,
-	.rv = 0x0399, .gv = 0x0356, .bv = 0x070a, .av = 0x0f00,
+	.ru = 0x0788, .gu = 0x0581, .bu = 0x0322, .au = 0x0200,
+	.rv = 0x0399, .gv = 0x0356, .bv = 0x070a, .av = 0x0200,
 };
 
 static const struct video_levels ntsc_j_levels_svideo = {
@@ -257,8 +257,8 @@ static const struct video_levels ntsc_j_levels_svideo = {
 
 static const struct color_conversion pal_csc_composite = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0113,
-	.ru = 0x0745, .gu = 0x053f, .bu = 0x05e1, .au = 0x0f00,
-	.rv = 0x0353, .gv = 0x031c, .bv = 0x06dc, .av = 0x0f00,
+	.ru = 0x0745, .gu = 0x053f, .bu = 0x05e1, .au = 0x0200,
+	.rv = 0x0353, .gv = 0x031c, .bv = 0x06dc, .av = 0x0200,
 };
 
 static const struct video_levels pal_levels_composite = {
@@ -267,8 +267,8 @@ static const struct video_levels pal_levels_composite = {
 
 static const struct color_conversion pal_csc_svideo = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0145,
-	.ru = 0x0780, .gu = 0x0579, .bu = 0x031c, .au = 0x0f00,
-	.rv = 0x0390, .gv = 0x034f, .bv = 0x0705, .av = 0x0f00,
+	.ru = 0x0780, .gu = 0x0579, .bu = 0x031c, .au = 0x0200,
+	.rv = 0x0390, .gv = 0x034f, .bv = 0x0705, .av = 0x0200,
 };
 
 static const struct video_levels pal_levels_svideo = {
@@ -277,8 +277,8 @@ static const struct video_levels pal_levels_svideo = {
 
 static const struct color_conversion pal_m_csc_composite = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
-	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00,
-	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00,
+	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
+	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
 };
 
 static const struct video_levels pal_m_levels_composite = {
@@ -286,9 +286,9 @@ static const struct video_levels pal_m_levels_composite = {
 };
 
 static const struct color_conversion pal_m_csc_svideo = {
-	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134,
-	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00,
-	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00,
+	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
+	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
+	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
 };
 
 static const struct video_levels pal_m_levels_svideo = {
@@ -297,8 +297,8 @@ static const struct video_levels pal_m_levels_svideo = {
 
 static const struct color_conversion pal_n_csc_composite = {
 	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0104,
-	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0f00,
-	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0f00,
+	.ru = 0x0733, .gu = 0x052d, .bu = 0x05c7, .au = 0x0200,
+	.rv = 0x0340, .gv = 0x030c, .bv = 0x06d0, .av = 0x0200,
 };
 
 static const struct video_levels pal_n_levels_composite = {
@@ -306,9 +306,9 @@ static const struct video_levels pal_n_levels_composite = {
 };
 
 static const struct color_conversion pal_n_csc_svideo = {
-	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0134,
-	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0f00,
-	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0f00,
+	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0133,
+	.ru = 0x076a, .gu = 0x0564, .bu = 0x030d, .au = 0x0200,
+	.rv = 0x037a, .gv = 0x033d, .bv = 0x06f6, .av = 0x0200,
 };
 
 static const struct video_levels pal_n_levels_svideo = {
@@ -319,9 +319,9 @@ static const struct video_levels pal_n_levels_svideo = {
  * Component connections
  */
 static const struct color_conversion sdtv_csc_yprpb = {
-	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0146,
-	.ru = 0x0559, .gu = 0x0353, .bu = 0x0100, .au = 0x0f00,
-	.rv = 0x0100, .gv = 0x03ad, .bv = 0x074d, .av = 0x0f00,
+	.ry = 0x0332, .gy = 0x012d, .by = 0x07d3, .ay = 0x0145,
+	.ru = 0x0559, .gu = 0x0353, .bu = 0x0100, .au = 0x0200,
+	.rv = 0x0100, .gv = 0x03ad, .bv = 0x074d, .av = 0x0200,
 };
 
 static const struct color_conversion sdtv_csc_rgb = {
@@ -331,9 +331,9 @@ static const struct color_conversion sdtv_csc_rgb = {
 };
 
 static const struct color_conversion hdtv_csc_yprpb = {
-	.ry = 0x05b3, .gy = 0x016e, .by = 0x0728, .ay = 0x0146,
-	.ru = 0x07d5, .gu = 0x038b, .bu = 0x0100, .au = 0x0f00,
-	.rv = 0x0100, .gv = 0x03d1, .bv = 0x06bc, .av = 0x0f00,
+	.ry = 0x05b3, .gy = 0x016e, .by = 0x0728, .ay = 0x0145,
+	.ru = 0x07d5, .gu = 0x038b, .bu = 0x0100, .au = 0x0200,
+	.rv = 0x0100, .gv = 0x03d1, .bv = 0x06bc, .av = 0x0200,
 };
 
 static const struct color_conversion hdtv_csc_rgb = {
@@ -414,7 +414,7 @@ struct tv_mode {
 static const struct tv_mode tv_modes[] = {
 	{
 		.name		= "NTSC-M",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 29970,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
@@ -442,8 +442,8 @@ static const struct tv_mode tv_modes[] = {
 		.vburst_start_f4 = 10,		    .vburst_end_f4	= 240,
 
 		/* desired 3.5800000 actual 3.5800000 clock 107.52 */
-		.dda1_inc	=    136,
-		.dda2_inc	=   7624,	    .dda2_size		=  20013,
+		.dda1_inc	=    135,
+		.dda2_inc	=  20800,	    .dda2_size		=  27456,
 		.dda3_inc	=      0,	    .dda3_size		=      0,
 		.sc_reset	= TV_SC_RESET_EVERY_4,
 		.pal_burst	= false,
@@ -457,7 +457,7 @@ static const struct tv_mode tv_modes[] = {
 	},
 	{
 		.name		= "NTSC-443",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 29970,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
@@ -485,10 +485,10 @@ static const struct tv_mode tv_modes[] = {
 
 		/* desired 4.4336180 actual 4.4336180 clock 107.52 */
 		.dda1_inc       =    168,
-		.dda2_inc       =  18557,       .dda2_size      =  20625,
-		.dda3_inc       =      0,       .dda3_size      =      0,
-		.sc_reset   = TV_SC_RESET_EVERY_8,
-		.pal_burst  = true,
+		.dda2_inc       =   4093,       .dda2_size      =  27456,
+		.dda3_inc       =    310,       .dda3_size      =    525,
+		.sc_reset   = TV_SC_RESET_NEVER,
+		.pal_burst  = false,
 
 		.composite_levels = &ntsc_m_levels_composite,
 		.composite_color = &ntsc_m_csc_composite,
@@ -499,7 +499,7 @@ static const struct tv_mode tv_modes[] = {
 	},
 	{
 		.name		= "NTSC-J",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 29970,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
@@ -527,8 +527,8 @@ static const struct tv_mode tv_modes[] = {
 		.vburst_start_f4 = 10,		    .vburst_end_f4	= 240,
 
 		/* desired 3.5800000 actual 3.5800000 clock 107.52 */
-		.dda1_inc	=    136,
-		.dda2_inc	=   7624,	    .dda2_size		=  20013,
+		.dda1_inc	=    135,
+		.dda2_inc	=  20800,	    .dda2_size		=  27456,
 		.dda3_inc	=      0,	    .dda3_size		=      0,
 		.sc_reset	= TV_SC_RESET_EVERY_4,
 		.pal_burst	= false,
@@ -542,7 +542,7 @@ static const struct tv_mode tv_modes[] = {
 	},
 	{
 		.name		= "PAL-M",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 29970,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
@@ -570,11 +570,11 @@ static const struct tv_mode tv_modes[] = {
 		.vburst_start_f4 = 10,		    .vburst_end_f4	= 240,
 
 		/* desired 3.5800000 actual 3.5800000 clock 107.52 */
-		.dda1_inc	=    136,
-		.dda2_inc	=    7624,	    .dda2_size		=  20013,
+		.dda1_inc	=    135,
+		.dda2_inc	=  16704,	    .dda2_size		=  27456,
 		.dda3_inc	=      0,	    .dda3_size		=      0,
-		.sc_reset	= TV_SC_RESET_EVERY_4,
-		.pal_burst  = false,
+		.sc_reset	= TV_SC_RESET_EVERY_8,
+		.pal_burst  = true,
 
 		.composite_levels = &pal_m_levels_composite,
 		.composite_color = &pal_m_csc_composite,
@@ -586,7 +586,7 @@ static const struct tv_mode tv_modes[] = {
 	{
 		/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
 		.name	    = "PAL-N",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 25000,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
@@ -615,9 +615,9 @@ static const struct tv_mode tv_modes[] = {
 
 
 		/* desired 4.4336180 actual 4.4336180 clock 107.52 */
-		.dda1_inc       =    168,
-		.dda2_inc       =  18557,       .dda2_size      =  20625,
-		.dda3_inc       =      0,       .dda3_size      =      0,
+		.dda1_inc       =    135,
+		.dda2_inc       =  23578,       .dda2_size      =  27648,
+		.dda3_inc       =    134,       .dda3_size      =    625,
 		.sc_reset   = TV_SC_RESET_EVERY_8,
 		.pal_burst  = true,
 
@@ -631,12 +631,12 @@ static const struct tv_mode tv_modes[] = {
 	{
 		/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
 		.name	    = "PAL",
-		.clock		= 107520,
+		.clock		= 108000,
 		.refresh	= 25000,
 		.oversample	= TV_OVERSAMPLE_8X,
 		.component_only = 0,
 
-		.hsync_end	= 64,		    .hblank_end		= 128,
+		.hsync_end	= 64,		    .hblank_end		= 142,
 		.hblank_start	= 844,	    .htotal		= 863,
 
 		.progressive	= false,    .trilevel_sync = false,
@@ -659,8 +659,8 @@ static const struct tv_mode tv_modes[] = {
 
 		/* desired 4.4336180 actual 4.4336180 clock 107.52 */
 		.dda1_inc       =    168,
-		.dda2_inc       =  18557,       .dda2_size      =  20625,
-		.dda3_inc       =      0,       .dda3_size      =      0,
+		.dda2_inc       =   4122,       .dda2_size      =  27648,
+		.dda3_inc       =     67,       .dda3_size      =    625,
 		.sc_reset   = TV_SC_RESET_EVERY_8,
 		.pal_burst  = true,
 
@@ -689,7 +689,7 @@ static const struct tv_mode tv_modes[] = {
 		.veq_ena        = false,
 
 		.vi_end_f1      = 44,               .vi_end_f2          = 44,
-		.nbr_end        = 496,
+		.nbr_end        = 479,
 
 		.burst_ena      = false,
 
@@ -713,7 +713,7 @@ static const struct tv_mode tv_modes[] = {
 		.veq_ena        = false,
 
 		.vi_end_f1      = 44,               .vi_end_f2          = 44,
-		.nbr_end        = 496,
+		.nbr_end        = 479,
 
 		.burst_ena      = false,
 
@@ -876,7 +876,7 @@ static const struct tv_mode tv_modes[] = {
 		.component_only = 1,
 
 		.hsync_end      = 88,               .hblank_end         = 235,
-		.hblank_start   = 2155,             .htotal             = 2200,
+		.hblank_start   = 2155,             .htotal             = 2201,
 
 		.progressive    = false, 	    .trilevel_sync = true,
 
@@ -1082,7 +1082,7 @@ intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mo
 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
 
 	/* Ensure TV refresh is close to desired refresh */
-	if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 1)
+	if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 10)
 		return MODE_OK;
 	return MODE_CLOCK_RANGE;
 }
@@ -1135,7 +1135,8 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 	if (!tv_mode)
 		return;	/* can't happen (mode_prepare prevents this) */
 
-	tv_ctl = 0;
+	tv_ctl = I915_READ(TV_CTL);
+	tv_ctl &= TV_CTL_SAVE;
 
 	switch (tv_priv->type) {
 	default:
@@ -1215,7 +1216,6 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 	/* dda1 implies valid video levels */
 	if (tv_mode->dda1_inc) {
 		scctl1 |= TV_SC_DDA1_EN;
-		scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
 	}
 
 	if (tv_mode->dda2_inc)
@@ -1225,6 +1225,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 		scctl1 |= TV_SC_DDA3_EN;
 
 	scctl1 |= tv_mode->sc_reset;
+	scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
 	scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
 
 	scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
@@ -1266,7 +1267,11 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 			   color_conversion->av);
 	}
 
-	I915_WRITE(TV_CLR_KNOBS, 0x00606000);
+	if (IS_I965G(dev))
+		I915_WRITE(TV_CLR_KNOBS, 0x00404000);
+	else
+		I915_WRITE(TV_CLR_KNOBS, 0x00606000);
+
 	if (video_levels)
 		I915_WRITE(TV_CLR_LEVEL,
 			   ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
@@ -1401,6 +1406,7 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
 		tv_dac = I915_READ(TV_DAC);
 		I915_WRITE(TV_DAC, save_tv_dac);
 		I915_WRITE(TV_CTL, save_tv_ctl);
+		intel_wait_for_vblank(dev);
 	}
 	/*
 	 *  A B C
@@ -1451,7 +1457,7 @@ intel_tv_detect(struct drm_connector *connector)
 	mode = reported_modes[0];
 	drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V);
 
-	if (encoder->crtc) {
+	if (encoder->crtc && encoder->crtc->enabled) {
 		type = intel_tv_detect_type(encoder->crtc, intel_output);
 	} else {
 		crtc = intel_get_load_detect_pipe(intel_output, &mode, &dpms_mode);
@@ -1462,6 +1468,8 @@ intel_tv_detect(struct drm_connector *connector)
 			type = -1;
 	}
 
+	tv_priv->type = type;
+
 	if (type < 0)
 		return connector_status_disconnected;
 
@@ -1495,7 +1503,8 @@ intel_tv_get_modes(struct drm_connector *connector)
 	struct drm_display_mode *mode_ptr;
 	struct intel_output *intel_output = to_intel_output(connector);
 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
-	int j;
+	int j, count = 0;
+	u64 tmp;
 
 	for (j = 0; j < sizeof(input_res_table) / sizeof(input_res_table[0]);
 	     j++) {
@@ -1510,8 +1519,9 @@ intel_tv_get_modes(struct drm_connector *connector)
 					&& !tv_mode->component_only))
 			continue;
 
-		mode_ptr = drm_calloc(1, sizeof(struct drm_display_mode),
-				      DRM_MEM_DRIVER);
+		mode_ptr = drm_mode_create(connector->dev);
+		if (!mode_ptr)
+			continue;
 		strncpy(mode_ptr->name, input->name, DRM_DISPLAY_MODE_LEN);
 
 		mode_ptr->hdisplay = hactive_s;
@@ -1528,15 +1538,17 @@ intel_tv_get_modes(struct drm_connector *connector)
 			mode_ptr->vsync_end = mode_ptr->vsync_start  + 1;
 		mode_ptr->vtotal = vactive_s + 33;
 
-		mode_ptr->clock = (int) (tv_mode->refresh *
-					 mode_ptr->vtotal *
-					 mode_ptr->htotal / 1000) / 1000;
+		tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
+		tmp *= mode_ptr->htotal;
+		tmp = div_u64(tmp, 1000000);
+		mode_ptr->clock = (int) tmp;
 
 		mode_ptr->type = DRM_MODE_TYPE_DRIVER;
 		drm_mode_probed_add(connector, mode_ptr);
+		count++;
 	}
 
-	return 0;
+	return count;
 }
 
 static void
@@ -1558,33 +1570,49 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop
 	struct drm_device *dev = connector->dev;
 	struct intel_output *intel_output = to_intel_output(connector);
 	struct intel_tv_priv *tv_priv = intel_output->dev_priv;
+	struct drm_encoder *encoder = &intel_output->enc;
+	struct drm_crtc *crtc = encoder->crtc;
 	int ret = 0;
+	bool changed = false;
 
 	ret = drm_connector_property_set_value(connector, property, val);
 	if (ret < 0)
 		goto out;
 
-	if (property == dev->mode_config.tv_left_margin_property)
+	if (property == dev->mode_config.tv_left_margin_property &&
+		tv_priv->margin[TV_MARGIN_LEFT] != val) {
 		tv_priv->margin[TV_MARGIN_LEFT] = val;
-	else if (property == dev->mode_config.tv_right_margin_property)
+		changed = true;
+	} else if (property == dev->mode_config.tv_right_margin_property &&
+		tv_priv->margin[TV_MARGIN_RIGHT] != val) {
 		tv_priv->margin[TV_MARGIN_RIGHT] = val;
-	else if (property == dev->mode_config.tv_top_margin_property)
+		changed = true;
+	} else if (property == dev->mode_config.tv_top_margin_property &&
+		tv_priv->margin[TV_MARGIN_TOP] != val) {
 		tv_priv->margin[TV_MARGIN_TOP] = val;
-	else if (property == dev->mode_config.tv_bottom_margin_property)
+		changed = true;
+	} else if (property == dev->mode_config.tv_bottom_margin_property &&
+		tv_priv->margin[TV_MARGIN_BOTTOM] != val) {
 		tv_priv->margin[TV_MARGIN_BOTTOM] = val;
-	else if (property == dev->mode_config.tv_mode_property) {
+		changed = true;
+	} else if (property == dev->mode_config.tv_mode_property) {
 		if (val >= NUM_TV_MODES) {
 			ret = -EINVAL;
 			goto out;
 		}
+		if (!strcmp(tv_priv->tv_format, tv_modes[val].name))
+			goto out;
+
 		tv_priv->tv_format = tv_modes[val].name;
-		intel_tv_mode_set(&intel_output->enc, NULL, NULL);
+		changed = true;
 	} else {
 		ret = -EINVAL;
 		goto out;
 	}
 
-	intel_tv_mode_set(&intel_output->enc, NULL, NULL);
+	if (changed && crtc)
+		drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
+				crtc->y, crtc->fb);
 out:
 	return ret;
 }
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index b49c5ff29585..7a6bf9ffc5a3 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -148,8 +148,8 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
 		primary->space = head - tail;
 	}
 
-	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
-	DRM_DEBUG("   tail = 0x%06lx\n", tail - dev_priv->primary->offset);
+	DRM_DEBUG("   head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
+	DRM_DEBUG("   tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
 	DRM_DEBUG("  space = 0x%06x\n", primary->space);
 
 	mga_flush_write_combine();
@@ -187,7 +187,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
 		primary->space = head - dev_priv->primary->offset;
 	}
 
-	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
+	DRM_DEBUG("   head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
 	DRM_DEBUG("   tail = 0x%06x\n", primary->tail);
 	DRM_DEBUG("   wrap = %d\n", primary->last_wrap);
 	DRM_DEBUG("  space = 0x%06x\n", primary->space);
@@ -239,7 +239,7 @@ static void mga_freelist_print(struct drm_device * dev)
 	for (entry = dev_priv->head->next; entry; entry = entry->next) {
 		DRM_INFO("   %p   idx=%2d  age=0x%x 0x%06lx\n",
 			 entry, entry->buf->idx, entry->age.head,
-			 entry->age.head - dev_priv->primary->offset);
+			 (unsigned long)(entry->age.head - dev_priv->primary->offset));
 	}
 	DRM_INFO("\n");
 }
@@ -340,10 +340,10 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
 
 	DRM_DEBUG("   tail=0x%06lx %d\n",
 		  tail->age.head ?
-		  tail->age.head - dev_priv->primary->offset : 0,
+		  (unsigned long)(tail->age.head - dev_priv->primary->offset) : 0,
 		  tail->age.wrap);
 	DRM_DEBUG("   head=0x%06lx %d\n",
-		  head - dev_priv->primary->offset, wrap);
+		  (unsigned long)(head - dev_priv->primary->offset), wrap);
 
 	if (TEST_AGE(&tail->age, head, wrap)) {
 		prev = dev_priv->tail->prev;
@@ -366,8 +366,9 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
 	drm_mga_freelist_t *head, *entry, *prev;
 
 	DRM_DEBUG("age=0x%06lx wrap=%d\n",
-		  buf_priv->list_entry->age.head -
-		  dev_priv->primary->offset, buf_priv->list_entry->age.wrap);
+		  (unsigned long)(buf_priv->list_entry->age.head -
+				  dev_priv->primary->offset),
+		  buf_priv->list_entry->age.wrap);
 
 	entry = buf_priv->list_entry;
 	head = dev_priv->head;
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index 88257c276eb9..3d264f288237 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -113,8 +113,8 @@ typedef struct drm_mga_private {
 	 * \sa drm_mga_private_t::mmio
 	 */
 	/*@{ */
-	u32 mmio_base;		   /**< Bus address of base of MMIO. */
-	u32 mmio_size;		   /**< Size of the MMIO region. */
+	resource_size_t mmio_base;	   /**< Bus address of base of MMIO. */
+	resource_size_t mmio_size;	   /**< Size of the MMIO region. */
 	/*@} */
 
 	u32 clear_cmd;
@@ -317,8 +317,8 @@ do {									\
 		DRM_INFO( "\n" );					\
 		DRM_INFO( "   tail=0x%06x head=0x%06lx\n",		\
 			  dev_priv->prim.tail,				\
-			  MGA_READ( MGA_PRIMADDRESS ) -			\
-			  dev_priv->primary->offset );			\
+			  (unsigned long)(MGA_READ(MGA_PRIMADDRESS) -	\
+					  dev_priv->primary->offset));	\
 	}								\
 	if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) {		\
 		if ( dev_priv->prim.space <				\
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index c31afbde62e7..32de4cedc363 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -525,11 +525,12 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
 	} else
 #endif
 	{
-		dev_priv->cce_ring->handle = (void *)dev_priv->cce_ring->offset;
+		dev_priv->cce_ring->handle =
+			(void *)(unsigned long)dev_priv->cce_ring->offset;
 		dev_priv->ring_rptr->handle =
-		    (void *)dev_priv->ring_rptr->offset;
+			(void *)(unsigned long)dev_priv->ring_rptr->offset;
 		dev->agp_buffer_map->handle =
-		    (void *)dev->agp_buffer_map->offset;
+			(void *)(unsigned long)dev->agp_buffer_map->offset;
 	}
 
 #if __OS_HAS_AGP
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index feb521ebc393..52ce439a0f2e 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -3,7 +3,7 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
 ccflags-y := -Iinclude/drm
-radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o
+radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o r600_cp.o
 
 radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
 
diff --git a/drivers/gpu/drm/radeon/r300_cmdbuf.c b/drivers/gpu/drm/radeon/r300_cmdbuf.c
index cace3964feeb..cb2e470f97d4 100644
--- a/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ b/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -37,6 +37,8 @@
 #include "radeon_drv.h"
 #include "r300_reg.h"
 
+#include <asm/unaligned.h>
+
 #define R300_SIMULTANEOUS_CLIPRECTS		4
 
 /* Values for R300_RE_CLIPRECT_CNTL depending on the number of cliprects
@@ -205,6 +207,10 @@ void r300_init_reg_flags(struct drm_device *dev)
 	ADD_RANGE(0x42C0, 2);
 	ADD_RANGE(R300_RS_CNTL_0, 2);
 
+	ADD_RANGE(R300_SU_REG_DEST, 1);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530)
+		ADD_RANGE(RV530_FG_ZBREG_DEST, 1);
+
 	ADD_RANGE(R300_SC_HYPERZ, 2);
 	ADD_RANGE(0x43E8, 1);
 
@@ -230,6 +236,7 @@ void r300_init_reg_flags(struct drm_device *dev)
 	ADD_RANGE(R300_ZB_DEPTHPITCH, 1);
 	ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1);
 	ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13);
+	ADD_RANGE(R300_ZB_ZPASS_DATA, 2); /* ZB_ZPASS_DATA, ZB_ZPASS_ADDR */
 
 	ADD_RANGE(R300_TX_FILTER_0, 16);
 	ADD_RANGE(R300_TX_FILTER1_0, 16);
@@ -917,6 +924,7 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
 {
 	u32 *ref_age_base;
 	u32 i, buf_idx, h_pending;
+	u64 ptr_addr;
 	RING_LOCALS;
 
 	if (cmdbuf->bufsz <
@@ -930,7 +938,8 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
 
 	dev_priv->scratch_ages[header.scratch.reg]++;
 
-	ref_age_base =  (u32 *)(unsigned long)*((uint64_t *)cmdbuf->buf);
+	ptr_addr = get_unaligned((u64 *)cmdbuf->buf);
+	ref_age_base = (u32 *)(unsigned long)ptr_addr;
 
 	cmdbuf->buf += sizeof(u64);
 	cmdbuf->bufsz -= sizeof(u64);
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index ee6f811599a3..bdbc95fa6721 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -1770,4 +1770,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R500_RB3D_COLOR_CLEAR_VALUE_AR  0x46c0
 #define R500_RB3D_CONSTANT_COLOR_AR     0x4ef8
 
+#define R300_SU_REG_DEST                0x42c8
+#define RV530_FG_ZBREG_DEST             0x4be8
+#define R300_ZB_ZPASS_DATA              0x4f58
+#define R300_ZB_ZPASS_ADDR              0x4f5c
+
 #endif /* _R300_REG_H */
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
new file mode 100644
index 000000000000..bc9d09dfa8e7
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -0,0 +1,2253 @@
+/*
+ * Copyright 2008-2009 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *     Dave Airlie <airlied@redhat.com>
+ *     Alex Deucher <alexander.deucher@amd.com>
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
+
+#include "r600_microcode.h"
+
+# define ATI_PCIGART_PAGE_SIZE		4096	/**< PCI GART page size */
+# define ATI_PCIGART_PAGE_MASK		(~(ATI_PCIGART_PAGE_SIZE-1))
+
+#define R600_PTE_VALID     (1 << 0)
+#define R600_PTE_SYSTEM    (1 << 1)
+#define R600_PTE_SNOOPED   (1 << 2)
+#define R600_PTE_READABLE  (1 << 5)
+#define R600_PTE_WRITEABLE (1 << 6)
+
+/* MAX values used for gfx init */
+#define R6XX_MAX_SH_GPRS           256
+#define R6XX_MAX_TEMP_GPRS         16
+#define R6XX_MAX_SH_THREADS        256
+#define R6XX_MAX_SH_STACK_ENTRIES  4096
+#define R6XX_MAX_BACKENDS          8
+#define R6XX_MAX_BACKENDS_MASK     0xff
+#define R6XX_MAX_SIMDS             8
+#define R6XX_MAX_SIMDS_MASK        0xff
+#define R6XX_MAX_PIPES             8
+#define R6XX_MAX_PIPES_MASK        0xff
+
+#define R7XX_MAX_SH_GPRS           256
+#define R7XX_MAX_TEMP_GPRS         16
+#define R7XX_MAX_SH_THREADS        256
+#define R7XX_MAX_SH_STACK_ENTRIES  4096
+#define R7XX_MAX_BACKENDS          8
+#define R7XX_MAX_BACKENDS_MASK     0xff
+#define R7XX_MAX_SIMDS             16
+#define R7XX_MAX_SIMDS_MASK        0xffff
+#define R7XX_MAX_PIPES             8
+#define R7XX_MAX_PIPES_MASK        0xff
+
+static int r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries)
+{
+	int i;
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		int slots;
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
+			slots = (RADEON_READ(R600_GRBM_STATUS)
+				 & R700_CMDFIFO_AVAIL_MASK);
+		else
+			slots = (RADEON_READ(R600_GRBM_STATUS)
+				 & R600_CMDFIFO_AVAIL_MASK);
+		if (slots >= entries)
+			return 0;
+		DRM_UDELAY(1);
+	}
+	DRM_INFO("wait for fifo failed status : 0x%08X 0x%08X\n",
+		 RADEON_READ(R600_GRBM_STATUS),
+		 RADEON_READ(R600_GRBM_STATUS2));
+
+	return -EBUSY;
+}
+
+static int r600_do_wait_for_idle(drm_radeon_private_t *dev_priv)
+{
+	int i, ret;
+
+	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
+		ret = r600_do_wait_for_fifo(dev_priv, 8);
+	else
+		ret = r600_do_wait_for_fifo(dev_priv, 16);
+	if (ret)
+		return ret;
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(RADEON_READ(R600_GRBM_STATUS) & R600_GUI_ACTIVE))
+			return 0;
+		DRM_UDELAY(1);
+	}
+	DRM_INFO("wait idle failed status : 0x%08X 0x%08X\n",
+		 RADEON_READ(R600_GRBM_STATUS),
+		 RADEON_READ(R600_GRBM_STATUS2));
+
+	return -EBUSY;
+}
+
+void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
+{
+	struct drm_sg_mem *entry = dev->sg;
+	int max_pages;
+	int pages;
+	int i;
+
+	if (!entry)
+		return;
+
+	if (gart_info->bus_addr) {
+		max_pages = (gart_info->table_size / sizeof(u64));
+		pages = (entry->pages <= max_pages)
+		  ? entry->pages : max_pages;
+
+		for (i = 0; i < pages; i++) {
+			if (!entry->busaddr[i])
+				break;
+			pci_unmap_page(dev->pdev, entry->busaddr[i],
+				       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+		}
+		if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
+			gart_info->bus_addr = 0;
+	}
+}
+
+/* R600 has page table setup */
+int r600_page_table_init(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
+	struct drm_local_map *map = &gart_info->mapping;
+	struct drm_sg_mem *entry = dev->sg;
+	int ret = 0;
+	int i, j;
+	int pages;
+	u64 page_base;
+	dma_addr_t entry_addr;
+	int max_ati_pages, max_real_pages, gart_idx;
+
+	/* okay page table is available - lets rock */
+	max_ati_pages = (gart_info->table_size / sizeof(u64));
+	max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
+
+	pages = (entry->pages <= max_real_pages) ?
+		entry->pages : max_real_pages;
+
+	memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u64));
+
+	gart_idx = 0;
+	for (i = 0; i < pages; i++) {
+		entry->busaddr[i] = pci_map_page(dev->pdev,
+						 entry->pagelist[i], 0,
+						 PAGE_SIZE,
+						 PCI_DMA_BIDIRECTIONAL);
+		if (entry->busaddr[i] == 0) {
+			DRM_ERROR("unable to map PCIGART pages!\n");
+			r600_page_table_cleanup(dev, gart_info);
+			goto done;
+		}
+		entry_addr = entry->busaddr[i];
+		for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
+			page_base = (u64) entry_addr & ATI_PCIGART_PAGE_MASK;
+			page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
+			page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
+
+			DRM_WRITE64(map, gart_idx * sizeof(u64), page_base);
+
+			gart_idx++;
+
+			if ((i % 128) == 0)
+				DRM_DEBUG("page entry %d: 0x%016llx\n",
+				    i, (unsigned long long)page_base);
+			entry_addr += ATI_PCIGART_PAGE_SIZE;
+		}
+	}
+	ret = 1;
+done:
+	return ret;
+}
+
+static void r600_vm_flush_gart_range(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	u32 resp, countdown = 1000;
+	RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR, dev_priv->gart_vm_start >> 12);
+	RADEON_WRITE(R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
+	RADEON_WRITE(R600_VM_CONTEXT0_REQUEST_RESPONSE, 2);
+
+	do {
+		resp = RADEON_READ(R600_VM_CONTEXT0_REQUEST_RESPONSE);
+		countdown--;
+		DRM_UDELAY(1);
+	} while (((resp & 0xf0) == 0) && countdown);
+}
+
+static void r600_vm_init(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	/* initialise the VM to use the page table we constructed up there */
+	u32 vm_c0, i;
+	u32 mc_rd_a;
+	u32 vm_l2_cntl, vm_l2_cntl3;
+	/* okay set up the PCIE aperture type thingo */
+	RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12);
+	RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
+	RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+
+	/* setup MC RD a */
+	mc_rd_a = R600_MCD_L1_TLB | R600_MCD_L1_FRAG_PROC | R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS |
+		R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU | R600_MCD_EFFECTIVE_L1_TLB_SIZE(5) |
+		R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(5) | R600_MCD_WAIT_L2_QUERY;
+
+	RADEON_WRITE(R600_MCD_RD_A_CNTL, mc_rd_a);
+	RADEON_WRITE(R600_MCD_RD_B_CNTL, mc_rd_a);
+
+	RADEON_WRITE(R600_MCD_WR_A_CNTL, mc_rd_a);
+	RADEON_WRITE(R600_MCD_WR_B_CNTL, mc_rd_a);
+
+	RADEON_WRITE(R600_MCD_RD_GFX_CNTL, mc_rd_a);
+	RADEON_WRITE(R600_MCD_WR_GFX_CNTL, mc_rd_a);
+
+	RADEON_WRITE(R600_MCD_RD_SYS_CNTL, mc_rd_a);
+	RADEON_WRITE(R600_MCD_WR_SYS_CNTL, mc_rd_a);
+
+	RADEON_WRITE(R600_MCD_RD_HDP_CNTL, mc_rd_a | R600_MCD_L1_STRICT_ORDERING);
+	RADEON_WRITE(R600_MCD_WR_HDP_CNTL, mc_rd_a /*| R600_MCD_L1_STRICT_ORDERING*/);
+
+	RADEON_WRITE(R600_MCD_RD_PDMA_CNTL, mc_rd_a);
+	RADEON_WRITE(R600_MCD_WR_PDMA_CNTL, mc_rd_a);
+
+	RADEON_WRITE(R600_MCD_RD_SEM_CNTL, mc_rd_a | R600_MCD_SEMAPHORE_MODE);
+	RADEON_WRITE(R600_MCD_WR_SEM_CNTL, mc_rd_a);
+
+	vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W;
+	vm_l2_cntl |= R600_VM_L2_CNTL_QUEUE_SIZE(7);
+	RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl);
+
+	RADEON_WRITE(R600_VM_L2_CNTL2, 0);
+	vm_l2_cntl3 = (R600_VM_L2_CNTL3_BANK_SELECT_0(0) |
+		       R600_VM_L2_CNTL3_BANK_SELECT_1(1) |
+		       R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(2));
+	RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3);
+
+	vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT;
+
+	RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0);
+
+	vm_c0 &= ~R600_VM_ENABLE_CONTEXT;
+
+	/* disable all other contexts */
+	for (i = 1; i < 8; i++)
+		RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0);
+
+	RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
+	RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12);
+	RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
+
+	r600_vm_flush_gart_range(dev);
+}
+
+/* load r600 microcode */
+static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
+{
+	int i;
+
+	r600_do_cp_stop(dev_priv);
+
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     R600_RB_NO_UPDATE |
+		     R600_RB_BLKSZ(15) |
+		     R600_RB_BUFSZ(3));
+
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
+	RADEON_READ(R600_GRBM_SOFT_RESET);
+	DRM_UDELAY(15000);
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+
+	RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600)) {
+		DRM_INFO("Loading R600 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     R600_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     R600_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     R600_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading R600 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, R600_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610)) {
+		DRM_INFO("Loading RV610 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV610_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV610_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV610_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV610 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV610_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
+		DRM_INFO("Loading RV630 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV630_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV630_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV630_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV630 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV630_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620)) {
+		DRM_INFO("Loading RV620 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV620_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV620_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV620_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV620 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV620_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
+		DRM_INFO("Loading RV635 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV635_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV635_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV635_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV635 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV635_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)) {
+		DRM_INFO("Loading RV670 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV670_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV670_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RV670_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV670 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
+		DRM_INFO("Loading RS780 CP Microcode\n");
+		for (i = 0; i < PM4_UCODE_SIZE; i++) {
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RS780_cp_microcode[i][0]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RS780_cp_microcode[i][1]);
+			RADEON_WRITE(R600_CP_ME_RAM_DATA,
+				     RS780_cp_microcode[i][2]);
+		}
+
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RS780 PFP Microcode\n");
+		for (i = 0; i < PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
+	}
+	RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+	RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+	RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
+
+}
+
+static void r700_vm_init(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	/* initialise the VM to use the page table we constructed up there */
+	u32 vm_c0, i;
+	u32 mc_vm_md_l1;
+	u32 vm_l2_cntl, vm_l2_cntl3;
+	/* okay set up the PCIE aperture type thingo */
+	RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR, dev_priv->gart_vm_start >> 12);
+	RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
+	RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+
+	mc_vm_md_l1 = R700_ENABLE_L1_TLB |
+	    R700_ENABLE_L1_FRAGMENT_PROCESSING |
+	    R700_SYSTEM_ACCESS_MODE_IN_SYS |
+	    R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU |
+	    R700_EFFECTIVE_L1_TLB_SIZE(5) |
+	    R700_EFFECTIVE_L1_QUEUE_SIZE(5);
+
+	RADEON_WRITE(R700_MC_VM_MD_L1_TLB0_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MD_L1_TLB1_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MD_L1_TLB2_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MB_L1_TLB0_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MB_L1_TLB1_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MB_L1_TLB2_CNTL, mc_vm_md_l1);
+	RADEON_WRITE(R700_MC_VM_MB_L1_TLB3_CNTL, mc_vm_md_l1);
+
+	vm_l2_cntl = R600_VM_L2_CACHE_EN | R600_VM_L2_FRAG_PROC | R600_VM_ENABLE_PTE_CACHE_LRU_W;
+	vm_l2_cntl |= R700_VM_L2_CNTL_QUEUE_SIZE(7);
+	RADEON_WRITE(R600_VM_L2_CNTL, vm_l2_cntl);
+
+	RADEON_WRITE(R600_VM_L2_CNTL2, 0);
+	vm_l2_cntl3 = R700_VM_L2_CNTL3_BANK_SELECT(0) | R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(2);
+	RADEON_WRITE(R600_VM_L2_CNTL3, vm_l2_cntl3);
+
+	vm_c0 = R600_VM_ENABLE_CONTEXT | R600_VM_PAGE_TABLE_DEPTH_FLAT;
+
+	RADEON_WRITE(R600_VM_CONTEXT0_CNTL, vm_c0);
+
+	vm_c0 &= ~R600_VM_ENABLE_CONTEXT;
+
+	/* disable all other contexts */
+	for (i = 1; i < 8; i++)
+		RADEON_WRITE(R600_VM_CONTEXT0_CNTL + (i * 4), vm_c0);
+
+	RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
+	RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR, dev_priv->gart_vm_start >> 12);
+	RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12);
+
+	r600_vm_flush_gart_range(dev);
+}
+
+/* load r600 microcode */
+static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
+{
+	int i;
+
+	r600_do_cp_stop(dev_priv);
+
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     R600_RB_NO_UPDATE |
+		     (15 << 8) |
+		     (3 << 0));
+
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
+	RADEON_READ(R600_GRBM_SOFT_RESET);
+	DRM_UDELAY(15000);
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)) {
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV770 PFP Microcode\n");
+		for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV770_pfp_microcode[i]);
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+		DRM_INFO("Loading RV770 CP Microcode\n");
+		for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_ME_RAM_DATA, RV770_cp_microcode[i]);
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV730)) {
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV730 PFP Microcode\n");
+		for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV730_pfp_microcode[i]);
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+		DRM_INFO("Loading RV730 CP Microcode\n");
+		for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_ME_RAM_DATA, RV730_cp_microcode[i]);
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) {
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+		DRM_INFO("Loading RV710 PFP Microcode\n");
+		for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV710_pfp_microcode[i]);
+		RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+		DRM_INFO("Loading RV710 CP Microcode\n");
+		for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+			RADEON_WRITE(R600_CP_ME_RAM_DATA, RV710_cp_microcode[i]);
+		RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+
+	}
+	RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+	RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+	RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
+
+}
+
+static void r600_test_writeback(drm_radeon_private_t *dev_priv)
+{
+	u32 tmp;
+
+	/* Start with assuming that writeback doesn't work */
+	dev_priv->writeback_works = 0;
+
+	/* Writeback doesn't seem to work everywhere, test it here and possibly
+	 * enable it if it appears to work
+	 */
+	radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(1), 0);
+
+	RADEON_WRITE(R600_SCRATCH_REG1, 0xdeadbeef);
+
+	for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
+		u32 val;
+
+		val = radeon_read_ring_rptr(dev_priv, R600_SCRATCHOFF(1));
+		if (val == 0xdeadbeef)
+			break;
+		DRM_UDELAY(1);
+	}
+
+	if (tmp < dev_priv->usec_timeout) {
+		dev_priv->writeback_works = 1;
+		DRM_INFO("writeback test succeeded in %d usecs\n", tmp);
+	} else {
+		dev_priv->writeback_works = 0;
+		DRM_INFO("writeback test failed\n");
+	}
+	if (radeon_no_wb == 1) {
+		dev_priv->writeback_works = 0;
+		DRM_INFO("writeback forced off\n");
+	}
+
+	if (!dev_priv->writeback_works) {
+		/* Disable writeback to avoid unnecessary bus master transfer */
+		RADEON_WRITE(R600_CP_RB_CNTL, RADEON_READ(R600_CP_RB_CNTL) |
+			     RADEON_RB_NO_UPDATE);
+		RADEON_WRITE(R600_SCRATCH_UMSK, 0);
+	}
+}
+
+int r600_do_engine_reset(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	u32 cp_ptr, cp_me_cntl, cp_rb_cntl;
+
+	DRM_INFO("Resetting GPU\n");
+
+	cp_ptr = RADEON_READ(R600_CP_RB_WPTR);
+	cp_me_cntl = RADEON_READ(R600_CP_ME_CNTL);
+	RADEON_WRITE(R600_CP_ME_CNTL, R600_CP_ME_HALT);
+
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, 0x7fff);
+	RADEON_READ(R600_GRBM_SOFT_RESET);
+	DRM_UDELAY(50);
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+	RADEON_READ(R600_GRBM_SOFT_RESET);
+
+	RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0);
+	cp_rb_cntl = RADEON_READ(R600_CP_RB_CNTL);
+	RADEON_WRITE(R600_CP_RB_CNTL, R600_RB_RPTR_WR_ENA);
+
+	RADEON_WRITE(R600_CP_RB_RPTR_WR, cp_ptr);
+	RADEON_WRITE(R600_CP_RB_WPTR, cp_ptr);
+	RADEON_WRITE(R600_CP_RB_CNTL, cp_rb_cntl);
+	RADEON_WRITE(R600_CP_ME_CNTL, cp_me_cntl);
+
+	/* Reset the CP ring */
+	r600_do_cp_reset(dev_priv);
+
+	/* The CP is no longer running after an engine reset */
+	dev_priv->cp_running = 0;
+
+	/* Reset any pending vertex, indirect buffers */
+	radeon_freelist_reset(dev);
+
+	return 0;
+
+}
+
+static u32 r600_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
+					     u32 num_backends,
+					     u32 backend_disable_mask)
+{
+	u32 backend_map = 0;
+	u32 enabled_backends_mask;
+	u32 enabled_backends_count;
+	u32 cur_pipe;
+	u32 swizzle_pipe[R6XX_MAX_PIPES];
+	u32 cur_backend;
+	u32 i;
+
+	if (num_tile_pipes > R6XX_MAX_PIPES)
+		num_tile_pipes = R6XX_MAX_PIPES;
+	if (num_tile_pipes < 1)
+		num_tile_pipes = 1;
+	if (num_backends > R6XX_MAX_BACKENDS)
+		num_backends = R6XX_MAX_BACKENDS;
+	if (num_backends < 1)
+		num_backends = 1;
+
+	enabled_backends_mask = 0;
+	enabled_backends_count = 0;
+	for (i = 0; i < R6XX_MAX_BACKENDS; ++i) {
+		if (((backend_disable_mask >> i) & 1) == 0) {
+			enabled_backends_mask |= (1 << i);
+			++enabled_backends_count;
+		}
+		if (enabled_backends_count == num_backends)
+			break;
+	}
+
+	if (enabled_backends_count == 0) {
+		enabled_backends_mask = 1;
+		enabled_backends_count = 1;
+	}
+
+	if (enabled_backends_count != num_backends)
+		num_backends = enabled_backends_count;
+
+	memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R6XX_MAX_PIPES);
+	switch (num_tile_pipes) {
+	case 1:
+		swizzle_pipe[0] = 0;
+		break;
+	case 2:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 1;
+		break;
+	case 3:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 1;
+		swizzle_pipe[2] = 2;
+		break;
+	case 4:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 1;
+		swizzle_pipe[2] = 2;
+		swizzle_pipe[3] = 3;
+		break;
+	case 5:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 1;
+		swizzle_pipe[2] = 2;
+		swizzle_pipe[3] = 3;
+		swizzle_pipe[4] = 4;
+		break;
+	case 6:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 5;
+		swizzle_pipe[4] = 1;
+		swizzle_pipe[5] = 3;
+		break;
+	case 7:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 6;
+		swizzle_pipe[4] = 1;
+		swizzle_pipe[5] = 3;
+		swizzle_pipe[6] = 5;
+		break;
+	case 8:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 6;
+		swizzle_pipe[4] = 1;
+		swizzle_pipe[5] = 3;
+		swizzle_pipe[6] = 5;
+		swizzle_pipe[7] = 7;
+		break;
+	}
+
+	cur_backend = 0;
+	for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
+		while (((1 << cur_backend) & enabled_backends_mask) == 0)
+			cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
+
+		backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
+
+		cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;
+	}
+
+	return backend_map;
+}
+
+static int r600_count_pipe_bits(uint32_t val)
+{
+	int i, ret = 0;
+	for (i = 0; i < 32; i++) {
+		ret += val & 1;
+		val >>= 1;
+	}
+	return ret;
+}
+
+static void r600_gfx_init(struct drm_device *dev,
+			  drm_radeon_private_t *dev_priv)
+{
+	int i, j, num_qd_pipes;
+	u32 sx_debug_1;
+	u32 tc_cntl;
+	u32 arb_pop;
+	u32 num_gs_verts_per_thread;
+	u32 vgt_gs_per_es;
+	u32 gs_prim_buffer_depth = 0;
+	u32 sq_ms_fifo_sizes;
+	u32 sq_config;
+	u32 sq_gpr_resource_mgmt_1 = 0;
+	u32 sq_gpr_resource_mgmt_2 = 0;
+	u32 sq_thread_resource_mgmt = 0;
+	u32 sq_stack_resource_mgmt_1 = 0;
+	u32 sq_stack_resource_mgmt_2 = 0;
+	u32 hdp_host_path_cntl;
+	u32 backend_map;
+	u32 gb_tiling_config = 0;
+	u32 cc_rb_backend_disable = 0;
+	u32 cc_gc_shader_pipe_config = 0;
+	u32 ramcfg;
+
+	/* setup chip specs */
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_R600:
+		dev_priv->r600_max_pipes = 4;
+		dev_priv->r600_max_tile_pipes = 8;
+		dev_priv->r600_max_simds = 4;
+		dev_priv->r600_max_backends = 4;
+		dev_priv->r600_max_gprs = 256;
+		dev_priv->r600_max_threads = 192;
+		dev_priv->r600_max_stack_entries = 256;
+		dev_priv->r600_max_hw_contexts = 8;
+		dev_priv->r600_max_gs_threads = 16;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 128;
+		dev_priv->r600_sq_num_cf_insts = 2;
+		break;
+	case CHIP_RV630:
+	case CHIP_RV635:
+		dev_priv->r600_max_pipes = 2;
+		dev_priv->r600_max_tile_pipes = 2;
+		dev_priv->r600_max_simds = 3;
+		dev_priv->r600_max_backends = 1;
+		dev_priv->r600_max_gprs = 128;
+		dev_priv->r600_max_threads = 192;
+		dev_priv->r600_max_stack_entries = 128;
+		dev_priv->r600_max_hw_contexts = 8;
+		dev_priv->r600_max_gs_threads = 4;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 128;
+		dev_priv->r600_sq_num_cf_insts = 2;
+		break;
+	case CHIP_RV610:
+	case CHIP_RS780:
+	case CHIP_RV620:
+		dev_priv->r600_max_pipes = 1;
+		dev_priv->r600_max_tile_pipes = 1;
+		dev_priv->r600_max_simds = 2;
+		dev_priv->r600_max_backends = 1;
+		dev_priv->r600_max_gprs = 128;
+		dev_priv->r600_max_threads = 192;
+		dev_priv->r600_max_stack_entries = 128;
+		dev_priv->r600_max_hw_contexts = 4;
+		dev_priv->r600_max_gs_threads = 4;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 128;
+		dev_priv->r600_sq_num_cf_insts = 1;
+		break;
+	case CHIP_RV670:
+		dev_priv->r600_max_pipes = 4;
+		dev_priv->r600_max_tile_pipes = 4;
+		dev_priv->r600_max_simds = 4;
+		dev_priv->r600_max_backends = 4;
+		dev_priv->r600_max_gprs = 192;
+		dev_priv->r600_max_threads = 192;
+		dev_priv->r600_max_stack_entries = 256;
+		dev_priv->r600_max_hw_contexts = 8;
+		dev_priv->r600_max_gs_threads = 16;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 128;
+		dev_priv->r600_sq_num_cf_insts = 2;
+		break;
+	default:
+		break;
+	}
+
+	/* Initialize HDP */
+	j = 0;
+	for (i = 0; i < 32; i++) {
+		RADEON_WRITE((0x2c14 + j), 0x00000000);
+		RADEON_WRITE((0x2c18 + j), 0x00000000);
+		RADEON_WRITE((0x2c1c + j), 0x00000000);
+		RADEON_WRITE((0x2c20 + j), 0x00000000);
+		RADEON_WRITE((0x2c24 + j), 0x00000000);
+		j += 0x18;
+	}
+
+	RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff));
+
+	/* setup tiling, simd, pipe config */
+	ramcfg = RADEON_READ(R600_RAMCFG);
+
+	switch (dev_priv->r600_max_tile_pipes) {
+	case 1:
+		gb_tiling_config |= R600_PIPE_TILING(0);
+		break;
+	case 2:
+		gb_tiling_config |= R600_PIPE_TILING(1);
+		break;
+	case 4:
+		gb_tiling_config |= R600_PIPE_TILING(2);
+		break;
+	case 8:
+		gb_tiling_config |= R600_PIPE_TILING(3);
+		break;
+	default:
+		break;
+	}
+
+	gb_tiling_config |= R600_BANK_TILING((ramcfg >> R600_NOOFBANK_SHIFT) & R600_NOOFBANK_MASK);
+
+	gb_tiling_config |= R600_GROUP_SIZE(0);
+
+	if (((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK) > 3) {
+		gb_tiling_config |= R600_ROW_TILING(3);
+		gb_tiling_config |= R600_SAMPLE_SPLIT(3);
+	} else {
+		gb_tiling_config |=
+			R600_ROW_TILING(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK));
+		gb_tiling_config |=
+			R600_SAMPLE_SPLIT(((ramcfg >> R600_NOOFROWS_SHIFT) & R600_NOOFROWS_MASK));
+	}
+
+	gb_tiling_config |= R600_BANK_SWAPS(1);
+
+	backend_map = r600_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
+							dev_priv->r600_max_backends,
+							(0xff << dev_priv->r600_max_backends) & 0xff);
+	gb_tiling_config |= R600_BACKEND_MAP(backend_map);
+
+	cc_gc_shader_pipe_config =
+		R600_INACTIVE_QD_PIPES((R6XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R6XX_MAX_PIPES_MASK);
+	cc_gc_shader_pipe_config |=
+		R600_INACTIVE_SIMDS((R6XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R6XX_MAX_SIMDS_MASK);
+
+	cc_rb_backend_disable =
+		R600_BACKEND_DISABLE((R6XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R6XX_MAX_BACKENDS_MASK);
+
+	RADEON_WRITE(R600_GB_TILING_CONFIG,      gb_tiling_config);
+	RADEON_WRITE(R600_DCP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+	RADEON_WRITE(R600_HDP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+
+	RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);
+	RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);
+	RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
+
+	num_qd_pipes =
+		R6XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK);
+	RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK);
+	RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK);
+
+	/* set HW defaults for 3D engine */
+	RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) |
+						R600_ROQ_IB2_START(0x2b)));
+
+	RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, (R600_MEQ_END(0x40) |
+					      R600_ROQ_END(0x40)));
+
+	RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO |
+					R600_SYNC_GRADIENT |
+					R600_SYNC_WALKER |
+					R600_SYNC_ALIGNER));
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)
+		RADEON_WRITE(R600_ARB_GDEC_RD_CNTL, 0x00000021);
+
+	sx_debug_1 = RADEON_READ(R600_SX_DEBUG_1);
+	sx_debug_1 |= R600_SMX_EVENT_RELEASE;
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600))
+		sx_debug_1 |= R600_ENABLE_NEW_SMX_ADDRESS;
+	RADEON_WRITE(R600_SX_DEBUG_1, sx_debug_1);
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
+		RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE);
+	else
+		RADEON_WRITE(R600_DB_DEBUG, 0);
+
+	RADEON_WRITE(R600_DB_WATERMARKS, (R600_DEPTH_FREE(4) |
+					  R600_DEPTH_FLUSH(16) |
+					  R600_DEPTH_PENDING_FREE(4) |
+					  R600_DEPTH_CACHELINE_FREE(16)));
+	RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
+	RADEON_WRITE(R600_VGT_NUM_INSTANCES, 0);
+
+	RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0));
+	RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(0));
+
+	sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES);
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
+		sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) |
+				    R600_FETCH_FIFO_HIWATER(0xa) |
+				    R600_DONE_FIFO_HIWATER(0xe0) |
+				    R600_ALU_UPDATE_FIFO_HIWATER(0x8));
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
+		sq_ms_fifo_sizes &= ~R600_DONE_FIFO_HIWATER(0xff);
+		sq_ms_fifo_sizes |= R600_DONE_FIFO_HIWATER(0x4);
+	}
+	RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);
+
+	/* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
+	 * should be adjusted as needed by the 2D/3D drivers.  This just sets default values
+	 */
+	sq_config = RADEON_READ(R600_SQ_CONFIG);
+	sq_config &= ~(R600_PS_PRIO(3) |
+		       R600_VS_PRIO(3) |
+		       R600_GS_PRIO(3) |
+		       R600_ES_PRIO(3));
+	sq_config |= (R600_DX9_CONSTS |
+		      R600_VC_ENABLE |
+		      R600_PS_PRIO(0) |
+		      R600_VS_PRIO(1) |
+		      R600_GS_PRIO(2) |
+		      R600_ES_PRIO(3));
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600) {
+		sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(124) |
+					  R600_NUM_VS_GPRS(124) |
+					  R600_NUM_CLAUSE_TEMP_GPRS(4));
+		sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(0) |
+					  R600_NUM_ES_GPRS(0));
+		sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(136) |
+					   R600_NUM_VS_THREADS(48) |
+					   R600_NUM_GS_THREADS(4) |
+					   R600_NUM_ES_THREADS(4));
+		sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(128) |
+					    R600_NUM_VS_STACK_ENTRIES(128));
+		sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(0) |
+					    R600_NUM_ES_STACK_ENTRIES(0));
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
+		/* no vertex cache */
+		sq_config &= ~R600_VC_ENABLE;
+
+		sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
+					  R600_NUM_VS_GPRS(44) |
+					  R600_NUM_CLAUSE_TEMP_GPRS(2));
+		sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) |
+					  R600_NUM_ES_GPRS(17));
+		sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
+					   R600_NUM_VS_THREADS(78) |
+					   R600_NUM_GS_THREADS(4) |
+					   R600_NUM_ES_THREADS(31));
+		sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) |
+					    R600_NUM_VS_STACK_ENTRIES(40));
+		sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) |
+					    R600_NUM_ES_STACK_ENTRIES(16));
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
+		sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
+					  R600_NUM_VS_GPRS(44) |
+					  R600_NUM_CLAUSE_TEMP_GPRS(2));
+		sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(18) |
+					  R600_NUM_ES_GPRS(18));
+		sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
+					   R600_NUM_VS_THREADS(78) |
+					   R600_NUM_GS_THREADS(4) |
+					   R600_NUM_ES_THREADS(31));
+		sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(40) |
+					    R600_NUM_VS_STACK_ENTRIES(40));
+		sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(32) |
+					    R600_NUM_ES_STACK_ENTRIES(16));
+	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670) {
+		sq_gpr_resource_mgmt_1 = (R600_NUM_PS_GPRS(44) |
+					  R600_NUM_VS_GPRS(44) |
+					  R600_NUM_CLAUSE_TEMP_GPRS(2));
+		sq_gpr_resource_mgmt_2 = (R600_NUM_GS_GPRS(17) |
+					  R600_NUM_ES_GPRS(17));
+		sq_thread_resource_mgmt = (R600_NUM_PS_THREADS(79) |
+					   R600_NUM_VS_THREADS(78) |
+					   R600_NUM_GS_THREADS(4) |
+					   R600_NUM_ES_THREADS(31));
+		sq_stack_resource_mgmt_1 = (R600_NUM_PS_STACK_ENTRIES(64) |
+					    R600_NUM_VS_STACK_ENTRIES(64));
+		sq_stack_resource_mgmt_2 = (R600_NUM_GS_STACK_ENTRIES(64) |
+					    R600_NUM_ES_STACK_ENTRIES(64));
+	}
+
+	RADEON_WRITE(R600_SQ_CONFIG, sq_config);
+	RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1,  sq_gpr_resource_mgmt_1);
+	RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2,  sq_gpr_resource_mgmt_2);
+	RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
+	RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1);
+	RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2);
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
+		RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY));
+	else
+		RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC));
+
+	RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_2S, (R600_S0_X(0xc) |
+						    R600_S0_Y(0x4) |
+						    R600_S1_X(0x4) |
+						    R600_S1_Y(0xc)));
+	RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_4S, (R600_S0_X(0xe) |
+						    R600_S0_Y(0xe) |
+						    R600_S1_X(0x2) |
+						    R600_S1_Y(0x2) |
+						    R600_S2_X(0xa) |
+						    R600_S2_Y(0x6) |
+						    R600_S3_X(0x6) |
+						    R600_S3_Y(0xa)));
+	RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0, (R600_S0_X(0xe) |
+							R600_S0_Y(0xb) |
+							R600_S1_X(0x4) |
+							R600_S1_Y(0xc) |
+							R600_S2_X(0x1) |
+							R600_S2_Y(0x6) |
+							R600_S3_X(0xa) |
+							R600_S3_Y(0xe)));
+	RADEON_WRITE(R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1, (R600_S4_X(0x6) |
+							R600_S4_Y(0x1) |
+							R600_S5_X(0x0) |
+							R600_S5_Y(0x0) |
+							R600_S6_X(0xb) |
+							R600_S6_Y(0x4) |
+							R600_S7_X(0x7) |
+							R600_S7_Y(0x8)));
+
+
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_R600:
+	case CHIP_RV630:
+	case CHIP_RV635:
+		gs_prim_buffer_depth = 0;
+		break;
+	case CHIP_RV610:
+	case CHIP_RS780:
+	case CHIP_RV620:
+		gs_prim_buffer_depth = 32;
+		break;
+	case CHIP_RV670:
+		gs_prim_buffer_depth = 128;
+		break;
+	default:
+		break;
+	}
+
+	num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16;
+	vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread;
+	/* Max value for this is 256 */
+	if (vgt_gs_per_es > 256)
+		vgt_gs_per_es = 256;
+
+	RADEON_WRITE(R600_VGT_ES_PER_GS, 128);
+	RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es);
+	RADEON_WRITE(R600_VGT_GS_PER_VS, 2);
+	RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16);
+
+	/* more default values. 2D/3D driver should adjust as needed */
+	RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0);
+	RADEON_WRITE(R600_VGT_STRMOUT_EN, 0);
+	RADEON_WRITE(R600_SX_MISC, 0);
+	RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0);
+	RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0);
+	RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0);
+	RADEON_WRITE(R600_SPI_INPUT_Z, 0);
+	RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2));
+	RADEON_WRITE(R600_CB_COLOR7_FRAG, 0);
+
+	/* clear render buffer base addresses */
+	RADEON_WRITE(R600_CB_COLOR0_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR1_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR2_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR3_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR4_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR5_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR6_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR7_BASE, 0);
+
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_RV610:
+	case CHIP_RS780:
+	case CHIP_RV620:
+		tc_cntl = R600_TC_L2_SIZE(8);
+		break;
+	case CHIP_RV630:
+	case CHIP_RV635:
+		tc_cntl = R600_TC_L2_SIZE(4);
+		break;
+	case CHIP_R600:
+		tc_cntl = R600_TC_L2_SIZE(0) | R600_L2_DISABLE_LATE_HIT;
+		break;
+	default:
+		tc_cntl = R600_TC_L2_SIZE(0);
+		break;
+	}
+
+	RADEON_WRITE(R600_TC_CNTL, tc_cntl);
+
+	hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL);
+	RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
+
+	arb_pop = RADEON_READ(R600_ARB_POP);
+	arb_pop |= R600_ENABLE_TC128;
+	RADEON_WRITE(R600_ARB_POP, arb_pop);
+
+	RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
+	RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA |
+					  R600_NUM_CLIP_SEQ(3)));
+	RADEON_WRITE(R600_PA_SC_ENHANCE, R600_FORCE_EOV_MAX_CLK_CNT(4095));
+
+}
+
+static u32 r700_get_tile_pipe_to_backend_map(u32 num_tile_pipes,
+					     u32 num_backends,
+					     u32 backend_disable_mask)
+{
+	u32 backend_map = 0;
+	u32 enabled_backends_mask;
+	u32 enabled_backends_count;
+	u32 cur_pipe;
+	u32 swizzle_pipe[R7XX_MAX_PIPES];
+	u32 cur_backend;
+	u32 i;
+
+	if (num_tile_pipes > R7XX_MAX_PIPES)
+		num_tile_pipes = R7XX_MAX_PIPES;
+	if (num_tile_pipes < 1)
+		num_tile_pipes = 1;
+	if (num_backends > R7XX_MAX_BACKENDS)
+		num_backends = R7XX_MAX_BACKENDS;
+	if (num_backends < 1)
+		num_backends = 1;
+
+	enabled_backends_mask = 0;
+	enabled_backends_count = 0;
+	for (i = 0; i < R7XX_MAX_BACKENDS; ++i) {
+		if (((backend_disable_mask >> i) & 1) == 0) {
+			enabled_backends_mask |= (1 << i);
+			++enabled_backends_count;
+		}
+		if (enabled_backends_count == num_backends)
+			break;
+	}
+
+	if (enabled_backends_count == 0) {
+		enabled_backends_mask = 1;
+		enabled_backends_count = 1;
+	}
+
+	if (enabled_backends_count != num_backends)
+		num_backends = enabled_backends_count;
+
+	memset((uint8_t *)&swizzle_pipe[0], 0, sizeof(u32) * R7XX_MAX_PIPES);
+	switch (num_tile_pipes) {
+	case 1:
+		swizzle_pipe[0] = 0;
+		break;
+	case 2:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 1;
+		break;
+	case 3:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 1;
+		break;
+	case 4:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 3;
+		swizzle_pipe[3] = 1;
+		break;
+	case 5:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 1;
+		swizzle_pipe[4] = 3;
+		break;
+	case 6:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 5;
+		swizzle_pipe[4] = 3;
+		swizzle_pipe[5] = 1;
+		break;
+	case 7:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 6;
+		swizzle_pipe[4] = 3;
+		swizzle_pipe[5] = 1;
+		swizzle_pipe[6] = 5;
+		break;
+	case 8:
+		swizzle_pipe[0] = 0;
+		swizzle_pipe[1] = 2;
+		swizzle_pipe[2] = 4;
+		swizzle_pipe[3] = 6;
+		swizzle_pipe[4] = 3;
+		swizzle_pipe[5] = 1;
+		swizzle_pipe[6] = 7;
+		swizzle_pipe[7] = 5;
+		break;
+	}
+
+	cur_backend = 0;
+	for (cur_pipe = 0; cur_pipe < num_tile_pipes; ++cur_pipe) {
+		while (((1 << cur_backend) & enabled_backends_mask) == 0)
+			cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
+
+		backend_map |= (u32)(((cur_backend & 3) << (swizzle_pipe[cur_pipe] * 2)));
+
+		cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;
+	}
+
+	return backend_map;
+}
+
+static void r700_gfx_init(struct drm_device *dev,
+			  drm_radeon_private_t *dev_priv)
+{
+	int i, j, num_qd_pipes;
+	u32 sx_debug_1;
+	u32 smx_dc_ctl0;
+	u32 num_gs_verts_per_thread;
+	u32 vgt_gs_per_es;
+	u32 gs_prim_buffer_depth = 0;
+	u32 sq_ms_fifo_sizes;
+	u32 sq_config;
+	u32 sq_thread_resource_mgmt;
+	u32 hdp_host_path_cntl;
+	u32 sq_dyn_gpr_size_simd_ab_0;
+	u32 backend_map;
+	u32 gb_tiling_config = 0;
+	u32 cc_rb_backend_disable = 0;
+	u32 cc_gc_shader_pipe_config = 0;
+	u32 mc_arb_ramcfg;
+	u32 db_debug4;
+
+	/* setup chip specs */
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_RV770:
+		dev_priv->r600_max_pipes = 4;
+		dev_priv->r600_max_tile_pipes = 8;
+		dev_priv->r600_max_simds = 10;
+		dev_priv->r600_max_backends = 4;
+		dev_priv->r600_max_gprs = 256;
+		dev_priv->r600_max_threads = 248;
+		dev_priv->r600_max_stack_entries = 512;
+		dev_priv->r600_max_hw_contexts = 8;
+		dev_priv->r600_max_gs_threads = 16 * 2;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 112;
+		dev_priv->r600_sq_num_cf_insts = 2;
+
+		dev_priv->r700_sx_num_of_sets = 7;
+		dev_priv->r700_sc_prim_fifo_size = 0xF9;
+		dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
+		dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
+		break;
+	case CHIP_RV730:
+		dev_priv->r600_max_pipes = 2;
+		dev_priv->r600_max_tile_pipes = 4;
+		dev_priv->r600_max_simds = 8;
+		dev_priv->r600_max_backends = 2;
+		dev_priv->r600_max_gprs = 128;
+		dev_priv->r600_max_threads = 248;
+		dev_priv->r600_max_stack_entries = 256;
+		dev_priv->r600_max_hw_contexts = 8;
+		dev_priv->r600_max_gs_threads = 16 * 2;
+		dev_priv->r600_sx_max_export_size = 256;
+		dev_priv->r600_sx_max_export_pos_size = 32;
+		dev_priv->r600_sx_max_export_smx_size = 224;
+		dev_priv->r600_sq_num_cf_insts = 2;
+
+		dev_priv->r700_sx_num_of_sets = 7;
+		dev_priv->r700_sc_prim_fifo_size = 0xf9;
+		dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
+		dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
+		break;
+	case CHIP_RV710:
+		dev_priv->r600_max_pipes = 2;
+		dev_priv->r600_max_tile_pipes = 2;
+		dev_priv->r600_max_simds = 2;
+		dev_priv->r600_max_backends = 1;
+		dev_priv->r600_max_gprs = 256;
+		dev_priv->r600_max_threads = 192;
+		dev_priv->r600_max_stack_entries = 256;
+		dev_priv->r600_max_hw_contexts = 4;
+		dev_priv->r600_max_gs_threads = 8 * 2;
+		dev_priv->r600_sx_max_export_size = 128;
+		dev_priv->r600_sx_max_export_pos_size = 16;
+		dev_priv->r600_sx_max_export_smx_size = 112;
+		dev_priv->r600_sq_num_cf_insts = 1;
+
+		dev_priv->r700_sx_num_of_sets = 7;
+		dev_priv->r700_sc_prim_fifo_size = 0x40;
+		dev_priv->r700_sc_hiz_tile_fifo_size = 0x30;
+		dev_priv->r700_sc_earlyz_tile_fifo_fize = 0x130;
+		break;
+	default:
+		break;
+	}
+
+	/* Initialize HDP */
+	j = 0;
+	for (i = 0; i < 32; i++) {
+		RADEON_WRITE((0x2c14 + j), 0x00000000);
+		RADEON_WRITE((0x2c18 + j), 0x00000000);
+		RADEON_WRITE((0x2c1c + j), 0x00000000);
+		RADEON_WRITE((0x2c20 + j), 0x00000000);
+		RADEON_WRITE((0x2c24 + j), 0x00000000);
+		j += 0x18;
+	}
+
+	RADEON_WRITE(R600_GRBM_CNTL, R600_GRBM_READ_TIMEOUT(0xff));
+
+	/* setup tiling, simd, pipe config */
+	mc_arb_ramcfg = RADEON_READ(R700_MC_ARB_RAMCFG);
+
+	switch (dev_priv->r600_max_tile_pipes) {
+	case 1:
+		gb_tiling_config |= R600_PIPE_TILING(0);
+		break;
+	case 2:
+		gb_tiling_config |= R600_PIPE_TILING(1);
+		break;
+	case 4:
+		gb_tiling_config |= R600_PIPE_TILING(2);
+		break;
+	case 8:
+		gb_tiling_config |= R600_PIPE_TILING(3);
+		break;
+	default:
+		break;
+	}
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)
+		gb_tiling_config |= R600_BANK_TILING(1);
+	else
+		gb_tiling_config |= R600_BANK_TILING((mc_arb_ramcfg >> R700_NOOFBANK_SHIFT) & R700_NOOFBANK_MASK);
+
+	gb_tiling_config |= R600_GROUP_SIZE(0);
+
+	if (((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK) > 3) {
+		gb_tiling_config |= R600_ROW_TILING(3);
+		gb_tiling_config |= R600_SAMPLE_SPLIT(3);
+	} else {
+		gb_tiling_config |=
+			R600_ROW_TILING(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK));
+		gb_tiling_config |=
+			R600_SAMPLE_SPLIT(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK));
+	}
+
+	gb_tiling_config |= R600_BANK_SWAPS(1);
+
+	backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
+							dev_priv->r600_max_backends,
+							(0xff << dev_priv->r600_max_backends) & 0xff);
+	gb_tiling_config |= R600_BACKEND_MAP(backend_map);
+
+	cc_gc_shader_pipe_config =
+		R600_INACTIVE_QD_PIPES((R7XX_MAX_PIPES_MASK << dev_priv->r600_max_pipes) & R7XX_MAX_PIPES_MASK);
+	cc_gc_shader_pipe_config |=
+		R600_INACTIVE_SIMDS((R7XX_MAX_SIMDS_MASK << dev_priv->r600_max_simds) & R7XX_MAX_SIMDS_MASK);
+
+	cc_rb_backend_disable =
+		R600_BACKEND_DISABLE((R7XX_MAX_BACKENDS_MASK << dev_priv->r600_max_backends) & R7XX_MAX_BACKENDS_MASK);
+
+	RADEON_WRITE(R600_GB_TILING_CONFIG,      gb_tiling_config);
+	RADEON_WRITE(R600_DCP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+	RADEON_WRITE(R600_HDP_TILING_CONFIG,    (gb_tiling_config & 0xffff));
+
+	RADEON_WRITE(R600_CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);
+	RADEON_WRITE(R600_CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);
+	RADEON_WRITE(R600_GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);
+
+	RADEON_WRITE(R700_CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);
+	RADEON_WRITE(R700_CGTS_SYS_TCC_DISABLE, 0);
+	RADEON_WRITE(R700_CGTS_TCC_DISABLE, 0);
+	RADEON_WRITE(R700_CGTS_USER_SYS_TCC_DISABLE, 0);
+	RADEON_WRITE(R700_CGTS_USER_TCC_DISABLE, 0);
+
+	num_qd_pipes =
+		R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_gc_shader_pipe_config & R600_INACTIVE_QD_PIPES_MASK);
+	RADEON_WRITE(R600_VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & R600_DEALLOC_DIST_MASK);
+	RADEON_WRITE(R600_VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & R600_VTX_REUSE_DEPTH_MASK);
+
+	/* set HW defaults for 3D engine */
+	RADEON_WRITE(R600_CP_QUEUE_THRESHOLDS, (R600_ROQ_IB1_START(0x16) |
+						R600_ROQ_IB2_START(0x2b)));
+
+	RADEON_WRITE(R600_CP_MEQ_THRESHOLDS, R700_STQ_SPLIT(0x30));
+
+	RADEON_WRITE(R600_TA_CNTL_AUX, (R600_DISABLE_CUBE_ANISO |
+					R600_SYNC_GRADIENT |
+					R600_SYNC_WALKER |
+					R600_SYNC_ALIGNER));
+
+	sx_debug_1 = RADEON_READ(R700_SX_DEBUG_1);
+	sx_debug_1 |= R700_ENABLE_NEW_SMX_ADDRESS;
+	RADEON_WRITE(R700_SX_DEBUG_1, sx_debug_1);
+
+	smx_dc_ctl0 = RADEON_READ(R600_SMX_DC_CTL0);
+	smx_dc_ctl0 &= ~R700_CACHE_DEPTH(0x1ff);
+	smx_dc_ctl0 |= R700_CACHE_DEPTH((dev_priv->r700_sx_num_of_sets * 64) - 1);
+	RADEON_WRITE(R600_SMX_DC_CTL0, smx_dc_ctl0);
+
+	RADEON_WRITE(R700_SMX_EVENT_CTL, (R700_ES_FLUSH_CTL(4) |
+					  R700_GS_FLUSH_CTL(4) |
+					  R700_ACK_FLUSH_CTL(3) |
+					  R700_SYNC_FLUSH_CTL));
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)
+		RADEON_WRITE(R700_DB_DEBUG3, R700_DB_CLK_OFF_DELAY(0x1f));
+	else {
+		db_debug4 = RADEON_READ(RV700_DB_DEBUG4);
+		db_debug4 |= RV700_DISABLE_TILE_COVERED_FOR_PS_ITER;
+		RADEON_WRITE(RV700_DB_DEBUG4, db_debug4);
+	}
+
+	RADEON_WRITE(R600_SX_EXPORT_BUFFER_SIZES, (R600_COLOR_BUFFER_SIZE((dev_priv->r600_sx_max_export_size / 4) - 1) |
+						   R600_POSITION_BUFFER_SIZE((dev_priv->r600_sx_max_export_pos_size / 4) - 1) |
+						   R600_SMX_BUFFER_SIZE((dev_priv->r600_sx_max_export_smx_size / 4) - 1)));
+
+	RADEON_WRITE(R700_PA_SC_FIFO_SIZE_R7XX, (R700_SC_PRIM_FIFO_SIZE(dev_priv->r700_sc_prim_fifo_size) |
+						 R700_SC_HIZ_TILE_FIFO_SIZE(dev_priv->r700_sc_hiz_tile_fifo_size) |
+						 R700_SC_EARLYZ_TILE_FIFO_SIZE(dev_priv->r700_sc_earlyz_tile_fifo_fize)));
+
+	RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
+
+	RADEON_WRITE(R600_VGT_NUM_INSTANCES, 1);
+
+	RADEON_WRITE(R600_SPI_CONFIG_CNTL, R600_GPR_WRITE_PRIORITY(0));
+
+	RADEON_WRITE(R600_SPI_CONFIG_CNTL_1, R600_VTX_DONE_DELAY(4));
+
+	RADEON_WRITE(R600_CP_PERFMON_CNTL, 0);
+
+	sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(16 * dev_priv->r600_sq_num_cf_insts) |
+			    R600_DONE_FIFO_HIWATER(0xe0) |
+			    R600_ALU_UPDATE_FIFO_HIWATER(0x8));
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_RV770:
+		sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x1);
+		break;
+	case CHIP_RV730:
+	case CHIP_RV710:
+	default:
+		sq_ms_fifo_sizes |= R600_FETCH_FIFO_HIWATER(0x4);
+		break;
+	}
+	RADEON_WRITE(R600_SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);
+
+	/* SQ_CONFIG, SQ_GPR_RESOURCE_MGMT, SQ_THREAD_RESOURCE_MGMT, SQ_STACK_RESOURCE_MGMT
+	 * should be adjusted as needed by the 2D/3D drivers.  This just sets default values
+	 */
+	sq_config = RADEON_READ(R600_SQ_CONFIG);
+	sq_config &= ~(R600_PS_PRIO(3) |
+		       R600_VS_PRIO(3) |
+		       R600_GS_PRIO(3) |
+		       R600_ES_PRIO(3));
+	sq_config |= (R600_DX9_CONSTS |
+		      R600_VC_ENABLE |
+		      R600_EXPORT_SRC_C |
+		      R600_PS_PRIO(0) |
+		      R600_VS_PRIO(1) |
+		      R600_GS_PRIO(2) |
+		      R600_ES_PRIO(3));
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)
+		/* no vertex cache */
+		sq_config &= ~R600_VC_ENABLE;
+
+	RADEON_WRITE(R600_SQ_CONFIG, sq_config);
+
+	RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_1,  (R600_NUM_PS_GPRS((dev_priv->r600_max_gprs * 24)/64) |
+						    R600_NUM_VS_GPRS((dev_priv->r600_max_gprs * 24)/64) |
+						    R600_NUM_CLAUSE_TEMP_GPRS(((dev_priv->r600_max_gprs * 24)/64)/2)));
+
+	RADEON_WRITE(R600_SQ_GPR_RESOURCE_MGMT_2,  (R600_NUM_GS_GPRS((dev_priv->r600_max_gprs * 7)/64) |
+						    R600_NUM_ES_GPRS((dev_priv->r600_max_gprs * 7)/64)));
+
+	sq_thread_resource_mgmt = (R600_NUM_PS_THREADS((dev_priv->r600_max_threads * 4)/8) |
+				   R600_NUM_VS_THREADS((dev_priv->r600_max_threads * 2)/8) |
+				   R600_NUM_ES_THREADS((dev_priv->r600_max_threads * 1)/8));
+	if (((dev_priv->r600_max_threads * 1) / 8) > dev_priv->r600_max_gs_threads)
+		sq_thread_resource_mgmt |= R600_NUM_GS_THREADS(dev_priv->r600_max_gs_threads);
+	else
+		sq_thread_resource_mgmt |= R600_NUM_GS_THREADS((dev_priv->r600_max_gs_threads * 1)/8);
+	RADEON_WRITE(R600_SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);
+
+	RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_1, (R600_NUM_PS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) |
+						     R600_NUM_VS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4)));
+
+	RADEON_WRITE(R600_SQ_STACK_RESOURCE_MGMT_2, (R600_NUM_GS_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4) |
+						     R600_NUM_ES_STACK_ENTRIES((dev_priv->r600_max_stack_entries * 1)/4)));
+
+	sq_dyn_gpr_size_simd_ab_0 = (R700_SIMDA_RING0((dev_priv->r600_max_gprs * 38)/64) |
+				     R700_SIMDA_RING1((dev_priv->r600_max_gprs * 38)/64) |
+				     R700_SIMDB_RING0((dev_priv->r600_max_gprs * 38)/64) |
+				     R700_SIMDB_RING1((dev_priv->r600_max_gprs * 38)/64));
+
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0);
+	RADEON_WRITE(R700_SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);
+
+	RADEON_WRITE(R700_PA_SC_FORCE_EOV_MAX_CNTS, (R700_FORCE_EOV_MAX_CLK_CNT(4095) |
+						     R700_FORCE_EOV_MAX_REZ_CNT(255)));
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)
+		RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_TC_ONLY) |
+							   R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO)));
+	else
+		RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, (R600_CACHE_INVALIDATION(R600_VC_AND_TC) |
+							   R700_AUTO_INVLD_EN(R700_ES_AND_GS_AUTO)));
+
+	switch (dev_priv->flags & RADEON_FAMILY_MASK) {
+	case CHIP_RV770:
+	case CHIP_RV730:
+		gs_prim_buffer_depth = 384;
+		break;
+	case CHIP_RV710:
+		gs_prim_buffer_depth = 128;
+		break;
+	default:
+		break;
+	}
+
+	num_gs_verts_per_thread = dev_priv->r600_max_pipes * 16;
+	vgt_gs_per_es = gs_prim_buffer_depth + num_gs_verts_per_thread;
+	/* Max value for this is 256 */
+	if (vgt_gs_per_es > 256)
+		vgt_gs_per_es = 256;
+
+	RADEON_WRITE(R600_VGT_ES_PER_GS, 128);
+	RADEON_WRITE(R600_VGT_GS_PER_ES, vgt_gs_per_es);
+	RADEON_WRITE(R600_VGT_GS_PER_VS, 2);
+
+	/* more default values. 2D/3D driver should adjust as needed */
+	RADEON_WRITE(R600_VGT_GS_VERTEX_REUSE, 16);
+	RADEON_WRITE(R600_PA_SC_LINE_STIPPLE_STATE, 0);
+	RADEON_WRITE(R600_VGT_STRMOUT_EN, 0);
+	RADEON_WRITE(R600_SX_MISC, 0);
+	RADEON_WRITE(R600_PA_SC_MODE_CNTL, 0);
+	RADEON_WRITE(R700_PA_SC_EDGERULE, 0xaaaaaaaa);
+	RADEON_WRITE(R600_PA_SC_AA_CONFIG, 0);
+	RADEON_WRITE(R600_PA_SC_CLIPRECT_RULE, 0xffff);
+	RADEON_WRITE(R600_PA_SC_LINE_STIPPLE, 0);
+	RADEON_WRITE(R600_SPI_INPUT_Z, 0);
+	RADEON_WRITE(R600_SPI_PS_IN_CONTROL_0, R600_NUM_INTERP(2));
+	RADEON_WRITE(R600_CB_COLOR7_FRAG, 0);
+
+	/* clear render buffer base addresses */
+	RADEON_WRITE(R600_CB_COLOR0_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR1_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR2_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR3_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR4_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR5_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR6_BASE, 0);
+	RADEON_WRITE(R600_CB_COLOR7_BASE, 0);
+
+	RADEON_WRITE(R700_TCP_CNTL, 0);
+
+	hdp_host_path_cntl = RADEON_READ(R600_HDP_HOST_PATH_CNTL);
+	RADEON_WRITE(R600_HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
+
+	RADEON_WRITE(R600_PA_SC_MULTI_CHIP_CNTL, 0);
+
+	RADEON_WRITE(R600_PA_CL_ENHANCE, (R600_CLIP_VTX_REORDER_ENA |
+					  R600_NUM_CLIP_SEQ(3)));
+
+}
+
+static void r600_cp_init_ring_buffer(struct drm_device *dev,
+				       drm_radeon_private_t *dev_priv,
+				       struct drm_file *file_priv)
+{
+	struct drm_radeon_master_private *master_priv;
+	u32 ring_start;
+	u64 rptr_addr;
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
+		r700_gfx_init(dev, dev_priv);
+	else
+		r600_gfx_init(dev, dev_priv);
+
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
+	RADEON_READ(R600_GRBM_SOFT_RESET);
+	DRM_UDELAY(15000);
+	RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+
+
+	/* Set ring buffer size */
+#ifdef __BIG_ENDIAN
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     RADEON_BUF_SWAP_32BIT |
+		     RADEON_RB_NO_UPDATE |
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#else
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     RADEON_RB_NO_UPDATE |
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#endif
+
+	RADEON_WRITE(R600_CP_SEM_WAIT_TIMER, 0x4);
+
+	/* Set the write pointer delay */
+	RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0);
+
+#ifdef __BIG_ENDIAN
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     RADEON_BUF_SWAP_32BIT |
+		     RADEON_RB_NO_UPDATE |
+		     RADEON_RB_RPTR_WR_ENA |
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#else
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     RADEON_RB_NO_UPDATE |
+		     RADEON_RB_RPTR_WR_ENA |
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#endif
+
+	/* Initialize the ring buffer's read and write pointers */
+	RADEON_WRITE(R600_CP_RB_RPTR_WR, 0);
+	RADEON_WRITE(R600_CP_RB_WPTR, 0);
+	SET_RING_HEAD(dev_priv, 0);
+	dev_priv->ring.tail = 0;
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		rptr_addr = dev_priv->ring_rptr->offset
+			- dev->agp->base +
+			dev_priv->gart_vm_start;
+	} else
+#endif
+	{
+		rptr_addr = dev_priv->ring_rptr->offset
+			- ((unsigned long) dev->sg->virtual)
+			+ dev_priv->gart_vm_start;
+	}
+	RADEON_WRITE(R600_CP_RB_RPTR_ADDR,
+		     rptr_addr & 0xffffffff);
+	RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI,
+		     upper_32_bits(rptr_addr));
+
+#ifdef __BIG_ENDIAN
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     RADEON_BUF_SWAP_32BIT |
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#else
+	RADEON_WRITE(R600_CP_RB_CNTL,
+		     (dev_priv->ring.rptr_update_l2qw << 8) |
+		     dev_priv->ring.size_l2qw);
+#endif
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		/* XXX */
+		radeon_write_agp_base(dev_priv, dev->agp->base);
+
+		/* XXX */
+		radeon_write_agp_location(dev_priv,
+			     (((dev_priv->gart_vm_start - 1 +
+				dev_priv->gart_size) & 0xffff0000) |
+			      (dev_priv->gart_vm_start >> 16)));
+
+		ring_start = (dev_priv->cp_ring->offset
+			      - dev->agp->base
+			      + dev_priv->gart_vm_start);
+	} else
+#endif
+		ring_start = (dev_priv->cp_ring->offset
+			      - (unsigned long)dev->sg->virtual
+			      + dev_priv->gart_vm_start);
+
+	RADEON_WRITE(R600_CP_RB_BASE, ring_start >> 8);
+
+	RADEON_WRITE(R600_CP_ME_CNTL, 0xff);
+
+	RADEON_WRITE(R600_CP_DEBUG, (1 << 27) | (1 << 28));
+
+	/* Initialize the scratch register pointer.  This will cause
+	 * the scratch register values to be written out to memory
+	 * whenever they are updated.
+	 *
+	 * We simply put this behind the ring read pointer, this works
+	 * with PCI GART as well as (whatever kind of) AGP GART
+	 */
+	{
+		u64 scratch_addr;
+
+		scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR);
+		scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32;
+		scratch_addr += R600_SCRATCH_REG_OFFSET;
+		scratch_addr >>= 8;
+		scratch_addr &= 0xffffffff;
+
+		RADEON_WRITE(R600_SCRATCH_ADDR, (uint32_t)scratch_addr);
+	}
+
+	RADEON_WRITE(R600_SCRATCH_UMSK, 0x7);
+
+	/* Turn on bus mastering */
+	radeon_enable_bm(dev_priv);
+
+	radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(0), 0);
+	RADEON_WRITE(R600_LAST_FRAME_REG, 0);
+
+	radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(1), 0);
+	RADEON_WRITE(R600_LAST_DISPATCH_REG, 0);
+
+	radeon_write_ring_rptr(dev_priv, R600_SCRATCHOFF(2), 0);
+	RADEON_WRITE(R600_LAST_CLEAR_REG, 0);
+
+	/* reset sarea copies of these */
+	master_priv = file_priv->master->driver_priv;
+	if (master_priv->sarea_priv) {
+		master_priv->sarea_priv->last_frame = 0;
+		master_priv->sarea_priv->last_dispatch = 0;
+		master_priv->sarea_priv->last_clear = 0;
+	}
+
+	r600_do_wait_for_idle(dev_priv);
+
+}
+
+int r600_do_cleanup_cp(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG("\n");
+
+	/* Make sure interrupts are disabled here because the uninstall ioctl
+	 * may not have been called from userspace and after dev_private
+	 * is freed, it's too late.
+	 */
+	if (dev->irq_enabled)
+		drm_irq_uninstall(dev);
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		if (dev_priv->cp_ring != NULL) {
+			drm_core_ioremapfree(dev_priv->cp_ring, dev);
+			dev_priv->cp_ring = NULL;
+		}
+		if (dev_priv->ring_rptr != NULL) {
+			drm_core_ioremapfree(dev_priv->ring_rptr, dev);
+			dev_priv->ring_rptr = NULL;
+		}
+		if (dev->agp_buffer_map != NULL) {
+			drm_core_ioremapfree(dev->agp_buffer_map, dev);
+			dev->agp_buffer_map = NULL;
+		}
+	} else
+#endif
+	{
+
+		if (dev_priv->gart_info.bus_addr)
+			r600_page_table_cleanup(dev, &dev_priv->gart_info);
+
+		if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) {
+			drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
+			dev_priv->gart_info.addr = NULL;
+		}
+	}
+	/* only clear to the start of flags */
+	memset(dev_priv, 0, offsetof(drm_radeon_private_t, flags));
+
+	return 0;
+}
+
+int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
+		    struct drm_file *file_priv)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv;
+
+	DRM_DEBUG("\n");
+
+	/* if we require new memory map but we don't have it fail */
+	if ((dev_priv->flags & RADEON_NEW_MEMMAP) && !dev_priv->new_memmap) {
+		DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+
+	if (init->is_pci && (dev_priv->flags & RADEON_IS_AGP)) {
+		DRM_DEBUG("Forcing AGP card to PCI mode\n");
+		dev_priv->flags &= ~RADEON_IS_AGP;
+		/* The writeback test succeeds, but when writeback is enabled,
+		 * the ring buffer read ptr update fails after first 128 bytes.
+		 */
+		radeon_no_wb = 1;
+	} else if (!(dev_priv->flags & (RADEON_IS_AGP | RADEON_IS_PCI | RADEON_IS_PCIE))
+		 && !init->is_pci) {
+		DRM_DEBUG("Restoring AGP flag\n");
+		dev_priv->flags |= RADEON_IS_AGP;
+	}
+
+	dev_priv->usec_timeout = init->usec_timeout;
+	if (dev_priv->usec_timeout < 1 ||
+	    dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT) {
+		DRM_DEBUG("TIMEOUT problem!\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+
+	/* Enable vblank on CRTC1 for older X servers
+	 */
+	dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1;
+
+	dev_priv->cp_mode = init->cp_mode;
+
+	/* We don't support anything other than bus-mastering ring mode,
+	 * but the ring can be in either AGP or PCI space for the ring
+	 * read pointer.
+	 */
+	if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) &&
+	    (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) {
+		DRM_DEBUG("BAD cp_mode (%x)!\n", init->cp_mode);
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+
+	switch (init->fb_bpp) {
+	case 16:
+		dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565;
+		break;
+	case 32:
+	default:
+		dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
+		break;
+	}
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
+
+	dev_priv->ring_offset = init->ring_offset;
+	dev_priv->ring_rptr_offset = init->ring_rptr_offset;
+	dev_priv->buffers_offset = init->buffers_offset;
+	dev_priv->gart_textures_offset = init->gart_textures_offset;
+
+	master_priv->sarea = drm_getsarea(dev);
+	if (!master_priv->sarea) {
+		DRM_ERROR("could not find sarea!\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+
+	dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset);
+	if (!dev_priv->cp_ring) {
+		DRM_ERROR("could not find cp ring region!\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+	dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
+	if (!dev_priv->ring_rptr) {
+		DRM_ERROR("could not find ring read pointer!\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+	dev->agp_buffer_token = init->buffers_offset;
+	dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
+	if (!dev->agp_buffer_map) {
+		DRM_ERROR("could not find dma buffer region!\n");
+		r600_do_cleanup_cp(dev);
+		return -EINVAL;
+	}
+
+	if (init->gart_textures_offset) {
+		dev_priv->gart_textures =
+		    drm_core_findmap(dev, init->gart_textures_offset);
+		if (!dev_priv->gart_textures) {
+			DRM_ERROR("could not find GART texture region!\n");
+			r600_do_cleanup_cp(dev);
+			return -EINVAL;
+		}
+	}
+
+#if __OS_HAS_AGP
+	/* XXX */
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		drm_core_ioremap_wc(dev_priv->cp_ring, dev);
+		drm_core_ioremap_wc(dev_priv->ring_rptr, dev);
+		drm_core_ioremap_wc(dev->agp_buffer_map, dev);
+		if (!dev_priv->cp_ring->handle ||
+		    !dev_priv->ring_rptr->handle ||
+		    !dev->agp_buffer_map->handle) {
+			DRM_ERROR("could not find ioremap agp regions!\n");
+			r600_do_cleanup_cp(dev);
+			return -EINVAL;
+		}
+	} else
+#endif
+	{
+		dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
+		dev_priv->ring_rptr->handle =
+		    (void *)dev_priv->ring_rptr->offset;
+		dev->agp_buffer_map->handle =
+		    (void *)dev->agp_buffer_map->offset;
+
+		DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
+			  dev_priv->cp_ring->handle);
+		DRM_DEBUG("dev_priv->ring_rptr->handle %p\n",
+			  dev_priv->ring_rptr->handle);
+		DRM_DEBUG("dev->agp_buffer_map->handle %p\n",
+			  dev->agp_buffer_map->handle);
+	}
+
+	dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 24;
+	dev_priv->fb_size =
+		(((radeon_read_fb_location(dev_priv) & 0xffff0000u) << 8) + 0x1000000)
+		- dev_priv->fb_location;
+
+	dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
+					((dev_priv->front_offset
+					  + dev_priv->fb_location) >> 10));
+
+	dev_priv->back_pitch_offset = (((dev_priv->back_pitch / 64) << 22) |
+				       ((dev_priv->back_offset
+					 + dev_priv->fb_location) >> 10));
+
+	dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch / 64) << 22) |
+					((dev_priv->depth_offset
+					  + dev_priv->fb_location) >> 10));
+
+	dev_priv->gart_size = init->gart_size;
+
+	/* New let's set the memory map ... */
+	if (dev_priv->new_memmap) {
+		u32 base = 0;
+
+		DRM_INFO("Setting GART location based on new memory map\n");
+
+		/* If using AGP, try to locate the AGP aperture at the same
+		 * location in the card and on the bus, though we have to
+		 * align it down.
+		 */
+#if __OS_HAS_AGP
+		/* XXX */
+		if (dev_priv->flags & RADEON_IS_AGP) {
+			base = dev->agp->base;
+			/* Check if valid */
+			if ((base + dev_priv->gart_size - 1) >= dev_priv->fb_location &&
+			    base < (dev_priv->fb_location + dev_priv->fb_size - 1)) {
+				DRM_INFO("Can't use AGP base @0x%08lx, won't fit\n",
+					 dev->agp->base);
+				base = 0;
+			}
+		}
+#endif
+		/* If not or if AGP is at 0 (Macs), try to put it elsewhere */
+		if (base == 0) {
+			base = dev_priv->fb_location + dev_priv->fb_size;
+			if (base < dev_priv->fb_location ||
+			    ((base + dev_priv->gart_size) & 0xfffffffful) < base)
+				base = dev_priv->fb_location
+					- dev_priv->gart_size;
+		}
+		dev_priv->gart_vm_start = base & 0xffc00000u;
+		if (dev_priv->gart_vm_start != base)
+			DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n",
+				 base, dev_priv->gart_vm_start);
+	}
+
+#if __OS_HAS_AGP
+	/* XXX */
+	if (dev_priv->flags & RADEON_IS_AGP)
+		dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
+						 - dev->agp->base
+						 + dev_priv->gart_vm_start);
+	else
+#endif
+		dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
+						 - (unsigned long)dev->sg->virtual
+						 + dev_priv->gart_vm_start);
+
+	DRM_DEBUG("fb 0x%08x size %d\n",
+		  (unsigned int) dev_priv->fb_location,
+		  (unsigned int) dev_priv->fb_size);
+	DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size);
+	DRM_DEBUG("dev_priv->gart_vm_start 0x%08x\n",
+		  (unsigned int) dev_priv->gart_vm_start);
+	DRM_DEBUG("dev_priv->gart_buffers_offset 0x%08lx\n",
+		  dev_priv->gart_buffers_offset);
+
+	dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;
+	dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle
+			      + init->ring_size / sizeof(u32));
+	dev_priv->ring.size = init->ring_size;
+	dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
+
+	dev_priv->ring.rptr_update = /* init->rptr_update */ 4096;
+	dev_priv->ring.rptr_update_l2qw = drm_order(/* init->rptr_update */ 4096 / 8);
+
+	dev_priv->ring.fetch_size = /* init->fetch_size */ 32;
+	dev_priv->ring.fetch_size_l2ow = drm_order(/* init->fetch_size */ 32 / 16);
+
+	dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
+
+	dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		/* XXX turn off pcie gart */
+	} else
+#endif
+	{
+		dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
+		/* if we have an offset set from userspace */
+		if (!dev_priv->pcigart_offset_set) {
+			DRM_ERROR("Need gart offset from userspace\n");
+			r600_do_cleanup_cp(dev);
+			return -EINVAL;
+		}
+
+		DRM_DEBUG("Using gart offset 0x%08lx\n", dev_priv->pcigart_offset);
+
+		dev_priv->gart_info.bus_addr =
+			dev_priv->pcigart_offset + dev_priv->fb_location;
+		dev_priv->gart_info.mapping.offset =
+			dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
+		dev_priv->gart_info.mapping.size =
+			dev_priv->gart_info.table_size;
+
+		drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
+		if (!dev_priv->gart_info.mapping.handle) {
+			DRM_ERROR("ioremap failed.\n");
+			r600_do_cleanup_cp(dev);
+			return -EINVAL;
+		}
+
+		dev_priv->gart_info.addr =
+			dev_priv->gart_info.mapping.handle;
+
+		DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n",
+			  dev_priv->gart_info.addr,
+			  dev_priv->pcigart_offset);
+
+		if (!r600_page_table_init(dev)) {
+			DRM_ERROR("Failed to init GART table\n");
+			r600_do_cleanup_cp(dev);
+			return -EINVAL;
+		}
+
+		if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
+			r700_vm_init(dev);
+		else
+			r600_vm_init(dev);
+	}
+
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
+		r700_cp_load_microcode(dev_priv);
+	else
+		r600_cp_load_microcode(dev_priv);
+
+	r600_cp_init_ring_buffer(dev, dev_priv, file_priv);
+
+	dev_priv->last_buf = 0;
+
+	r600_do_engine_reset(dev);
+	r600_test_writeback(dev_priv);
+
+	return 0;
+}
+
+int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("\n");
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)) {
+		r700_vm_init(dev);
+		r700_cp_load_microcode(dev_priv);
+	} else {
+		r600_vm_init(dev);
+		r600_cp_load_microcode(dev_priv);
+	}
+	r600_cp_init_ring_buffer(dev, dev_priv, file_priv);
+	r600_do_engine_reset(dev);
+
+	return 0;
+}
+
+/* Wait for the CP to go idle.
+ */
+int r600_do_cp_idle(drm_radeon_private_t *dev_priv)
+{
+	RING_LOCALS;
+	DRM_DEBUG("\n");
+
+	BEGIN_RING(5);
+	OUT_RING(CP_PACKET3(R600_IT_EVENT_WRITE, 0));
+	OUT_RING(R600_CACHE_FLUSH_AND_INV_EVENT);
+	/* wait for 3D idle clean */
+	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));
+	OUT_RING((R600_WAIT_UNTIL - R600_SET_CONFIG_REG_OFFSET) >> 2);
+	OUT_RING(RADEON_WAIT_3D_IDLE | RADEON_WAIT_3D_IDLECLEAN);
+
+	ADVANCE_RING();
+	COMMIT_RING();
+
+	return r600_do_wait_for_idle(dev_priv);
+}
+
+/* Start the Command Processor.
+ */
+void r600_do_cp_start(drm_radeon_private_t *dev_priv)
+{
+	u32 cp_me;
+	RING_LOCALS;
+	DRM_DEBUG("\n");
+
+	BEGIN_RING(7);
+	OUT_RING(CP_PACKET3(R600_IT_ME_INITIALIZE, 5));
+	OUT_RING(0x00000001);
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770))
+		OUT_RING(0x00000003);
+	else
+		OUT_RING(0x00000000);
+	OUT_RING((dev_priv->r600_max_hw_contexts - 1));
+	OUT_RING(R600_ME_INITIALIZE_DEVICE_ID(1));
+	OUT_RING(0x00000000);
+	OUT_RING(0x00000000);
+	ADVANCE_RING();
+	COMMIT_RING();
+
+	/* set the mux and reset the halt bit */
+	cp_me = 0xff;
+	RADEON_WRITE(R600_CP_ME_CNTL, cp_me);
+
+	dev_priv->cp_running = 1;
+
+}
+
+void r600_do_cp_reset(drm_radeon_private_t *dev_priv)
+{
+	u32 cur_read_ptr;
+	DRM_DEBUG("\n");
+
+	cur_read_ptr = RADEON_READ(R600_CP_RB_RPTR);
+	RADEON_WRITE(R600_CP_RB_WPTR, cur_read_ptr);
+	SET_RING_HEAD(dev_priv, cur_read_ptr);
+	dev_priv->ring.tail = cur_read_ptr;
+}
+
+void r600_do_cp_stop(drm_radeon_private_t *dev_priv)
+{
+	uint32_t cp_me;
+
+	DRM_DEBUG("\n");
+
+	cp_me = 0xff | R600_CP_ME_HALT;
+
+	RADEON_WRITE(R600_CP_ME_CNTL, cp_me);
+
+	dev_priv->cp_running = 0;
+}
+
+int r600_cp_dispatch_indirect(struct drm_device *dev,
+			      struct drm_buf *buf, int start, int end)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	if (start != end) {
+		unsigned long offset = (dev_priv->gart_buffers_offset
+					+ buf->offset + start);
+		int dwords = (end - start + 3) / sizeof(u32);
+
+		DRM_DEBUG("dwords:%d\n", dwords);
+		DRM_DEBUG("offset 0x%lx\n", offset);
+
+
+		/* Indirect buffer data must be a multiple of 16 dwords.
+		 * pad the data with a Type-2 CP packet.
+		 */
+		while (dwords & 0xf) {
+			u32 *data = (u32 *)
+			    ((char *)dev->agp_buffer_map->handle
+			     + buf->offset + start);
+			data[dwords++] = RADEON_CP_PACKET2;
+		}
+
+		/* Fire off the indirect buffer */
+		BEGIN_RING(4);
+		OUT_RING(CP_PACKET3(R600_IT_INDIRECT_BUFFER, 2));
+		OUT_RING((offset & 0xfffffffc));
+		OUT_RING((upper_32_bits(offset) & 0xff));
+		OUT_RING(dwords);
+		ADVANCE_RING();
+	}
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/radeon/r600_microcode.h b/drivers/gpu/drm/radeon/r600_microcode.h
new file mode 100644
index 000000000000..778c8b4b2fd9
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_microcode.h
@@ -0,0 +1,23297 @@
+/*
+ * Copyright 2008-2009 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef R600_MICROCODE_H
+#define R600_MICROCODE_H
+
+static const int ME_JUMP_TABLE_START = 1764;
+static const int ME_JUMP_TABLE_END   = 1792;
+
+#define PFP_UCODE_SIZE 576
+#define PM4_UCODE_SIZE 1792
+#define R700_PFP_UCODE_SIZE 848
+#define R700_PM4_UCODE_SIZE 1360
+
+static const u32 R600_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x614 },
+    { 0x00000000, 0x00600000, 0x5b2 },
+    { 0x00000000, 0x00600000, 0x5c5 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000020, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000021, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x0000001d, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x0000001d, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000030, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x00000010, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000030, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000032, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x0000002d, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x080 },
+    { 0x0000002e, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x081 },
+    { 0x00000000, 0x00400000, 0x087 },
+    { 0x0000002d, 0x00203623, 0x000 },
+    { 0x0000002e, 0x00203624, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x087 },
+    { 0x00000000, 0x00600000, 0x5ed },
+    { 0x00000000, 0x00600000, 0x5e1 },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08a },
+    { 0x00000018, 0xc0403620, 0x090 },
+    { 0x00000000, 0x2ee00000, 0x08e },
+    { 0x00000000, 0x2ce00000, 0x08d },
+    { 0x00000002, 0x00400e2d, 0x08f },
+    { 0x00000003, 0x00400e2d, 0x08f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000018, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x095 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x09d },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09b },
+    { 0x00000000, 0x2ce00000, 0x09a },
+    { 0x00000002, 0x00400e2d, 0x09c },
+    { 0x00000003, 0x00400e2d, 0x09c },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a4 },
+    { 0x0000001c, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x0000001b, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0db },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x28c },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x128 },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0c5 },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0d6 },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0d4 },
+    { 0x00000013, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0cf },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ce },
+    { 0x00003f00, 0x00400c11, 0x0d0 },
+    { 0x00001f00, 0x00400c11, 0x0d0 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0d6 },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00284a22, 0x000 },
+    { 0x00000030, 0x00200e2d, 0x000 },
+    { 0x0000002e, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e3 },
+    { 0x00000000, 0x00600000, 0x5e7 },
+    { 0x00000000, 0x00400000, 0x0e4 },
+    { 0x00000000, 0x00600000, 0x5ea },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x0000001d, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f1 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f1 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x0000001a, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f6 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x104 },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000013, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0fd },
+    { 0xffffffff, 0x00404811, 0x104 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x100 },
+    { 0x0000ffff, 0x00404811, 0x104 },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x103 },
+    { 0x000000ff, 0x00404811, 0x104 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000019, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x10d },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000019, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x114 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x110 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x127 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x614 },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x613 },
+    { 0x00000004, 0x00404c11, 0x12e },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x00000000, 0x00600000, 0x151 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2a4 },
+    { 0x0001a1fd, 0x00604411, 0x2c9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x138 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x151 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2a4 },
+    { 0x0001a1fd, 0x00604411, 0x2c9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x149 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x17c },
+    { 0x00000000, 0x00600000, 0x18d },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x189 },
+    { 0x00000000, 0x00600000, 0x2a4 },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x28c },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x173 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x16f },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x184 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000013, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2e4 },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x165 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x2fe },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x181 },
+    { 0x0000001b, 0xc0203620, 0x000 },
+    { 0x0000001c, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x19f },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x188 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000032, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x00000011, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x128 },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00600e2d, 0x1aa },
+    { 0x0000001c, 0x00600e2d, 0x1aa },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x0000001d, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1a6 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000020, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000019, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1cd },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1c9 },
+    { 0x00000000, 0x00600000, 0x1d6 },
+    { 0x00000001, 0x00531e27, 0x1c5 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1be },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1d6 },
+    { 0x00000001, 0x00531e27, 0x1d2 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2a4 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e5 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x1f2 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x1f2 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x613 },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2a4 },
+    { 0x0001a1fd, 0x00604411, 0x2c9 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x206 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x1ff },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x5c5 },
+    { 0x00000000, 0x0040040f, 0x200 },
+    { 0x00000000, 0x00600000, 0x5b2 },
+    { 0x00000000, 0x00600000, 0x5c5 },
+    { 0x00000210, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00600000, 0x18d },
+    { 0x00000000, 0x00600000, 0x189 },
+    { 0x00000000, 0x00600000, 0x2a4 },
+    { 0x00000000, 0x00600000, 0x28c },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x21f },
+    { 0x00000000, 0xc0404800, 0x21c },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2e4 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x5b2 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x235 },
+    { 0x0000001a, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x0000001a, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x23a },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x2fe },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x265 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x253 },
+    { 0x00000018, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x248 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x24b },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000018, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x250 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x253 },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2aa },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25b },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25a },
+    { 0x00000016, 0x00404811, 0x25f },
+    { 0x00000018, 0x00404811, 0x25f },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25e },
+    { 0x00000017, 0x00404811, 0x25f },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2d2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x23f },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x614 },
+    { 0x00000000, 0x00600000, 0x5b2 },
+    { 0x00000000, 0xc0600000, 0x28c },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x00000034, 0x00201a2d, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x00000033, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x27b },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000034, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x128 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x286 },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x0000000c, 0xc0220a20, 0x000 },
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+    { 0x00000031, 0xc0403620, 0x000 },
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+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000029, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000029, 0x00203627, 0x000 },
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+    { 0x00000000, 0x002c1ce4, 0x000 },
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+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x0000002b, 0x00203627, 0x000 },
+    { 0x0000002c, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x0000002c, 0x00803627, 0x000 },
+    { 0x00000029, 0x00203623, 0x000 },
+    { 0x0000002a, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x0000002b, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x0000002c, 0x00803627, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00203628, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2c5 },
+    { 0x00000000, 0x00400000, 0x2c2 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00203628, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2c2 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2c5 },
+    { 0x0000002b, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2c5 },
+    { 0x00000029, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2c5 },
+    { 0x0000002c, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2c5 },
+    { 0x0000002a, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2c5 },
+    { 0x00000000, 0x00600000, 0x5ed },
+    { 0x00000000, 0x00600000, 0x29e },
+    { 0x00000000, 0x00400000, 0x2c7 },
+    { 0x00000000, 0x00600000, 0x29e },
+    { 0x00000000, 0x00600000, 0x5e4 },
+    { 0x00000000, 0x00400000, 0x2c7 },
+    { 0x00000000, 0x00600000, 0x290 },
+    { 0x00000000, 0x00400000, 0x2c7 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000023, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x0000001d, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x301 },
+    { 0xffffffef, 0x00280621, 0x000 },
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+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x5c5 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x334 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000017, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x614 },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x33d },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x351 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000016, 0x00604811, 0x35e },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x00000004, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x355 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00404811, 0x349 },
+    { 0x00000028, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x349 },
+    { 0x00002104, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x00000035, 0x00203626, 0x000 },
+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x360 },
+    { 0x00000035, 0x00801a2d, 0x000 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x00000015, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x376 },
+    { 0x0000001e, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x380 },
+    { 0x00000020, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x38c },
+    { 0x0000000f, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x398 },
+    { 0x00000010, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x398 },
+    { 0x00000006, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x39a },
+    { 0x00000016, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x39f },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x08000000, 0x00290a22, 0x000 },
+    { 0x00000003, 0x40210e20, 0x000 },
+    { 0x0000000c, 0xc0211220, 0x000 },
+    { 0x00080000, 0x00281224, 0x000 },
+    { 0x00000014, 0xc0221620, 0x000 },
+    { 0x00000000, 0x002914a4, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948a2, 0x000 },
+    { 0x0000a1fe, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000015, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x614 },
+    { 0x00000015, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x382 },
+    { 0x0000210e, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x614 },
+    { 0x00000003, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x38e },
+    { 0x00002108, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00404811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000006, 0x00404811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000016, 0x00604811, 0x35e },
+    { 0x00000016, 0x00404811, 0x000 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x0000001d, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x3b9 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000017, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x614 },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x3ab },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0xbabecafe, 0x00204811, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000004, 0x00404811, 0x000 },
+    { 0x00002170, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000a, 0x00204811, 0x000 },
+    { 0x00000000, 0x00200010, 0x000 },
+    { 0x00000000, 0x14c00000, 0x3be },
+    { 0x8c000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00404811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00003fff, 0x40280a20, 0x000 },
+    { 0x80000000, 0x40280e20, 0x000 },
+    { 0x40000000, 0xc0281220, 0x000 },
+    { 0x00040000, 0x00694622, 0x614 },
+    { 0x00000000, 0x00201410, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x3cc },
+    { 0x00000000, 0xc0401800, 0x3cf },
+    { 0x00003fff, 0xc0281a20, 0x000 },
+    { 0x00040000, 0x00694626, 0x614 },
+    { 0x00000000, 0x00201810, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x3d2 },
+    { 0x00000000, 0xc0401c00, 0x3d5 },
+    { 0x00003fff, 0xc0281e20, 0x000 },
+    { 0x00040000, 0x00694627, 0x614 },
+    { 0x00000000, 0x00201c10, 0x000 },
+    { 0x00000000, 0x00204402, 0x000 },
+    { 0x00000000, 0x002820c5, 0x000 },
+    { 0x00000000, 0x004948e8, 0x000 },
+    { 0xa5800000, 0x00200811, 0x000 },
+    { 0x00002000, 0x00200c11, 0x000 },
+    { 0x83000000, 0x00604411, 0x3fd },
+    { 0x00000000, 0x00204402, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x0000001f, 0xc0210220, 0x000 },
+    { 0x00000000, 0x14c00000, 0x3e2 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0000ffff, 0xc0481220, 0x3ea },
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+    { 0x00000001, 0x40280a20, 0x000 },
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+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x58d },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x614 },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x58b },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x614 },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x599 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x59f },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5a4 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x5b7 },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x00000034, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x5bb },
+    { 0x00000000, 0x00600000, 0x5a4 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5bb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x0000217a, 0xc0204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x5e1 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000016, 0x00604811, 0x35e },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x614 },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x5dc },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x0000001d, 0x00803627, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x0000001d, 0x00803627, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x0000001d, 0x00803627, 0x000 },
+    { 0x0000001d, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x0000001d, 0x00803627, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000016, 0x00604811, 0x35e },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0x00ffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x614 },
+    { 0x00000000, 0x00200010, 0x000 },
+    { 0x00000000, 0x14c00000, 0x613 },
+    { 0x00000010, 0x00404c11, 0x5f9 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x00000025, 0x00200a2d, 0x000 },
+    { 0x00000026, 0x00200e2d, 0x000 },
+    { 0x00000027, 0x0020122d, 0x000 },
+    { 0x00000028, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x612 },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x00000027, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x614 },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x617 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x2fe },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x19f },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000029, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x0000002c, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000002a, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000002b, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x013304ef, 0x059b0239, 0x000 },
+    { 0x01b00159, 0x0425059b, 0x000 },
+    { 0x021201f6, 0x02390142, 0x000 },
+    { 0x0210022e, 0x0289022a, 0x000 },
+    { 0x03c2059b, 0x059b059b, 0x000 },
+    { 0x05cd05ce, 0x0308059b, 0x000 },
+    { 0x059b05a0, 0x03090329, 0x000 },
+    { 0x0313026b, 0x032b031d, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b052c, 0x059b059b, 0x000 },
+    { 0x03a5059b, 0x04a2032d, 0x000 },
+    { 0x04810433, 0x0423059b, 0x000 },
+    { 0x04bb04ed, 0x042704c8, 0x000 },
+    { 0x043304f4, 0x033a0365, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b059b, 0x05b905a2, 0x000 },
+    { 0x059b059b, 0x0007059b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x03e303d8, 0x03f303f1, 0x000 },
+    { 0x03f903f5, 0x03f703fb, 0x000 },
+    { 0x04070403, 0x040f040b, 0x000 },
+    { 0x04170413, 0x041f041b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x059b059b, 0x059b059b, 0x000 },
+    { 0x00020600, 0x06190006, 0x000 },
+};
+
+static const u32 R600_pfp_microcode[] = {
+0xd40071,
+0xd40072,
+0xca0400,
+0xa00000,
+0x7e828b,
+0x800003,
+0xca0400,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d4,
+0xd5c01e,
+0xca0800,
+0x80001b,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000d,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000d,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800054,
+0xd40073,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800002,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800002,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b9,
+0xd4c01e,
+0xc6083e,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800002,
+0x062001,
+0xc6083e,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x80007a,
+0xd42013,
+0xc6083e,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008e,
+0x000000,
+0xc41432,
+0xc6183e,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800002,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xd40073,
+0xe4015e,
+0xd4001e,
+0x8001b9,
+0x062001,
+0x0a2001,
+0xd60074,
+0xc40836,
+0xc61040,
+0x988007,
+0xcc3835,
+0x95010f,
+0xd4001f,
+0xd46062,
+0x800002,
+0xd42062,
+0xcc1433,
+0x8401bc,
+0xd40070,
+0xd5401e,
+0x800002,
+0xee001e,
+0xca0c00,
+0xca1000,
+0xd4c01a,
+0x8401bc,
+0xd5001a,
+0xcc0443,
+0x35101f,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b9,
+0xd4006d,
+0x344401,
+0xcc0c44,
+0x98403a,
+0xcc2c46,
+0x958004,
+0xcc0445,
+0x8001b9,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f3,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f3,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f3,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f3,
+0xcc1003,
+0x988014,
+0xcc1047,
+0x9a8009,
+0xcc1448,
+0x9840da,
+0xd4006d,
+0xcc1844,
+0xd5001a,
+0xd5401a,
+0x8000cc,
+0xd5801a,
+0x96c0d3,
+0xd4006d,
+0x8001b9,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800002,
+0xec007f,
+0x9ac0ca,
+0xd4006d,
+0x8001b9,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b9,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809c,
+0xd4006d,
+0x98409a,
+0xd4006e,
+0xcc0847,
+0xcc0c48,
+0xcc1044,
+0xd4801a,
+0xd4c01a,
+0x800104,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d8,
+0xca0c00,
+0xd4401e,
+0x800002,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800002,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bc,
+0x000000,
+0x8401bc,
+0xd7806f,
+0x800002,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902af,
+0x7c738b,
+0x8401bc,
+0xd7806f,
+0x800002,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984296,
+0x000000,
+0x800164,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800002,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc1049,
+0x990004,
+0xd40071,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800002,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x95001f,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x7d8380,
+0xd5806f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0x8001b9,
+0xd60074,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800002,
+0xee001e,
+0x800002,
+0xee001f,
+0xd4001f,
+0x800002,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010174,
+0x02017b,
+0x030090,
+0x040080,
+0x050005,
+0x060040,
+0x070033,
+0x08012f,
+0x090047,
+0x0a0037,
+0x1001b7,
+0x1700a4,
+0x22013d,
+0x23014c,
+0x2000b5,
+0x240128,
+0x27004e,
+0x28006b,
+0x2a0061,
+0x2b0053,
+0x2f0066,
+0x320088,
+0x340182,
+0x3c0159,
+0x3f0073,
+0x41018f,
+0x440131,
+0x550176,
+0x56017d,
+0x60000c,
+0x610035,
+0x620039,
+0x630039,
+0x640039,
+0x650039,
+0x660039,
+0x670039,
+0x68003b,
+0x690042,
+0x6a0049,
+0x6b0049,
+0x6c0049,
+0x6d0049,
+0x6e0049,
+0x6f0049,
+0x7301b7,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+0x000007,
+};
+
+static const u32 RV610_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x668 },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x662 },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25f },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x267 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x0000002a, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000001c, 0x00403627, 0x000 },
+    { 0x0000000c, 0xc0220a20, 0x000 },
+    { 0x00000029, 0x00203622, 0x000 },
+    { 0x00000028, 0xc0403620, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce4, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x668 },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x65f },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x0000001a, 0x00201e2d, 0x000 },
+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x34b },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x354 },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x364 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00604802, 0x36e },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000004, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x00000028, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5c0 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x0000002c, 0x00203626, 0x000 },
+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x370 },
+    { 0x0000002c, 0x00801a2d, 0x000 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x00000015, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x386 },
+    { 0x00000006, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b1 },
+    { 0x00000016, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b5 },
+    { 0x00000020, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x39c },
+    { 0x0000000f, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x00000010, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x0000001e, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x390 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x08000000, 0x00290a22, 0x000 },
+    { 0x00000003, 0x40210e20, 0x000 },
+    { 0x0000000c, 0xc0211220, 0x000 },
+    { 0x00080000, 0x00281224, 0x000 },
+    { 0x00000014, 0xc0221620, 0x000 },
+    { 0x00000000, 0x002914a4, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948a2, 0x000 },
+    { 0x0000a1fe, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000015, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x392 },
+    { 0x0000210e, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000017, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000003, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x39e },
+    { 0x00002108, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x80000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000010, 0x00204811, 0x000 },
+    { 0x00000000, 0x00200010, 0x000 },
+    { 0x00000000, 0x14c00000, 0x3ae },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000006, 0x00404811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x0000001d, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x3ce },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x3c0 },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0xbabecafe, 0x00204811, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000004, 0x00404811, 0x000 },
+    { 0x00002170, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000a, 0x00204811, 0x000 },
+    { 0x00000000, 0x00200010, 0x000 },
+    { 0x00000000, 0x14c00000, 0x3d3 },
+    { 0x8c000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00404811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00003fff, 0x40280a20, 0x000 },
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+    { 0x40000000, 0xc0281220, 0x000 },
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+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x57c },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x57a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x692 },
+    { 0x00000000, 0x00401c10, 0x57c },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x57e },
+    { 0x00000000, 0x00600000, 0x5c9 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x58f },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x58d },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5a0 },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x59e },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5b1 },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5af },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5be },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5c4 },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5c9 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000002c, 0x00203621, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5d0 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000030, 0x00403621, 0x5e3 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5e3 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a092, 0x00604411, 0x68d },
+    { 0x00000031, 0x00203630, 0x000 },
+    { 0x0004a093, 0x00604411, 0x68d },
+    { 0x00000032, 0x00203630, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68d },
+    { 0x00000033, 0x00203630, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68d },
+    { 0x00000034, 0x00203630, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68d },
+    { 0x00000035, 0x00203630, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68d },
+    { 0x00000036, 0x00203630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000001, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62c },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62c },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x605 },
+    { 0x0000a092, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x0000a093, 0x00204411, 0x000 },
+    { 0x00000032, 0x00204a2d, 0x000 },
+    { 0x0000a2b6, 0x00204411, 0x000 },
+    { 0x00000033, 0x00204a2d, 0x000 },
+    { 0x0000a2ba, 0x00204411, 0x000 },
+    { 0x00000034, 0x00204a2d, 0x000 },
+    { 0x0000a2be, 0x00204411, 0x000 },
+    { 0x00000035, 0x00204a2d, 0x000 },
+    { 0x0000a2c2, 0x00204411, 0x000 },
+    { 0x00000036, 0x00204a2d, 0x000 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x000001ff, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62b },
+    { 0x00000000, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x60e },
+    { 0x0004a003, 0x00604411, 0x68d },
+    { 0x0000a003, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x14c00000, 0x613 },
+    { 0x0004a010, 0x00604411, 0x68d },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62b },
+    { 0x0004a011, 0x00604411, 0x68d },
+    { 0x0000a011, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a012, 0x00604411, 0x68d },
+    { 0x0000a012, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a013, 0x00604411, 0x68d },
+    { 0x0000a013, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a014, 0x00604411, 0x68d },
+    { 0x0000a014, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a015, 0x00604411, 0x68d },
+    { 0x0000a015, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a016, 0x00604411, 0x68d },
+    { 0x0000a016, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a017, 0x00604411, 0x68d },
+    { 0x0000a017, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000002c, 0x0080062d, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x63d },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000002, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x63b },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x641 },
+    { 0x00000000, 0x00600000, 0x5c9 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x641 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x62d },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x62d },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x656 },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000010, 0x00404c11, 0x672 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x68b },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68d },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x690 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x692 },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x695 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x01420502, 0x05c00250, 0x000 },
+    { 0x01c30168, 0x043f05c0, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03d705c0, 0x05c005c0, 0x000 },
+    { 0x0649064a, 0x031f05c0, 0x000 },
+    { 0x05c005c5, 0x03200340, 0x000 },
+    { 0x032a0282, 0x03420334, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c00551, 0x05c005c0, 0x000 },
+    { 0x03ba05c0, 0x04bb0344, 0x000 },
+    { 0x049a0450, 0x043d05c0, 0x000 },
+    { 0x04d005c0, 0x044104dd, 0x000 },
+    { 0x04500507, 0x03510375, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x063f05c7, 0x000 },
+    { 0x05c005c0, 0x000705c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x03f803ed, 0x04080406, 0x000 },
+    { 0x040e040a, 0x040c0410, 0x000 },
+    { 0x041c0418, 0x04240420, 0x000 },
+    { 0x042c0428, 0x04340430, 0x000 },
+    { 0x05c005c0, 0x043805c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x00020679, 0x06970006, 0x000 },
+};
+
+static const u32 RV610_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001b8,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800053,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b8,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x800079,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008d,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401bb,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401bb,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b8,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f0,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f0,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f0,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f0,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000c9,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800101,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d9,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bd,
+0x000000,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902b0,
+0x7c738b,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984297,
+0x000000,
+0x800161,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001b8,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010171,
+0x020178,
+0x03008f,
+0x04007f,
+0x050003,
+0x06003f,
+0x070032,
+0x08012c,
+0x090046,
+0x0a0036,
+0x1001b6,
+0x1700a2,
+0x22013a,
+0x230149,
+0x2000b4,
+0x240125,
+0x27004d,
+0x28006a,
+0x2a0060,
+0x2b0052,
+0x2f0065,
+0x320087,
+0x34017f,
+0x3c0156,
+0x3f0072,
+0x41018c,
+0x44012e,
+0x550173,
+0x56017a,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RV620_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x668 },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x662 },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
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+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
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+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
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+    { 0x00000010, 0x00211e27, 0x000 },
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+    { 0x00000000, 0x12c00000, 0x267 },
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+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
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+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00000000, 0x00600000, 0x631 },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
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+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
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+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x0000000c, 0xc0220a20, 0x000 },
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+    { 0x00000028, 0xc0403620, 0x000 },
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+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
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+    { 0x00000000, 0x003120c4, 0x000 },
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+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
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+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
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+    { 0x00000000, 0x06c00000, 0x2dc },
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+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
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+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x668 },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x65f },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
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+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
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+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
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+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
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+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x645 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x34b },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x354 },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x364 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00604802, 0x36e },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000004, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x00000028, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5c0 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x0000002c, 0x00203626, 0x000 },
+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x370 },
+    { 0x0000002c, 0x00801a2d, 0x000 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x00000015, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x386 },
+    { 0x00000006, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b1 },
+    { 0x00000016, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b5 },
+    { 0x00000020, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x39c },
+    { 0x0000000f, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x00000010, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x0000001e, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x390 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x08000000, 0x00290a22, 0x000 },
+    { 0x00000003, 0x40210e20, 0x000 },
+    { 0x0000000c, 0xc0211220, 0x000 },
+    { 0x00080000, 0x00281224, 0x000 },
+    { 0x00000014, 0xc0221620, 0x000 },
+    { 0x00000000, 0x002914a4, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948a2, 0x000 },
+    { 0x0000a1fe, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000015, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x392 },
+    { 0x0000210e, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000017, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68d },
+    { 0x00000003, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x39e },
+    { 0x00002108, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x80000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000010, 0x00204811, 0x000 },
+    { 0x00000000, 0x00200010, 0x000 },
+    { 0x00000000, 0x14c00000, 0x3ae },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000006, 0x00404811, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00000000, 0x00400000, 0x000 },
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+    { 0xefffffff, 0x00283a2e, 0x000 },
+    { 0x00000000, 0x004938ce, 0x67b },
+    { 0x00000001, 0x40280a20, 0x000 },
+    { 0x00000006, 0x40280e20, 0x000 },
+    { 0x00000300, 0xc0281220, 0x000 },
+    { 0x00000008, 0x00211224, 0x000 },
+    { 0x00000000, 0xc0201620, 0x000 },
+    { 0x00000000, 0xc0201a20, 0x000 },
+    { 0x00000000, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x566 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68d },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00020000, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56e },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x57c },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68d },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x57c },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x572 },
+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x57c },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x57a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x692 },
+    { 0x00000000, 0x00401c10, 0x57c },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x57e },
+    { 0x00000000, 0x00600000, 0x5c9 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x58f },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x58d },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5a0 },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x59e },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5b1 },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5af },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68d },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5be },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5c4 },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5c9 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000002c, 0x00203621, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5d0 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000030, 0x00403621, 0x5e3 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5e3 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a092, 0x00604411, 0x68d },
+    { 0x00000031, 0x00203630, 0x000 },
+    { 0x0004a093, 0x00604411, 0x68d },
+    { 0x00000032, 0x00203630, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68d },
+    { 0x00000033, 0x00203630, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68d },
+    { 0x00000034, 0x00203630, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68d },
+    { 0x00000035, 0x00203630, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68d },
+    { 0x00000036, 0x00203630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000001, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62c },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62c },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x605 },
+    { 0x0000a092, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x0000a093, 0x00204411, 0x000 },
+    { 0x00000032, 0x00204a2d, 0x000 },
+    { 0x0000a2b6, 0x00204411, 0x000 },
+    { 0x00000033, 0x00204a2d, 0x000 },
+    { 0x0000a2ba, 0x00204411, 0x000 },
+    { 0x00000034, 0x00204a2d, 0x000 },
+    { 0x0000a2be, 0x00204411, 0x000 },
+    { 0x00000035, 0x00204a2d, 0x000 },
+    { 0x0000a2c2, 0x00204411, 0x000 },
+    { 0x00000036, 0x00204a2d, 0x000 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x000001ff, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62b },
+    { 0x00000000, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x60e },
+    { 0x0004a003, 0x00604411, 0x68d },
+    { 0x0000a003, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x14c00000, 0x613 },
+    { 0x0004a010, 0x00604411, 0x68d },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62b },
+    { 0x0004a011, 0x00604411, 0x68d },
+    { 0x0000a011, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a012, 0x00604411, 0x68d },
+    { 0x0000a012, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a013, 0x00604411, 0x68d },
+    { 0x0000a013, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a014, 0x00604411, 0x68d },
+    { 0x0000a014, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a015, 0x00604411, 0x68d },
+    { 0x0000a015, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a016, 0x00604411, 0x68d },
+    { 0x0000a016, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a017, 0x00604411, 0x68d },
+    { 0x0000a017, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x0000002c, 0x0080062d, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x63d },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000002, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x63b },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68d },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x641 },
+    { 0x00000000, 0x00600000, 0x5c9 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x641 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x62d },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x62d },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x656 },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68d },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x68c },
+    { 0x00000010, 0x00404c11, 0x672 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x68b },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68d },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x690 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x692 },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x695 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x01420502, 0x05c00250, 0x000 },
+    { 0x01c30168, 0x043f05c0, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03d705c0, 0x05c005c0, 0x000 },
+    { 0x0649064a, 0x031f05c0, 0x000 },
+    { 0x05c005c5, 0x03200340, 0x000 },
+    { 0x032a0282, 0x03420334, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c00551, 0x05c005c0, 0x000 },
+    { 0x03ba05c0, 0x04bb0344, 0x000 },
+    { 0x049a0450, 0x043d05c0, 0x000 },
+    { 0x04d005c0, 0x044104dd, 0x000 },
+    { 0x04500507, 0x03510375, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x063f05c7, 0x000 },
+    { 0x05c005c0, 0x000705c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x03f803ed, 0x04080406, 0x000 },
+    { 0x040e040a, 0x040c0410, 0x000 },
+    { 0x041c0418, 0x04240420, 0x000 },
+    { 0x042c0428, 0x04340430, 0x000 },
+    { 0x05c005c0, 0x043805c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x05c005c0, 0x05c005c0, 0x000 },
+    { 0x00020679, 0x06970006, 0x000 },
+};
+
+static const u32 RV620_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001b8,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800053,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b8,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x800079,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008d,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401bb,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401bb,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b8,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f0,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f0,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f0,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f0,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000c9,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800101,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d9,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bd,
+0x000000,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902b0,
+0x7c738b,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984297,
+0x000000,
+0x800161,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001b8,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010171,
+0x020178,
+0x03008f,
+0x04007f,
+0x050003,
+0x06003f,
+0x070032,
+0x08012c,
+0x090046,
+0x0a0036,
+0x1001b6,
+0x1700a2,
+0x22013a,
+0x230149,
+0x2000b4,
+0x240125,
+0x27004d,
+0x28006a,
+0x2a0060,
+0x2b0052,
+0x2f0065,
+0x320087,
+0x34017f,
+0x3c0156,
+0x3f0072,
+0x41018c,
+0x44012e,
+0x550173,
+0x56017a,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RV630_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x65f },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x662 },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68a },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25f },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x267 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x0000002a, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000001c, 0x00403627, 0x000 },
+    { 0x0000000c, 0xc0220a20, 0x000 },
+    { 0x00000029, 0x00203622, 0x000 },
+    { 0x00000028, 0xc0403620, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce4, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x0000001a, 0x00201e2d, 0x000 },
+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x34b },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68a },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x354 },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x364 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00604802, 0x36e },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000004, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x00000028, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5bd },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x0000002c, 0x00203626, 0x000 },
+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x370 },
+    { 0x0000002c, 0x00801a2d, 0x000 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x00000015, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x386 },
+    { 0x00000006, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b1 },
+    { 0x00000016, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b5 },
+    { 0x00000020, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x39c },
+    { 0x0000000f, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x00000010, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3a8 },
+    { 0x0000001e, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x390 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x000 },
+    { 0x08000000, 0x00290a22, 0x000 },
+    { 0x00000003, 0x40210e20, 0x000 },
+    { 0x0000000c, 0xc0211220, 0x000 },
+    { 0x00080000, 0x00281224, 0x000 },
+    { 0x00000014, 0xc0221620, 0x000 },
+    { 0x00000000, 0x002914a4, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948a2, 0x000 },
+    { 0x0000a1fe, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404803, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68a },
+    { 0x00000015, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x392 },
+    { 0x0000210e, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000002a, 0x40203620, 0x000 },
+    { 0x87000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000030, 0x00203623, 0x000 },
+    { 0x9d000000, 0x00204411, 0x000 },
+    { 0x0000001f, 0x40214a20, 0x000 },
+    { 0x96000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x00000000, 0xc0201000, 0x000 },
+    { 0x0000001f, 0x00211624, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x0000001d, 0x00203623, 0x000 },
+    { 0x00000003, 0x00281e23, 0x000 },
+    { 0x00000008, 0x00222223, 0x000 },
+    { 0xfffff000, 0x00282228, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x0000001f, 0x00203628, 0x000 },
+    { 0x00000018, 0x00211e23, 0x000 },
+    { 0x00000020, 0x00203627, 0x000 },
+    { 0x00000002, 0x00221624, 0x000 },
+    { 0x00000000, 0x003014a8, 0x000 },
+    { 0x0000001e, 0x00203625, 0x000 },
+    { 0x00000003, 0x00211a24, 0x000 },
+    { 0x10000000, 0x00281a26, 0x000 },
+    { 0xefffffff, 0x00283a2e, 0x000 },
+    { 0x00000000, 0x004938ce, 0x678 },
+    { 0x00000001, 0x40280a20, 0x000 },
+    { 0x00000006, 0x40280e20, 0x000 },
+    { 0x00000300, 0xc0281220, 0x000 },
+    { 0x00000008, 0x00211224, 0x000 },
+    { 0x00000000, 0xc0201620, 0x000 },
+    { 0x00000000, 0xc0201a20, 0x000 },
+    { 0x00000000, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x563 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68a },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00020000, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56b },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56b },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68a },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56f },
+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x577 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x68f },
+    { 0x00000000, 0x00401c10, 0x579 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x57b },
+    { 0x00000000, 0x00600000, 0x5c6 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x58c },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x58a },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x59d },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x59b },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5ae },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5ac },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5bb },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5c1 },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5c6 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000002c, 0x00203621, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5cd },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000030, 0x00403621, 0x5e0 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5e0 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a092, 0x00604411, 0x68a },
+    { 0x00000031, 0x00203630, 0x000 },
+    { 0x0004a093, 0x00604411, 0x68a },
+    { 0x00000032, 0x00203630, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68a },
+    { 0x00000033, 0x00203630, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68a },
+    { 0x00000034, 0x00203630, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68a },
+    { 0x00000035, 0x00203630, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68a },
+    { 0x00000036, 0x00203630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000001, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x629 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x629 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x602 },
+    { 0x0000a092, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x0000a093, 0x00204411, 0x000 },
+    { 0x00000032, 0x00204a2d, 0x000 },
+    { 0x0000a2b6, 0x00204411, 0x000 },
+    { 0x00000033, 0x00204a2d, 0x000 },
+    { 0x0000a2ba, 0x00204411, 0x000 },
+    { 0x00000034, 0x00204a2d, 0x000 },
+    { 0x0000a2be, 0x00204411, 0x000 },
+    { 0x00000035, 0x00204a2d, 0x000 },
+    { 0x0000a2c2, 0x00204411, 0x000 },
+    { 0x00000036, 0x00204a2d, 0x000 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x000001ff, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x628 },
+    { 0x00000000, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x60b },
+    { 0x0004a003, 0x00604411, 0x68a },
+    { 0x0000a003, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x14c00000, 0x610 },
+    { 0x0004a010, 0x00604411, 0x68a },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x628 },
+    { 0x0004a011, 0x00604411, 0x68a },
+    { 0x0000a011, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a012, 0x00604411, 0x68a },
+    { 0x0000a012, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a013, 0x00604411, 0x68a },
+    { 0x0000a013, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a014, 0x00604411, 0x68a },
+    { 0x0000a014, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a015, 0x00604411, 0x68a },
+    { 0x0000a015, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a016, 0x00604411, 0x68a },
+    { 0x0000a016, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a017, 0x00604411, 0x68a },
+    { 0x0000a017, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000002c, 0x0080062d, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x63a },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000002, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x638 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x63e },
+    { 0x00000000, 0x00600000, 0x5c6 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x63e },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x62a },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x62a },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x653 },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000010, 0x00404c11, 0x66f },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x688 },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68a },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x68d },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68f },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x692 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x014204ff, 0x05bd0250, 0x000 },
+    { 0x01c30168, 0x043f05bd, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03d705bd, 0x05bd05bd, 0x000 },
+    { 0x06460647, 0x031f05bd, 0x000 },
+    { 0x05bd05c2, 0x03200340, 0x000 },
+    { 0x032a0282, 0x03420334, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd054e, 0x05bd05bd, 0x000 },
+    { 0x03ba05bd, 0x04b80344, 0x000 },
+    { 0x0497044d, 0x043d05bd, 0x000 },
+    { 0x04cd05bd, 0x044104da, 0x000 },
+    { 0x044d0504, 0x03510375, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x063c05c4, 0x000 },
+    { 0x05bd05bd, 0x000705bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x03f803ed, 0x04080406, 0x000 },
+    { 0x040e040a, 0x040c0410, 0x000 },
+    { 0x041c0418, 0x04240420, 0x000 },
+    { 0x042c0428, 0x04340430, 0x000 },
+    { 0x05bd05bd, 0x043805bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x00020676, 0x06940006, 0x000 },
+};
+
+static const u32 RV630_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001b8,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800053,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b8,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x800079,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008d,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401bb,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401bb,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b8,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f0,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f0,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f0,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f0,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000c9,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800101,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d9,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bd,
+0x000000,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902b0,
+0x7c738b,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984297,
+0x000000,
+0x800161,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001b8,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010171,
+0x020178,
+0x03008f,
+0x04007f,
+0x050003,
+0x06003f,
+0x070032,
+0x08012c,
+0x090046,
+0x0a0036,
+0x1001b6,
+0x1700a2,
+0x22013a,
+0x230149,
+0x2000b4,
+0x240125,
+0x27004d,
+0x28006a,
+0x2a0060,
+0x2b0052,
+0x2f0065,
+0x320087,
+0x34017f,
+0x3c0156,
+0x3f0072,
+0x41018c,
+0x44012e,
+0x550173,
+0x56017a,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RV635_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x65f },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x662 },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68a },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25f },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x267 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00000000, 0x00600000, 0x62e },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x0000002a, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000001c, 0x00403627, 0x000 },
+    { 0x0000000c, 0xc0220a20, 0x000 },
+    { 0x00000029, 0x00203622, 0x000 },
+    { 0x00000028, 0xc0403620, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce4, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x665 },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x65c },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x0000001a, 0x00201e2d, 0x000 },
+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x642 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x34b },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x68a },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x354 },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x364 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00604802, 0x36e },
+    { 0x00002100, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000004, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x00000028, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5bd },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404802, 0x35f },
+    { 0x0000002c, 0x00203626, 0x000 },
+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x370 },
+    { 0x0000002c, 0x00801a2d, 0x000 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x00000015, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x386 },
+    { 0x00000006, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x3b1 },
+    { 0x00000016, 0x002f0222, 0x000 },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000000, 0xc0600000, 0x68a },
+    { 0x00000001, 0x00210222, 0x000 },
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+    { 0x00040000, 0x18e00c11, 0x4ec },
+    { 0x00000001, 0x00333e2f, 0x000 },
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+    { 0xba000000, 0x00204411, 0x000 },
+    { 0x0000e000, 0x00204811, 0x000 },
+    { 0xbb000000, 0x00204411, 0x000 },
+    { 0x0000f000, 0x00204811, 0x000 },
+    { 0xbc000000, 0x00204411, 0x000 },
+    { 0x0000f3fc, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00204811, 0x000 },
+    { 0x000000ff, 0x00280e30, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x516 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000000, 0x14c00000, 0x52b },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000001c, 0x00203623, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000029, 0x00203623, 0x000 },
+    { 0x00000028, 0x00203623, 0x000 },
+    { 0x00000017, 0x00203623, 0x000 },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203623, 0x000 },
+    { 0x00000015, 0x00203623, 0x000 },
+    { 0x00000016, 0x00203623, 0x000 },
+    { 0xffffe000, 0x00200c11, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00200c11, 0x000 },
+    { 0x00000023, 0x00203623, 0x000 },
+    { 0x00000024, 0x00203623, 0x000 },
+    { 0xf1ffffff, 0x00283a2e, 0x000 },
+    { 0x0000001a, 0xc0220e20, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000002a, 0x40203620, 0x000 },
+    { 0x87000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000030, 0x00203623, 0x000 },
+    { 0x9d000000, 0x00204411, 0x000 },
+    { 0x0000001f, 0x40214a20, 0x000 },
+    { 0x96000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x00000000, 0xc0201000, 0x000 },
+    { 0x0000001f, 0x00211624, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x0000001d, 0x00203623, 0x000 },
+    { 0x00000003, 0x00281e23, 0x000 },
+    { 0x00000008, 0x00222223, 0x000 },
+    { 0xfffff000, 0x00282228, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x0000001f, 0x00203628, 0x000 },
+    { 0x00000018, 0x00211e23, 0x000 },
+    { 0x00000020, 0x00203627, 0x000 },
+    { 0x00000002, 0x00221624, 0x000 },
+    { 0x00000000, 0x003014a8, 0x000 },
+    { 0x0000001e, 0x00203625, 0x000 },
+    { 0x00000003, 0x00211a24, 0x000 },
+    { 0x10000000, 0x00281a26, 0x000 },
+    { 0xefffffff, 0x00283a2e, 0x000 },
+    { 0x00000000, 0x004938ce, 0x678 },
+    { 0x00000001, 0x40280a20, 0x000 },
+    { 0x00000006, 0x40280e20, 0x000 },
+    { 0x00000300, 0xc0281220, 0x000 },
+    { 0x00000008, 0x00211224, 0x000 },
+    { 0x00000000, 0xc0201620, 0x000 },
+    { 0x00000000, 0xc0201a20, 0x000 },
+    { 0x00000000, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x563 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68a },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00020000, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56b },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56b },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x68a },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56f },
+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x579 },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x577 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x68f },
+    { 0x00000000, 0x00401c10, 0x579 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x57b },
+    { 0x00000000, 0x00600000, 0x5c6 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x58c },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x58a },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x59d },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x59b },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5ae },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5ac },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68a },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5bb },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5c1 },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5c6 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000002c, 0x00203621, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5cd },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000030, 0x00403621, 0x5e0 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5e0 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a092, 0x00604411, 0x68a },
+    { 0x00000031, 0x00203630, 0x000 },
+    { 0x0004a093, 0x00604411, 0x68a },
+    { 0x00000032, 0x00203630, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x68a },
+    { 0x00000033, 0x00203630, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x68a },
+    { 0x00000034, 0x00203630, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x68a },
+    { 0x00000035, 0x00203630, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x68a },
+    { 0x00000036, 0x00203630, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000001, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x629 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x629 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x602 },
+    { 0x0000a092, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x0000a093, 0x00204411, 0x000 },
+    { 0x00000032, 0x00204a2d, 0x000 },
+    { 0x0000a2b6, 0x00204411, 0x000 },
+    { 0x00000033, 0x00204a2d, 0x000 },
+    { 0x0000a2ba, 0x00204411, 0x000 },
+    { 0x00000034, 0x00204a2d, 0x000 },
+    { 0x0000a2be, 0x00204411, 0x000 },
+    { 0x00000035, 0x00204a2d, 0x000 },
+    { 0x0000a2c2, 0x00204411, 0x000 },
+    { 0x00000036, 0x00204a2d, 0x000 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x000001ff, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x628 },
+    { 0x00000000, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x60b },
+    { 0x0004a003, 0x00604411, 0x68a },
+    { 0x0000a003, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x14c00000, 0x610 },
+    { 0x0004a010, 0x00604411, 0x68a },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x628 },
+    { 0x0004a011, 0x00604411, 0x68a },
+    { 0x0000a011, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a012, 0x00604411, 0x68a },
+    { 0x0000a012, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a013, 0x00604411, 0x68a },
+    { 0x0000a013, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a014, 0x00604411, 0x68a },
+    { 0x0000a014, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a015, 0x00604411, 0x68a },
+    { 0x0000a015, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a016, 0x00604411, 0x68a },
+    { 0x0000a016, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a017, 0x00604411, 0x68a },
+    { 0x0000a017, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x0000002c, 0x0080062d, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x63a },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000002, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x638 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x68a },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x63e },
+    { 0x00000000, 0x00600000, 0x5c6 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x63e },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x62a },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x62a },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x653 },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00008000, 0x00204811, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36e },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x68a },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x689 },
+    { 0x00000010, 0x00404c11, 0x66f },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x688 },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68a },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x68d },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x68f },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x692 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x014204ff, 0x05bd0250, 0x000 },
+    { 0x01c30168, 0x043f05bd, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03d705bd, 0x05bd05bd, 0x000 },
+    { 0x06460647, 0x031f05bd, 0x000 },
+    { 0x05bd05c2, 0x03200340, 0x000 },
+    { 0x032a0282, 0x03420334, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd054e, 0x05bd05bd, 0x000 },
+    { 0x03ba05bd, 0x04b80344, 0x000 },
+    { 0x0497044d, 0x043d05bd, 0x000 },
+    { 0x04cd05bd, 0x044104da, 0x000 },
+    { 0x044d0504, 0x03510375, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x063c05c4, 0x000 },
+    { 0x05bd05bd, 0x000705bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x03f803ed, 0x04080406, 0x000 },
+    { 0x040e040a, 0x040c0410, 0x000 },
+    { 0x041c0418, 0x04240420, 0x000 },
+    { 0x042c0428, 0x04340430, 0x000 },
+    { 0x05bd05bd, 0x043805bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x05bd05bd, 0x05bd05bd, 0x000 },
+    { 0x00020676, 0x06940006, 0x000 },
+};
+
+static const u32 RV635_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001b8,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800053,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b8,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x800079,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008d,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401bb,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401bb,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b8,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f0,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f0,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f0,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f0,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000c9,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800101,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d9,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bd,
+0x000000,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902b0,
+0x7c738b,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984297,
+0x000000,
+0x800161,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001b8,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010171,
+0x020178,
+0x03008f,
+0x04007f,
+0x050003,
+0x06003f,
+0x070032,
+0x08012c,
+0x090046,
+0x0a0036,
+0x1001b6,
+0x1700a2,
+0x22013a,
+0x230149,
+0x2000b4,
+0x240125,
+0x27004d,
+0x28006a,
+0x2a0060,
+0x2b0052,
+0x2f0065,
+0x320087,
+0x34017f,
+0x3c0156,
+0x3f0072,
+0x41018c,
+0x44012e,
+0x550173,
+0x56017a,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RV670_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x00000000, 0x00600000, 0x624 },
+    { 0x00000000, 0x00600000, 0x638 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00000000, 0x00600000, 0x64d },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x653 },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x656 },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x67c },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x67b },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x67c },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x67b },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x638 },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x624 },
+    { 0x00000000, 0x00600000, 0x638 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x624 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25f },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x267 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x00000000, 0x00600000, 0x624 },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x0000002a, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000001c, 0x00403627, 0x000 },
+    { 0x0000000c, 0xc0220a20, 0x000 },
+    { 0x00000029, 0x00203622, 0x000 },
+    { 0x00000028, 0xc0403620, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce4, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x659 },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x650 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x0000001a, 0x00201e2d, 0x000 },
+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00002257, 0x00204411, 0x000 },
+    { 0x00000003, 0xc0484a20, 0x000 },
+    { 0x0000225d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x638 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x34b },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x67c },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x354 },
+    { 0x00000014, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x362 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
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+    { 0x00000049, 0x00201811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000000, 0x002f0226, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x36c },
+    { 0x0000002c, 0x00801a2d, 0x000 },
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+    { 0x00000000, 0x00404803, 0x000 },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000016, 0x00204811, 0x000 },
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+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000017, 0x00204811, 0x000 },
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+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x80000000, 0x00204411, 0x000 },
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+    { 0x81000000, 0x00204411, 0x000 },
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+    { 0x00000000, 0x14e00000, 0x3c4 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000018, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x67c },
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+    { 0xcafebabe, 0x00404811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00003fff, 0x40280a20, 0x000 },
+    { 0x80000000, 0x40280e20, 0x000 },
+    { 0x40000000, 0xc0281220, 0x000 },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000000, 0x17000000, 0x000 },
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+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000000, 0x00400000, 0x459 },
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+    { 0x00000000, 0x002824f0, 0x000 },
+    { 0x00000007, 0x00280a23, 0x000 },
+    { 0x00000001, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x460 },
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+    { 0x00000000, 0x04e00000, 0x479 },
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+    { 0x00000000, 0x08e00000, 0x479 },
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+    { 0x00000000, 0x0ae00000, 0x48c },
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+    { 0x00000000, 0x14e00000, 0x4a3 },
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+    { 0x00000000, 0x14c00000, 0x49f },
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+    { 0x00000000, 0xc0210a20, 0x000 },
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+    { 0x00000000, 0xc0604800, 0x681 },
+    { 0x00000000, 0x00400000, 0x4ba },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00040000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xc0600000, 0x67c },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x4c1 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x00000000, 0x00204810, 0x000 },
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+    { 0x00000000, 0xc0204400, 0x000 },
+    { 0x00000000, 0xc0404810, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x67c },
+    { 0x00000000, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x4c3 },
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+    { 0x00000000, 0xc0200000, 0x000 },
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+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000003, 0x00333e2f, 0x000 },
+    { 0x00000001, 0x00210221, 0x000 },
+    { 0x00000000, 0x14e00000, 0x4f3 },
+    { 0x0000002c, 0x00200a2d, 0x000 },
+    { 0x00040000, 0x18e00c11, 0x4e2 },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
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+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xd8c04800, 0x4d6 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000008, 0x00300a22, 0x000 },
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+    { 0x00000000, 0xc0204800, 0x000 },
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+    { 0x00000000, 0x00290c83, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
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+    { 0x00000008, 0x00300a22, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000011, 0x00210224, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000000, 0x00400000, 0x49d },
+    { 0x0000002c, 0xc0203620, 0x000 },
+    { 0x0000002d, 0xc0403620, 0x000 },
+    { 0x0000000f, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x4f8 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0xd9000000, 0x000 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0xb5000000, 0x00204411, 0x000 },
+    { 0x00002000, 0x00204811, 0x000 },
+    { 0xb6000000, 0x00204411, 0x000 },
+    { 0x0000a000, 0x00204811, 0x000 },
+    { 0xb7000000, 0x00204411, 0x000 },
+    { 0x0000c000, 0x00204811, 0x000 },
+    { 0xb8000000, 0x00204411, 0x000 },
+    { 0x0000f8e0, 0x00204811, 0x000 },
+    { 0xb9000000, 0x00204411, 0x000 },
+    { 0x0000f880, 0x00204811, 0x000 },
+    { 0xba000000, 0x00204411, 0x000 },
+    { 0x0000e000, 0x00204811, 0x000 },
+    { 0xbb000000, 0x00204411, 0x000 },
+    { 0x0000f000, 0x00204811, 0x000 },
+    { 0xbc000000, 0x00204411, 0x000 },
+    { 0x0000f3fc, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00204811, 0x000 },
+    { 0x000000ff, 0x00280e30, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x50c },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000000, 0x14c00000, 0x521 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000001c, 0x00203623, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000029, 0x00203623, 0x000 },
+    { 0x00000028, 0x00203623, 0x000 },
+    { 0x00000017, 0x00203623, 0x000 },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203623, 0x000 },
+    { 0x00000015, 0x00203623, 0x000 },
+    { 0x00000016, 0x00203623, 0x000 },
+    { 0xffffe000, 0x00200c11, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00200c11, 0x000 },
+    { 0x00000023, 0x00203623, 0x000 },
+    { 0x00000024, 0x00203623, 0x000 },
+    { 0xf1ffffff, 0x00283a2e, 0x000 },
+    { 0x0000001a, 0xc0220e20, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000002a, 0x40203620, 0x000 },
+    { 0x87000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000030, 0x00203623, 0x000 },
+    { 0x9d000000, 0x00204411, 0x000 },
+    { 0x0000001f, 0x40214a20, 0x000 },
+    { 0x96000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x00000000, 0xc0201000, 0x000 },
+    { 0x0000001f, 0x00211624, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x0000001d, 0x00203623, 0x000 },
+    { 0x00000003, 0x00281e23, 0x000 },
+    { 0x00000008, 0x00222223, 0x000 },
+    { 0xfffff000, 0x00282228, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x0000001f, 0x00203628, 0x000 },
+    { 0x00000018, 0x00211e23, 0x000 },
+    { 0x00000020, 0x00203627, 0x000 },
+    { 0x00000002, 0x00221624, 0x000 },
+    { 0x00000000, 0x003014a8, 0x000 },
+    { 0x0000001e, 0x00203625, 0x000 },
+    { 0x00000003, 0x00211a24, 0x000 },
+    { 0x10000000, 0x00281a26, 0x000 },
+    { 0xefffffff, 0x00283a2e, 0x000 },
+    { 0x00000000, 0x004938ce, 0x66a },
+    { 0x00000001, 0x40280a20, 0x000 },
+    { 0x00000006, 0x40280e20, 0x000 },
+    { 0x00000300, 0xc0281220, 0x000 },
+    { 0x00000008, 0x00211224, 0x000 },
+    { 0x00000000, 0xc0201620, 0x000 },
+    { 0x00000000, 0xc0201a20, 0x000 },
+    { 0x00000000, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x559 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x67c },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00020000, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x561 },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x56f },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x561 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x67c },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x56f },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x565 },
+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x56f },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x56d },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x681 },
+    { 0x00000000, 0x00401c10, 0x56f },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x571 },
+    { 0x00000000, 0x00600000, 0x5bc },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x582 },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x67c },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x580 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x593 },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x67c },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x591 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5a4 },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x67c },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5a2 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x67c },
+    { 0x0000001a, 0x00212230, 0x000 },
+    { 0x00000006, 0x00222630, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5b1 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5b7 },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5bc },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000002c, 0x00203621, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5c3 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000030, 0x00403621, 0x5d6 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5d6 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004a092, 0x00604411, 0x67c },
+    { 0x00000031, 0x00203630, 0x000 },
+    { 0x0004a093, 0x00604411, 0x67c },
+    { 0x00000032, 0x00203630, 0x000 },
+    { 0x0004a2b6, 0x00604411, 0x67c },
+    { 0x00000033, 0x00203630, 0x000 },
+    { 0x0004a2ba, 0x00604411, 0x67c },
+    { 0x00000034, 0x00203630, 0x000 },
+    { 0x0004a2be, 0x00604411, 0x67c },
+    { 0x00000035, 0x00203630, 0x000 },
+    { 0x0004a2c2, 0x00604411, 0x67c },
+    { 0x00000036, 0x00203630, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000001, 0x002f0230, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x61f },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x61f },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00007e00, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x5f8 },
+    { 0x0000a092, 0x00204411, 0x000 },
+    { 0x00000031, 0x00204a2d, 0x000 },
+    { 0x0000a093, 0x00204411, 0x000 },
+    { 0x00000032, 0x00204a2d, 0x000 },
+    { 0x0000a2b6, 0x00204411, 0x000 },
+    { 0x00000033, 0x00204a2d, 0x000 },
+    { 0x0000a2ba, 0x00204411, 0x000 },
+    { 0x00000034, 0x00204a2d, 0x000 },
+    { 0x0000a2be, 0x00204411, 0x000 },
+    { 0x00000035, 0x00204a2d, 0x000 },
+    { 0x0000a2c2, 0x00204411, 0x000 },
+    { 0x00000036, 0x00204a2d, 0x000 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x000001ff, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x61e },
+    { 0x00000000, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x601 },
+    { 0x0004a003, 0x00604411, 0x67c },
+    { 0x0000a003, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x14c00000, 0x606 },
+    { 0x0004a010, 0x00604411, 0x67c },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00000001, 0x00210621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x61e },
+    { 0x0004a011, 0x00604411, 0x67c },
+    { 0x0000a011, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a012, 0x00604411, 0x67c },
+    { 0x0000a012, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a013, 0x00604411, 0x67c },
+    { 0x0000a013, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a014, 0x00604411, 0x67c },
+    { 0x0000a014, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a015, 0x00604411, 0x67c },
+    { 0x0000a015, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a016, 0x00604411, 0x67c },
+    { 0x0000a016, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x0004a017, 0x00604411, 0x67c },
+    { 0x0000a017, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x0000002c, 0x0080062d, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x630 },
+    { 0x00000030, 0x0020062d, 0x000 },
+    { 0x00000002, 0x00280621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x62e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x67c },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x634 },
+    { 0x00000000, 0x00600000, 0x5bc },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x634 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x620 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x620 },
+    { 0x00000000, 0x00600000, 0x64d },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x67c },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x647 },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x36a },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x67c },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x67b },
+    { 0x00000010, 0x00404c11, 0x661 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x67a },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x67c },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x67f },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x681 },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x684 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x014204f5, 0x05b30250, 0x000 },
+    { 0x01c30168, 0x043505b3, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03cd05b3, 0x05b305b3, 0x000 },
+    { 0x063c063d, 0x031f05b3, 0x000 },
+    { 0x05b305b8, 0x03200340, 0x000 },
+    { 0x032a0282, 0x03420334, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x05b30544, 0x05b305b3, 0x000 },
+    { 0x03b205b3, 0x04ae0344, 0x000 },
+    { 0x048d0443, 0x043305b3, 0x000 },
+    { 0x04c305b3, 0x043704d0, 0x000 },
+    { 0x044304fa, 0x03510371, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x05b305b3, 0x063205ba, 0x000 },
+    { 0x05b305b3, 0x000705b3, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x03ee03e3, 0x03fe03fc, 0x000 },
+    { 0x04040400, 0x04020406, 0x000 },
+    { 0x0412040e, 0x041a0416, 0x000 },
+    { 0x0422041e, 0x042a0426, 0x000 },
+    { 0x05b305b3, 0x042e05b3, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x05b305b3, 0x05b305b3, 0x000 },
+    { 0x00020668, 0x06860006, 0x000 },
+};
+
+static const u32 RV670_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001b8,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581a8,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0fff0,
+0x042c04,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255403,
+0x7cd580,
+0x259c03,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800053,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xd48060,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001b8,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x800079,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x80008d,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401bb,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401bb,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001b8,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x8400f0,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x8400f0,
+0xcc1003,
+0x988017,
+0x043808,
+0x8400f0,
+0xcc1003,
+0x988013,
+0x043804,
+0x8400f0,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000c9,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001b8,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001b8,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800101,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482d9,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x9882bd,
+0x000000,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x9902b0,
+0x7c738b,
+0x8401bb,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984297,
+0x000000,
+0x800161,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001b8,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010171,
+0x020178,
+0x03008f,
+0x04007f,
+0x050003,
+0x06003f,
+0x070032,
+0x08012c,
+0x090046,
+0x0a0036,
+0x1001b6,
+0x1700a2,
+0x22013a,
+0x230149,
+0x2000b4,
+0x240125,
+0x27004d,
+0x28006a,
+0x2a0060,
+0x2b0052,
+0x2f0065,
+0x320087,
+0x34017f,
+0x3c0156,
+0x3f0072,
+0x41018c,
+0x44012e,
+0x550173,
+0x56017a,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RS780_cp_microcode[][3] = {
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x0000ffff, 0x00284621, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x00000000, 0x00e00000, 0x000 },
+    { 0x00010000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x622 },
+    { 0x00000000, 0x00600000, 0x5d1 },
+    { 0x00000000, 0x00600000, 0x5de },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000f00, 0x00281622, 0x000 },
+    { 0x00000008, 0x00211625, 0x000 },
+    { 0x00000018, 0x00203625, 0x000 },
+    { 0x8d000000, 0x00204411, 0x000 },
+    { 0x00000004, 0x002f0225, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x018 },
+    { 0x00412000, 0x00404811, 0x019 },
+    { 0x00422000, 0x00204811, 0x000 },
+    { 0x8e000000, 0x00204411, 0x000 },
+    { 0x00000028, 0x00204a2d, 0x000 },
+    { 0x90000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x0000000c, 0x00211622, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000019, 0x00211a22, 0x000 },
+    { 0x00000004, 0x00281a26, 0x000 },
+    { 0x00000000, 0x002914c5, 0x000 },
+    { 0x00000019, 0x00203625, 0x000 },
+    { 0x00000000, 0x003a1402, 0x000 },
+    { 0x00000016, 0x00211625, 0x000 },
+    { 0x00000003, 0x00281625, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0xfffffffc, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002914a3, 0x000 },
+    { 0x00000017, 0x00203625, 0x000 },
+    { 0x00008000, 0x00280e22, 0x000 },
+    { 0x00000007, 0x00220e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x20000000, 0x00280e22, 0x000 },
+    { 0x00000006, 0x00210e23, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x00000000, 0x00220222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x038 },
+    { 0x00000000, 0x2ee00000, 0x035 },
+    { 0x00000000, 0x2ce00000, 0x037 },
+    { 0x00000000, 0x00400e2d, 0x039 },
+    { 0x00000008, 0x00200e2d, 0x000 },
+    { 0x00000009, 0x0040122d, 0x046 },
+    { 0x00000001, 0x00400e2d, 0x039 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x03e },
+    { 0x00000008, 0x00401c11, 0x041 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x0000000f, 0x00281e27, 0x000 },
+    { 0x00000003, 0x00221e27, 0x000 },
+    { 0x7fc00000, 0x00281a23, 0x000 },
+    { 0x00000014, 0x00211a26, 0x000 },
+    { 0x00000001, 0x00331a26, 0x000 },
+    { 0x00000008, 0x00221a26, 0x000 },
+    { 0x00000000, 0x00290cc7, 0x000 },
+    { 0x00000027, 0x00203624, 0x000 },
+    { 0x00007f00, 0x00281221, 0x000 },
+    { 0x00001400, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x04b },
+    { 0x00000001, 0x00290e23, 0x000 },
+    { 0x0000000e, 0x00203623, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfff80000, 0x00294a23, 0x000 },
+    { 0x00000000, 0x003a2c02, 0x000 },
+    { 0x00000002, 0x00220e2b, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x0000000f, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00204a2d, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000029, 0x00200e2d, 0x000 },
+    { 0x060a0200, 0x00294a23, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14e00000, 0x061 },
+    { 0x00000000, 0x2ee00000, 0x05f },
+    { 0x00000000, 0x2ce00000, 0x05e },
+    { 0x00000000, 0x00400e2d, 0x062 },
+    { 0x00000001, 0x00400e2d, 0x062 },
+    { 0x0000000a, 0x00200e2d, 0x000 },
+    { 0x0000000b, 0x0040122d, 0x06a },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x003ffffc, 0x00281223, 0x000 },
+    { 0x00000002, 0x00221224, 0x000 },
+    { 0x7fc00000, 0x00281623, 0x000 },
+    { 0x00000014, 0x00211625, 0x000 },
+    { 0x00000001, 0x00331625, 0x000 },
+    { 0x80000000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00290ca3, 0x000 },
+    { 0x3ffffc00, 0x00290e23, 0x000 },
+    { 0x0000001f, 0x00211e23, 0x000 },
+    { 0x00000000, 0x14e00000, 0x06d },
+    { 0x00000100, 0x00401c11, 0x070 },
+    { 0x0000000d, 0x00201e2d, 0x000 },
+    { 0x000000f0, 0x00281e27, 0x000 },
+    { 0x00000004, 0x00221e27, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0xfffff0ff, 0x00281a30, 0x000 },
+    { 0x0000a028, 0x00204411, 0x000 },
+    { 0x00000000, 0x002948e6, 0x000 },
+    { 0x0000a018, 0x00204411, 0x000 },
+    { 0x3fffffff, 0x00284a23, 0x000 },
+    { 0x0000a010, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000030, 0x0020162d, 0x000 },
+    { 0x00000002, 0x00291625, 0x000 },
+    { 0x00000030, 0x00203625, 0x000 },
+    { 0x00000025, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a3, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x083 },
+    { 0x00000026, 0x0020162d, 0x000 },
+    { 0x00000000, 0x002f00a4, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x084 },
+    { 0x00000000, 0x00400000, 0x08a },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203624, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x08a },
+    { 0x00000000, 0x00600000, 0x5ff },
+    { 0x00000000, 0x00600000, 0x5f3 },
+    { 0x00000002, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x08d },
+    { 0x00000012, 0xc0403620, 0x093 },
+    { 0x00000000, 0x2ee00000, 0x091 },
+    { 0x00000000, 0x2ce00000, 0x090 },
+    { 0x00000002, 0x00400e2d, 0x092 },
+    { 0x00000003, 0x00400e2d, 0x092 },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000012, 0x00203623, 0x000 },
+    { 0x00000003, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x098 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x0a0 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x2ee00000, 0x09e },
+    { 0x00000000, 0x2ce00000, 0x09d },
+    { 0x00000002, 0x00400e2d, 0x09f },
+    { 0x00000003, 0x00400e2d, 0x09f },
+    { 0x0000000c, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x003f0000, 0x00280e23, 0x000 },
+    { 0x00000010, 0x00210e23, 0x000 },
+    { 0x00000011, 0x00203623, 0x000 },
+    { 0x0000001e, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0a7 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x0000001f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0aa },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000008, 0x00210e2b, 0x000 },
+    { 0x0000007f, 0x00280e23, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0e1 },
+    { 0x00000000, 0x27000000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x0b3 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000000c, 0x00221e30, 0x000 },
+    { 0x99800000, 0x00204411, 0x000 },
+    { 0x00000004, 0x0020122d, 0x000 },
+    { 0x00000008, 0x00221224, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00291ce4, 0x000 },
+    { 0x00000000, 0x00604807, 0x12f },
+    { 0x9b000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x9c000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x0033146f, 0x000 },
+    { 0x00000001, 0x00333e23, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x00000000, 0x00203c05, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e007, 0x00204411, 0x000 },
+    { 0x0000000f, 0x0021022b, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0cb },
+    { 0x00f8ff08, 0x00204811, 0x000 },
+    { 0x98000000, 0x00404811, 0x0dc },
+    { 0x000000f0, 0x00280e22, 0x000 },
+    { 0x000000a0, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x0da },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d5 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0d4 },
+    { 0x00003f00, 0x00400c11, 0x0d6 },
+    { 0x00001f00, 0x00400c11, 0x0d6 },
+    { 0x00000f00, 0x00200c11, 0x000 },
+    { 0x00380009, 0x00294a23, 0x000 },
+    { 0x3f000000, 0x00280e2b, 0x000 },
+    { 0x00000002, 0x00220e23, 0x000 },
+    { 0x00000007, 0x00494a23, 0x0dc },
+    { 0x00380f09, 0x00204811, 0x000 },
+    { 0x68000007, 0x00204811, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000a202, 0x00204411, 0x000 },
+    { 0x00ff0000, 0x00280e22, 0x000 },
+    { 0x00000080, 0x00294a23, 0x000 },
+    { 0x00000027, 0x00200e2d, 0x000 },
+    { 0x00000026, 0x0020122d, 0x000 },
+    { 0x00000000, 0x002f0083, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x0ea },
+    { 0x00000000, 0x00600000, 0x5f9 },
+    { 0x00000000, 0x00400000, 0x0eb },
+    { 0x00000000, 0x00600000, 0x5fc },
+    { 0x00000007, 0x0020222d, 0x000 },
+    { 0x00000005, 0x00220e22, 0x000 },
+    { 0x00100000, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000000, 0x003a0c02, 0x000 },
+    { 0x000000ef, 0x00280e23, 0x000 },
+    { 0x00000000, 0x00292068, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000003, 0x00210223, 0x000 },
+    { 0x00000000, 0x14e00000, 0x0f8 },
+    { 0x0000000b, 0x00210228, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0f8 },
+    { 0x00000400, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000001c, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x0fd },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000001e, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x10b },
+    { 0x0000a30f, 0x00204411, 0x000 },
+    { 0x00000011, 0x00200e2d, 0x000 },
+    { 0x00000001, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x104 },
+    { 0xffffffff, 0x00404811, 0x10b },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x107 },
+    { 0x0000ffff, 0x00404811, 0x10b },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x10a },
+    { 0x000000ff, 0x00404811, 0x10b },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0002c400, 0x00204411, 0x000 },
+    { 0x0000001f, 0x00210e22, 0x000 },
+    { 0x00000000, 0x14c00000, 0x112 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000018, 0x40224a20, 0x000 },
+    { 0x00000010, 0xc0424a20, 0x114 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x00000013, 0x00203623, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000000a, 0x00201011, 0x000 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x11b },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00531224, 0x117 },
+    { 0xffbfffff, 0x00283a2e, 0x000 },
+    { 0x0000001b, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x12e },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000d, 0x00204811, 0x000 },
+    { 0x00000018, 0x00220e30, 0x000 },
+    { 0xfc000000, 0x00280e23, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x00000000, 0x00201010, 0x000 },
+    { 0x0000e00e, 0x00204411, 0x000 },
+    { 0x07f8ff08, 0x00204811, 0x000 },
+    { 0x00000000, 0x00294a23, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a24, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x00800000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204806, 0x000 },
+    { 0x00000008, 0x00214a27, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x622 },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x621 },
+    { 0x00000004, 0x00404c11, 0x135 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000001c, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x622 },
+    { 0x00000011, 0x00210230, 0x000 },
+    { 0x00000000, 0x14e00000, 0x13c },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40280620, 0x000 },
+    { 0x00000010, 0xc0210a20, 0x000 },
+    { 0x00000000, 0x00341461, 0x000 },
+    { 0x00000000, 0x00741882, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x147 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x160 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0681a20, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x158 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000001, 0x00300a2f, 0x000 },
+    { 0x00000001, 0x00210a22, 0x000 },
+    { 0x00000003, 0x00384a22, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600000, 0x18f },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00202c08, 0x000 },
+    { 0x00000000, 0x00202411, 0x000 },
+    { 0x00000000, 0x00202811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00221e29, 0x000 },
+    { 0x00000000, 0x007048eb, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000001, 0x40330620, 0x000 },
+    { 0x00000000, 0xc0302409, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x181 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x186 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x186 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000001, 0x00530621, 0x182 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0604800, 0x197 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000011, 0x0020062d, 0x000 },
+    { 0x00000000, 0x0078042a, 0x2fb },
+    { 0x00000000, 0x00202809, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x174 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x194 },
+    { 0x00000015, 0xc0203620, 0x000 },
+    { 0x00000016, 0xc0203620, 0x000 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x46000000, 0x00600811, 0x1b2 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x19b },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00804811, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000ffff, 0x40281620, 0x000 },
+    { 0x00000010, 0xc0811a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x00000008, 0x00221e30, 0x000 },
+    { 0x00000029, 0x00201a2d, 0x000 },
+    { 0x0000e000, 0x00204411, 0x000 },
+    { 0xfffbff09, 0x00204811, 0x000 },
+    { 0x0000000f, 0x0020222d, 0x000 },
+    { 0x00001fff, 0x00294a28, 0x000 },
+    { 0x00000006, 0x0020222d, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000100, 0x00201811, 0x000 },
+    { 0x00000008, 0x00621e28, 0x12f },
+    { 0x00000008, 0x00822228, 0x000 },
+    { 0x0002c000, 0x00204411, 0x000 },
+    { 0x00000015, 0x00600e2d, 0x1bd },
+    { 0x00000016, 0x00600e2d, 0x1bd },
+    { 0x0000c008, 0x00204411, 0x000 },
+    { 0x00000017, 0x00200e2d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x1b9 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x39000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00804802, 0x000 },
+    { 0x00000018, 0x00202e2d, 0x000 },
+    { 0x00000000, 0x003b0d63, 0x000 },
+    { 0x00000008, 0x00224a23, 0x000 },
+    { 0x00000010, 0x00224a23, 0x000 },
+    { 0x00000018, 0x00224a23, 0x000 },
+    { 0x00000000, 0x00804803, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00000007, 0x0021062f, 0x000 },
+    { 0x00000013, 0x00200a2d, 0x000 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000ffff, 0x40282220, 0x000 },
+    { 0x0000000f, 0x00262228, 0x000 },
+    { 0x00000010, 0x40212620, 0x000 },
+    { 0x0000000f, 0x00262629, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1e0 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000081, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000080, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1dc },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1d8 },
+    { 0x00000001, 0x00202c11, 0x000 },
+    { 0x0000001f, 0x00280a22, 0x000 },
+    { 0x0000001f, 0x00282a2a, 0x000 },
+    { 0x00000001, 0x00530621, 0x1d1 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000002, 0x00304a2f, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000001, 0x00301e2f, 0x000 },
+    { 0x00000000, 0x002f0227, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x00600000, 0x1e9 },
+    { 0x00000001, 0x00531e27, 0x1e5 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x0000000f, 0x00260e23, 0x000 },
+    { 0x00000010, 0xc0211220, 0x000 },
+    { 0x0000000f, 0x00261224, 0x000 },
+    { 0x00000000, 0x00201411, 0x000 },
+    { 0x00000000, 0x00601811, 0x2bb },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022b, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x1f8 },
+    { 0x00000010, 0x00221628, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a29, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x0020480a, 0x000 },
+    { 0x00000000, 0x00202c11, 0x000 },
+    { 0x00000010, 0x00221623, 0x000 },
+    { 0xffff0000, 0x00281625, 0x000 },
+    { 0x0000ffff, 0x00281a24, 0x000 },
+    { 0x00000000, 0x002948c5, 0x000 },
+    { 0x00000000, 0x00731503, 0x205 },
+    { 0x00000000, 0x00201805, 0x000 },
+    { 0x00000000, 0x00731524, 0x205 },
+    { 0x00000000, 0x002d14c5, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00202802, 0x000 },
+    { 0x00000000, 0x00202003, 0x000 },
+    { 0x00000000, 0x00802404, 0x000 },
+    { 0x0000000f, 0x00210225, 0x000 },
+    { 0x00000000, 0x14c00000, 0x621 },
+    { 0x00000000, 0x002b1405, 0x000 },
+    { 0x00000001, 0x00901625, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001a, 0x00294a22, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00384a21, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000ffff, 0x40281220, 0x000 },
+    { 0x00000010, 0xc0211a20, 0x000 },
+    { 0x0000ffff, 0x40280e20, 0x000 },
+    { 0x00000010, 0xc0211620, 0x000 },
+    { 0x00000000, 0x00741465, 0x2bb },
+    { 0x0001a1fd, 0x00604411, 0x2e0 },
+    { 0x00000001, 0x00330621, 0x000 },
+    { 0x00000000, 0x002f0221, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x219 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x212 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x5de },
+    { 0x00000000, 0x0040040f, 0x213 },
+    { 0x00000000, 0x00600000, 0x5d1 },
+    { 0x00000000, 0x00600000, 0x5de },
+    { 0x00000210, 0x00600411, 0x315 },
+    { 0x00000000, 0x00600000, 0x1a0 },
+    { 0x00000000, 0x00600000, 0x19c },
+    { 0x00000000, 0x00600000, 0x2bb },
+    { 0x00000000, 0x00600000, 0x2a3 },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204808, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x232 },
+    { 0x00000000, 0x00600000, 0x13a },
+    { 0x00000000, 0x00400000, 0x236 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x236 },
+    { 0x00000000, 0xc0404800, 0x233 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000016, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00204411, 0x000 },
+    { 0x00000000, 0x00600411, 0x2fb },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000000, 0x00600000, 0x5d1 },
+    { 0x0000a00c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000018, 0x40210a20, 0x000 },
+    { 0x00000003, 0x002f0222, 0x000 },
+    { 0x00000000, 0x0ae00000, 0x24c },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x00080101, 0x00292228, 0x000 },
+    { 0x00000014, 0x00203628, 0x000 },
+    { 0x0000a30c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0404800, 0x251 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000010, 0x00600411, 0x315 },
+    { 0x3f800000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00000000, 0x00600000, 0x27c },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000001, 0x00211e27, 0x000 },
+    { 0x00000000, 0x14e00000, 0x26a },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x0000ffff, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00341c27, 0x000 },
+    { 0x00000000, 0x12c00000, 0x25f },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e5, 0x000 },
+    { 0x00000000, 0x08c00000, 0x262 },
+    { 0x00000000, 0x00201407, 0x000 },
+    { 0x00000012, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00211e27, 0x000 },
+    { 0x00000000, 0x00341c47, 0x000 },
+    { 0x00000000, 0x12c00000, 0x267 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x08c00000, 0x26a },
+    { 0x00000000, 0x00201807, 0x000 },
+    { 0x00000000, 0x00600000, 0x2c1 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x00000000, 0x00342023, 0x000 },
+    { 0x00000000, 0x12c00000, 0x272 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x271 },
+    { 0x00000016, 0x00404811, 0x276 },
+    { 0x00000018, 0x00404811, 0x276 },
+    { 0x00000000, 0x00342044, 0x000 },
+    { 0x00000000, 0x12c00000, 0x275 },
+    { 0x00000017, 0x00404811, 0x276 },
+    { 0x00000019, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0x00604411, 0x2e9 },
+    { 0x00003fff, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x256 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x00000010, 0x40210620, 0x000 },
+    { 0x0000ffff, 0xc0280a20, 0x000 },
+    { 0x00000010, 0x40210e20, 0x000 },
+    { 0x0000ffff, 0xc0281220, 0x000 },
+    { 0x00000010, 0x40211620, 0x000 },
+    { 0x0000ffff, 0xc0881a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00042004, 0x00604411, 0x622 },
+    { 0x00000000, 0x00600000, 0x5d1 },
+    { 0x00000000, 0xc0600000, 0x2a3 },
+    { 0x00000005, 0x00200a2d, 0x000 },
+    { 0x00000008, 0x00220a22, 0x000 },
+    { 0x0000002b, 0x00201a2d, 0x000 },
+    { 0x0000001c, 0x00201e2d, 0x000 },
+    { 0x00007000, 0x00281e27, 0x000 },
+    { 0x00000000, 0x00311ce6, 0x000 },
+    { 0x0000002a, 0x00201a2d, 0x000 },
+    { 0x0000000c, 0x00221a26, 0x000 },
+    { 0x00000000, 0x002f00e6, 0x000 },
+    { 0x00000000, 0x06e00000, 0x292 },
+    { 0x00000000, 0x00201c11, 0x000 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000010, 0x00201811, 0x000 },
+    { 0x00000000, 0x00691ce2, 0x12f },
+    { 0x93800000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x95000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x002f022f, 0x000 },
+    { 0x00000000, 0x0ce00000, 0x29d },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00000000, 0xd9004800, 0x000 },
+    { 0x92000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000001c, 0x00403627, 0x000 },
+    { 0x0000000c, 0xc0220a20, 0x000 },
+    { 0x00000029, 0x00203622, 0x000 },
+    { 0x00000028, 0xc0403620, 0x000 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000009, 0x00204811, 0x000 },
+    { 0xa1000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00804811, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce3, 0x000 },
+    { 0x00000021, 0x00203627, 0x000 },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002c1ce4, 0x000 },
+    { 0x00000022, 0x00203627, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a3, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x00000000, 0x002d1d07, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203624, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000023, 0x00203627, 0x000 },
+    { 0x00000000, 0x00311cc4, 0x000 },
+    { 0x00000024, 0x00803627, 0x000 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14c00000, 0x2dc },
+    { 0x00000000, 0x00400000, 0x2d9 },
+    { 0x0000001a, 0x00203627, 0x000 },
+    { 0x0000001b, 0x00203628, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000002, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2d9 },
+    { 0x00000003, 0x00210227, 0x000 },
+    { 0x00000000, 0x14e00000, 0x2dc },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e1, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120a1, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000024, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x002e00e2, 0x000 },
+    { 0x00000000, 0x02c00000, 0x2dc },
+    { 0x00000022, 0x00201e2d, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x00000000, 0x002e00e8, 0x000 },
+    { 0x00000000, 0x06c00000, 0x2dc },
+    { 0x00000000, 0x00600000, 0x5ff },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2b5 },
+    { 0x00000000, 0x00600000, 0x5f6 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x00000000, 0x00600000, 0x2a7 },
+    { 0x00000000, 0x00400000, 0x2de },
+    { 0x0000001a, 0x00201e2d, 0x000 },
+    { 0x0000001b, 0x0080222d, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000000, 0x00311ca1, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294847, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e21, 0x000 },
+    { 0x00000000, 0x003120c2, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00311ca3, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294887, 0x000 },
+    { 0x00000001, 0x00220a21, 0x000 },
+    { 0x00000000, 0x003008a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000010, 0x00221e23, 0x000 },
+    { 0x00000000, 0x003120c4, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x003808c5, 0x000 },
+    { 0x00000000, 0x00300841, 0x000 },
+    { 0x00000001, 0x00220a22, 0x000 },
+    { 0x00000000, 0x003308a2, 0x000 },
+    { 0x00000010, 0x00221e22, 0x000 },
+    { 0x00000010, 0x00212222, 0x000 },
+    { 0x00000000, 0x00894907, 0x000 },
+    { 0x00000017, 0x0020222d, 0x000 },
+    { 0x00000000, 0x14c00000, 0x318 },
+    { 0xffffffef, 0x00280621, 0x000 },
+    { 0x00000014, 0x0020222d, 0x000 },
+    { 0x0000f8e0, 0x00204411, 0x000 },
+    { 0x00000000, 0x00294901, 0x000 },
+    { 0x00000000, 0x00894901, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x060a0200, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0204811, 0x000 },
+    { 0x8a000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x00a0000a, 0x000 },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200400, 0x000 },
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+    { 0x00000000, 0x00600000, 0x5de },
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+    { 0x00000000, 0x0ce00000, 0x000 },
+    { 0x00000000, 0x40204800, 0x000 },
+    { 0x00000001, 0x40304a20, 0x000 },
+    { 0x00000002, 0xc0304a20, 0x000 },
+    { 0x00000001, 0x00530a22, 0x355 },
+    { 0x0000003f, 0xc0280a20, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000001, 0x00331a26, 0x000 },
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+    { 0x00000000, 0x0cc00000, 0x376 },
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+    { 0x00000000, 0x00404802, 0x000 },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000000, 0x00204802, 0x000 },
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+    { 0x00000000, 0x14e00000, 0x3ce },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x00000001, 0x00204811, 0x000 },
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+    { 0x80000000, 0x40280e20, 0x000 },
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+    { 0x00000001, 0x002f0222, 0x000 },
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+    { 0x00000000, 0xc0604800, 0x627 },
+    { 0x00000000, 0x00400000, 0x4cf },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00040000, 0xc0294620, 0x000 },
+    { 0x00000000, 0xc0600000, 0x622 },
+    { 0x00000001, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x4d6 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00404811, 0x000 },
+    { 0x00000000, 0xc0204400, 0x000 },
+    { 0x00000000, 0xc0404810, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x000021f8, 0x00204411, 0x000 },
+    { 0x0000000e, 0x00204811, 0x000 },
+    { 0x000421f9, 0x00604411, 0x622 },
+    { 0x00000000, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x4d8 },
+    { 0x00002180, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000003, 0x00333e2f, 0x000 },
+    { 0x00000001, 0x00210221, 0x000 },
+    { 0x00000000, 0x14e00000, 0x508 },
+    { 0x0000002c, 0x00200a2d, 0x000 },
+    { 0x00040000, 0x18e00c11, 0x4f7 },
+    { 0x00000001, 0x00333e2f, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000008, 0x00300a22, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000008, 0x00300a22, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xd8c04800, 0x4eb },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000008, 0x00300a22, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000002d, 0x0020122d, 0x000 },
+    { 0x00000000, 0x00290c83, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204802, 0x000 },
+    { 0x00000000, 0x00204803, 0x000 },
+    { 0x00000008, 0x00300a22, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000011, 0x00210224, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000000, 0x00400000, 0x4b2 },
+    { 0x0000002c, 0xc0203620, 0x000 },
+    { 0x0000002d, 0xc0403620, 0x000 },
+    { 0x0000000f, 0x00210221, 0x000 },
+    { 0x00000000, 0x14c00000, 0x50d },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00000000, 0xd9000000, 0x000 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0xb5000000, 0x00204411, 0x000 },
+    { 0x00002000, 0x00204811, 0x000 },
+    { 0xb6000000, 0x00204411, 0x000 },
+    { 0x0000a000, 0x00204811, 0x000 },
+    { 0xb7000000, 0x00204411, 0x000 },
+    { 0x0000c000, 0x00204811, 0x000 },
+    { 0xb8000000, 0x00204411, 0x000 },
+    { 0x0000f8e0, 0x00204811, 0x000 },
+    { 0xb9000000, 0x00204411, 0x000 },
+    { 0x0000f880, 0x00204811, 0x000 },
+    { 0xba000000, 0x00204411, 0x000 },
+    { 0x0000e000, 0x00204811, 0x000 },
+    { 0xbb000000, 0x00204411, 0x000 },
+    { 0x0000f000, 0x00204811, 0x000 },
+    { 0xbc000000, 0x00204411, 0x000 },
+    { 0x0000f3fc, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000002, 0x00204811, 0x000 },
+    { 0x000000ff, 0x00280e30, 0x000 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x521 },
+    { 0x00000000, 0xc0200800, 0x000 },
+    { 0x00000000, 0x14c00000, 0x536 },
+    { 0x00000000, 0x00200c11, 0x000 },
+    { 0x0000001c, 0x00203623, 0x000 },
+    { 0x0000002b, 0x00203623, 0x000 },
+    { 0x00000029, 0x00203623, 0x000 },
+    { 0x00000028, 0x00203623, 0x000 },
+    { 0x00000017, 0x00203623, 0x000 },
+    { 0x00000025, 0x00203623, 0x000 },
+    { 0x00000026, 0x00203623, 0x000 },
+    { 0x00000015, 0x00203623, 0x000 },
+    { 0x00000016, 0x00203623, 0x000 },
+    { 0xffffe000, 0x00200c11, 0x000 },
+    { 0x00000021, 0x00203623, 0x000 },
+    { 0x00000022, 0x00203623, 0x000 },
+    { 0x00001fff, 0x00200c11, 0x000 },
+    { 0x00000023, 0x00203623, 0x000 },
+    { 0x00000024, 0x00203623, 0x000 },
+    { 0xf1ffffff, 0x00283a2e, 0x000 },
+    { 0x0000001a, 0xc0220e20, 0x000 },
+    { 0x00000000, 0x0029386e, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000006, 0x00204811, 0x000 },
+    { 0x0000002a, 0x40203620, 0x000 },
+    { 0x87000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0x9d000000, 0x00204411, 0x000 },
+    { 0x0000001f, 0x40214a20, 0x000 },
+    { 0x96000000, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0200c00, 0x000 },
+    { 0x00000000, 0xc0201000, 0x000 },
+    { 0x0000001f, 0x00211624, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x0000001d, 0x00203623, 0x000 },
+    { 0x00000003, 0x00281e23, 0x000 },
+    { 0x00000008, 0x00222223, 0x000 },
+    { 0xfffff000, 0x00282228, 0x000 },
+    { 0x00000000, 0x002920e8, 0x000 },
+    { 0x0000001f, 0x00203628, 0x000 },
+    { 0x00000018, 0x00211e23, 0x000 },
+    { 0x00000020, 0x00203627, 0x000 },
+    { 0x00000002, 0x00221624, 0x000 },
+    { 0x00000000, 0x003014a8, 0x000 },
+    { 0x0000001e, 0x00203625, 0x000 },
+    { 0x00000003, 0x00211a24, 0x000 },
+    { 0x10000000, 0x00281a26, 0x000 },
+    { 0xefffffff, 0x00283a2e, 0x000 },
+    { 0x00000000, 0x004938ce, 0x610 },
+    { 0x00000001, 0x40280a20, 0x000 },
+    { 0x00000006, 0x40280e20, 0x000 },
+    { 0x00000300, 0xc0281220, 0x000 },
+    { 0x00000008, 0x00211224, 0x000 },
+    { 0x00000000, 0xc0201620, 0x000 },
+    { 0x00000000, 0xc0201a20, 0x000 },
+    { 0x00000000, 0x00210222, 0x000 },
+    { 0x00000000, 0x14c00000, 0x56c },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x622 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00020000, 0x00294a26, 0x000 },
+    { 0x00000000, 0x00204810, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x574 },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x582 },
+    { 0x00000002, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x574 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00002258, 0x00300a24, 0x000 },
+    { 0x00040000, 0x00694622, 0x622 },
+    { 0x00000000, 0xc0201c10, 0x000 },
+    { 0x00000000, 0xc0400000, 0x582 },
+    { 0x00000000, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x578 },
+    { 0x00000000, 0xc0201c00, 0x000 },
+    { 0x00000000, 0xc0400000, 0x582 },
+    { 0x00000004, 0x002f0223, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x580 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x0000216d, 0x00204411, 0x000 },
+    { 0x00000000, 0xc0204800, 0x000 },
+    { 0x00000000, 0xc0604800, 0x627 },
+    { 0x00000000, 0x00401c10, 0x582 },
+    { 0x00000000, 0xc0200000, 0x000 },
+    { 0x00000000, 0xc0400000, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x584 },
+    { 0x00000000, 0x00600000, 0x5c3 },
+    { 0x00000000, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x592 },
+    { 0x0000a2b7, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x00000033, 0x0020262d, 0x000 },
+    { 0x0000001a, 0x00212229, 0x000 },
+    { 0x00000006, 0x00222629, 0x000 },
+    { 0x0000a2c4, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x590 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d1, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000001, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5a0 },
+    { 0x0000a2bb, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x00000034, 0x0020262d, 0x000 },
+    { 0x0000001a, 0x00212229, 0x000 },
+    { 0x00000006, 0x00222629, 0x000 },
+    { 0x0000a2c5, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x59e },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d2, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x00000002, 0x002f0224, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x5ae },
+    { 0x0000a2bf, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x00000035, 0x0020262d, 0x000 },
+    { 0x0000001a, 0x00212229, 0x000 },
+    { 0x00000006, 0x00222629, 0x000 },
+    { 0x0000a2c6, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5ac },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d3, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x0000a2c3, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204807, 0x000 },
+    { 0x00000036, 0x0020262d, 0x000 },
+    { 0x0000001a, 0x00212229, 0x000 },
+    { 0x00000006, 0x00222629, 0x000 },
+    { 0x0000a2c7, 0x00204411, 0x000 },
+    { 0x00000000, 0x003048e9, 0x000 },
+    { 0x00000000, 0x00e00000, 0x5b8 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404808, 0x000 },
+    { 0x0000a2d4, 0x00204411, 0x000 },
+    { 0x00000001, 0x00504a28, 0x000 },
+    { 0x85000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0x0000304a, 0x00204411, 0x000 },
+    { 0x01000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x00400000, 0x5be },
+    { 0xa4000000, 0xc0204411, 0x000 },
+    { 0x00000000, 0xc0404800, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5c3 },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x0000003f, 0x00204811, 0x000 },
+    { 0x00000005, 0x00204811, 0x000 },
+    { 0x0000a1f4, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x88000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0xff000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x00000002, 0x00804811, 0x000 },
+    { 0x00000000, 0x0ee00000, 0x5d6 },
+    { 0x00001000, 0x00200811, 0x000 },
+    { 0x0000002b, 0x00203622, 0x000 },
+    { 0x00000000, 0x00600000, 0x5da },
+    { 0x00000000, 0x00600000, 0x5c3 },
+    { 0x98000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00804811, 0x000 },
+    { 0x00000000, 0xc0600000, 0x5da },
+    { 0x00000000, 0xc0400400, 0x001 },
+    { 0x0000a2a4, 0x00204411, 0x000 },
+    { 0x00000022, 0x00204811, 0x000 },
+    { 0x89000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00404811, 0x5cd },
+    { 0x97000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x8a000000, 0x00204411, 0x000 },
+    { 0x00000000, 0x00404811, 0x5cd },
+    { 0x00000000, 0x00600000, 0x5f3 },
+    { 0x0001a2a4, 0xc0204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x374 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x09800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x0004217f, 0x00604411, 0x622 },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x000 },
+    { 0x00000004, 0x00404c11, 0x5ed },
+    { 0x00000000, 0x00400000, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000004, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffffb, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0x00000008, 0x00291e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x00000017, 0x00201e2d, 0x000 },
+    { 0xfffffff7, 0x00281e27, 0x000 },
+    { 0x00000017, 0x00803627, 0x000 },
+    { 0x0001a2a4, 0x00204411, 0x000 },
+    { 0x00000016, 0x00604811, 0x374 },
+    { 0x00002010, 0x00204411, 0x000 },
+    { 0x00010000, 0x00204811, 0x000 },
+    { 0x0000217c, 0x00204411, 0x000 },
+    { 0x01800000, 0x00204811, 0x000 },
+    { 0xffffffff, 0x00204811, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000000, 0x17000000, 0x000 },
+    { 0x81000000, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0004217f, 0x00604411, 0x622 },
+    { 0x0000001f, 0x00210230, 0x000 },
+    { 0x00000000, 0x14c00000, 0x621 },
+    { 0x00000010, 0x00404c11, 0x607 },
+    { 0x00000000, 0xc0200400, 0x000 },
+    { 0x00000000, 0x38c00000, 0x000 },
+    { 0x0000001d, 0x00200a2d, 0x000 },
+    { 0x0000001e, 0x00200e2d, 0x000 },
+    { 0x0000001f, 0x0020122d, 0x000 },
+    { 0x00000020, 0x0020162d, 0x000 },
+    { 0x00002169, 0x00204411, 0x000 },
+    { 0x00000000, 0x00204804, 0x000 },
+    { 0x00000000, 0x00204805, 0x000 },
+    { 0x00000000, 0x00204801, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000004, 0x00301224, 0x000 },
+    { 0x00000000, 0x002f0064, 0x000 },
+    { 0x00000000, 0x0cc00000, 0x620 },
+    { 0x00000003, 0x00281a22, 0x000 },
+    { 0x00000008, 0x00221222, 0x000 },
+    { 0xfffff000, 0x00281224, 0x000 },
+    { 0x00000000, 0x002910c4, 0x000 },
+    { 0x0000001f, 0x00403624, 0x000 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x622 },
+    { 0x9f000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x625 },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x1ac00000, 0x627 },
+    { 0x9e000000, 0x00204411, 0x000 },
+    { 0xcafebabe, 0x00204811, 0x000 },
+    { 0x00000000, 0x1ae00000, 0x62a },
+    { 0x00000000, 0x00800000, 0x000 },
+    { 0x00000000, 0x00600000, 0x00b },
+    { 0x00001000, 0x00600411, 0x315 },
+    { 0x00000000, 0x00200411, 0x000 },
+    { 0x00000000, 0x00600811, 0x1b2 },
+    { 0x0000225c, 0x00204411, 0x000 },
+    { 0x00000003, 0x00204811, 0x000 },
+    { 0x00002256, 0x00204411, 0x000 },
+    { 0x0000001b, 0x00204811, 0x000 },
+    { 0x0000a1fc, 0x00204411, 0x000 },
+    { 0x00000001, 0x00204811, 0x000 },
+    { 0x0001a1fd, 0xc0204411, 0x000 },
+    { 0x00000021, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000024, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000022, 0x0020222d, 0x000 },
+    { 0x0000ffff, 0x00282228, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00204811, 0x000 },
+    { 0x00000023, 0x00201e2d, 0x000 },
+    { 0x00000010, 0x00221e27, 0x000 },
+    { 0x00000000, 0x00294907, 0x000 },
+    { 0x00000000, 0x00404811, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x00000000, 0x00000000, 0x000 },
+    { 0x0142050a, 0x05ba0250, 0x000 },
+    { 0x01c30168, 0x044105ba, 0x000 },
+    { 0x02250209, 0x02500151, 0x000 },
+    { 0x02230245, 0x02a00241, 0x000 },
+    { 0x03d705ba, 0x05ba05ba, 0x000 },
+    { 0x05e205e3, 0x031f05ba, 0x000 },
+    { 0x032005bf, 0x0320034a, 0x000 },
+    { 0x03340282, 0x034c033e, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x05ba0557, 0x05ba032a, 0x000 },
+    { 0x03bc05ba, 0x04c3034e, 0x000 },
+    { 0x04a20455, 0x043f05ba, 0x000 },
+    { 0x04d805ba, 0x044304e5, 0x000 },
+    { 0x0455050f, 0x035b037b, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x05ba05ba, 0x05d805c1, 0x000 },
+    { 0x05ba05ba, 0x000705ba, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x03f803ed, 0x04080406, 0x000 },
+    { 0x040e040a, 0x040c0410, 0x000 },
+    { 0x041c0418, 0x04240420, 0x000 },
+    { 0x042c0428, 0x04340430, 0x000 },
+    { 0x05ba05ba, 0x043a0438, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x05ba05ba, 0x05ba05ba, 0x000 },
+    { 0x0002060e, 0x062c0006, 0x000 },
+};
+
+static const u32 RS780_pfp_microcode[] = {
+0xca0400,
+0xa00000,
+0x7e828b,
+0x7c038b,
+0x8001db,
+0x7c038b,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xc41838,
+0xca2400,
+0xca2800,
+0x9581cb,
+0xc41c3a,
+0xc3c000,
+0xca0800,
+0xca0c00,
+0x7c744b,
+0xc20005,
+0x99c000,
+0xc41c3a,
+0x7c744c,
+0xc0ffe0,
+0x042c08,
+0x309002,
+0x7d2500,
+0x351402,
+0x7d350b,
+0x255407,
+0x7cd580,
+0x259c07,
+0x95c004,
+0xd5001b,
+0x7eddc1,
+0x7d9d80,
+0xd6801b,
+0xd5801b,
+0xd4401e,
+0xd5401e,
+0xd6401e,
+0xd6801e,
+0xd4801e,
+0xd4c01e,
+0x9783d3,
+0xd5c01e,
+0xca0800,
+0x80001a,
+0xca0c00,
+0xe4011e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xe4013e,
+0xd4001e,
+0x80000c,
+0xc41838,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0xca0c00,
+0x8001db,
+0xd48024,
+0xca0800,
+0x7c00c0,
+0xc81425,
+0xc81824,
+0x7c9488,
+0x7c9880,
+0xc20003,
+0xd40075,
+0x7c744c,
+0x800064,
+0xd4401e,
+0xca1800,
+0xd4401e,
+0xd5801e,
+0x800062,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xe2001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xd40075,
+0xd4401e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd48019,
+0xd4c018,
+0xd50017,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c01,
+0xd48060,
+0x94c003,
+0x041001,
+0x041002,
+0xd50025,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xd48061,
+0xd4401e,
+0x800000,
+0xd4801e,
+0xca0800,
+0xca0c00,
+0xd4401e,
+0xd48016,
+0xd4c016,
+0xd4801e,
+0x8001db,
+0xd4c01e,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x948004,
+0xca1400,
+0xe420f3,
+0xd42013,
+0xd56065,
+0xd4e01c,
+0xd5201c,
+0xd5601c,
+0x800000,
+0x062001,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9483f7,
+0xca1400,
+0xe420f3,
+0x80009c,
+0xd42013,
+0xc60843,
+0xca0c00,
+0xca1000,
+0x9883ef,
+0xca1400,
+0xd40064,
+0x8000b0,
+0x000000,
+0xc41432,
+0xc61843,
+0xc4082f,
+0x954005,
+0xc40c30,
+0xd4401e,
+0x800000,
+0xee001e,
+0x9583f5,
+0xc41031,
+0xd44033,
+0xd52065,
+0xd4a01c,
+0xd4e01c,
+0xd5201c,
+0xe4015e,
+0xd4001e,
+0x800000,
+0x062001,
+0xca1800,
+0x0a2001,
+0xd60076,
+0xc40836,
+0x988007,
+0xc61045,
+0x950110,
+0xd4001f,
+0xd46062,
+0x800000,
+0xd42062,
+0xcc3835,
+0xcc1433,
+0x8401de,
+0xd40072,
+0xd5401e,
+0x800000,
+0xee001e,
+0xe2001a,
+0x8401de,
+0xe2001a,
+0xcc104b,
+0xcc0447,
+0x2c9401,
+0x7d098b,
+0x984005,
+0x7d15cb,
+0xd4001a,
+0x8001db,
+0xd4006d,
+0x344401,
+0xcc0c48,
+0x98403a,
+0xcc2c4a,
+0x958004,
+0xcc0449,
+0x8001db,
+0xd4001a,
+0xd4c01a,
+0x282801,
+0x840113,
+0xcc1003,
+0x98801b,
+0x04380c,
+0x840113,
+0xcc1003,
+0x988017,
+0x043808,
+0x840113,
+0xcc1003,
+0x988013,
+0x043804,
+0x840113,
+0xcc1003,
+0x988014,
+0xcc104c,
+0x9a8009,
+0xcc144d,
+0x9840dc,
+0xd4006d,
+0xcc1848,
+0xd5001a,
+0xd5401a,
+0x8000ec,
+0xd5801a,
+0x96c0d5,
+0xd4006d,
+0x8001db,
+0xd4006e,
+0x9ac003,
+0xd4006d,
+0xd4006e,
+0x800000,
+0xec007f,
+0x9ac0cc,
+0xd4006d,
+0x8001db,
+0xd4006e,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0x7d9103,
+0x7dd583,
+0x7d190c,
+0x35cc1f,
+0x35701f,
+0x7cf0cb,
+0x7cd08b,
+0x880000,
+0x7e8e8b,
+0x95c004,
+0xd4006e,
+0x8001db,
+0xd4001a,
+0xd4c01a,
+0xcc0803,
+0xcc0c03,
+0xcc1003,
+0xcc1403,
+0xcc1803,
+0xcc1c03,
+0xcc2403,
+0xcc2803,
+0x35c41f,
+0x36b01f,
+0x7c704b,
+0x34f01f,
+0x7c704b,
+0x35701f,
+0x7c704b,
+0x7d8881,
+0x7dccc1,
+0x7e5101,
+0x7e9541,
+0x7c9082,
+0x7cd4c2,
+0x7c848b,
+0x9ac003,
+0x7c8c8b,
+0x2c8801,
+0x98809e,
+0xd4006d,
+0x98409c,
+0xd4006e,
+0xcc084c,
+0xcc0c4d,
+0xcc1048,
+0xd4801a,
+0xd4c01a,
+0x800124,
+0xd5001a,
+0xcc0832,
+0xd40032,
+0x9482b6,
+0xca0c00,
+0xd4401e,
+0x800000,
+0xd4001e,
+0xe4011e,
+0xd4001e,
+0xca0800,
+0xca0c00,
+0xca1000,
+0xd4401e,
+0xca1400,
+0xd4801e,
+0xd4c01e,
+0xd5001e,
+0xd5401e,
+0xd54034,
+0x800000,
+0xee001e,
+0x280404,
+0xe2001a,
+0xe2001a,
+0xd4401a,
+0xca3800,
+0xcc0803,
+0xcc0c03,
+0xcc0c03,
+0xcc0c03,
+0x98829a,
+0x000000,
+0x8401de,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0400,
+0xc2ff00,
+0xcc0834,
+0xc13fff,
+0x7c74cb,
+0x7cc90b,
+0x7d010f,
+0x99028d,
+0x7c738b,
+0x8401de,
+0xd7a06f,
+0x800000,
+0xee001f,
+0xca0800,
+0x281900,
+0x7d898b,
+0x958014,
+0x281404,
+0xca0c00,
+0xca1000,
+0xca1c00,
+0xca2400,
+0xe2001f,
+0xd4c01a,
+0xd5001a,
+0xd5401a,
+0xcc1803,
+0xcc2c03,
+0xcc2c03,
+0xcc2c03,
+0x7da58b,
+0x7d9c47,
+0x984274,
+0x000000,
+0x800184,
+0xd4c01a,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xe4013e,
+0xd4001e,
+0xd4401e,
+0xee001e,
+0xca0400,
+0xa00000,
+0x7e828b,
+0xca0800,
+0x248c06,
+0x0ccc06,
+0x98c006,
+0xcc104e,
+0x990004,
+0xd40073,
+0xe4011e,
+0xd4001e,
+0xd4401e,
+0xd4801e,
+0x800000,
+0xee001e,
+0xca0800,
+0xca0c00,
+0x34d018,
+0x251001,
+0x950021,
+0xc17fff,
+0xca1000,
+0xca1400,
+0xca1800,
+0xd4801d,
+0xd4c01d,
+0x7db18b,
+0xc14202,
+0xc2c001,
+0xd5801d,
+0x34dc0e,
+0x7d5d4c,
+0x7f734c,
+0xd7401e,
+0xd5001e,
+0xd5401e,
+0xc14200,
+0xc2c000,
+0x099c01,
+0x31dc10,
+0x7f5f4c,
+0x7f734c,
+0x042802,
+0x7d8380,
+0xd5a86f,
+0xd58066,
+0xd7401e,
+0xec005e,
+0xc82402,
+0xc82402,
+0x8001db,
+0xd60076,
+0xd4401e,
+0xd4801e,
+0xd4c01e,
+0x800000,
+0xee001e,
+0x800000,
+0xee001f,
+0xd4001f,
+0x800000,
+0xd4001f,
+0xd4001f,
+0x880000,
+0xd4001f,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x000000,
+0x010194,
+0x02019b,
+0x0300b2,
+0x0400a2,
+0x050003,
+0x06003f,
+0x070032,
+0x08014f,
+0x090046,
+0x0a0036,
+0x1001d9,
+0x1700c5,
+0x22015d,
+0x23016c,
+0x2000d7,
+0x240148,
+0x26004d,
+0x27005c,
+0x28008d,
+0x290051,
+0x2a007e,
+0x2b0061,
+0x2f0088,
+0x3200aa,
+0x3401a2,
+0x36006f,
+0x3c0179,
+0x3f0095,
+0x4101af,
+0x440151,
+0x550196,
+0x56019d,
+0x60000b,
+0x610034,
+0x620038,
+0x630038,
+0x640038,
+0x650038,
+0x660038,
+0x670038,
+0x68003a,
+0x690041,
+0x6a0048,
+0x6b0048,
+0x6c0048,
+0x6d0048,
+0x6e0048,
+0x6f0048,
+0x7301d9,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+0x000006,
+};
+
+static const u32 RV770_cp_microcode[] = {
+0xcc0003ea,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x80000001,
+0xd040007f,
+0x80000001,
+0xcc400041,
+0x7c40c000,
+0xc0160004,
+0x30d03fff,
+0x7d15000c,
+0xcc110000,
+0x28d8001e,
+0x31980001,
+0x28dc001f,
+0xc8200004,
+0x95c00006,
+0x7c424000,
+0xcc000062,
+0x7e56800c,
+0xcc290000,
+0xc8240004,
+0x7e26000b,
+0x95800006,
+0x7c42c000,
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+0xcf8121f8,
+0x37e021f9,
+0xcc210000,
+0xc8200004,
+0x2a200018,
+0x32200001,
+0x9a00fffb,
+0xcf8121f8,
+0x80000002,
+0x7c408000,
+0x7c40c000,
+0x28d00018,
+0x31100001,
+0xc0160080,
+0x95000003,
+0xc02a0004,
+0x7cd4c00c,
+0xccc1217c,
+0xcc41217d,
+0xcc41217e,
+0x7c418000,
+0x1db00003,
+0x36a0217f,
+0x9b000003,
+0x419c0005,
+0x041c0040,
+0x99c00000,
+0x09dc0001,
+0xcc210000,
+0xc8240004,
+0x2a6c001f,
+0x419c0005,
+0x9ac0fffa,
+0xcc800062,
+0x80000002,
+0x7c408000,
+0x7c40c000,
+0x04d403e6,
+0x80000001,
+0xcc540000,
+0x8000039f,
+0xcc4003ea,
+0xc01c8000,
+0x044ca000,
+0xcdc12010,
+0x7c410000,
+0xc8140009,
+0x04180000,
+0x041c0008,
+0xcd800071,
+0x09dc0001,
+0x05980001,
+0xcd0d0000,
+0x99c0fffc,
+0xcc800062,
+0x8000039f,
+0xcd400071,
+0xc00e0100,
+0xcc000041,
+0xccc1304a,
+0xc83c007f,
+0xcc00007f,
+0x80000001,
+0xcc00007f,
+0xcc00007f,
+0x88000000,
+0xcc00007f,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00010333,
+0x00100004,
+0x00170006,
+0x00210008,
+0x00270028,
+0x00280023,
+0x00290029,
+0x002a0026,
+0x002b0029,
+0x002d0038,
+0x002e003f,
+0x002f004a,
+0x0034004c,
+0x00360030,
+0x003900af,
+0x003a00d0,
+0x003b00e5,
+0x003c00fd,
+0x003d016c,
+0x003f00ad,
+0x00410338,
+0x0043036c,
+0x0044018f,
+0x004500fd,
+0x004601ad,
+0x004701ad,
+0x00480200,
+0x0049020e,
+0x004a0257,
+0x004b0284,
+0x00520261,
+0x00530273,
+0x00540289,
+0x0057029b,
+0x0060029f,
+0x006102ae,
+0x006202b8,
+0x006302c2,
+0x006402cc,
+0x006502d6,
+0x006602e0,
+0x006702ea,
+0x006802f4,
+0x006902f8,
+0x006a02fc,
+0x006b0300,
+0x006c0304,
+0x006d0308,
+0x006e030c,
+0x006f0310,
+0x00700314,
+0x00720386,
+0x0074038c,
+0x0079038a,
+0x007c031e,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+0x000f039b,
+};
+
+static const u32 RV770_pfp_microcode[] = {
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x80000000,
+0xdc030000,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xc818000e,
+0x31980001,
+0x7c424000,
+0x95800252,
+0x7c428000,
+0xc81c001c,
+0xc037c000,
+0x7c40c000,
+0x7c410000,
+0x7cb4800b,
+0xc0360003,
+0x99c00000,
+0xc81c001c,
+0x7cb4800c,
+0x24d40002,
+0x7d654000,
+0xcd400043,
+0xce800043,
+0xcd000043,
+0xcc800040,
+0xce400040,
+0xce800040,
+0xccc00040,
+0xdc3a0000,
+0x9780ffde,
+0xcd000040,
+0x7c40c000,
+0x80000018,
+0x7c410000,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x8000000c,
+0x31980002,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x288c0008,
+0x30cc000f,
+0x34100001,
+0x7d0d0008,
+0x8000000c,
+0x7d91800b,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc4003f9,
+0x80000261,
+0xcc4003f8,
+0xc82003f8,
+0xc81c03f9,
+0xc81803fb,
+0xc037ffff,
+0x7c414000,
+0xcf41a29e,
+0x66200020,
+0x7de1c02c,
+0x7d58c008,
+0x7cdcc020,
+0x68d00020,
+0xc0360003,
+0xcc000054,
+0x7cb4800c,
+0x8000006a,
+0xcc800040,
+0x7c418000,
+0xcd81a29e,
+0xcc800040,
+0xcd800040,
+0x80000068,
+0xcc000054,
+0xc019ffff,
+0xcc800040,
+0xcd81a29e,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xcc400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc000054,
+0xcc800040,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00001,
+0xccc1a29f,
+0x95000003,
+0x04140001,
+0x04140002,
+0xcd4003fb,
+0xcc800040,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0xcc800040,
+0xccc1a2a2,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0x28d4001f,
+0xcc800040,
+0x95400003,
+0x7c410000,
+0xccc00057,
+0x2918001f,
+0xccc00040,
+0x95800003,
+0xcd000040,
+0xcd000058,
+0x80000261,
+0xcc00007f,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0xca0c0010,
+0x7c410000,
+0x94c00004,
+0x7c414000,
+0xd42002c4,
+0xcde00044,
+0x9b00000b,
+0x7c418000,
+0xcc00004b,
+0xcda00049,
+0xcd200041,
+0xcd600041,
+0xcda00041,
+0x06200001,
+0xce000056,
+0x80000261,
+0xcc00007f,
+0xc8280020,
+0xc82c0021,
+0xcc000063,
+0x7eea4001,
+0x65740020,
+0x7f53402c,
+0x269c0002,
+0x7df5c020,
+0x69f80020,
+0xce80004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0xce600041,
+0x271c0002,
+0x7df5c020,
+0x69f80020,
+0x7db24001,
+0xcf00004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0x800000bd,
+0xce600041,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xca0c0010,
+0x7c410000,
+0x94c0000b,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0x800000b6,
+0x7c414000,
+0xcc000048,
+0x800000ef,
+0x00000000,
+0xc8200017,
+0xc81c0023,
+0x0e240002,
+0x99c00015,
+0x7c418000,
+0x0a200001,
+0xce000056,
+0xd4000440,
+0xcc000040,
+0xc036c000,
+0xca140013,
+0x96400007,
+0x37747900,
+0xcf400040,
+0xcc000040,
+0xc83003fa,
+0x80000104,
+0xcf000022,
+0xcc000022,
+0x9540015d,
+0xcc00007f,
+0xcca00046,
+0x80000000,
+0xcc200046,
+0x80000261,
+0xcc000064,
+0xc8200017,
+0xc810001f,
+0x96000005,
+0x09100001,
+0xd4000440,
+0xcd000040,
+0xcd000022,
+0xcc800040,
+0xd0400040,
+0xc80c0025,
+0x94c0feeb,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0x7c40c000,
+0x7c410000,
+0xccc003fd,
+0xcd0003fc,
+0xccc00042,
+0xcd000042,
+0x2914001f,
+0x29180010,
+0x31980007,
+0x3b5c0001,
+0x7d76000b,
+0x99800005,
+0x7d5e400b,
+0xcc000042,
+0x80000261,
+0xcc00004d,
+0x29980001,
+0x292c0008,
+0x9980003d,
+0x32ec0001,
+0x96000004,
+0x2930000c,
+0x80000261,
+0xcc000042,
+0x04140010,
+0xcd400042,
+0x33300001,
+0x34280001,
+0x8400015e,
+0xc8140003,
+0x9b40001b,
+0x0438000c,
+0x8400015e,
+0xc8140003,
+0x9b400017,
+0x04380008,
+0x8400015e,
+0xc8140003,
+0x9b400013,
+0x04380004,
+0x8400015e,
+0xc8140003,
+0x9b400015,
+0xc80c03fd,
+0x9a800009,
+0xc81003fc,
+0x9b000118,
+0xcc00004d,
+0x04140010,
+0xccc00042,
+0xcd000042,
+0x80000136,
+0xcd400042,
+0x96c00111,
+0xcc00004d,
+0x80000261,
+0xcc00004e,
+0x9ac00003,
+0xcc00004d,
+0xcc00004e,
+0xdf830000,
+0x80000000,
+0xd80301ff,
+0x9ac00107,
+0xcc00004d,
+0x80000261,
+0xcc00004e,
+0xc8180003,
+0xc81c0003,
+0xc8200003,
+0x7d5d4003,
+0x7da1c003,
+0x7d5d400c,
+0x2a10001f,
+0x299c001f,
+0x7d1d000b,
+0x7d17400b,
+0x88000000,
+0x7e92800b,
+0x96400004,
+0xcc00004e,
+0x80000261,
+0xcc000042,
+0x04380008,
+0xcf800042,
+0xc8080003,
+0xc80c0003,
+0xc8100003,
+0xc8140003,
+0xc8180003,
+0xc81c0003,
+0xc8240003,
+0xc8280003,
+0x29fc001f,
+0x2ab0001f,
+0x7ff3c00b,
+0x28f0001f,
+0x7ff3c00b,
+0x2970001f,
+0x7ff3c00b,
+0x7d888001,
+0x7dccc001,
+0x7e510001,
+0x7e954001,
+0x7c908002,
+0x7cd4c002,
+0x7cbc800b,
+0x9ac00003,
+0x7c8f400b,
+0x38b40001,
+0x9b4000d8,
+0xcc00004d,
+0x9bc000d6,
+0xcc00004e,
+0xc80c03fd,
+0xc81003fc,
+0xccc00042,
+0x8000016f,
+0xcd000042,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xcc400040,
+0xcc400040,
+0xcc400040,
+0x7c40c000,
+0xccc00040,
+0xccc0000d,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0x7c410000,
+0x65140020,
+0x7d4d402c,
+0x24580002,
+0x7d598020,
+0x7c41c000,
+0xcd800042,
+0x69980020,
+0xcd800042,
+0xcdc00042,
+0xc023c000,
+0x05e40002,
+0x7ca0800b,
+0x26640010,
+0x7ca4800c,
+0xcc800040,
+0xcdc00040,
+0xccc00040,
+0x95c0000e,
+0xcd000040,
+0x09dc0001,
+0xc8280003,
+0x96800008,
+0xce800040,
+0xc834001d,
+0x97400000,
+0xc834001d,
+0x26a80008,
+0x84000264,
+0xcc2b0000,
+0x99c0fff7,
+0x09dc0001,
+0xdc3a0000,
+0x97800004,
+0x7c418000,
+0x800001a3,
+0x25980002,
+0xa0000000,
+0x7d808000,
+0xc818001d,
+0x7c40c000,
+0x64d00008,
+0x95800000,
+0xc818001d,
+0xcc130000,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xcc400040,
+0xc810001f,
+0x7c40c000,
+0xcc800040,
+0x7cd1400c,
+0xcd400040,
+0x05180001,
+0x80000000,
+0xcd800022,
+0x7c40c000,
+0x64500020,
+0x84000264,
+0xcc000061,
+0x7cd0c02c,
+0xc8200017,
+0xc8d60000,
+0x99400008,
+0x7c438000,
+0xdf830000,
+0xcfa0004f,
+0x84000264,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000261,
+0xcc000062,
+0x84000264,
+0xcc000061,
+0xc8200017,
+0x7c40c000,
+0xc036ff00,
+0xc810000d,
+0xc0303fff,
+0x7cf5400b,
+0x7d51800b,
+0x7d81800f,
+0x99800008,
+0x7cf3800b,
+0xdf830000,
+0xcfa0004f,
+0x84000264,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000261,
+0xcc000062,
+0x84000264,
+0x7c40c000,
+0x28dc0008,
+0x95c00019,
+0x30dc0010,
+0x7c410000,
+0x99c00004,
+0x64540020,
+0x80000209,
+0xc91d0000,
+0x7d15002c,
+0xc91e0000,
+0x7c420000,
+0x7c424000,
+0x7c418000,
+0x7de5c00b,
+0x7de28007,
+0x9a80000e,
+0x41ac0005,
+0x9ac00000,
+0x0aec0001,
+0x30dc0010,
+0x99c00004,
+0x00000000,
+0x8000020c,
+0xc91d0000,
+0x8000020c,
+0xc91e0000,
+0xcc800040,
+0xccc00040,
+0xd0400040,
+0xc80c0025,
+0x94c0fde3,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00006,
+0x0d100006,
+0x99000007,
+0xc8140015,
+0x99400005,
+0xcc000052,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0xcc4d0000,
+0xdc3a0000,
+0x9780fdbc,
+0x04cc0001,
+0x80000243,
+0xcc4d0000,
+0x7c40c000,
+0x7c410000,
+0x29240018,
+0x32640001,
+0x9640000f,
+0xcc800040,
+0x7c414000,
+0x7c418000,
+0x7c41c000,
+0xccc00043,
+0xcd000043,
+0x31dc7fff,
+0xcdc00043,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xcd800040,
+0x80000000,
+0xcdc00040,
+0xccc00040,
+0xcd000040,
+0x80000000,
+0xd0400040,
+0x80000000,
+0xd040007f,
+0xcc00007f,
+0x80000000,
+0xcc00007f,
+0xcc00007f,
+0x88000000,
+0xcc00007f,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00030223,
+0x0004022b,
+0x000500a0,
+0x00020003,
+0x0006003c,
+0x00070027,
+0x00080192,
+0x00090044,
+0x000a002d,
+0x0010025f,
+0x001700f1,
+0x002201d8,
+0x002301e9,
+0x0026004c,
+0x0027005f,
+0x0020011b,
+0x00280093,
+0x0029004f,
+0x002a0084,
+0x002b0065,
+0x002f008e,
+0x003200d9,
+0x00340233,
+0x00360075,
+0x0039010b,
+0x003c01fd,
+0x003f00a0,
+0x00410248,
+0x00440195,
+0x0048019e,
+0x004901c6,
+0x004a01d0,
+0x00550226,
+0x0056022e,
+0x0060000a,
+0x0061002a,
+0x00620030,
+0x00630030,
+0x00640030,
+0x00650030,
+0x00660030,
+0x00670030,
+0x00680037,
+0x0069003f,
+0x006a0047,
+0x006b0047,
+0x006c0047,
+0x006d0047,
+0x006e0047,
+0x006f0047,
+0x00700047,
+0x0073025f,
+0x007b0241,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+};
+
+static const u32 RV730_pfp_microcode[] = {
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x80000000,
+0xdc030000,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xc818000e,
+0x31980001,
+0x7c424000,
+0x9580023a,
+0x7c428000,
+0xc81c001c,
+0xc037c000,
+0x7c40c000,
+0x7c410000,
+0x7cb4800b,
+0xc0360003,
+0x99c00000,
+0xc81c001c,
+0x7cb4800c,
+0x24d40002,
+0x7d654000,
+0xcd400043,
+0xce800043,
+0xcd000043,
+0xcc800040,
+0xce400040,
+0xce800040,
+0xccc00040,
+0xdc3a0000,
+0x9780ffde,
+0xcd000040,
+0x7c40c000,
+0x80000018,
+0x7c410000,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x8000000c,
+0x31980002,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x288c0008,
+0x30cc000f,
+0x34100001,
+0x7d0d0008,
+0x8000000c,
+0x7d91800b,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc4003f9,
+0x80000249,
+0xcc4003f8,
+0xc037ffff,
+0x7c414000,
+0xcf41a29e,
+0xc82003f8,
+0xc81c03f9,
+0x66200020,
+0xc81803fb,
+0x7de1c02c,
+0x7d58c008,
+0x7cdcc020,
+0x69100020,
+0xc0360003,
+0xcc000054,
+0x7cb4800c,
+0x80000069,
+0xcc800040,
+0x7c418000,
+0xcd81a29e,
+0xcc800040,
+0x80000067,
+0xcd800040,
+0xc019ffff,
+0xcc800040,
+0xcd81a29e,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xcc400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc000054,
+0xcc800040,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00001,
+0xccc1a29f,
+0x95000003,
+0x04140001,
+0x04140002,
+0xcd4003fb,
+0xcc800040,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0xcc800040,
+0xccc1a2a2,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0x28d4001f,
+0xcc800040,
+0x95400003,
+0x7c410000,
+0xccc00057,
+0x2918001f,
+0xccc00040,
+0x95800003,
+0xcd000040,
+0xcd000058,
+0x80000249,
+0xcc00007f,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0xca0c0010,
+0x7c410000,
+0x94c00004,
+0x7c414000,
+0xd42002c4,
+0xcde00044,
+0x9b00000b,
+0x7c418000,
+0xcc00004b,
+0xcda00049,
+0xcd200041,
+0xcd600041,
+0xcda00041,
+0x06200001,
+0xce000056,
+0x80000249,
+0xcc00007f,
+0xc8280020,
+0xc82c0021,
+0xcc000063,
+0x7eea4001,
+0x65740020,
+0x7f53402c,
+0x269c0002,
+0x7df5c020,
+0x69f80020,
+0xce80004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0xce600041,
+0x271c0002,
+0x7df5c020,
+0x69f80020,
+0x7db24001,
+0xcf00004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0x800000bc,
+0xce600041,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xca0c0010,
+0x7c410000,
+0x94c0000b,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0x800000b5,
+0x7c414000,
+0xcc000048,
+0x800000ee,
+0x00000000,
+0xc8200017,
+0xc81c0023,
+0x0e240002,
+0x99c00015,
+0x7c418000,
+0x0a200001,
+0xce000056,
+0xd4000440,
+0xcc000040,
+0xc036c000,
+0xca140013,
+0x96400007,
+0x37747900,
+0xcf400040,
+0xcc000040,
+0xc83003fa,
+0x80000103,
+0xcf000022,
+0xcc000022,
+0x95400146,
+0xcc00007f,
+0xcca00046,
+0x80000000,
+0xcc200046,
+0x80000249,
+0xcc000064,
+0xc8200017,
+0xc810001f,
+0x96000005,
+0x09100001,
+0xd4000440,
+0xcd000040,
+0xcd000022,
+0xcc800040,
+0xd0400040,
+0xc80c0025,
+0x94c0feec,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0x7c40c000,
+0x7c410000,
+0xccc003fd,
+0xcd0003fc,
+0xccc00042,
+0xcd000042,
+0x2914001f,
+0x29180010,
+0x31980007,
+0x3b5c0001,
+0x7d76000b,
+0x99800005,
+0x7d5e400b,
+0xcc000042,
+0x80000249,
+0xcc00004d,
+0x29980001,
+0x292c0008,
+0x9980003d,
+0x32ec0001,
+0x96000004,
+0x2930000c,
+0x80000249,
+0xcc000042,
+0x04140010,
+0xcd400042,
+0x33300001,
+0x34280001,
+0x8400015d,
+0xc8140003,
+0x9b40001b,
+0x0438000c,
+0x8400015d,
+0xc8140003,
+0x9b400017,
+0x04380008,
+0x8400015d,
+0xc8140003,
+0x9b400013,
+0x04380004,
+0x8400015d,
+0xc8140003,
+0x9b400015,
+0xc80c03fd,
+0x9a800009,
+0xc81003fc,
+0x9b000101,
+0xcc00004d,
+0x04140010,
+0xccc00042,
+0xcd000042,
+0x80000135,
+0xcd400042,
+0x96c000fa,
+0xcc00004d,
+0x80000249,
+0xcc00004e,
+0x9ac00003,
+0xcc00004d,
+0xcc00004e,
+0xdf830000,
+0x80000000,
+0xd80301ff,
+0x9ac000f0,
+0xcc00004d,
+0x80000249,
+0xcc00004e,
+0xc8180003,
+0xc81c0003,
+0xc8200003,
+0x7d5d4003,
+0x7da1c003,
+0x7d5d400c,
+0x2a10001f,
+0x299c001f,
+0x7d1d000b,
+0x7d17400b,
+0x88000000,
+0x7e92800b,
+0x96400004,
+0xcc00004e,
+0x80000249,
+0xcc000042,
+0x04380008,
+0xcf800042,
+0xc8080003,
+0xc80c0003,
+0xc8100003,
+0xc8140003,
+0xc8180003,
+0xc81c0003,
+0xc8240003,
+0xc8280003,
+0x29fc001f,
+0x2ab0001f,
+0x7ff3c00b,
+0x28f0001f,
+0x7ff3c00b,
+0x2970001f,
+0x7ff3c00b,
+0x7d888001,
+0x7dccc001,
+0x7e510001,
+0x7e954001,
+0x7c908002,
+0x7cd4c002,
+0x7cbc800b,
+0x9ac00003,
+0x7c8f400b,
+0x38b40001,
+0x9b4000c1,
+0xcc00004d,
+0x9bc000bf,
+0xcc00004e,
+0xc80c03fd,
+0xc81003fc,
+0xccc00042,
+0x8000016e,
+0xcd000042,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xcc400040,
+0xcc400040,
+0xcc400040,
+0x7c40c000,
+0xccc00040,
+0xccc0000d,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0x7c410000,
+0x65140020,
+0x7d4d402c,
+0x24580002,
+0x7d598020,
+0x7c41c000,
+0xcd800042,
+0x69980020,
+0xcd800042,
+0xcdc00042,
+0xc023c000,
+0x05e40002,
+0x7ca0800b,
+0x26640010,
+0x7ca4800c,
+0xcc800040,
+0xcdc00040,
+0xccc00040,
+0x95c0000e,
+0xcd000040,
+0x09dc0001,
+0xc8280003,
+0x96800008,
+0xce800040,
+0xc834001d,
+0x97400000,
+0xc834001d,
+0x26a80008,
+0x8400024c,
+0xcc2b0000,
+0x99c0fff7,
+0x09dc0001,
+0xdc3a0000,
+0x97800004,
+0x7c418000,
+0x800001a2,
+0x25980002,
+0xa0000000,
+0x7d808000,
+0xc818001d,
+0x7c40c000,
+0x64d00008,
+0x95800000,
+0xc818001d,
+0xcc130000,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xcc400040,
+0xc810001f,
+0x7c40c000,
+0xcc800040,
+0x7cd1400c,
+0xcd400040,
+0x05180001,
+0x80000000,
+0xcd800022,
+0x7c40c000,
+0x64500020,
+0x8400024c,
+0xcc000061,
+0x7cd0c02c,
+0xc8200017,
+0xc8d60000,
+0x99400008,
+0x7c438000,
+0xdf830000,
+0xcfa0004f,
+0x8400024c,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000249,
+0xcc000062,
+0x8400024c,
+0xcc000061,
+0xc8200017,
+0x7c40c000,
+0xc036ff00,
+0xc810000d,
+0xc0303fff,
+0x7cf5400b,
+0x7d51800b,
+0x7d81800f,
+0x99800008,
+0x7cf3800b,
+0xdf830000,
+0xcfa0004f,
+0x8400024c,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000249,
+0xcc000062,
+0x8400024c,
+0x7c40c000,
+0x28dc0008,
+0x95c00019,
+0x30dc0010,
+0x7c410000,
+0x99c00004,
+0x64540020,
+0x80000208,
+0xc91d0000,
+0x7d15002c,
+0xc91e0000,
+0x7c420000,
+0x7c424000,
+0x7c418000,
+0x7de5c00b,
+0x7de28007,
+0x9a80000e,
+0x41ac0005,
+0x9ac00000,
+0x0aec0001,
+0x30dc0010,
+0x99c00004,
+0x00000000,
+0x8000020b,
+0xc91d0000,
+0x8000020b,
+0xc91e0000,
+0xcc800040,
+0xccc00040,
+0xd0400040,
+0xc80c0025,
+0x94c0fde4,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00006,
+0x0d100006,
+0x99000007,
+0xc8140015,
+0x99400005,
+0xcc000052,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0xcc4d0000,
+0xdc3a0000,
+0x9780fdbd,
+0x04cc0001,
+0x80000242,
+0xcc4d0000,
+0x80000000,
+0xd040007f,
+0xcc00007f,
+0x80000000,
+0xcc00007f,
+0xcc00007f,
+0x88000000,
+0xcc00007f,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00030222,
+0x0004022a,
+0x0005009f,
+0x00020003,
+0x0006003c,
+0x00070027,
+0x00080191,
+0x00090044,
+0x000a002d,
+0x00100247,
+0x001700f0,
+0x002201d7,
+0x002301e8,
+0x0026004c,
+0x0027005f,
+0x0020011a,
+0x00280092,
+0x0029004f,
+0x002a0083,
+0x002b0064,
+0x002f008d,
+0x003200d8,
+0x00340232,
+0x00360074,
+0x0039010a,
+0x003c01fc,
+0x003f009f,
+0x00410005,
+0x00440194,
+0x0048019d,
+0x004901c5,
+0x004a01cf,
+0x00550225,
+0x0056022d,
+0x0060000a,
+0x0061002a,
+0x00620030,
+0x00630030,
+0x00640030,
+0x00650030,
+0x00660030,
+0x00670030,
+0x00680037,
+0x0069003f,
+0x006a0047,
+0x006b0047,
+0x006c0047,
+0x006d0047,
+0x006e0047,
+0x006f0047,
+0x00700047,
+0x00730247,
+0x007b0240,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+};
+
+static const u32 RV730_cp_microcode[] = {
+0xcc0003ea,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x80000001,
+0xd040007f,
+0x80000001,
+0xcc400041,
+0x7c40c000,
+0xc0160004,
+0x30d03fff,
+0x7d15000c,
+0xcc110000,
+0x28d8001e,
+0x31980001,
+0x28dc001f,
+0xc8200004,
+0x95c00006,
+0x7c424000,
+0xcc000062,
+0x7e56800c,
+0xcc290000,
+0xc8240004,
+0x7e26000b,
+0x95800006,
+0x7c42c000,
+0xcc000062,
+0x7ed7000c,
+0xcc310000,
+0xc82c0004,
+0x7e2e000c,
+0xcc000062,
+0x31103fff,
+0x80000001,
+0xce110000,
+0x7c40c000,
+0x80000001,
+0xcc400040,
+0x80000001,
+0xcc412257,
+0x7c418000,
+0xcc400045,
+0xcc400048,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xcc400045,
+0xcc400048,
+0x7c40c000,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xcc000045,
+0xcc000048,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x040ca1fd,
+0xc0120001,
+0xcc000045,
+0xcc000048,
+0x7cd0c00c,
+0xcc41225c,
+0xcc41a1fc,
+0xd04d0000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x80000001,
+0xcc41225d,
+0x7c408000,
+0x7c40c000,
+0xc02a0002,
+0x7c410000,
+0x7d29000c,
+0x30940001,
+0x30980006,
+0x309c0300,
+0x29dc0008,
+0x7c420000,
+0x7c424000,
+0x9540000f,
+0xc02e0004,
+0x05f02258,
+0x7f2f000c,
+0xcc310000,
+0xc8280004,
+0xccc12169,
+0xcd01216a,
+0xce81216b,
+0x0db40002,
+0xcc01216c,
+0x9740000e,
+0x0db40000,
+0x8000007b,
+0xc834000a,
+0x0db40002,
+0x97400009,
+0x0db40000,
+0xc02e0004,
+0x05f02258,
+0x7f2f000c,
+0xcc310000,
+0xc8280004,
+0x8000007b,
+0xc834000a,
+0x97400004,
+0x7e028000,
+0x8000007b,
+0xc834000a,
+0x0db40004,
+0x9740ff8c,
+0x00000000,
+0xce01216d,
+0xce41216e,
+0xc8280003,
+0xc834000a,
+0x9b400004,
+0x043c0005,
+0x8400026b,
+0xcc000062,
+0x0df40000,
+0x9740000b,
+0xc82c03e6,
+0xce81a2b7,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c4,
+0x80000001,
+0xcfc1a2d1,
+0x0df40001,
+0x9740000b,
+0xc82c03e7,
+0xce81a2bb,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c5,
+0x80000001,
+0xcfc1a2d2,
+0x0df40002,
+0x9740000b,
+0xc82c03e8,
+0xce81a2bf,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c6,
+0x80000001,
+0xcfc1a2d3,
+0xc82c03e9,
+0xce81a2c3,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c7,
+0x80000001,
+0xcfc1a2d4,
+0x80000001,
+0xcc400042,
+0x7c40c000,
+0x7c410000,
+0x2914001d,
+0x31540001,
+0x9940000c,
+0x31181000,
+0xc81c0011,
+0x95c00000,
+0xc81c0011,
+0xccc12100,
+0xcd012101,
+0xccc12102,
+0xcd012103,
+0x04180004,
+0x8000037c,
+0xcd81a2a4,
+0xc02a0004,
+0x95800008,
+0x36a821a3,
+0xcc290000,
+0xc8280004,
+0xc81c0011,
+0x0de40040,
+0x9640ffff,
+0xc81c0011,
+0xccc12170,
+0xcd012171,
+0xc8200012,
+0x96000000,
+0xc8200012,
+0x8000037c,
+0xcc000064,
+0x7c40c000,
+0x7c410000,
+0xcc000045,
+0xcc000048,
+0x40d40003,
+0xcd41225c,
+0xcd01a1fc,
+0xc01a0001,
+0x041ca1fd,
+0x7dd9c00c,
+0x7c420000,
+0x08cc0001,
+0x06240001,
+0x06280002,
+0xce1d0000,
+0xce5d0000,
+0x98c0fffa,
+0xce9d0000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x7c40c000,
+0x30d00001,
+0x28cc0001,
+0x7c414000,
+0x95000006,
+0x7c418000,
+0xcd41216d,
+0xcd81216e,
+0x800000f2,
+0xc81c0003,
+0xc0220004,
+0x7e16000c,
+0xcc210000,
+0xc81c0004,
+0x7c424000,
+0x98c00004,
+0x7c428000,
+0x80000001,
+0xcde50000,
+0xce412169,
+0xce81216a,
+0xcdc1216b,
+0x80000001,
+0xcc01216c,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0x7c41c000,
+0x28a40008,
+0x326400ff,
+0x0e68003c,
+0x9680000a,
+0x7c020000,
+0x7c420000,
+0x1e300003,
+0xcc00006a,
+0x9b000003,
+0x42200005,
+0x04200040,
+0x8000010f,
+0x7c024000,
+0x7e024000,
+0x9a400000,
+0x0a640001,
+0x30ec0010,
+0x9ac0000a,
+0xcc000062,
+0xc02a0004,
+0xc82c0021,
+0x7e92800c,
+0xcc000041,
+0xcc290000,
+0xcec00021,
+0x8000011f,
+0xc8300004,
+0xcd01216d,
+0xcd41216e,
+0xc8300003,
+0x7f1f000b,
+0x30f40007,
+0x27780001,
+0x9740002a,
+0x07b80124,
+0x9f800000,
+0x00000000,
+0x80000134,
+0x7f1b8004,
+0x80000138,
+0x7f1b8005,
+0x8000013c,
+0x7f1b8002,
+0x80000140,
+0x7f1b8003,
+0x80000144,
+0x7f1b8007,
+0x80000148,
+0x7f1b8006,
+0x8000014d,
+0x28a40008,
+0x9b800019,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x9b800015,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x9b800011,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x9b80000d,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x9b800009,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x9b800005,
+0x28a40008,
+0x8000015d,
+0x326400ff,
+0x28a40008,
+0x326400ff,
+0x0e68003c,
+0x9a80feb2,
+0x28ec0008,
+0x7c434000,
+0x7c438000,
+0x7c43c000,
+0x96c00007,
+0xcc000062,
+0xcf412169,
+0xcf81216a,
+0xcfc1216b,
+0x80000001,
+0xcc01216c,
+0x80000001,
+0xcff50000,
+0xcc00006b,
+0x8400037f,
+0x0e68003c,
+0x9a800004,
+0xc8280015,
+0x80000001,
+0xd040007f,
+0x9680ffab,
+0x7e024000,
+0x84000239,
+0xc00e0002,
+0xcc000041,
+0x80000237,
+0xccc1304a,
+0x7c40c000,
+0x7c410000,
+0xc01e0001,
+0x29240012,
+0xc0220002,
+0x96400005,
+0xc0260004,
+0xc027fffb,
+0x7d25000b,
+0xc0260000,
+0x7dd2800b,
+0x7e12c00b,
+0x7d25000c,
+0x7c414000,
+0x7c418000,
+0xccc12169,
+0x9a80000a,
+0xcd01216a,
+0xcd41216b,
+0x96c0fe83,
+0xcd81216c,
+0xc8300018,
+0x97000000,
+0xc8300018,
+0x80000001,
+0xcc000018,
+0x8400037f,
+0xcc00007f,
+0xc8140013,
+0xc8180014,
+0xcd41216b,
+0x96c0fe77,
+0xcd81216c,
+0x80000181,
+0xc8300018,
+0xc80c0008,
+0x98c00000,
+0xc80c0008,
+0x7c410000,
+0x95000002,
+0x00000000,
+0x7c414000,
+0xc8200009,
+0xcc400043,
+0xce01a1f4,
+0xcc400044,
+0xc00e8000,
+0x7c424000,
+0x7c428000,
+0x2aac001f,
+0x96c0fe64,
+0xc035f000,
+0xce4003e2,
+0x32780003,
+0x267c0008,
+0x7ff7c00b,
+0x7ffbc00c,
+0x2a780018,
+0xcfc003e3,
+0xcf8003e4,
+0x26b00002,
+0x7f3f0000,
+0xcf0003e5,
+0x8000031d,
+0x7c80c000,
+0x7c40c000,
+0x28d00008,
+0x3110000f,
+0x9500000f,
+0x25280001,
+0x06a801b2,
+0x9e800000,
+0x00000000,
+0x800001d3,
+0xc0120800,
+0x800001e1,
+0xc814000f,
+0x800001e8,
+0xc8140010,
+0x800001ef,
+0xccc1a2a4,
+0x800001f8,
+0xc8140011,
+0x30d0003f,
+0x0d280015,
+0x9a800012,
+0x0d28001e,
+0x9a80001e,
+0x0d280020,
+0x9a800023,
+0x0d24000f,
+0x0d280010,
+0x7e6a800c,
+0x9a800026,
+0x0d200004,
+0x0d240014,
+0x0d280028,
+0x7e62400c,
+0x7ea6800c,
+0x9a80002a,
+0xc8140011,
+0x80000001,
+0xccc1a2a4,
+0xc0120800,
+0x7c414000,
+0x7d0cc00c,
+0xc0120008,
+0x29580003,
+0x295c000c,
+0x7c420000,
+0x7dd1c00b,
+0x26200014,
+0x7e1e400c,
+0x7e4e800c,
+0xce81a2a4,
+0x80000001,
+0xcd81a1fe,
+0xc814000f,
+0x0410210e,
+0x95400000,
+0xc814000f,
+0xd0510000,
+0x80000001,
+0xccc1a2a4,
+0xc8140010,
+0x04102108,
+0x95400000,
+0xc8140010,
+0xd0510000,
+0x80000001,
+0xccc1a2a4,
+0xccc1a2a4,
+0x04100001,
+0xcd000019,
+0x8400037f,
+0xcc00007f,
+0xc8100019,
+0x99000000,
+0xc8100019,
+0x80000002,
+0x7c408000,
+0x04102100,
+0x95400000,
+0xc8140011,
+0xd0510000,
+0x8000037c,
+0xccc1a2a4,
+0x7c40c000,
+0xcc40000d,
+0x94c0fe01,
+0xcc40000e,
+0x7c410000,
+0x95000005,
+0x08cc0001,
+0xc8140005,
+0x99400014,
+0x00000000,
+0x98c0fffb,
+0x7c410000,
+0x80000002,
+0x7d008000,
+0xc8140005,
+0x7c40c000,
+0x9940000c,
+0xc818000c,
+0x7c410000,
+0x9580fdf0,
+0xc820000e,
+0xc81c000d,
+0x66200020,
+0x7e1e002c,
+0x25240002,
+0x7e624020,
+0x80000001,
+0xcce60000,
+0x7c410000,
+0xcc00006c,
+0xcc00006d,
+0xc818001f,
+0xc81c001e,
+0x65980020,
+0x7dd9c02c,
+0x7cd4c00c,
+0xccde0000,
+0x45dc0004,
+0xc8280017,
+0x9680000f,
+0xc00e0001,
+0x28680008,
+0x2aac0016,
+0x32a800ff,
+0x0eb00049,
+0x7f2f000b,
+0x97000006,
+0x00000000,
+0xc8140005,
+0x7c40c000,
+0x80000221,
+0x7c410000,
+0x80000224,
+0xd040007f,
+0x84000239,
+0xcc000041,
+0xccc1304a,
+0x94000000,
+0xc83c001a,
+0x043c0005,
+0xcfc1a2a4,
+0xc0361f90,
+0xc0387fff,
+0x7c03c010,
+0x7f7b400c,
+0xcf41217c,
+0xcfc1217d,
+0xcc01217e,
+0xc03a0004,
+0x0434217f,
+0x7f7b400c,
+0xcc350000,
+0xc83c0004,
+0x2bfc001f,
+0x04380020,
+0x97c00005,
+0xcc000062,
+0x9b800000,
+0x0bb80001,
+0x80000245,
+0xcc000071,
+0xcc01a1f4,
+0x04380016,
+0xc0360002,
+0xcf81a2a4,
+0x88000000,
+0xcf412010,
+0x7c40c000,
+0x28d0001c,
+0x95000005,
+0x04d40001,
+0xcd400065,
+0x80000001,
+0xcd400068,
+0x09540002,
+0x80000001,
+0xcd400066,
+0x8400026a,
+0xc81803ea,
+0x7c40c000,
+0x9980fd9f,
+0xc8140016,
+0x08d00001,
+0x9940002b,
+0xcd000068,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x043c0005,
+0xcfc1a2a4,
+0xcc01a1f4,
+0x8400037f,
+0xcc000046,
+0x88000000,
+0xcc00007f,
+0x8400027c,
+0xc81803ea,
+0x7c40c000,
+0x9980fd8d,
+0xc8140016,
+0x08d00001,
+0x99400019,
+0xcd000068,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x043c0022,
+0xcfc1a2a4,
+0x8400037f,
+0xcc000047,
+0x88000000,
+0xcc00007f,
+0xc8100016,
+0x9900000d,
+0xcc400067,
+0x80000002,
+0x7c408000,
+0xc81803ea,
+0x9980fd79,
+0x7c40c000,
+0x94c00003,
+0xc8100016,
+0x99000004,
+0xccc00068,
+0x80000002,
+0x7c408000,
+0x84000239,
+0xc0148000,
+0xcc000041,
+0xcd41304a,
+0xc0148000,
+0x99000000,
+0xc8100016,
+0x80000002,
+0x7c408000,
+0xc0120001,
+0x7c51400c,
+0x80000001,
+0xd0550000,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0x291c001f,
+0xccc0004a,
+0xcd00004b,
+0x95c00003,
+0xc01c8000,
+0xcdc12010,
+0xdd830000,
+0x055c2000,
+0xcc000062,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc0004c,
+0xcd00004d,
+0xdd830000,
+0x055ca000,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc0004e,
+0xcd00004f,
+0xdd830000,
+0x055cc000,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc00050,
+0xcd000051,
+0xdd830000,
+0x055cf8e0,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc00052,
+0xcd000053,
+0xdd830000,
+0x055cf880,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc00054,
+0xcd000055,
+0xdd830000,
+0x055ce000,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc00056,
+0xcd000057,
+0xdd830000,
+0x055cf000,
+0x80000001,
+0xd81f4100,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0x7c418000,
+0xccc00058,
+0xcd000059,
+0xdd830000,
+0x055cf3fc,
+0x80000001,
+0xd81f4100,
+0xd0432000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043a000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043c000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043f8e0,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043f880,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043e000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043f000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xd043f3fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xc81403e0,
+0xcc430000,
+0xcc430000,
+0xcc430000,
+0x7d45c000,
+0xcdc30000,
+0xd0430000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x7c40c000,
+0xc81003e2,
+0xc81403e5,
+0xc81803e3,
+0xc81c03e4,
+0xcd812169,
+0xcdc1216a,
+0xccc1216b,
+0xcc01216c,
+0x04200004,
+0x7da18000,
+0x7d964002,
+0x9640fcd9,
+0xcd8003e3,
+0x31280003,
+0xc02df000,
+0x25180008,
+0x7dad800b,
+0x7da9800c,
+0x80000001,
+0xcd8003e3,
+0x308cffff,
+0xd04d0000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xc8140020,
+0x15580002,
+0x9580ffff,
+0xc8140020,
+0xcc00006e,
+0xcc412180,
+0x7c40c000,
+0xccc1218d,
+0xcc412181,
+0x28d0001f,
+0x34588000,
+0xcd81218c,
+0x9500fcbf,
+0xcc412182,
+0xc8140020,
+0x9940ffff,
+0xc8140020,
+0x80000002,
+0x7c408000,
+0x7c40c000,
+0x28d00018,
+0x31100001,
+0xc0160080,
+0x95000003,
+0xc02a0004,
+0x7cd4c00c,
+0xccc1217c,
+0xcc41217d,
+0xcc41217e,
+0x7c418000,
+0x1db00003,
+0x36a0217f,
+0x9b000003,
+0x419c0005,
+0x041c0040,
+0x99c00000,
+0x09dc0001,
+0xcc210000,
+0xc8240004,
+0x2a6c001f,
+0x419c0005,
+0x9ac0fffa,
+0xcc800062,
+0x80000002,
+0x7c408000,
+0x7c40c000,
+0x04d403e6,
+0x80000001,
+0xcc540000,
+0x8000037c,
+0xcc4003ea,
+0xc01c8000,
+0x044ca000,
+0xcdc12010,
+0x7c410000,
+0xc8140009,
+0x04180000,
+0x041c0008,
+0xcd800071,
+0x09dc0001,
+0x05980001,
+0xcd0d0000,
+0x99c0fffc,
+0xcc800062,
+0x8000037c,
+0xcd400071,
+0xc00e0100,
+0xcc000041,
+0xccc1304a,
+0xc83c007f,
+0xcc00007f,
+0x80000001,
+0xcc00007f,
+0xcc00007f,
+0x88000000,
+0xcc00007f,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00010331,
+0x00100004,
+0x00170006,
+0x00210008,
+0x00270028,
+0x00280023,
+0x00290029,
+0x002a0026,
+0x002b0029,
+0x002d0038,
+0x002e003f,
+0x002f004a,
+0x0034004c,
+0x00360030,
+0x003900af,
+0x003a00cf,
+0x003b00e4,
+0x003c00fc,
+0x003d016b,
+0x003f00ad,
+0x00410336,
+0x00430349,
+0x0044018e,
+0x004500fc,
+0x004601ac,
+0x004701ac,
+0x004801fe,
+0x0049020c,
+0x004a0255,
+0x004b0282,
+0x0052025f,
+0x00530271,
+0x00540287,
+0x00570299,
+0x0060029d,
+0x006102ac,
+0x006202b6,
+0x006302c0,
+0x006402ca,
+0x006502d4,
+0x006602de,
+0x006702e8,
+0x006802f2,
+0x006902f6,
+0x006a02fa,
+0x006b02fe,
+0x006c0302,
+0x006d0306,
+0x006e030a,
+0x006f030e,
+0x00700312,
+0x00720363,
+0x00740369,
+0x00790367,
+0x007c031c,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+0x000f0378,
+};
+
+static const u32 RV710_pfp_microcode[] = {
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x80000000,
+0xdc030000,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xc818000e,
+0x31980001,
+0x7c424000,
+0x9580023a,
+0x7c428000,
+0xc81c001c,
+0xc037c000,
+0x7c40c000,
+0x7c410000,
+0x7cb4800b,
+0xc0360003,
+0x99c00000,
+0xc81c001c,
+0x7cb4800c,
+0x24d40002,
+0x7d654000,
+0xcd400043,
+0xce800043,
+0xcd000043,
+0xcc800040,
+0xce400040,
+0xce800040,
+0xccc00040,
+0xdc3a0000,
+0x9780ffde,
+0xcd000040,
+0x7c40c000,
+0x80000018,
+0x7c410000,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x8000000c,
+0x31980002,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xc818000e,
+0x288c0008,
+0x30cc000f,
+0x34100001,
+0x7d0d0008,
+0x8000000c,
+0x7d91800b,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc4003f9,
+0x80000249,
+0xcc4003f8,
+0xc037ffff,
+0x7c414000,
+0xcf41a29e,
+0xc82003f8,
+0xc81c03f9,
+0x66200020,
+0xc81803fb,
+0x7de1c02c,
+0x7d58c008,
+0x7cdcc020,
+0x69100020,
+0xc0360003,
+0xcc000054,
+0x7cb4800c,
+0x80000069,
+0xcc800040,
+0x7c418000,
+0xcd81a29e,
+0xcc800040,
+0x80000067,
+0xcd800040,
+0xc019ffff,
+0xcc800040,
+0xcd81a29e,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xcc400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xcc000054,
+0xcc800040,
+0x7c40c000,
+0x7c410000,
+0x7c414000,
+0xccc1a1fa,
+0xcd01a1f9,
+0xcd41a29d,
+0xccc00040,
+0xcd000040,
+0xcd400040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00001,
+0xccc1a29f,
+0x95000003,
+0x04140001,
+0x04140002,
+0xcd4003fb,
+0xcc800040,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0xcc800040,
+0xccc1a2a2,
+0x80000000,
+0xccc00040,
+0x7c40c000,
+0x28d4001f,
+0xcc800040,
+0x95400003,
+0x7c410000,
+0xccc00057,
+0x2918001f,
+0xccc00040,
+0x95800003,
+0xcd000040,
+0xcd000058,
+0x80000249,
+0xcc00007f,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0xca0c0010,
+0x7c410000,
+0x94c00004,
+0x7c414000,
+0xd42002c4,
+0xcde00044,
+0x9b00000b,
+0x7c418000,
+0xcc00004b,
+0xcda00049,
+0xcd200041,
+0xcd600041,
+0xcda00041,
+0x06200001,
+0xce000056,
+0x80000249,
+0xcc00007f,
+0xc8280020,
+0xc82c0021,
+0xcc000063,
+0x7eea4001,
+0x65740020,
+0x7f53402c,
+0x269c0002,
+0x7df5c020,
+0x69f80020,
+0xce80004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0xce600041,
+0x271c0002,
+0x7df5c020,
+0x69f80020,
+0x7db24001,
+0xcf00004b,
+0xce600049,
+0xcde00041,
+0xcfa00041,
+0x800000bc,
+0xce600041,
+0xc8200017,
+0xc8300022,
+0x9a000006,
+0x0e280001,
+0xc824001e,
+0x0a640001,
+0xd4001240,
+0xce400040,
+0xca0c0010,
+0x7c410000,
+0x94c0000b,
+0xc036c000,
+0x96800007,
+0x37747900,
+0x041c0001,
+0xcf400040,
+0xcdc00040,
+0xcf0003fa,
+0x7c030000,
+0x800000b5,
+0x7c414000,
+0xcc000048,
+0x800000ee,
+0x00000000,
+0xc8200017,
+0xc81c0023,
+0x0e240002,
+0x99c00015,
+0x7c418000,
+0x0a200001,
+0xce000056,
+0xd4000440,
+0xcc000040,
+0xc036c000,
+0xca140013,
+0x96400007,
+0x37747900,
+0xcf400040,
+0xcc000040,
+0xc83003fa,
+0x80000103,
+0xcf000022,
+0xcc000022,
+0x95400146,
+0xcc00007f,
+0xcca00046,
+0x80000000,
+0xcc200046,
+0x80000249,
+0xcc000064,
+0xc8200017,
+0xc810001f,
+0x96000005,
+0x09100001,
+0xd4000440,
+0xcd000040,
+0xcd000022,
+0xcc800040,
+0xd0400040,
+0xc80c0025,
+0x94c0feec,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0x7c40c000,
+0x7c410000,
+0xccc003fd,
+0xcd0003fc,
+0xccc00042,
+0xcd000042,
+0x2914001f,
+0x29180010,
+0x31980007,
+0x3b5c0001,
+0x7d76000b,
+0x99800005,
+0x7d5e400b,
+0xcc000042,
+0x80000249,
+0xcc00004d,
+0x29980001,
+0x292c0008,
+0x9980003d,
+0x32ec0001,
+0x96000004,
+0x2930000c,
+0x80000249,
+0xcc000042,
+0x04140010,
+0xcd400042,
+0x33300001,
+0x34280001,
+0x8400015d,
+0xc8140003,
+0x9b40001b,
+0x0438000c,
+0x8400015d,
+0xc8140003,
+0x9b400017,
+0x04380008,
+0x8400015d,
+0xc8140003,
+0x9b400013,
+0x04380004,
+0x8400015d,
+0xc8140003,
+0x9b400015,
+0xc80c03fd,
+0x9a800009,
+0xc81003fc,
+0x9b000101,
+0xcc00004d,
+0x04140010,
+0xccc00042,
+0xcd000042,
+0x80000135,
+0xcd400042,
+0x96c000fa,
+0xcc00004d,
+0x80000249,
+0xcc00004e,
+0x9ac00003,
+0xcc00004d,
+0xcc00004e,
+0xdf830000,
+0x80000000,
+0xd80301ff,
+0x9ac000f0,
+0xcc00004d,
+0x80000249,
+0xcc00004e,
+0xc8180003,
+0xc81c0003,
+0xc8200003,
+0x7d5d4003,
+0x7da1c003,
+0x7d5d400c,
+0x2a10001f,
+0x299c001f,
+0x7d1d000b,
+0x7d17400b,
+0x88000000,
+0x7e92800b,
+0x96400004,
+0xcc00004e,
+0x80000249,
+0xcc000042,
+0x04380008,
+0xcf800042,
+0xc8080003,
+0xc80c0003,
+0xc8100003,
+0xc8140003,
+0xc8180003,
+0xc81c0003,
+0xc8240003,
+0xc8280003,
+0x29fc001f,
+0x2ab0001f,
+0x7ff3c00b,
+0x28f0001f,
+0x7ff3c00b,
+0x2970001f,
+0x7ff3c00b,
+0x7d888001,
+0x7dccc001,
+0x7e510001,
+0x7e954001,
+0x7c908002,
+0x7cd4c002,
+0x7cbc800b,
+0x9ac00003,
+0x7c8f400b,
+0x38b40001,
+0x9b4000c1,
+0xcc00004d,
+0x9bc000bf,
+0xcc00004e,
+0xc80c03fd,
+0xc81003fc,
+0xccc00042,
+0x8000016e,
+0xcd000042,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xcc400040,
+0xcc400040,
+0xcc400040,
+0x7c40c000,
+0xccc00040,
+0xccc0000d,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0x7c410000,
+0x65140020,
+0x7d4d402c,
+0x24580002,
+0x7d598020,
+0x7c41c000,
+0xcd800042,
+0x69980020,
+0xcd800042,
+0xcdc00042,
+0xc023c000,
+0x05e40002,
+0x7ca0800b,
+0x26640010,
+0x7ca4800c,
+0xcc800040,
+0xcdc00040,
+0xccc00040,
+0x95c0000e,
+0xcd000040,
+0x09dc0001,
+0xc8280003,
+0x96800008,
+0xce800040,
+0xc834001d,
+0x97400000,
+0xc834001d,
+0x26a80008,
+0x8400024c,
+0xcc2b0000,
+0x99c0fff7,
+0x09dc0001,
+0xdc3a0000,
+0x97800004,
+0x7c418000,
+0x800001a2,
+0x25980002,
+0xa0000000,
+0x7d808000,
+0xc818001d,
+0x7c40c000,
+0x64d00008,
+0x95800000,
+0xc818001d,
+0xcc130000,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xcc400040,
+0xc810001f,
+0x7c40c000,
+0xcc800040,
+0x7cd1400c,
+0xcd400040,
+0x05180001,
+0x80000000,
+0xcd800022,
+0x7c40c000,
+0x64500020,
+0x8400024c,
+0xcc000061,
+0x7cd0c02c,
+0xc8200017,
+0xc8d60000,
+0x99400008,
+0x7c438000,
+0xdf830000,
+0xcfa0004f,
+0x8400024c,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000249,
+0xcc000062,
+0x8400024c,
+0xcc000061,
+0xc8200017,
+0x7c40c000,
+0xc036ff00,
+0xc810000d,
+0xc0303fff,
+0x7cf5400b,
+0x7d51800b,
+0x7d81800f,
+0x99800008,
+0x7cf3800b,
+0xdf830000,
+0xcfa0004f,
+0x8400024c,
+0xcc000062,
+0x80000000,
+0xd040007f,
+0x80000249,
+0xcc000062,
+0x8400024c,
+0x7c40c000,
+0x28dc0008,
+0x95c00019,
+0x30dc0010,
+0x7c410000,
+0x99c00004,
+0x64540020,
+0x80000208,
+0xc91d0000,
+0x7d15002c,
+0xc91e0000,
+0x7c420000,
+0x7c424000,
+0x7c418000,
+0x7de5c00b,
+0x7de28007,
+0x9a80000e,
+0x41ac0005,
+0x9ac00000,
+0x0aec0001,
+0x30dc0010,
+0x99c00004,
+0x00000000,
+0x8000020b,
+0xc91d0000,
+0x8000020b,
+0xc91e0000,
+0xcc800040,
+0xccc00040,
+0xd0400040,
+0xc80c0025,
+0x94c0fde4,
+0xc8100008,
+0xcd000040,
+0xd4000fc0,
+0x80000000,
+0xd4000fa2,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0xd40003c0,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xd0400040,
+0x7c408000,
+0xa0000000,
+0x7e82800b,
+0x7c40c000,
+0x30d00006,
+0x0d100006,
+0x99000007,
+0xc8140015,
+0x99400005,
+0xcc000052,
+0xd4000340,
+0xd4000fc0,
+0xd4000fa2,
+0xcc800040,
+0xccc00040,
+0x80000000,
+0xd0400040,
+0x7c40c000,
+0xcc4d0000,
+0xdc3a0000,
+0x9780fdbd,
+0x04cc0001,
+0x80000242,
+0xcc4d0000,
+0x80000000,
+0xd040007f,
+0xcc00007f,
+0x80000000,
+0xcc00007f,
+0xcc00007f,
+0x88000000,
+0xcc00007f,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00030222,
+0x0004022a,
+0x0005009f,
+0x00020003,
+0x0006003c,
+0x00070027,
+0x00080191,
+0x00090044,
+0x000a002d,
+0x00100247,
+0x001700f0,
+0x002201d7,
+0x002301e8,
+0x0026004c,
+0x0027005f,
+0x0020011a,
+0x00280092,
+0x0029004f,
+0x002a0083,
+0x002b0064,
+0x002f008d,
+0x003200d8,
+0x00340232,
+0x00360074,
+0x0039010a,
+0x003c01fc,
+0x003f009f,
+0x00410005,
+0x00440194,
+0x0048019d,
+0x004901c5,
+0x004a01cf,
+0x00550225,
+0x0056022d,
+0x0060000a,
+0x0061002a,
+0x00620030,
+0x00630030,
+0x00640030,
+0x00650030,
+0x00660030,
+0x00670030,
+0x00680037,
+0x0069003f,
+0x006a0047,
+0x006b0047,
+0x006c0047,
+0x006d0047,
+0x006e0047,
+0x006f0047,
+0x00700047,
+0x00730247,
+0x007b0240,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+0x00000005,
+};
+
+static const u32 RV710_cp_microcode[] = {
+0xcc0003ea,
+0x04080003,
+0xcc800043,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x80000003,
+0xd040007f,
+0x80000003,
+0xcc400041,
+0x7c40c000,
+0xc0160004,
+0x30d03fff,
+0x7d15000c,
+0xcc110000,
+0x28d8001e,
+0x31980001,
+0x28dc001f,
+0xc8200004,
+0x95c00006,
+0x7c424000,
+0xcc000062,
+0x7e56800c,
+0xcc290000,
+0xc8240004,
+0x7e26000b,
+0x95800006,
+0x7c42c000,
+0xcc000062,
+0x7ed7000c,
+0xcc310000,
+0xc82c0004,
+0x7e2e000c,
+0xcc000062,
+0x31103fff,
+0x80000003,
+0xce110000,
+0x7c40c000,
+0x80000003,
+0xcc400040,
+0x80000003,
+0xcc412257,
+0x7c418000,
+0xcc400045,
+0xcc400048,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xcc400045,
+0xcc400048,
+0x7c40c000,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0xcc000045,
+0xcc000048,
+0xcc41225c,
+0xcc41a1fc,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x040ca1fd,
+0xc0120001,
+0xcc000045,
+0xcc000048,
+0x7cd0c00c,
+0xcc41225c,
+0xcc41a1fc,
+0xd04d0000,
+0x7c408000,
+0xa0000000,
+0xcc800062,
+0x80000003,
+0xcc41225d,
+0x7c408000,
+0x7c40c000,
+0xc02a0002,
+0x7c410000,
+0x7d29000c,
+0x30940001,
+0x30980006,
+0x309c0300,
+0x29dc0008,
+0x7c420000,
+0x7c424000,
+0x9540000f,
+0xc02e0004,
+0x05f02258,
+0x7f2f000c,
+0xcc310000,
+0xc8280004,
+0xccc12169,
+0xcd01216a,
+0xce81216b,
+0x0db40002,
+0xcc01216c,
+0x9740000e,
+0x0db40000,
+0x8000007d,
+0xc834000a,
+0x0db40002,
+0x97400009,
+0x0db40000,
+0xc02e0004,
+0x05f02258,
+0x7f2f000c,
+0xcc310000,
+0xc8280004,
+0x8000007d,
+0xc834000a,
+0x97400004,
+0x7e028000,
+0x8000007d,
+0xc834000a,
+0x0db40004,
+0x9740ff8c,
+0x00000000,
+0xce01216d,
+0xce41216e,
+0xc8280003,
+0xc834000a,
+0x9b400004,
+0x043c0005,
+0x8400026d,
+0xcc000062,
+0x0df40000,
+0x9740000b,
+0xc82c03e6,
+0xce81a2b7,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c4,
+0x80000003,
+0xcfc1a2d1,
+0x0df40001,
+0x9740000b,
+0xc82c03e7,
+0xce81a2bb,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c5,
+0x80000003,
+0xcfc1a2d2,
+0x0df40002,
+0x9740000b,
+0xc82c03e8,
+0xce81a2bf,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c6,
+0x80000003,
+0xcfc1a2d3,
+0xc82c03e9,
+0xce81a2c3,
+0xc0300006,
+0x7ef34028,
+0xc0300020,
+0x7f6b8020,
+0x7fb3c029,
+0xcf81a2c7,
+0x80000003,
+0xcfc1a2d4,
+0x80000003,
+0xcc400042,
+0x7c40c000,
+0x7c410000,
+0x2914001d,
+0x31540001,
+0x9940000c,
+0x31181000,
+0xc81c0011,
+0x95c00000,
+0xc81c0011,
+0xccc12100,
+0xcd012101,
+0xccc12102,
+0xcd012103,
+0x04180004,
+0x8000037e,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
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+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00000000,
+0x00010333,
+0x00100006,
+0x00170008,
+0x0021000a,
+0x0027002a,
+0x00280025,
+0x0029002b,
+0x002a0028,
+0x002b002b,
+0x002d003a,
+0x002e0041,
+0x002f004c,
+0x0034004e,
+0x00360032,
+0x003900b1,
+0x003a00d1,
+0x003b00e6,
+0x003c00fe,
+0x003d016d,
+0x003f00af,
+0x00410338,
+0x0043034b,
+0x00440190,
+0x004500fe,
+0x004601ae,
+0x004701ae,
+0x00480200,
+0x0049020e,
+0x004a0257,
+0x004b0284,
+0x00520261,
+0x00530273,
+0x00540289,
+0x0057029b,
+0x0060029f,
+0x006102ae,
+0x006202b8,
+0x006302c2,
+0x006402cc,
+0x006502d6,
+0x006602e0,
+0x006702ea,
+0x006802f4,
+0x006902f8,
+0x006a02fc,
+0x006b0300,
+0x006c0304,
+0x006d0308,
+0x006e030c,
+0x006f0310,
+0x00700314,
+0x00720365,
+0x0074036b,
+0x00790369,
+0x007c031e,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+0x000f037a,
+};
+
+#endif
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 92965dbb3c14..77a7a4d84650 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -43,6 +43,78 @@
 static int radeon_do_cleanup_cp(struct drm_device * dev);
 static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
 
+u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off)
+{
+	u32 val;
+
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		val = DRM_READ32(dev_priv->ring_rptr, off);
+	} else {
+		val = *(((volatile u32 *)
+			 dev_priv->ring_rptr->handle) +
+			(off / sizeof(u32)));
+		val = le32_to_cpu(val);
+	}
+	return val;
+}
+
+u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv)
+{
+	if (dev_priv->writeback_works)
+		return radeon_read_ring_rptr(dev_priv, 0);
+	else {
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			return RADEON_READ(R600_CP_RB_RPTR);
+		else
+			return RADEON_READ(RADEON_CP_RB_RPTR);
+	}
+}
+
+void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u32 off, u32 val)
+{
+	if (dev_priv->flags & RADEON_IS_AGP)
+		DRM_WRITE32(dev_priv->ring_rptr, off, val);
+	else
+		*(((volatile u32 *) dev_priv->ring_rptr->handle) +
+		  (off / sizeof(u32))) = cpu_to_le32(val);
+}
+
+void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val)
+{
+	radeon_write_ring_rptr(dev_priv, 0, val);
+}
+
+u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index)
+{
+	if (dev_priv->writeback_works) {
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			return radeon_read_ring_rptr(dev_priv,
+						     R600_SCRATCHOFF(index));
+		else
+			return radeon_read_ring_rptr(dev_priv,
+						     RADEON_SCRATCHOFF(index));
+	} else {
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			return RADEON_READ(R600_SCRATCH_REG0 + 4*index);
+		else
+			return RADEON_READ(RADEON_SCRATCH_REG0 + 4*index);
+	}
+}
+
+u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr)
+{
+	u32 ret;
+
+	if (addr < 0x10000)
+		ret = DRM_READ32(dev_priv->mmio, addr);
+	else {
+		DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, addr);
+		ret = DRM_READ32(dev_priv->mmio, RADEON_MM_DATA);
+	}
+
+	return ret;
+}
+
 static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 {
 	u32 ret;
@@ -70,11 +142,22 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 	return ret;
 }
 
+static u32 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+{
+	u32 ret;
+	RADEON_WRITE(RS600_MC_INDEX, ((addr & RS600_MC_ADDR_MASK) |
+				      RS600_MC_IND_CITF_ARB0));
+	ret = RADEON_READ(RS600_MC_DATA);
+	return ret;
+}
+
 static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 {
 	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
 	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
 		return RS690_READ_MCIND(dev_priv, addr);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+		return RS600_READ_MCIND(dev_priv, addr);
 	else
 		return RS480_READ_MCIND(dev_priv, addr);
 }
@@ -82,11 +165,17 @@ static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
 {
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
+		return RADEON_READ(R700_MC_VM_FB_LOCATION);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return RADEON_READ(R600_MC_VM_FB_LOCATION);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
 		return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
 	else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
 		 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
 		return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+		return RS600_READ_MCIND(dev_priv, RS600_MC_FB_LOCATION);
 	else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
 		return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
 	else
@@ -95,42 +184,66 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
 
 static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
 {
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
+		RADEON_WRITE(R700_MC_VM_FB_LOCATION, fb_loc);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		RADEON_WRITE(R600_MC_VM_FB_LOCATION, fb_loc);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
 		R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
 	else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
 		 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
 		RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+		RS600_WRITE_MCIND(RS600_MC_FB_LOCATION, fb_loc);
 	else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
 		R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
 	else
 		RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
 }
 
-static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
+void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
 {
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
+	/*R6xx/R7xx: AGP_TOP and BOT are actually 18 bits each */
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
+		RADEON_WRITE(R700_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
+		RADEON_WRITE(R700_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
+	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
+		RADEON_WRITE(R600_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
+		RADEON_WRITE(R600_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
+	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
 		R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
 	else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
 		 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
 		RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+		RS600_WRITE_MCIND(RS600_MC_AGP_LOCATION, agp_loc);
 	else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
 		R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
 	else
 		RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
 }
 
-static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
+void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
 {
 	u32 agp_base_hi = upper_32_bits(agp_base);
 	u32 agp_base_lo = agp_base & 0xffffffff;
-
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
+	u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff;
+
+	/* R6xx/R7xx must be aligned to a 4MB boundry */
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
+		RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		RADEON_WRITE(R600_MC_VM_AGP_BASE, r6xx_agp_base);
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
 		R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
 		R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
 	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
 		 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
 		RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
 		RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
+	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
+		RS600_WRITE_MCIND(RS600_AGP_BASE, agp_base_lo);
+		RS600_WRITE_MCIND(RS600_AGP_BASE_2, agp_base_hi);
 	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
 		R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
 		R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
@@ -145,6 +258,25 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
 	}
 }
 
+void radeon_enable_bm(struct drm_radeon_private *dev_priv)
+{
+	u32 tmp;
+	/* Turn on bus mastering */
+	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
+		/* rs600/rs690/rs740 */
+		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
+		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
+		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
+		/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
+		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
+		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+	} /* PCIE cards appears to not need this */
+}
+
 static int RADEON_READ_PLL(struct drm_device * dev, int addr)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -302,7 +434,7 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
 
 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
 		RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
-		RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
+		RADEON_WRITE(R300_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
 	}
 	RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config);
 	radeon_do_wait_for_idle(dev_priv);
@@ -382,6 +514,14 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
 			RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
 				     RS690_cp_microcode[i][0]);
 		}
+	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
+		DRM_INFO("Loading RS600 Microcode\n");
+		for (i = 0; i < 256; i++) {
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+				     RS600_cp_microcode[i][1]);
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+				     RS600_cp_microcode[i][0]);
+		}
 	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
 		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
 		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
@@ -562,7 +702,6 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
 {
 	struct drm_radeon_master_private *master_priv;
 	u32 ring_start, cur_read_ptr;
-	u32 tmp;
 
 	/* Initialize the memory controller. With new memory map, the fb location
 	 * is not changed, it should have been properly initialized already. Part
@@ -611,17 +750,10 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
 	} else
 #endif
 	{
-		struct drm_sg_mem *entry = dev->sg;
-		unsigned long tmp_ofs, page_ofs;
-
-		tmp_ofs = dev_priv->ring_rptr->offset -
-				(unsigned long)dev->sg->virtual;
-		page_ofs = tmp_ofs >> PAGE_SHIFT;
-
-		RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]);
-		DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
-			  (unsigned long)entry->busaddr[page_ofs],
-			  entry->handle + tmp_ofs);
+		RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
+			     dev_priv->ring_rptr->offset
+			     - ((unsigned long) dev->sg->virtual)
+			     + dev_priv->gart_vm_start);
 	}
 
 	/* Set ring buffer size */
@@ -649,34 +781,17 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
 	RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR)
 		     + RADEON_SCRATCH_REG_OFFSET);
 
-	dev_priv->scratch = ((__volatile__ u32 *)
-			     dev_priv->ring_rptr->handle +
-			     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
-
 	RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
 
-	/* Turn on bus mastering */
-	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
-	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
-		/* rs600/rs690/rs740 */
-		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
-		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
-	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
-		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
-		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
-		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
-		/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
-		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
-		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
-	} /* PCIE cards appears to not need this */
+	radeon_enable_bm(dev_priv);
 
-	dev_priv->scratch[0] = 0;
+	radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(0), 0);
 	RADEON_WRITE(RADEON_LAST_FRAME_REG, 0);
 
-	dev_priv->scratch[1] = 0;
+	radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
 	RADEON_WRITE(RADEON_LAST_DISPATCH_REG, 0);
 
-	dev_priv->scratch[2] = 0;
+	radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(2), 0);
 	RADEON_WRITE(RADEON_LAST_CLEAR_REG, 0);
 
 	/* reset sarea copies of these */
@@ -708,12 +823,15 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
 	/* Writeback doesn't seem to work everywhere, test it here and possibly
 	 * enable it if it appears to work
 	 */
-	DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0);
+	radeon_write_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
+
 	RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
 
 	for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
-		if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
-		    0xdeadbeef)
+		u32 val;
+
+		val = radeon_read_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1));
+		if (val == 0xdeadbeef)
 			break;
 		DRM_UDELAY(1);
 	}
@@ -809,6 +927,82 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
 	}
 }
 
+/* Enable or disable IGP GART on the chip */
+static void rs600_set_igpgart(drm_radeon_private_t *dev_priv, int on)
+{
+	u32 temp;
+	int i;
+
+	if (on) {
+		DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
+			 dev_priv->gart_vm_start,
+			 (long)dev_priv->gart_info.bus_addr,
+			 dev_priv->gart_size);
+
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (RS600_EFFECTIVE_L2_CACHE_SIZE(6) |
+						    RS600_EFFECTIVE_L2_QUEUE_SIZE(6)));
+
+		for (i = 0; i < 19; i++)
+			IGP_WRITE_MCIND(RS600_MC_PT0_CLIENT0_CNTL + i,
+					(RS600_ENABLE_TRANSLATION_MODE_OVERRIDE |
+					 RS600_SYSTEM_ACCESS_MODE_IN_SYS |
+					 RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH |
+					 RS600_EFFECTIVE_L1_CACHE_SIZE(3) |
+					 RS600_ENABLE_FRAGMENT_PROCESSING |
+					 RS600_EFFECTIVE_L1_QUEUE_SIZE(3)));
+
+		IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL, (RS600_ENABLE_PAGE_TABLE |
+							     RS600_PAGE_TABLE_TYPE_FLAT));
+
+		/* disable all other contexts */
+		for (i = 1; i < 8; i++)
+			IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL + i, 0);
+
+		/* setup the page table aperture */
+		IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
+				dev_priv->gart_info.bus_addr);
+		IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR,
+				dev_priv->gart_vm_start);
+		IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR,
+				(dev_priv->gart_vm_start + dev_priv->gart_size - 1));
+		IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
+
+		/* setup the system aperture */
+		IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR,
+				dev_priv->gart_vm_start);
+		IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR,
+				(dev_priv->gart_vm_start + dev_priv->gart_size - 1));
+
+		/* enable page tables */
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (temp | RS600_ENABLE_PT));
+
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
+		IGP_WRITE_MCIND(RS600_MC_CNTL1, (temp | RS600_ENABLE_PAGE_TABLES));
+
+		/* invalidate the cache */
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
+
+		temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
+
+		temp |= RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE;
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
+
+		temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
+
+	} else {
+		IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, 0);
+		temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
+		temp &= ~RS600_ENABLE_PAGE_TABLES;
+		IGP_WRITE_MCIND(RS600_MC_CNTL1, temp);
+	}
+}
+
 static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
 {
 	u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
@@ -850,6 +1044,11 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
 		return;
 	}
 
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
+		rs600_set_igpgart(dev_priv, on);
+		return;
+	}
+
 	if (dev_priv->flags & RADEON_IS_PCIE) {
 		radeon_set_pciegart(dev_priv, on);
 		return;
@@ -881,6 +1080,46 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
 	}
 }
 
+static int radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv)
+{
+	struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
+	struct radeon_virt_surface *vp;
+	int i;
+
+	for (i = 0; i < RADEON_MAX_SURFACES * 2; i++) {
+		if (!dev_priv->virt_surfaces[i].file_priv ||
+		    dev_priv->virt_surfaces[i].file_priv == PCIGART_FILE_PRIV)
+			break;
+	}
+	if (i >= 2 * RADEON_MAX_SURFACES)
+		return -ENOMEM;
+	vp = &dev_priv->virt_surfaces[i];
+
+	for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+		struct radeon_surface *sp = &dev_priv->surfaces[i];
+		if (sp->refcount)
+			continue;
+
+		vp->surface_index = i;
+		vp->lower = gart_info->bus_addr;
+		vp->upper = vp->lower + gart_info->table_size;
+		vp->flags = 0;
+		vp->file_priv = PCIGART_FILE_PRIV;
+
+		sp->refcount = 1;
+		sp->lower = vp->lower;
+		sp->upper = vp->upper;
+		sp->flags = 0;
+
+		RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, sp->flags);
+		RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16 * i, sp->lower);
+		RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16 * i, sp->upper);
+		return 0;
+	}
+
+	return -ENOMEM;
+}
+
 static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
 			     struct drm_file *file_priv)
 {
@@ -1062,11 +1301,12 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
 	} else
 #endif
 	{
-		dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
+		dev_priv->cp_ring->handle =
+			(void *)(unsigned long)dev_priv->cp_ring->offset;
 		dev_priv->ring_rptr->handle =
-		    (void *)dev_priv->ring_rptr->offset;
+			(void *)(unsigned long)dev_priv->ring_rptr->offset;
 		dev->agp_buffer_map->handle =
-		    (void *)dev->agp_buffer_map->offset;
+			(void *)(unsigned long)dev->agp_buffer_map->offset;
 
 		DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
 			  dev_priv->cp_ring->handle);
@@ -1173,11 +1413,14 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
 	} else
 #endif
 	{
+		u32 sctrl;
+		int ret;
+
 		dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
 		/* if we have an offset set from userspace */
 		if (dev_priv->pcigart_offset_set) {
 			dev_priv->gart_info.bus_addr =
-			    dev_priv->pcigart_offset + dev_priv->fb_location;
+				(resource_size_t)dev_priv->pcigart_offset + dev_priv->fb_location;
 			dev_priv->gart_info.mapping.offset =
 			    dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
 			dev_priv->gart_info.mapping.size =
@@ -1214,12 +1457,31 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
 			}
 		}
 
-		if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
+		sctrl = RADEON_READ(RADEON_SURFACE_CNTL);
+		RADEON_WRITE(RADEON_SURFACE_CNTL, 0);
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+			ret = r600_page_table_init(dev);
+		else
+			ret = drm_ati_pcigart_init(dev, &dev_priv->gart_info);
+		RADEON_WRITE(RADEON_SURFACE_CNTL, sctrl);
+
+		if (!ret) {
 			DRM_ERROR("failed to init PCI GART!\n");
 			radeon_do_cleanup_cp(dev);
 			return -ENOMEM;
 		}
 
+		ret = radeon_setup_pcigart_surface(dev_priv);
+		if (ret) {
+			DRM_ERROR("failed to setup GART surface!\n");
+			if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+				r600_page_table_cleanup(dev, &dev_priv->gart_info);
+			else
+				drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info);
+			radeon_do_cleanup_cp(dev);
+			return ret;
+		}
+
 		/* Turn on PCI GART */
 		radeon_set_pcigart(dev_priv, 1);
 	}
@@ -1268,14 +1530,18 @@ static int radeon_do_cleanup_cp(struct drm_device * dev)
 		if (dev_priv->gart_info.bus_addr) {
 			/* Turn off PCI GART */
 			radeon_set_pcigart(dev_priv, 0);
-			if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
-				DRM_ERROR("failed to cleanup PCI GART!\n");
+			if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
+				r600_page_table_cleanup(dev, &dev_priv->gart_info);
+			else {
+				if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
+					DRM_ERROR("failed to cleanup PCI GART!\n");
+			}
 		}
 
 		if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
 		{
 			drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
-			dev_priv->gart_info.addr = 0;
+			dev_priv->gart_info.addr = NULL;
 		}
 	}
 	/* only clear to the start of flags */
@@ -1326,6 +1592,7 @@ static int radeon_do_resume_cp(struct drm_device *dev, struct drm_file *file_pri
 
 int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
 {
+	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_init_t *init = data;
 
 	LOCK_TEST_WITH_RETURN(dev, file_priv);
@@ -1338,8 +1605,13 @@ int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_pri
 	case RADEON_INIT_R200_CP:
 	case RADEON_INIT_R300_CP:
 		return radeon_do_init_cp(dev, init, file_priv);
+	case RADEON_INIT_R600_CP:
+		return r600_do_init_cp(dev, init, file_priv);
 	case RADEON_CLEANUP_CP:
-		return radeon_do_cleanup_cp(dev);
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			return r600_do_cleanup_cp(dev);
+		else
+			return radeon_do_cleanup_cp(dev);
 	}
 
 	return -EINVAL;
@@ -1362,7 +1634,10 @@ int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_pr
 		return 0;
 	}
 
-	radeon_do_cp_start(dev_priv);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		r600_do_cp_start(dev_priv);
+	else
+		radeon_do_cp_start(dev_priv);
 
 	return 0;
 }
@@ -1393,7 +1668,10 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
 	 * code so that the DRM ioctl wrapper can try again.
 	 */
 	if (stop->idle) {
-		ret = radeon_do_cp_idle(dev_priv);
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			ret = r600_do_cp_idle(dev_priv);
+		else
+			ret = radeon_do_cp_idle(dev_priv);
 		if (ret)
 			return ret;
 	}
@@ -1402,10 +1680,16 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
 	 * we will get some dropped triangles as they won't be fully
 	 * rendered before the CP is shut down.
 	 */
-	radeon_do_cp_stop(dev_priv);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		r600_do_cp_stop(dev_priv);
+	else
+		radeon_do_cp_stop(dev_priv);
 
 	/* Reset the engine */
-	radeon_do_engine_reset(dev);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		r600_do_engine_reset(dev);
+	else
+		radeon_do_engine_reset(dev);
 
 	return 0;
 }
@@ -1418,29 +1702,47 @@ void radeon_do_release(struct drm_device * dev)
 	if (dev_priv) {
 		if (dev_priv->cp_running) {
 			/* Stop the cp */
-			while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
-				DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
+			if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
+				while ((ret = r600_do_cp_idle(dev_priv)) != 0) {
+					DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
+#ifdef __linux__
+					schedule();
+#else
+					tsleep(&ret, PZERO, "rdnrel", 1);
+#endif
+				}
+			} else {
+				while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
+					DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
 #ifdef __linux__
-				schedule();
+					schedule();
 #else
-				tsleep(&ret, PZERO, "rdnrel", 1);
+					tsleep(&ret, PZERO, "rdnrel", 1);
 #endif
+				}
+			}
+			if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
+				r600_do_cp_stop(dev_priv);
+				r600_do_engine_reset(dev);
+			} else {
+				radeon_do_cp_stop(dev_priv);
+				radeon_do_engine_reset(dev);
 			}
-			radeon_do_cp_stop(dev_priv);
-			radeon_do_engine_reset(dev);
 		}
 
-		/* Disable *all* interrupts */
-		if (dev_priv->mmio)	/* remove this after permanent addmaps */
-			RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
-
-		if (dev_priv->mmio) {	/* remove all surfaces */
-			for (i = 0; i < RADEON_MAX_SURFACES; i++) {
-				RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
-				RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
-					     16 * i, 0);
-				RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
-					     16 * i, 0);
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) {
+			/* Disable *all* interrupts */
+			if (dev_priv->mmio)	/* remove this after permanent addmaps */
+				RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
+
+			if (dev_priv->mmio) {	/* remove all surfaces */
+				for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+					RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
+					RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
+						     16 * i, 0);
+					RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
+						     16 * i, 0);
+				}
 			}
 		}
 
@@ -1449,7 +1751,10 @@ void radeon_do_release(struct drm_device * dev)
 		radeon_mem_takedown(&(dev_priv->fb_heap));
 
 		/* deallocate kernel resources */
-		radeon_do_cleanup_cp(dev);
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			r600_do_cleanup_cp(dev);
+		else
+			radeon_do_cleanup_cp(dev);
 	}
 }
 
@@ -1467,7 +1772,10 @@ int radeon_cp_reset(struct drm_device *dev, void *data, struct drm_file *file_pr
 		return -EINVAL;
 	}
 
-	radeon_do_cp_reset(dev_priv);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		r600_do_cp_reset(dev_priv);
+	else
+		radeon_do_cp_reset(dev_priv);
 
 	/* The CP is no longer running after an engine reset */
 	dev_priv->cp_running = 0;
@@ -1482,23 +1790,36 @@ int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *file_pri
 
 	LOCK_TEST_WITH_RETURN(dev, file_priv);
 
-	return radeon_do_cp_idle(dev_priv);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return r600_do_cp_idle(dev_priv);
+	else
+		return radeon_do_cp_idle(dev_priv);
 }
 
 /* Added by Charl P. Botha to call radeon_do_resume_cp().
  */
 int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv)
 {
-	return radeon_do_resume_cp(dev, file_priv);
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG("\n");
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return r600_do_resume_cp(dev, file_priv);
+	else
+		return radeon_do_resume_cp(dev, file_priv);
 }
 
 int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
 {
+	drm_radeon_private_t *dev_priv = dev->dev_private;
 	DRM_DEBUG("\n");
 
 	LOCK_TEST_WITH_RETURN(dev, file_priv);
 
-	return radeon_do_engine_reset(dev);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return r600_do_engine_reset(dev);
+	else
+		return radeon_do_engine_reset(dev);
 }
 
 /* ================================================================
@@ -1548,7 +1869,7 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
 	start = dev_priv->last_buf;
 
 	for (t = 0; t < dev_priv->usec_timeout; t++) {
-		u32 done_age = GET_SCRATCH(1);
+		u32 done_age = GET_SCRATCH(dev_priv, 1);
 		DRM_DEBUG("done_age = %d\n", done_age);
 		for (i = start; i < dma->buf_count; i++) {
 			buf = dma->buflist[i];
@@ -1582,8 +1903,9 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
 	struct drm_buf *buf;
 	int i, t;
 	int start;
-	u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
+	u32 done_age;
 
+	done_age = radeon_read_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1));
 	if (++dev_priv->last_buf >= dma->buf_count)
 		dev_priv->last_buf = 0;
 
@@ -1854,3 +2176,41 @@ int radeon_driver_unload(struct drm_device *dev)
 	dev->dev_private = NULL;
 	return 0;
 }
+
+void radeon_commit_ring(drm_radeon_private_t *dev_priv)
+{
+	int i;
+	u32 *ring;
+	int tail_aligned;
+
+	/* check if the ring is padded out to 16-dword alignment */
+
+	tail_aligned = dev_priv->ring.tail & 0xf;
+	if (tail_aligned) {
+		int num_p2 = 16 - tail_aligned;
+
+		ring = dev_priv->ring.start;
+		/* pad with some CP_PACKET2 */
+		for (i = 0; i < num_p2; i++)
+			ring[dev_priv->ring.tail + i] = CP_PACKET2();
+
+		dev_priv->ring.tail += i;
+
+		dev_priv->ring.space -= num_p2 * sizeof(u32);
+	}
+
+	dev_priv->ring.tail &= dev_priv->ring.tail_mask;
+
+	DRM_MEMORYBARRIER();
+	GET_RING_HEAD( dev_priv );
+
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
+		RADEON_WRITE(R600_CP_RB_WPTR, dev_priv->ring.tail);
+		/* read from PCI bus to ensure correct posting */
+		RADEON_READ(R600_CP_RB_RPTR);
+	} else {
+		RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail);
+		/* read from PCI bus to ensure correct posting */
+		RADEON_READ(RADEON_CP_RB_RPTR);
+	}
+}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index fef207881f45..13a60f4d4227 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -41,23 +41,15 @@ int radeon_no_wb;
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
 
-static int dri_library_name(struct drm_device *dev, char *buf)
-{
-	drm_radeon_private_t *dev_priv = dev->dev_private;
-	int family = dev_priv->flags & RADEON_FAMILY_MASK;
-
-	return snprintf(buf, PAGE_SIZE, "%s\n",
-		        (family < CHIP_R200) ? "radeon" :
-		        ((family < CHIP_R300) ? "r200" :
-		        "r300"));
-}
-
 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return 0;
+
 	/* Disable *all* interrupts */
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 	return 0;
@@ -67,8 +59,11 @@ static int radeon_resume(struct drm_device *dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return 0;
+
 	/* Restore interrupt registers */
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
 	return 0;
@@ -95,7 +90,6 @@ static struct drm_driver driver = {
 	.get_vblank_counter = radeon_get_vblank_counter,
 	.enable_vblank = radeon_enable_vblank,
 	.disable_vblank = radeon_disable_vblank,
-	.dri_library_name = dri_library_name,
 	.master_create = radeon_master_create,
 	.master_destroy = radeon_master_destroy,
 	.irq_preinstall = radeon_driver_irq_preinstall,
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 490bc7ceef60..ed4d27e6ee6f 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -126,6 +126,7 @@ enum radeon_family {
 	CHIP_RV410,
 	CHIP_RS400,
 	CHIP_RS480,
+	CHIP_RS600,
 	CHIP_RS690,
 	CHIP_RS740,
 	CHIP_RV515,
@@ -134,6 +135,16 @@ enum radeon_family {
 	CHIP_RV560,
 	CHIP_RV570,
 	CHIP_R580,
+	CHIP_R600,
+	CHIP_RV610,
+	CHIP_RV630,
+	CHIP_RV620,
+	CHIP_RV635,
+	CHIP_RV670,
+	CHIP_RS780,
+	CHIP_RV770,
+	CHIP_RV730,
+	CHIP_RV710,
 	CHIP_LAST,
 };
 
@@ -160,10 +171,6 @@ enum radeon_chip_flags {
 	RADEON_IS_IGPGART = 0x01000000UL,
 };
 
-#define GET_RING_HEAD(dev_priv)	(dev_priv->writeback_works ? \
-        DRM_READ32(  (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
-#define SET_RING_HEAD(dev_priv,val)	DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
-
 typedef struct drm_radeon_freelist {
 	unsigned int age;
 	struct drm_buf *buf;
@@ -221,10 +228,11 @@ struct radeon_virt_surface {
 	u32 upper;
 	u32 flags;
 	struct drm_file *file_priv;
+#define PCIGART_FILE_PRIV	((void *) -1L)
 };
 
-#define RADEON_FLUSH_EMITED	(1 < 0)
-#define RADEON_PURGE_EMITED	(1 < 1)
+#define RADEON_FLUSH_EMITED	(1 << 0)
+#define RADEON_PURGE_EMITED	(1 << 1)
 
 struct drm_radeon_master_private {
 	drm_local_map_t *sarea;
@@ -248,7 +256,6 @@ typedef struct drm_radeon_private {
 	drm_radeon_freelist_t *head;
 	drm_radeon_freelist_t *tail;
 	int last_buf;
-	volatile u32 *scratch;
 	int writeback_works;
 
 	int usec_timeout;
@@ -316,11 +323,31 @@ typedef struct drm_radeon_private {
 
 	/* starting from here on, data is preserved accross an open */
 	uint32_t flags;		/* see radeon_chip_flags */
-	unsigned long fb_aper_offset;
+	resource_size_t fb_aper_offset;
 
 	int num_gb_pipes;
 	int track_flush;
 	drm_local_map_t *mmio;
+
+	/* r6xx/r7xx pipe/shader config */
+	int r600_max_pipes;
+	int r600_max_tile_pipes;
+	int r600_max_simds;
+	int r600_max_backends;
+	int r600_max_gprs;
+	int r600_max_threads;
+	int r600_max_stack_entries;
+	int r600_max_hw_contexts;
+	int r600_max_gs_threads;
+	int r600_sx_max_export_size;
+	int r600_sx_max_export_pos_size;
+	int r600_sx_max_export_smx_size;
+	int r600_sq_num_cf_insts;
+	int r700_sx_num_of_sets;
+	int r700_sc_prim_fifo_size;
+	int r700_sc_hiz_tile_fifo_size;
+	int r700_sc_earlyz_tile_fifo_fize;
+
 } drm_radeon_private_t;
 
 typedef struct drm_radeon_buf_priv {
@@ -338,6 +365,12 @@ extern int radeon_no_wb;
 extern struct drm_ioctl_desc radeon_ioctls[];
 extern int radeon_max_ioctl;
 
+extern u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv);
+extern void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val);
+
+#define GET_RING_HEAD(dev_priv)	radeon_get_ring_head(dev_priv)
+#define SET_RING_HEAD(dev_priv, val) radeon_set_ring_head(dev_priv, val)
+
 /* Check whether the given hardware address is inside the framebuffer or the
  * GART area.
  */
@@ -364,6 +397,9 @@ extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_fi
 extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
 extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
 extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
+extern void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc);
+extern void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base);
+extern u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr);
 
 extern void radeon_freelist_reset(struct drm_device * dev);
 extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
@@ -383,6 +419,10 @@ extern void radeon_mem_takedown(struct mem_block **heap);
 extern void radeon_mem_release(struct drm_file *file_priv,
 			       struct mem_block *heap);
 
+extern void radeon_enable_bm(struct drm_radeon_private *dev_priv);
+extern u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off);
+extern void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u32 off, u32 val);
+
 				/* radeon_irq.c */
 extern void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state);
 extern int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv);
@@ -423,6 +463,21 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 			     struct drm_file *file_priv,
 			     drm_radeon_kcmd_buffer_t *cmdbuf);
 
+/* r600_cp.c */
+extern int r600_do_engine_reset(struct drm_device *dev);
+extern int r600_do_cleanup_cp(struct drm_device *dev);
+extern int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
+			   struct drm_file *file_priv);
+extern int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv);
+extern int r600_do_cp_idle(drm_radeon_private_t *dev_priv);
+extern void r600_do_cp_start(drm_radeon_private_t *dev_priv);
+extern void r600_do_cp_reset(drm_radeon_private_t *dev_priv);
+extern void r600_do_cp_stop(drm_radeon_private_t *dev_priv);
+extern int r600_cp_dispatch_indirect(struct drm_device *dev,
+				     struct drm_buf *buf, int start, int end);
+extern int r600_page_table_init(struct drm_device *dev);
+extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
+
 /* Flags for stats.boxes
  */
 #define RADEON_BOX_DMA_IDLE      0x1
@@ -434,6 +489,8 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 /* Register definitions, register access macros and drmAddMap constants
  * for Radeon kernel driver.
  */
+#define RADEON_MM_INDEX		        0x0000
+#define RADEON_MM_DATA		        0x0004
 
 #define RADEON_AGP_COMMAND		0x0f60
 #define RADEON_AGP_COMMAND_PCI_CONFIG   0x0060	/* offset in PCI config */
@@ -556,6 +613,56 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #define RS690_MC_AGP_BASE               0x102
 #define RS690_MC_AGP_BASE_2             0x103
 
+#define RS600_MC_INDEX                          0x70
+#       define RS600_MC_ADDR_MASK               0xffff
+#       define RS600_MC_IND_SEQ_RBS_0           (1 << 16)
+#       define RS600_MC_IND_SEQ_RBS_1           (1 << 17)
+#       define RS600_MC_IND_SEQ_RBS_2           (1 << 18)
+#       define RS600_MC_IND_SEQ_RBS_3           (1 << 19)
+#       define RS600_MC_IND_AIC_RBS             (1 << 20)
+#       define RS600_MC_IND_CITF_ARB0           (1 << 21)
+#       define RS600_MC_IND_CITF_ARB1           (1 << 22)
+#       define RS600_MC_IND_WR_EN               (1 << 23)
+#define RS600_MC_DATA                           0x74
+
+#define RS600_MC_STATUS                         0x0
+#       define RS600_MC_IDLE                    (1 << 1)
+#define RS600_MC_FB_LOCATION                    0x4
+#define RS600_MC_AGP_LOCATION                   0x5
+#define RS600_AGP_BASE                          0x6
+#define RS600_AGP_BASE_2                        0x7
+#define RS600_MC_CNTL1                          0x9
+#       define RS600_ENABLE_PAGE_TABLES         (1 << 26)
+#define RS600_MC_PT0_CNTL                       0x100
+#       define RS600_ENABLE_PT                  (1 << 0)
+#       define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15)
+#       define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21)
+#       define RS600_INVALIDATE_ALL_L1_TLBS     (1 << 28)
+#       define RS600_INVALIDATE_L2_CACHE        (1 << 29)
+#define RS600_MC_PT0_CONTEXT0_CNTL              0x102
+#       define RS600_ENABLE_PAGE_TABLE          (1 << 0)
+#       define RS600_PAGE_TABLE_TYPE_FLAT       (0 << 1)
+#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR   0x112
+#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR  0x114
+#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c
+#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR    0x12c
+#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR   0x13c
+#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR     0x14c
+#define RS600_MC_PT0_CLIENT0_CNTL               0x16c
+#       define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE       (1 << 0)
+#       define RS600_TRANSLATION_MODE_OVERRIDE              (1 << 1)
+#       define RS600_SYSTEM_ACCESS_MODE_MASK                (3 << 8)
+#       define RS600_SYSTEM_ACCESS_MODE_PA_ONLY             (0 << 8)
+#       define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP         (1 << 8)
+#       define RS600_SYSTEM_ACCESS_MODE_IN_SYS              (2 << 8)
+#       define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS          (3 << 8)
+#       define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH        (0 << 10)
+#       define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE       (1 << 10)
+#       define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11)
+#       define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14)
+#       define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
+#       define RS600_INVALIDATE_L1_TLB          (1 << 20)
+
 #define R520_MC_IND_INDEX 0x70
 #define R520_MC_IND_WR_EN (1 << 24)
 #define R520_MC_IND_DATA  0x74
@@ -580,7 +687,6 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 /* pipe config regs */
 #define R400_GB_PIPE_SELECT             0x402c
 #define R500_DYN_SCLK_PWMEM_PIPE        0x000d /* PLL */
-#define R500_SU_REG_DEST                0x42c8
 #define R300_GB_TILE_CONFIG             0x4018
 #       define R300_ENABLE_TILING       (1 << 0)
 #       define R300_PIPE_COUNT_RV350    (0 << 1)
@@ -639,9 +745,22 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 
 #define RADEON_SCRATCHOFF( x )		(RADEON_SCRATCH_REG_OFFSET + 4*(x))
 
-#define GET_SCRATCH( x )	(dev_priv->writeback_works			\
-				? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
-				: RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
+extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
+
+#define GET_SCRATCH(dev_priv, x) radeon_get_scratch(dev_priv, x)
+
+#define R600_SCRATCH_REG0		0x8500
+#define R600_SCRATCH_REG1		0x8504
+#define R600_SCRATCH_REG2		0x8508
+#define R600_SCRATCH_REG3		0x850c
+#define R600_SCRATCH_REG4		0x8510
+#define R600_SCRATCH_REG5		0x8514
+#define R600_SCRATCH_REG6		0x8518
+#define R600_SCRATCH_REG7		0x851c
+#define R600_SCRATCH_UMSK		0x8540
+#define R600_SCRATCH_ADDR		0x8544
+
+#define R600_SCRATCHOFF(x)		(R600_SCRATCH_REG_OFFSET + 4*(x))
 
 #define RADEON_GEN_INT_CNTL		0x0040
 #	define RADEON_CRTC_VBLANK_MASK		(1 << 0)
@@ -922,6 +1041,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #define RADEON_CP_RB_CNTL		0x0704
 #	define RADEON_BUF_SWAP_32BIT		(2 << 16)
 #	define RADEON_RB_NO_UPDATE		(1 << 27)
+#	define RADEON_RB_RPTR_WR_ENA		(1 << 31)
 #define RADEON_CP_RB_RPTR_ADDR		0x070c
 #define RADEON_CP_RB_RPTR		0x0710
 #define RADEON_CP_RB_WPTR		0x0714
@@ -983,6 +1103,14 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #	define RADEON_CNTL_BITBLT_MULTI		0x00009B00
 #	define RADEON_CNTL_SET_SCISSORS		0xC0001E00
 
+#	define R600_IT_INDIRECT_BUFFER		0x00003200
+#	define R600_IT_ME_INITIALIZE		0x00004400
+#	       define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)
+#	define R600_IT_EVENT_WRITE		0x00004600
+#	define R600_IT_SET_CONFIG_REG		0x00006800
+#	define R600_SET_CONFIG_REG_OFFSET       0x00008000
+#	define R600_SET_CONFIG_REG_END          0x0000ac00
+
 #define RADEON_CP_PACKET_MASK		0xC0000000
 #define RADEON_CP_PACKET_COUNT_MASK	0x3fff0000
 #define RADEON_CP_PACKET0_REG_MASK	0x000007ff
@@ -1181,6 +1309,422 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #define R500_D1_VBLANK_INTERRUPT (1 << 4)
 #define R500_D2_VBLANK_INTERRUPT (1 << 5)
 
+/* R6xx/R7xx registers */
+#define R600_MC_VM_FB_LOCATION                                 0x2180
+#define R600_MC_VM_AGP_TOP                                     0x2184
+#define R600_MC_VM_AGP_BOT                                     0x2188
+#define R600_MC_VM_AGP_BASE                                    0x218c
+#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR                    0x2190
+#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR                   0x2194
+#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR                0x2198
+
+#define R700_MC_VM_FB_LOCATION                                 0x2024
+#define R700_MC_VM_AGP_TOP                                     0x2028
+#define R700_MC_VM_AGP_BOT                                     0x202c
+#define R700_MC_VM_AGP_BASE                                    0x2030
+#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR                    0x2034
+#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR                   0x2038
+#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR                0x203c
+
+#define R600_MCD_RD_A_CNTL                                     0x219c
+#define R600_MCD_RD_B_CNTL                                     0x21a0
+
+#define R600_MCD_WR_A_CNTL                                     0x21a4
+#define R600_MCD_WR_B_CNTL                                     0x21a8
+
+#define R600_MCD_RD_SYS_CNTL                                   0x2200
+#define R600_MCD_WR_SYS_CNTL                                   0x2214
+
+#define R600_MCD_RD_GFX_CNTL                                   0x21fc
+#define R600_MCD_RD_HDP_CNTL                                   0x2204
+#define R600_MCD_RD_PDMA_CNTL                                  0x2208
+#define R600_MCD_RD_SEM_CNTL                                   0x220c
+#define R600_MCD_WR_GFX_CNTL                                   0x2210
+#define R600_MCD_WR_HDP_CNTL                                   0x2218
+#define R600_MCD_WR_PDMA_CNTL                                  0x221c
+#define R600_MCD_WR_SEM_CNTL                                   0x2220
+
+#       define R600_MCD_L1_TLB                                 (1 << 0)
+#       define R600_MCD_L1_FRAG_PROC                           (1 << 1)
+#       define R600_MCD_L1_STRICT_ORDERING                     (1 << 2)
+
+#       define R600_MCD_SYSTEM_ACCESS_MODE_MASK                (3 << 6)
+#       define R600_MCD_SYSTEM_ACCESS_MODE_PA_ONLY             (0 << 6)
+#       define R600_MCD_SYSTEM_ACCESS_MODE_USE_SYS_MAP         (1 << 6)
+#       define R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS              (2 << 6)
+#       define R600_MCD_SYSTEM_ACCESS_MODE_NOT_IN_SYS          (3 << 6)
+
+#       define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU    (0 << 8)
+#       define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 8)
+
+#       define R600_MCD_SEMAPHORE_MODE                         (1 << 10)
+#       define R600_MCD_WAIT_L2_QUERY                          (1 << 11)
+#       define R600_MCD_EFFECTIVE_L1_TLB_SIZE(x)               ((x) << 12)
+#       define R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(x)             ((x) << 15)
+
+#define R700_MC_VM_MD_L1_TLB0_CNTL                             0x2654
+#define R700_MC_VM_MD_L1_TLB1_CNTL                             0x2658
+#define R700_MC_VM_MD_L1_TLB2_CNTL                             0x265c
+
+#define R700_MC_VM_MB_L1_TLB0_CNTL                             0x2234
+#define R700_MC_VM_MB_L1_TLB1_CNTL                             0x2238
+#define R700_MC_VM_MB_L1_TLB2_CNTL                             0x223c
+#define R700_MC_VM_MB_L1_TLB3_CNTL                             0x2240
+
+#       define R700_ENABLE_L1_TLB                              (1 << 0)
+#       define R700_ENABLE_L1_FRAGMENT_PROCESSING              (1 << 1)
+#       define R700_SYSTEM_ACCESS_MODE_IN_SYS                  (2 << 3)
+#       define R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU  (0 << 5)
+#       define R700_EFFECTIVE_L1_TLB_SIZE(x)                   ((x) << 15)
+#       define R700_EFFECTIVE_L1_QUEUE_SIZE(x)                 ((x) << 18)
+
+#define R700_MC_ARB_RAMCFG                                     0x2760
+#       define R700_NOOFBANK_SHIFT                             0
+#       define R700_NOOFBANK_MASK                              0x3
+#       define R700_NOOFRANK_SHIFT                             2
+#       define R700_NOOFRANK_MASK                              0x1
+#       define R700_NOOFROWS_SHIFT                             3
+#       define R700_NOOFROWS_MASK                              0x7
+#       define R700_NOOFCOLS_SHIFT                             6
+#       define R700_NOOFCOLS_MASK                              0x3
+#       define R700_CHANSIZE_SHIFT                             8
+#       define R700_CHANSIZE_MASK                              0x1
+#       define R700_BURSTLENGTH_SHIFT                          9
+#       define R700_BURSTLENGTH_MASK                           0x1
+#define R600_RAMCFG                                            0x2408
+#       define R600_NOOFBANK_SHIFT                             0
+#       define R600_NOOFBANK_MASK                              0x1
+#       define R600_NOOFRANK_SHIFT                             1
+#       define R600_NOOFRANK_MASK                              0x1
+#       define R600_NOOFROWS_SHIFT                             2
+#       define R600_NOOFROWS_MASK                              0x7
+#       define R600_NOOFCOLS_SHIFT                             5
+#       define R600_NOOFCOLS_MASK                              0x3
+#       define R600_CHANSIZE_SHIFT                             7
+#       define R600_CHANSIZE_MASK                              0x1
+#       define R600_BURSTLENGTH_SHIFT                          8
+#       define R600_BURSTLENGTH_MASK                           0x1
+
+#define R600_VM_L2_CNTL                                        0x1400
+#       define R600_VM_L2_CACHE_EN                             (1 << 0)
+#       define R600_VM_L2_FRAG_PROC                            (1 << 1)
+#       define R600_VM_ENABLE_PTE_CACHE_LRU_W                  (1 << 9)
+#       define R600_VM_L2_CNTL_QUEUE_SIZE(x)                   ((x) << 13)
+#       define R700_VM_L2_CNTL_QUEUE_SIZE(x)                   ((x) << 14)
+
+#define R600_VM_L2_CNTL2                                       0x1404
+#       define R600_VM_L2_CNTL2_INVALIDATE_ALL_L1_TLBS         (1 << 0)
+#       define R600_VM_L2_CNTL2_INVALIDATE_L2_CACHE            (1 << 1)
+#define R600_VM_L2_CNTL3                                       0x1408
+#       define R600_VM_L2_CNTL3_BANK_SELECT_0(x)               ((x) << 0)
+#       define R600_VM_L2_CNTL3_BANK_SELECT_1(x)               ((x) << 5)
+#       define R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(x)           ((x) << 10)
+#       define R700_VM_L2_CNTL3_BANK_SELECT(x)                 ((x) << 0)
+#       define R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(x)           ((x) << 6)
+
+#define R600_VM_L2_STATUS                                      0x140c
+
+#define R600_VM_CONTEXT0_CNTL                                  0x1410
+#       define R600_VM_ENABLE_CONTEXT                          (1 << 0)
+#       define R600_VM_PAGE_TABLE_DEPTH_FLAT                   (0 << 1)
+
+#define R600_VM_CONTEXT0_CNTL2                                 0x1430
+#define R600_VM_CONTEXT0_REQUEST_RESPONSE                      0x1470
+#define R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR                 0x1490
+#define R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR                0x14b0
+#define R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR                  0x1574
+#define R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR                 0x1594
+#define R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR                   0x15b4
+
+#define R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR                  0x153c
+#define R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR                 0x155c
+#define R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR                   0x157c
+
+#define R600_HDP_HOST_PATH_CNTL                                0x2c00
+
+#define R600_GRBM_CNTL                                         0x8000
+#       define R600_GRBM_READ_TIMEOUT(x)                       ((x) << 0)
+
+#define R600_GRBM_STATUS                                       0x8010
+#       define R600_CMDFIFO_AVAIL_MASK                         0x1f
+#       define R700_CMDFIFO_AVAIL_MASK                         0xf
+#       define R600_GUI_ACTIVE                                 (1 << 31)
+#define R600_GRBM_STATUS2                                      0x8014
+#define R600_GRBM_SOFT_RESET                                   0x8020
+#       define R600_SOFT_RESET_CP                              (1 << 0)
+#define R600_WAIT_UNTIL		                               0x8040
+
+#define R600_CP_SEM_WAIT_TIMER                                 0x85bc
+#define R600_CP_ME_CNTL                                        0x86d8
+#       define R600_CP_ME_HALT                                 (1 << 28)
+#define R600_CP_QUEUE_THRESHOLDS                               0x8760
+#       define R600_ROQ_IB1_START(x)                           ((x) << 0)
+#       define R600_ROQ_IB2_START(x)                           ((x) << 8)
+#define R600_CP_MEQ_THRESHOLDS                                 0x8764
+#       define R700_STQ_SPLIT(x)                               ((x) << 0)
+#       define R600_MEQ_END(x)                                 ((x) << 16)
+#       define R600_ROQ_END(x)                                 ((x) << 24)
+#define R600_CP_PERFMON_CNTL                                   0x87fc
+#define R600_CP_RB_BASE                                        0xc100
+#define R600_CP_RB_CNTL                                        0xc104
+#       define R600_RB_BUFSZ(x)                                ((x) << 0)
+#       define R600_RB_BLKSZ(x)                                ((x) << 8)
+#       define R600_RB_NO_UPDATE                               (1 << 27)
+#       define R600_RB_RPTR_WR_ENA                             (1 << 31)
+#define R600_CP_RB_RPTR_WR                                     0xc108
+#define R600_CP_RB_RPTR_ADDR                                   0xc10c
+#define R600_CP_RB_RPTR_ADDR_HI                                0xc110
+#define R600_CP_RB_WPTR                                        0xc114
+#define R600_CP_RB_WPTR_ADDR                                   0xc118
+#define R600_CP_RB_WPTR_ADDR_HI                                0xc11c
+#define R600_CP_RB_RPTR                                        0x8700
+#define R600_CP_RB_WPTR_DELAY                                  0x8704
+#define R600_CP_PFP_UCODE_ADDR                                 0xc150
+#define R600_CP_PFP_UCODE_DATA                                 0xc154
+#define R600_CP_ME_RAM_RADDR                                   0xc158
+#define R600_CP_ME_RAM_WADDR                                   0xc15c
+#define R600_CP_ME_RAM_DATA                                    0xc160
+#define R600_CP_DEBUG                                          0xc1fc
+
+#define R600_PA_CL_ENHANCE                                     0x8a14
+#       define R600_CLIP_VTX_REORDER_ENA                       (1 << 0)
+#       define R600_NUM_CLIP_SEQ(x)                            ((x) << 1)
+#define R600_PA_SC_LINE_STIPPLE_STATE                          0x8b10
+#define R600_PA_SC_MULTI_CHIP_CNTL                             0x8b20
+#define R700_PA_SC_FORCE_EOV_MAX_CNTS                          0x8b24
+#       define R700_FORCE_EOV_MAX_CLK_CNT(x)                   ((x) << 0)
+#       define R700_FORCE_EOV_MAX_REZ_CNT(x)                   ((x) << 16)
+#define R600_PA_SC_AA_SAMPLE_LOCS_2S                           0x8b40
+#define R600_PA_SC_AA_SAMPLE_LOCS_4S                           0x8b44
+#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0                       0x8b48
+#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1                       0x8b4c
+#       define R600_S0_X(x)                                    ((x) << 0)
+#       define R600_S0_Y(x)                                    ((x) << 4)
+#       define R600_S1_X(x)                                    ((x) << 8)
+#       define R600_S1_Y(x)                                    ((x) << 12)
+#       define R600_S2_X(x)                                    ((x) << 16)
+#       define R600_S2_Y(x)                                    ((x) << 20)
+#       define R600_S3_X(x)                                    ((x) << 24)
+#       define R600_S3_Y(x)                                    ((x) << 28)
+#       define R600_S4_X(x)                                    ((x) << 0)
+#       define R600_S4_Y(x)                                    ((x) << 4)
+#       define R600_S5_X(x)                                    ((x) << 8)
+#       define R600_S5_Y(x)                                    ((x) << 12)
+#       define R600_S6_X(x)                                    ((x) << 16)
+#       define R600_S6_Y(x)                                    ((x) << 20)
+#       define R600_S7_X(x)                                    ((x) << 24)
+#       define R600_S7_Y(x)                                    ((x) << 28)
+#define R600_PA_SC_FIFO_SIZE                                   0x8bd0
+#       define R600_SC_PRIM_FIFO_SIZE(x)                       ((x) << 0)
+#       define R600_SC_HIZ_TILE_FIFO_SIZE(x)                   ((x) << 8)
+#       define R600_SC_EARLYZ_TILE_FIFO_SIZE(x)                ((x) << 16)
+#define R700_PA_SC_FIFO_SIZE_R7XX                              0x8bcc
+#       define R700_SC_PRIM_FIFO_SIZE(x)                       ((x) << 0)
+#       define R700_SC_HIZ_TILE_FIFO_SIZE(x)                   ((x) << 12)
+#       define R700_SC_EARLYZ_TILE_FIFO_SIZE(x)                ((x) << 20)
+#define R600_PA_SC_ENHANCE                                     0x8bf0
+#       define R600_FORCE_EOV_MAX_CLK_CNT(x)                   ((x) << 0)
+#       define R600_FORCE_EOV_MAX_TILE_CNT(x)                  ((x) << 12)
+#define R600_PA_SC_CLIPRECT_RULE                               0x2820c
+#define R700_PA_SC_EDGERULE                                    0x28230
+#define R600_PA_SC_LINE_STIPPLE                                0x28a0c
+#define R600_PA_SC_MODE_CNTL                                   0x28a4c
+#define R600_PA_SC_AA_CONFIG                                   0x28c04
+
+#define R600_SX_EXPORT_BUFFER_SIZES                            0x900c
+#       define R600_COLOR_BUFFER_SIZE(x)                       ((x) << 0)
+#       define R600_POSITION_BUFFER_SIZE(x)                    ((x) << 8)
+#       define R600_SMX_BUFFER_SIZE(x)                         ((x) << 16)
+#define R600_SX_DEBUG_1                                        0x9054
+#       define R600_SMX_EVENT_RELEASE                          (1 << 0)
+#       define R600_ENABLE_NEW_SMX_ADDRESS                     (1 << 16)
+#define R700_SX_DEBUG_1                                        0x9058
+#       define R700_ENABLE_NEW_SMX_ADDRESS                     (1 << 16)
+#define R600_SX_MISC                                           0x28350
+
+#define R600_DB_DEBUG                                          0x9830
+#       define R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE              (1 << 31)
+#define R600_DB_WATERMARKS                                     0x9838
+#       define R600_DEPTH_FREE(x)                              ((x) << 0)
+#       define R600_DEPTH_FLUSH(x)                             ((x) << 5)
+#       define R600_DEPTH_PENDING_FREE(x)                      ((x) << 15)
+#       define R600_DEPTH_CACHELINE_FREE(x)                    ((x) << 20)
+#define R700_DB_DEBUG3                                         0x98b0
+#       define R700_DB_CLK_OFF_DELAY(x)                        ((x) << 11)
+#define RV700_DB_DEBUG4                                        0x9b8c
+#       define RV700_DISABLE_TILE_COVERED_FOR_PS_ITER          (1 << 6)
+
+#define R600_VGT_CACHE_INVALIDATION                            0x88c4
+#       define R600_CACHE_INVALIDATION(x)                      ((x) << 0)
+#       define R600_VC_ONLY                                    0
+#       define R600_TC_ONLY                                    1
+#       define R600_VC_AND_TC                                  2
+#       define R700_AUTO_INVLD_EN(x)                           ((x) << 6)
+#       define R700_NO_AUTO                                    0
+#       define R700_ES_AUTO                                    1
+#       define R700_GS_AUTO                                    2
+#       define R700_ES_AND_GS_AUTO                             3
+#define R600_VGT_GS_PER_ES                                     0x88c8
+#define R600_VGT_ES_PER_GS                                     0x88cc
+#define R600_VGT_GS_PER_VS                                     0x88e8
+#define R600_VGT_GS_VERTEX_REUSE                               0x88d4
+#define R600_VGT_NUM_INSTANCES                                 0x8974
+#define R600_VGT_STRMOUT_EN                                    0x28ab0
+#define R600_VGT_EVENT_INITIATOR                               0x28a90
+#       define R600_CACHE_FLUSH_AND_INV_EVENT                  (0x16 << 0)
+#define R600_VGT_VERTEX_REUSE_BLOCK_CNTL                       0x28c58
+#       define R600_VTX_REUSE_DEPTH_MASK                       0xff
+#define R600_VGT_OUT_DEALLOC_CNTL                              0x28c5c
+#       define R600_DEALLOC_DIST_MASK                          0x7f
+
+#define R600_CB_COLOR0_BASE                                    0x28040
+#define R600_CB_COLOR1_BASE                                    0x28044
+#define R600_CB_COLOR2_BASE                                    0x28048
+#define R600_CB_COLOR3_BASE                                    0x2804c
+#define R600_CB_COLOR4_BASE                                    0x28050
+#define R600_CB_COLOR5_BASE                                    0x28054
+#define R600_CB_COLOR6_BASE                                    0x28058
+#define R600_CB_COLOR7_BASE                                    0x2805c
+#define R600_CB_COLOR7_FRAG                                    0x280fc
+
+#define R600_TC_CNTL                                           0x9608
+#       define R600_TC_L2_SIZE(x)                              ((x) << 5)
+#       define R600_L2_DISABLE_LATE_HIT                        (1 << 9)
+
+#define R600_ARB_POP                                           0x2418
+#       define R600_ENABLE_TC128                               (1 << 30)
+#define R600_ARB_GDEC_RD_CNTL                                  0x246c
+
+#define R600_TA_CNTL_AUX                                       0x9508
+#       define R600_DISABLE_CUBE_WRAP                          (1 << 0)
+#       define R600_DISABLE_CUBE_ANISO                         (1 << 1)
+#       define R700_GETLOD_SELECT(x)                           ((x) << 2)
+#       define R600_SYNC_GRADIENT                              (1 << 24)
+#       define R600_SYNC_WALKER                                (1 << 25)
+#       define R600_SYNC_ALIGNER                               (1 << 26)
+#       define R600_BILINEAR_PRECISION_6_BIT                   (0 << 31)
+#       define R600_BILINEAR_PRECISION_8_BIT                   (1 << 31)
+
+#define R700_TCP_CNTL                                          0x9610
+
+#define R600_SMX_DC_CTL0                                       0xa020
+#       define R700_USE_HASH_FUNCTION                          (1 << 0)
+#       define R700_CACHE_DEPTH(x)                             ((x) << 1)
+#       define R700_FLUSH_ALL_ON_EVENT                         (1 << 10)
+#       define R700_STALL_ON_EVENT                             (1 << 11)
+#define R700_SMX_EVENT_CTL                                     0xa02c
+#       define R700_ES_FLUSH_CTL(x)                            ((x) << 0)
+#       define R700_GS_FLUSH_CTL(x)                            ((x) << 3)
+#       define R700_ACK_FLUSH_CTL(x)                           ((x) << 6)
+#       define R700_SYNC_FLUSH_CTL                             (1 << 8)
+
+#define R600_SQ_CONFIG                                         0x8c00
+#       define R600_VC_ENABLE                                  (1 << 0)
+#       define R600_EXPORT_SRC_C                               (1 << 1)
+#       define R600_DX9_CONSTS                                 (1 << 2)
+#       define R600_ALU_INST_PREFER_VECTOR                     (1 << 3)
+#       define R600_DX10_CLAMP                                 (1 << 4)
+#       define R600_CLAUSE_SEQ_PRIO(x)                         ((x) << 8)
+#       define R600_PS_PRIO(x)                                 ((x) << 24)
+#       define R600_VS_PRIO(x)                                 ((x) << 26)
+#       define R600_GS_PRIO(x)                                 ((x) << 28)
+#       define R600_ES_PRIO(x)                                 ((x) << 30)
+#define R600_SQ_GPR_RESOURCE_MGMT_1                            0x8c04
+#       define R600_NUM_PS_GPRS(x)                             ((x) << 0)
+#       define R600_NUM_VS_GPRS(x)                             ((x) << 16)
+#       define R700_DYN_GPR_ENABLE                             (1 << 27)
+#       define R600_NUM_CLAUSE_TEMP_GPRS(x)                    ((x) << 28)
+#define R600_SQ_GPR_RESOURCE_MGMT_2                            0x8c08
+#       define R600_NUM_GS_GPRS(x)                             ((x) << 0)
+#       define R600_NUM_ES_GPRS(x)                             ((x) << 16)
+#define R600_SQ_THREAD_RESOURCE_MGMT                           0x8c0c
+#       define R600_NUM_PS_THREADS(x)                          ((x) << 0)
+#       define R600_NUM_VS_THREADS(x)                          ((x) << 8)
+#       define R600_NUM_GS_THREADS(x)                          ((x) << 16)
+#       define R600_NUM_ES_THREADS(x)                          ((x) << 24)
+#define R600_SQ_STACK_RESOURCE_MGMT_1                          0x8c10
+#       define R600_NUM_PS_STACK_ENTRIES(x)                    ((x) << 0)
+#       define R600_NUM_VS_STACK_ENTRIES(x)                    ((x) << 16)
+#define R600_SQ_STACK_RESOURCE_MGMT_2                          0x8c14
+#       define R600_NUM_GS_STACK_ENTRIES(x)                    ((x) << 0)
+#       define R600_NUM_ES_STACK_ENTRIES(x)                    ((x) << 16)
+#define R600_SQ_MS_FIFO_SIZES                                  0x8cf0
+#       define R600_CACHE_FIFO_SIZE(x)                         ((x) << 0)
+#       define R600_FETCH_FIFO_HIWATER(x)                      ((x) << 8)
+#       define R600_DONE_FIFO_HIWATER(x)                       ((x) << 16)
+#       define R600_ALU_UPDATE_FIFO_HIWATER(x)                 ((x) << 24)
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_0                         0x8db0
+#       define R700_SIMDA_RING0(x)                             ((x) << 0)
+#       define R700_SIMDA_RING1(x)                             ((x) << 8)
+#       define R700_SIMDB_RING0(x)                             ((x) << 16)
+#       define R700_SIMDB_RING1(x)                             ((x) << 24)
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_1                         0x8db4
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_2                         0x8db8
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_3                         0x8dbc
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_4                         0x8dc0
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_5                         0x8dc4
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_6                         0x8dc8
+#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_7                         0x8dcc
+
+#define R600_SPI_PS_IN_CONTROL_0                               0x286cc
+#       define R600_NUM_INTERP(x)                              ((x) << 0)
+#       define R600_POSITION_ENA                               (1 << 8)
+#       define R600_POSITION_CENTROID                          (1 << 9)
+#       define R600_POSITION_ADDR(x)                           ((x) << 10)
+#       define R600_PARAM_GEN(x)                               ((x) << 15)
+#       define R600_PARAM_GEN_ADDR(x)                          ((x) << 19)
+#       define R600_BARYC_SAMPLE_CNTL(x)                       ((x) << 26)
+#       define R600_PERSP_GRADIENT_ENA                         (1 << 28)
+#       define R600_LINEAR_GRADIENT_ENA                        (1 << 29)
+#       define R600_POSITION_SAMPLE                            (1 << 30)
+#       define R600_BARYC_AT_SAMPLE_ENA                        (1 << 31)
+#define R600_SPI_PS_IN_CONTROL_1                               0x286d0
+#       define R600_GEN_INDEX_PIX                              (1 << 0)
+#       define R600_GEN_INDEX_PIX_ADDR(x)                      ((x) << 1)
+#       define R600_FRONT_FACE_ENA                             (1 << 8)
+#       define R600_FRONT_FACE_CHAN(x)                         ((x) << 9)
+#       define R600_FRONT_FACE_ALL_BITS                        (1 << 11)
+#       define R600_FRONT_FACE_ADDR(x)                         ((x) << 12)
+#       define R600_FOG_ADDR(x)                                ((x) << 17)
+#       define R600_FIXED_PT_POSITION_ENA                      (1 << 24)
+#       define R600_FIXED_PT_POSITION_ADDR(x)                  ((x) << 25)
+#       define R700_POSITION_ULC                               (1 << 30)
+#define R600_SPI_INPUT_Z                                       0x286d8
+
+#define R600_SPI_CONFIG_CNTL                                   0x9100
+#       define R600_GPR_WRITE_PRIORITY(x)                      ((x) << 0)
+#       define R600_DISABLE_INTERP_1                           (1 << 5)
+#define R600_SPI_CONFIG_CNTL_1                                 0x913c
+#       define R600_VTX_DONE_DELAY(x)                          ((x) << 0)
+#       define R600_INTERP_ONE_PRIM_PER_ROW                    (1 << 4)
+
+#define R600_GB_TILING_CONFIG                                  0x98f0
+#       define R600_PIPE_TILING(x)                             ((x) << 1)
+#       define R600_BANK_TILING(x)                             ((x) << 4)
+#       define R600_GROUP_SIZE(x)                              ((x) << 6)
+#       define R600_ROW_TILING(x)                              ((x) << 8)
+#       define R600_BANK_SWAPS(x)                              ((x) << 11)
+#       define R600_SAMPLE_SPLIT(x)                            ((x) << 14)
+#       define R600_BACKEND_MAP(x)                             ((x) << 16)
+#define R600_DCP_TILING_CONFIG                                 0x6ca0
+#define R600_HDP_TILING_CONFIG                                 0x2f3c
+
+#define R600_CC_RB_BACKEND_DISABLE                             0x98f4
+#define R700_CC_SYS_RB_BACKEND_DISABLE                         0x3f88
+#       define R600_BACKEND_DISABLE(x)                         ((x) << 16)
+
+#define R600_CC_GC_SHADER_PIPE_CONFIG                          0x8950
+#define R600_GC_USER_SHADER_PIPE_CONFIG                        0x8954
+#       define R600_INACTIVE_QD_PIPES(x)                       ((x) << 8)
+#       define R600_INACTIVE_QD_PIPES_MASK                     (0xff << 8)
+#       define R600_INACTIVE_SIMDS(x)                          ((x) << 16)
+#       define R600_INACTIVE_SIMDS_MASK                        (0xff << 16)
+
+#define R700_CGTS_SYS_TCC_DISABLE                              0x3f90
+#define R700_CGTS_USER_SYS_TCC_DISABLE                         0x3f94
+#define R700_CGTS_TCC_DISABLE                                  0x9148
+#define R700_CGTS_USER_TCC_DISABLE                             0x914c
+
 /* Constants */
 #define RADEON_MAX_USEC_TIMEOUT		100000	/* 100 ms */
 
@@ -1190,6 +1734,11 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #define RADEON_LAST_SWI_REG		RADEON_SCRATCH_REG3
 #define RADEON_LAST_DISPATCH		1
 
+#define R600_LAST_FRAME_REG		R600_SCRATCH_REG0
+#define R600_LAST_DISPATCH_REG	        R600_SCRATCH_REG1
+#define R600_LAST_CLEAR_REG		R600_SCRATCH_REG2
+#define R600_LAST_SWI_REG		R600_SCRATCH_REG3
+
 #define RADEON_MAX_VB_AGE		0x7fffffff
 #define RADEON_MAX_VB_VERTS		(0xffff)
 
@@ -1198,7 +1747,15 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 #define RADEON_PCIGART_TABLE_SIZE      (32*1024)
 
 #define RADEON_READ(reg)	DRM_READ32(  dev_priv->mmio, (reg) )
-#define RADEON_WRITE(reg,val)	DRM_WRITE32( dev_priv->mmio, (reg), (val) )
+#define RADEON_WRITE(reg, val)                                          \
+do {									\
+	if (reg < 0x10000) {				                \
+		DRM_WRITE32(dev_priv->mmio, (reg), (val));		\
+	} else {                                                        \
+		DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, (reg));	\
+		DRM_WRITE32(dev_priv->mmio, RADEON_MM_DATA, (val));	\
+	}                                                               \
+} while (0)
 #define RADEON_READ8(reg)	DRM_READ8(  dev_priv->mmio, (reg) )
 #define RADEON_WRITE8(reg,val)	DRM_WRITE8( dev_priv->mmio, (reg), (val) )
 
@@ -1238,11 +1795,19 @@ do {								\
 	RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);	\
 } while (0)
 
+#define RS600_WRITE_MCIND(addr, val)				\
+do {							        \
+	RADEON_WRITE(RS600_MC_INDEX, RS600_MC_IND_WR_EN | RS600_MC_IND_CITF_ARB0 | ((addr) & RS600_MC_ADDR_MASK)); \
+	RADEON_WRITE(RS600_MC_DATA, val);                       \
+} while (0)
+
 #define IGP_WRITE_MCIND(addr, val)				\
 do {									\
 	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||   \
 	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))      \
 		RS690_WRITE_MCIND(addr, val);				\
+	else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)  \
+		RS600_WRITE_MCIND(addr, val);				\
 	else								\
 		RS480_WRITE_MCIND(addr, val);				\
 } while (0)
@@ -1346,7 +1911,11 @@ do {								\
 	struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv;	\
 	drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv;	\
 	if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) {		\
-		int __ret = radeon_do_cp_idle( dev_priv );		\
+		int __ret;						\
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
+			__ret = r600_do_cp_idle(dev_priv);		\
+		else							\
+			__ret = radeon_do_cp_idle(dev_priv);		\
 		if ( __ret ) return __ret;				\
 		sarea_priv->last_dispatch = 0;				\
 		radeon_freelist_reset( dev );				\
@@ -1368,21 +1937,40 @@ do {								\
 	OUT_RING( age );						\
 } while (0)
 
+#define R600_DISPATCH_AGE(age) do {					\
+	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));		\
+	OUT_RING((R600_LAST_DISPATCH_REG - R600_SET_CONFIG_REG_OFFSET) >> 2);  \
+	OUT_RING(age);							\
+} while (0)
+
+#define R600_FRAME_AGE(age) do {					\
+	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));		\
+	OUT_RING((R600_LAST_FRAME_REG - R600_SET_CONFIG_REG_OFFSET) >> 2);  \
+	OUT_RING(age);							\
+} while (0)
+
+#define R600_CLEAR_AGE(age) do {					\
+	OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1));		\
+	OUT_RING((R600_LAST_CLEAR_REG - R600_SET_CONFIG_REG_OFFSET) >> 2);  \
+	OUT_RING(age);							\
+} while (0)
+
 /* ================================================================
  * Ring control
  */
 
 #define RADEON_VERBOSE	0
 
-#define RING_LOCALS	int write, _nr; unsigned int mask; u32 *ring;
+#define RING_LOCALS	int write, _nr, _align_nr; unsigned int mask; u32 *ring;
 
 #define BEGIN_RING( n ) do {						\
 	if ( RADEON_VERBOSE ) {						\
 		DRM_INFO( "BEGIN_RING( %d )\n", (n));			\
 	}								\
-	if ( dev_priv->ring.space <= (n) * sizeof(u32) ) {		\
+	_align_nr = (n + 0xf) & ~0xf;					\
+	if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) {	\
                 COMMIT_RING();						\
-		radeon_wait_ring( dev_priv, (n) * sizeof(u32) );	\
+		radeon_wait_ring( dev_priv, _align_nr * sizeof(u32));	\
 	}								\
 	_nr = n; dev_priv->ring.space -= (n) * sizeof(u32);		\
 	ring = dev_priv->ring.start;					\
@@ -1399,19 +1987,16 @@ do {								\
 		DRM_ERROR(						\
 			"ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n",	\
 			((dev_priv->ring.tail + _nr) & mask),		\
-			write, __LINE__);						\
+			write, __LINE__);				\
 	} else								\
 		dev_priv->ring.tail = write;				\
 } while (0)
 
+extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
+
 #define COMMIT_RING() do {						\
-	/* Flush writes to ring */					\
-	DRM_MEMORYBARRIER();						\
-	GET_RING_HEAD( dev_priv );					\
-	RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail );		\
-	/* read from PCI bus to ensure correct posting */		\
-	RADEON_READ( RADEON_CP_RB_RPTR );				\
-} while (0)
+		radeon_commit_ring(dev_priv);				\
+	} while(0)
 
 #define OUT_RING( x ) do {						\
 	if ( RADEON_VERBOSE ) {						\
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index 8289e16419a8..9836c705a952 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -65,7 +65,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
 		switch (crtc) {
 		case 0:
 			r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1);
@@ -100,7 +100,7 @@ void radeon_disable_vblank(struct drm_device *dev, int crtc)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
 		switch (crtc) {
 		case 0:
 			r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0);
@@ -135,7 +135,7 @@ static inline u32 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 *r
 	u32 irq_mask = RADEON_SW_INT_TEST;
 
 	*r500_disp_int = 0;
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
 		/* vbl interrupts in a different place */
 
 		if (irqs & R500_DISPLAY_INT_STATUS) {
@@ -202,7 +202,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
 		DRM_WAKEUP(&dev_priv->swi_queue);
 
 	/* VBLANK interrupt */
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
 		if (r500_disp_int & R500_D1_VBLANK_INTERRUPT)
 			drm_handle_vblank(dev, 0);
 		if (r500_disp_int & R500_D2_VBLANK_INTERRUPT)
@@ -265,7 +265,7 @@ u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
 		return -EINVAL;
 	}
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
 		if (crtc == 0)
 			return RADEON_READ(R500_D1CRTC_FRAME_COUNT);
 		else
@@ -327,7 +327,7 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
 	u32 dummy;
 
 	/* Disable *all* interrupts */
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 
@@ -357,7 +357,7 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
 	if (!dev_priv)
 		return;
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
 	/* Disable *all* interrupts */
 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index ef940a079dcb..fa728ec6ed34 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1556,9 +1556,15 @@ static void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_master *
 	buf_priv->age = ++master_priv->sarea_priv->last_dispatch;
 
 	/* Emit the vertex buffer age */
-	BEGIN_RING(2);
-	RADEON_DISPATCH_AGE(buf_priv->age);
-	ADVANCE_RING();
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
+		BEGIN_RING(3);
+		R600_DISPATCH_AGE(buf_priv->age);
+		ADVANCE_RING();
+	} else {
+		BEGIN_RING(2);
+		RADEON_DISPATCH_AGE(buf_priv->age);
+		ADVANCE_RING();
+	}
 
 	buf->pending = 1;
 	buf->used = 0;
@@ -1980,7 +1986,7 @@ static int alloc_surface(drm_radeon_surface_alloc_t *new,
 
 	/* find a virtual surface */
 	for (i = 0; i < 2 * RADEON_MAX_SURFACES; i++)
-		if (dev_priv->virt_surfaces[i].file_priv == 0)
+		if (dev_priv->virt_surfaces[i].file_priv == NULL)
 			break;
 	if (i == 2 * RADEON_MAX_SURFACES) {
 		return -1;
@@ -2473,24 +2479,25 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil
 
 	buf->used = indirect->end;
 
-	/* Wait for the 3D stream to idle before the indirect buffer
-	 * containing 2D acceleration commands is processed.
-	 */
-	BEGIN_RING(2);
-
-	RADEON_WAIT_UNTIL_3D_IDLE();
-
-	ADVANCE_RING();
-
 	/* Dispatch the indirect buffer full of commands from the
 	 * X server.  This is insecure and is thus only available to
 	 * privileged clients.
 	 */
-	radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
-	if (indirect->discard) {
-		radeon_cp_discard_buffer(dev, file_priv->master, buf);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		r600_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
+	else {
+		/* Wait for the 3D stream to idle before the indirect buffer
+		 * containing 2D acceleration commands is processed.
+		 */
+		BEGIN_RING(2);
+		RADEON_WAIT_UNTIL_3D_IDLE();
+		ADVANCE_RING();
+		radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
 	}
 
+	if (indirect->discard)
+		radeon_cp_discard_buffer(dev, file_priv->master, buf);
+
 	COMMIT_RING();
 	return 0;
 }
@@ -3010,14 +3017,14 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
 		break;
 	case RADEON_PARAM_LAST_FRAME:
 		dev_priv->stats.last_frame_reads++;
-		value = GET_SCRATCH(0);
+		value = GET_SCRATCH(dev_priv, 0);
 		break;
 	case RADEON_PARAM_LAST_DISPATCH:
-		value = GET_SCRATCH(1);
+		value = GET_SCRATCH(dev_priv, 1);
 		break;
 	case RADEON_PARAM_LAST_CLEAR:
 		dev_priv->stats.last_clear_reads++;
-		value = GET_SCRATCH(2);
+		value = GET_SCRATCH(dev_priv, 2);
 		break;
 	case RADEON_PARAM_IRQ_NR:
 		value = drm_dev_to_irq(dev);
@@ -3052,7 +3059,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
 	case RADEON_PARAM_SCRATCH_OFFSET:
 		if (!dev_priv->writeback_works)
 			return -EINVAL;
-		value = RADEON_SCRATCH_REG_OFFSET;
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+			value = R600_SCRATCH_REG_OFFSET;
+		else
+			value = RADEON_SCRATCH_REG_OFFSET;
 		break;
 	case RADEON_PARAM_CARD_TYPE:
 		if (dev_priv->flags & RADEON_IS_PCIE)
@@ -3155,6 +3165,7 @@ void radeon_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
 
 void radeon_driver_lastclose(struct drm_device *dev)
 {
+	radeon_surfaces_release(PCIGART_FILE_PRIV, dev->dev_private);
 	radeon_do_release(dev);
 }
 
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index d465b2f9c1cd..456cd040f31a 100644
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -599,8 +599,8 @@ int savage_driver_firstopen(struct drm_device *dev)
 			    drm_mtrr_add(dev_priv->mtrr[2].base,
 					 dev_priv->mtrr[2].size, DRM_MTRR_WC);
 		} else {
-			DRM_ERROR("strange pci_resource_len %08lx\n",
-				  drm_get_resource_len(dev, 0));
+			DRM_ERROR("strange pci_resource_len %08llx\n",
+				  (unsigned long long)drm_get_resource_len(dev, 0));
 		}
 	} else if (dev_priv->chipset != S3_SUPERSAVAGE &&
 		   dev_priv->chipset != S3_SAVAGE2000) {
@@ -620,8 +620,8 @@ int savage_driver_firstopen(struct drm_device *dev)
 			    drm_mtrr_add(dev_priv->mtrr[0].base,
 					 dev_priv->mtrr[0].size, DRM_MTRR_WC);
 		} else {
-			DRM_ERROR("strange pci_resource_len %08lx\n",
-				  drm_get_resource_len(dev, 1));
+			DRM_ERROR("strange pci_resource_len %08llx\n",
+				  (unsigned long long)drm_get_resource_len(dev, 1));
 		}
 	} else {
 		mmio_base = drm_get_resource_start(dev, 0);
diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index 0993b441fc42..bc2f51843005 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -28,11 +28,6 @@
 
 #include "drm_pciids.h"
 
-static int dri_library_name(struct drm_device *dev, char *buf)
-{
-	return snprintf(buf, PAGE_SIZE, "unichrome");
-}
-
 static struct pci_device_id pciidlist[] = {
 	viadrv_PCI_IDS
 };
@@ -52,7 +47,6 @@ static struct drm_driver driver = {
 	.irq_uninstall = via_driver_irq_uninstall,
 	.irq_handler = via_driver_irq_handler,
 	.dma_quiescent = via_driver_dma_quiescent,
-	.dri_library_name = dri_library_name,
 	.reclaim_buffers = drm_core_reclaim_buffers,
 	.reclaim_buffers_locked = NULL,
 	.reclaim_buffers_idlelocked = via_reclaim_buffers_locked,