diff options
| author | Michel Dänzer <daenzer@vmware.com> | 2009-08-13 11:10:51 +0200 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-08-16 08:36:19 +1000 |
| commit | 7ed220d738cf16adff6bc3b31ad25b8848a2fa9c (patch) | |
| tree | a751003e7cf1dc63ea478181dffef936f04cc24e /drivers/gpu/drm/radeon/radeon_reg.h | |
| parent | 3f8befec95d5c1bbc6e247e1a5dafa82519530f9 (diff) | |
drm/radeon/kms: Fix up vertical blank interrupt support.
Fixes 3D apps timing out in the WAIT_VBLANK ioctl.
AVIVO bits compile-tested only.
Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index e1b618574461..5a098f304edb 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h @@ -982,12 +982,15 @@ # define RS400_TMDS2_PLLRST (1 << 1) #define RADEON_GEN_INT_CNTL 0x0040 +# define RADEON_CRTC_VBLANK_MASK (1 << 0) +# define RADEON_CRTC2_VBLANK_MASK (1 << 9) # define RADEON_SW_INT_ENABLE (1 << 25) #define RADEON_GEN_INT_STATUS 0x0044 -# define RADEON_VSYNC_INT_AK (1 << 2) -# define RADEON_VSYNC_INT (1 << 2) -# define RADEON_VSYNC2_INT_AK (1 << 6) -# define RADEON_VSYNC2_INT (1 << 6) +# define AVIVO_DISPLAY_INT_STATUS (1 << 0) +# define RADEON_CRTC_VBLANK_STAT (1 << 0) +# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) +# define RADEON_CRTC2_VBLANK_STAT (1 << 9) +# define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9) # define RADEON_SW_INT_FIRE (1 << 26) # define RADEON_SW_INT_TEST (1 << 25) # define RADEON_SW_INT_TEST_ACK (1 << 25) |