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| author | Alex Deucher <alexander.deucher@amd.com> | 2015-05-11 22:01:50 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-05-26 10:31:21 -0400 |
| commit | 0fda42ac40ac7edf62ebb750be41a34902d2fdfb (patch) | |
| tree | 4bff5393a59f5841726936c6b99daf16cb4e6074 /drivers/gpu/drm/radeon/nid.h | |
| parent | b7af630c13adc4be3bd8725f3a6e22fd89cb2938 (diff) | |
drm/radeon: implement tn_set_vce_clocks
This implements the function to set the vce clocks
on TN hardware.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/nid.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/nid.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index 3b290838918c..47eb49b77d32 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h @@ -46,6 +46,13 @@ #define DMIF_ADDR_CONFIG 0xBD4 +/* fusion vce clocks */ +#define CG_ECLK_CNTL 0x620 +# define ECLK_DIVIDER_MASK 0x7f +# define ECLK_DIR_CNTL_EN (1 << 8) +#define CG_ECLK_STATUS 0x624 +# define ECLK_STATUS (1 << 0) + /* DCE6 only */ #define DMIF_ADDR_CALC 0xC00 |