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authorPhilipp Zabel <p.zabel@pengutronix.de>2019-01-17 12:05:02 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2019-06-14 14:07:34 +0200
commit72bccb487fd55a3b5e753cf9f554f9980a228e8e (patch)
tree1b034fd0f2d967441e665de55f3ce40e8c232b66 /drivers/gpu/drm/imx/ipuv3-plane.c
parentd1fdb6d8f6a4109a4263176c84b899076a5f8008 (diff)
drm/imx: enable IDMAC watermark feature
The DMFC is configured to supply a watermark signal that can be used to temporarily increase channel priority if the FIFO runs low. Use it. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/imx/ipuv3-plane.c')
-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 91edfe2498a6..759181982bee 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -638,6 +638,7 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
+ ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);