diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-11-23 14:19:32 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-11-24 13:33:50 +0100 |
| commit | b6e4d53490504ee43a765e71a8fd8337af137623 (patch) | |
| tree | 643aec34611a5256a80910d1c7bd3cbe621eeeb8 /drivers/gpu/drm/i915/intel_psr.c | |
| parent | 05eec3c2709d8966cbfcc7cd395f37889c492678 (diff) | |
drm/i915: Also disable PSR on Sink when disabling it on Source.
It is not a bad idea to disable the PSR feature on Sink
when we are disabling on the Source.
v2: Move dpcd write inside mutex protected area as suggested by Sonika.
Cc: Sonika Jindal <sonika.jindal@intel.com>
Suggested-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_psr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index a02dd3015b91..b6609e648f75 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -524,11 +524,15 @@ void intel_psr_disable(struct intel_dp *intel_dp) return; } + /* Disable PSR on Source */ if (HAS_DDI(dev)) hsw_psr_disable(intel_dp); else vlv_psr_disable(intel_dp); + /* Disable PSR on Sink */ + drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); + dev_priv->psr.enabled = NULL; mutex_unlock(&dev_priv->psr.lock); |