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authorMichal Simek <michal.simek@xilinx.com>2013-06-03 14:31:19 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-06-17 07:47:33 +0200
commit9f7f0b2bbcff719233e6724d756a8c93d3285ade (patch)
tree38a6c736cca4ee8598783decfd16495bda07341f /drivers/gpio/gpio-xilinx.c
parentcc090d61d1a88f30f2fb75a91bce684ad1bd2e94 (diff)
GPIO: xilinx: Use BIT macro
Use BIT macro from linux/bitops.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-xilinx.c')
-rw-r--r--drivers/gpio/gpio-xilinx.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 791ddaedbfb4..792a05ad4649 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -94,9 +94,9 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
/* Write to GPIO signal and set its direction to output */
if (val)
- chip->gpio_state |= 1 << gpio;
+ chip->gpio_state |= BIT(gpio);
else
- chip->gpio_state &= ~(1 << gpio);
+ chip->gpio_state &= ~BIT(gpio);
xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
chip->gpio_state);
@@ -124,7 +124,7 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
spin_lock_irqsave(&chip->gpio_lock, flags);
/* Set the GPIO bit in shadow register and set direction as input */
- chip->gpio_dir |= (1 << gpio);
+ chip->gpio_dir |= BIT(gpio);
xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
spin_unlock_irqrestore(&chip->gpio_lock, flags);
@@ -154,14 +154,14 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
/* Write state of GPIO signal */
if (val)
- chip->gpio_state |= 1 << gpio;
+ chip->gpio_state |= BIT(gpio);
else
- chip->gpio_state &= ~(1 << gpio);
+ chip->gpio_state &= ~BIT(gpio);
xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
chip->gpio_state);
/* Clear the GPIO bit in shadow register and set direction as output */
- chip->gpio_dir &= (~(1 << gpio));
+ chip->gpio_dir &= ~BIT(gpio);
xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
spin_unlock_irqrestore(&chip->gpio_lock, flags);