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| author | Stephen Boyd <sboyd@codeaurora.org> | 2017-06-14 16:48:03 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-06-14 16:48:03 -0700 |
| commit | 949bdfed4b0f74215da60992e9f5e14c9ecbb064 (patch) | |
| tree | 4c5ff96d9e35f4febe334f36d9b57f8fdf54f58b /drivers/edac | |
| parent | 658a7568030e287215b069a9c383c0fd0c5f57d5 (diff) | |
| parent | d85da227c3ae43d9ca513d60f244213cb4e55485 (diff) | |
Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes
Allwinner clock fixes for 4.12
Some fixes that fix some bindings that went in 4.12, fix a few reset and
clock offsets and a build error fix
* tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
clk: sunxi-ng: v3s: Fix usb otg device reset bit
clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
Diffstat (limited to 'drivers/edac')
0 files changed, 0 insertions, 0 deletions