diff options
| author | Borislav Petkov <borislav.petkov@amd.com> | 2010-08-27 17:03:34 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@amd64.org> | 2010-10-21 14:48:02 +0200 |
| commit | ded506232865e8e932bc21c87f48170d50db4d97 (patch) | |
| tree | c773d4644925eade05a9f0876e98c70750f6e97a /drivers/edac/mce_amd.c | |
| parent | dd53bce4e8987f6848840d42bbeead5221eff308 (diff) | |
EDAC, MCE: Warn about LS MCEs on F14h
F14h CPUs do not generate LS MCEs so exit early and warn the user in
case this path is ever hit that something else might be going haywire.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/mce_amd.c')
| -rw-r--r-- | drivers/edac/mce_amd.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 60d5d9f4dfee..3c161672a84b 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -339,19 +339,27 @@ wrong_bu_mce: static void amd_decode_ls_mce(struct mce *m) { - u32 ec = m->status & 0xffff; - u32 xec = (m->status >> 16) & 0xf; + u16 ec = m->status & 0xffff; + u8 xec = (m->status >> 16) & 0xf; + + if (boot_cpu_data.x86 == 0x14) { + pr_emerg("You shouldn't be seeing an LS MCE on this cpu family," + " please report on LKML.\n"); + return; + } pr_emerg(HW_ERR "Load Store Error"); if (xec == 0x0) { - u8 rrrr = (ec >> 4) & 0xf; + u8 r4 = (ec >> 4) & 0xf; - if (!BUS_ERROR(ec) || (rrrr != 0x3 && rrrr != 0x4)) + if (!BUS_ERROR(ec) || (r4 != R4_DRD && r4 != R4_DWR)) goto wrong_ls_mce; pr_cont(" during %s.\n", RRRR_MSG(ec)); - } + } else + goto wrong_ls_mce; + return; wrong_ls_mce: |