diff options
| author | Tom Lendacky <thomas.lendacky@amd.com> | 2018-07-03 12:11:52 -0500 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2018-07-13 18:26:48 +0800 |
| commit | 03af91242c36f225c6fa79e143fad5f4c3624a46 (patch) | |
| tree | 09d23031e0d2fa66201da18557e9ae420552c628 /drivers/crypto/ccp | |
| parent | 015c8c85b721e93bcd6a3f4b5be63112ecb331c4 (diff) | |
crypto: ccp - Remove unused #defines
Remove some unused #defines for register offsets that are not used. This
will lessen the changes required when register offsets change between
versions of the device.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gary R Hook <gary.hook@amd.com>
Reviewed-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccp')
| -rw-r--r-- | drivers/crypto/ccp/psp-dev.c | 2 | ||||
| -rw-r--r-- | drivers/crypto/ccp/psp-dev.h | 10 |
2 files changed, 2 insertions, 10 deletions
diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c index 91ef6ed2fea2..875756dd9024 100644 --- a/drivers/crypto/ccp/psp-dev.c +++ b/drivers/crypto/ccp/psp-dev.c @@ -65,7 +65,7 @@ static irqreturn_t psp_irq_handler(int irq, void *data) status = ioread32(psp->io_regs + PSP_P2CMSG_INTSTS); /* Check if it is command completion: */ - if (!(status & BIT(PSP_CMD_COMPLETE_REG))) + if (!(status & PSP_CMD_COMPLETE)) goto done; /* Check if it is SEV command completion: */ diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h index c7e9098a233c..5d46a2bebfd1 100644 --- a/drivers/crypto/ccp/psp-dev.h +++ b/drivers/crypto/ccp/psp-dev.h @@ -36,19 +36,11 @@ #define PSP_CMDBUFF_ADDR_HI PSP_C2PMSG(57) #define PSP_FEATURE_REG PSP_C2PMSG(63) -#define PSP_P2CMSG(_num) ((_num) << 2) -#define PSP_CMD_COMPLETE_REG 1 -#define PSP_CMD_COMPLETE PSP_P2CMSG(PSP_CMD_COMPLETE_REG) +#define PSP_CMD_COMPLETE BIT(1) #define PSP_P2CMSG_INTEN 0x0110 #define PSP_P2CMSG_INTSTS 0x0114 -#define PSP_C2PMSG_ATTR_0 0x0118 -#define PSP_C2PMSG_ATTR_1 0x011c -#define PSP_C2PMSG_ATTR_2 0x0120 -#define PSP_C2PMSG_ATTR_3 0x0124 -#define PSP_P2CMSG_ATTR_0 0x0128 - #define PSP_CMDRESP_CMD_SHIFT 16 #define PSP_CMDRESP_IOC BIT(0) #define PSP_CMDRESP_RESP BIT(31) |