diff options
author | Stephen Boyd <sboyd@kernel.org> | 2024-01-09 11:52:49 -0800 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2024-01-09 11:52:49 -0800 |
commit | 23bd8c4ad182534ba4096ca657c27cdbe7a49aec (patch) | |
tree | e4617bc764514f8cbdd99eca8ba47cf70601578c /drivers/clk | |
parent | 8066514dc53dd649be6b24a7a92c3602d42357d7 (diff) | |
parent | f1b591217fd0b5dc419f6ca05790c24c8f84c278 (diff) | |
parent | 93beaa981a2d10ad749fdf8650ddb5d936636f09 (diff) | |
parent | 145916f6895addab982a8ba13451da9d19e31e27 (diff) | |
parent | 4b4719437d85f0173d344f2c76fa1a5b7f7d184b (diff) |
Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next
* clk-imx:
clk: imx: pll14xx: change naming of fvco to fout
clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
dt-bindings: clock: support i.MX93 ANATOP clock module
* clk-qcom: (41 commits)
clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
clk: qcom: dispcc-sm8550: Update disp PLL settings
clk: qcom: gpucc-sm8550: Update GPU PLL settings
clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
clk: qcom: videocc-sm8150: Add runtime PM support
clk: qcom: videocc-sm8150: Add missing PLL config property
clk: qcom: videocc-sm8150: Update the videocc resets
dt-bindings: clock: Update the videocc resets for sm8150
clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
dt-bindings: clock: qcom: Add X1E80100 GCC clocks
clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
clk: qcom: branch: Add mem ops support for branch2 clocks
...
* clk-amlogic:
clk: meson: g12a: add CSI & ISP gates clocks
clk: meson: g12a: add MIPI ISP clocks
dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
* clk-mediatek:
clk: mediatek: add drivers for MT7988 SoC
clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
dt-bindings: clock: mediatek: add clock controllers of MT7988
dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
dt-bindings: clock: mediatek: add MT7988 clock IDs
clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
clk: mediatek: clk-mux: Support custom parent indices for muxes
dt-bindings: clock: brcm,kona-ccu: convert to YAML
dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
dt-bindings: Remove alt_ref from versal