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authorMichael Turquette <mturquette@baylibre.com>2017-12-21 09:00:53 -0800
committerMichael Turquette <mturquette@baylibre.com>2017-12-21 09:00:53 -0800
commit7956a0319eadbb53c8f2cd7e689f99445636ebf2 (patch)
tree578b1a05c422b37204eddee8d29f1049ff59846b /drivers/clk/ti/clock.h
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323 (diff)
parent7558562a70fbd6b3fa746fa33c76c9333aa0bb32 (diff)
Merge tag 'omap-for-v4.16/clk-omap3-legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into clk-omap
Drop unused omap3 clock data We have been booting omap3 in device tree only mode for a while now, so this is all unused now.
Diffstat (limited to 'drivers/clk/ti/clock.h')
-rw-r--r--drivers/clk/ti/clock.h73
1 files changed, 3 insertions, 70 deletions
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index 561dbe99ced7..1654da96ad65 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -92,17 +92,6 @@ struct ti_clk {
struct clk *clk;
};
-struct ti_clk_alias {
- struct ti_clk *clk;
- struct clk_lookup lk;
- struct list_head link;
-};
-
-struct ti_clk_fixed {
- u32 frequency;
- u16 flags;
-};
-
struct ti_clk_mux {
u8 bit_shift;
int num_parents;
@@ -123,13 +112,6 @@ struct ti_clk_divider {
u16 flags;
};
-struct ti_clk_fixed_factor {
- const char *parent;
- u16 div;
- u16 mult;
- u16 flags;
-};
-
struct ti_clk_gate {
const char *parent;
u8 bit_shift;
@@ -138,44 +120,6 @@ struct ti_clk_gate {
u16 flags;
};
-struct ti_clk_composite {
- struct ti_clk_divider *divider;
- struct ti_clk_mux *mux;
- struct ti_clk_gate *gate;
- u16 flags;
-};
-
-struct ti_clk_clkdm_gate {
- const char *parent;
- u16 flags;
-};
-
-struct ti_clk_dpll {
- int num_parents;
- u16 control_reg;
- u16 idlest_reg;
- u16 autoidle_reg;
- u16 mult_div1_reg;
- u8 module;
- const char **parents;
- u16 flags;
- u8 modes;
- u32 mult_mask;
- u32 div1_mask;
- u32 enable_mask;
- u32 autoidle_mask;
- u32 freqsel_mask;
- u32 idlest_mask;
- u32 dco_mask;
- u32 sddiv_mask;
- u16 max_multiplier;
- u16 max_divider;
- u8 min_divider;
- u8 auto_recal_bit;
- u8 recal_en_bit;
- u8 recal_st_bit;
-};
-
/* Composite clock component types */
enum {
CLK_COMPONENT_TYPE_GATE = 0,
@@ -221,6 +165,7 @@ struct omap_clkctrl_reg_data {
const struct omap_clkctrl_bit_data *bit_data;
u16 flags;
const char *parent;
+ const char *clkdm_name;
};
struct omap_clkctrl_data {
@@ -234,35 +179,23 @@ extern const struct omap_clkctrl_data omap4_clkctrl_data[];
#define CLKF_HW_SUP BIT(1)
#define CLKF_NO_IDLEST BIT(2)
-typedef void (*ti_of_clk_init_cb_t)(struct clk_hw *, struct device_node *);
+typedef void (*ti_of_clk_init_cb_t)(void *, struct device_node *);
-struct clk *ti_clk_register_gate(struct ti_clk *setup);
-struct clk *ti_clk_register_interface(struct ti_clk *setup);
-struct clk *ti_clk_register_mux(struct ti_clk *setup);
-struct clk *ti_clk_register_divider(struct ti_clk *setup);
-struct clk *ti_clk_register_composite(struct ti_clk *setup);
-struct clk *ti_clk_register_dpll(struct ti_clk *setup);
struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
const char *con);
int ti_clk_add_alias(struct device *dev, struct clk *clk, const char *con);
void ti_clk_add_aliases(void);
-struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);
-struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);
struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
u8 flags, u8 *width,
const struct clk_div_table **table);
-void ti_clk_patch_legacy_clks(struct ti_clk **patch);
-struct clk *ti_clk_register_clk(struct ti_clk *setup);
-int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);
-
int ti_clk_get_reg_addr(struct device_node *node, int index,
struct clk_omap_reg *reg);
void ti_dt_clocks_register(struct ti_dt_clk *oclks);
-int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
+int ti_clk_retry_init(struct device_node *node, void *user,
ti_of_clk_init_cb_t func);
int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);