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authorKrzysztof Kozlowski <krzk@kernel.org>2020-09-02 17:02:44 +0200
committerShawn Guo <shawnguo@kernel.org>2020-09-07 11:08:50 +0800
commitcca87e5cbd98897e06322a29a1dcac7a3c0f5ed1 (patch)
tree80afc08606daa0154591bd1f3fd876f43261efd9 /drivers/clk/imx/clk-pllv3.c
parent4757d2a3a32126be8bf5acb6eb293d0a1310dc1b (diff)
clk: imx: Fix and update kerneldoc
Fix and add missing kerneldoc to fix compile warnings like: drivers/clk/imx/clk-pfd.c:27: warning: Function parameter or member 'hw' not described in 'clk_pfd' drivers/clk/imx/clk-pllv3.c:53: warning: Function parameter or member 'ref_clock' not described in 'clk_pllv3' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-pllv3.c')
-rw-r--r--drivers/clk/imx/clk-pllv3.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index b20cdea3e9cc..20ee9611ba6e 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -30,12 +30,15 @@
/**
* struct clk_pllv3 - IMX PLL clock version 3
- * @clk_hw: clock source
+ * @hw: clock source
* @base: base address of PLL registers
* @power_bit: pll power bit mask
* @powerup_set: set power_bit to power up the PLL
* @div_mask: mask of divider bits
* @div_shift: shift of divider bits
+ * @ref_clock: reference clock rate
+ * @num_offset: num register offset
+ * @denom_offset: denom register offset
*
* IMX PLL clock version 3, found on i.MX6 series. Divider for pllv3
* is actually a multiplier, and always sits at bit 0.