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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-19 17:22:07 +0900 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-10-19 13:15:05 -0700 |
commit | 5c6201e60a57c6b240d446c8a2d83063283b2743 (patch) | |
tree | 8a53ad79d5dd16309da710f64688b550ab9f16bf /drivers/clk/at91 | |
parent | 7d36b9c102318aa86aceb074359305da88ce9ef9 (diff) |
clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs
I made a mistake as for naming for this block. The MIO block is not
implemented for these 3 SoCs in the first place. The current naming
will be a trouble if an SoC with both MIO and SD-ctrl blocks appear
in the future.
This driver has just been merged in the previous merge window.
Rename it before the release.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/at91')
0 files changed, 0 insertions, 0 deletions